11369Sdduvall /* 21369Sdduvall * CDDL HEADER START 31369Sdduvall * 41369Sdduvall * The contents of this file are subject to the terms of the 51369Sdduvall * Common Development and Distribution License (the "License"). 61369Sdduvall * You may not use this file except in compliance with the License. 71369Sdduvall * 81369Sdduvall * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 91369Sdduvall * or http://www.opensolaris.org/os/licensing. 101369Sdduvall * See the License for the specific language governing permissions 111369Sdduvall * and limitations under the License. 121369Sdduvall * 131369Sdduvall * When distributing Covered Code, include this CDDL HEADER in each 141369Sdduvall * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 151369Sdduvall * If applicable, add the following below this CDDL HEADER, with the 161369Sdduvall * fields enclosed by brackets "[]" replaced with your own identifying 171369Sdduvall * information: Portions Copyright [yyyy] [name of copyright owner] 181369Sdduvall * 191369Sdduvall * CDDL HEADER END 201369Sdduvall */ 211369Sdduvall 221369Sdduvall /* 231369Sdduvall * Copyright 2006 Sun Microsystems, Inc. All rights reserved. 241369Sdduvall * Use is subject to license terms. 251369Sdduvall */ 261369Sdduvall 271369Sdduvall #pragma ident "%Z%%M% %I% %E% SMI" 281369Sdduvall 291369Sdduvall #include "sys/bge_impl2.h" 301369Sdduvall #include <sys/sdt.h> 311369Sdduvall 321369Sdduvall /* 331369Sdduvall * This is the string displayed by modinfo, etc. 341369Sdduvall * Make sure you keep the version ID up to date! 351369Sdduvall */ 361908Sly149593 static char bge_ident[] = "Broadcom Gb Ethernet v0.52"; 371369Sdduvall 381369Sdduvall /* 391369Sdduvall * Property names 401369Sdduvall */ 411369Sdduvall static char debug_propname[] = "bge-debug-flags"; 421369Sdduvall static char clsize_propname[] = "cache-line-size"; 431369Sdduvall static char latency_propname[] = "latency-timer"; 441369Sdduvall static char localmac_boolname[] = "local-mac-address?"; 451369Sdduvall static char localmac_propname[] = "local-mac-address"; 461369Sdduvall static char macaddr_propname[] = "mac-address"; 471369Sdduvall static char subdev_propname[] = "subsystem-id"; 481369Sdduvall static char subven_propname[] = "subsystem-vendor-id"; 491369Sdduvall static char rxrings_propname[] = "bge-rx-rings"; 501369Sdduvall static char txrings_propname[] = "bge-tx-rings"; 511865Sdilpreet static char fm_cap[] = "fm-capable"; 521908Sly149593 static char default_mtu[] = "default_mtu"; 531369Sdduvall 541369Sdduvall static int bge_add_intrs(bge_t *, int); 551369Sdduvall static void bge_rem_intrs(bge_t *); 561369Sdduvall 571369Sdduvall /* 581369Sdduvall * Describes the chip's DMA engine 591369Sdduvall */ 601369Sdduvall static ddi_dma_attr_t dma_attr = { 611369Sdduvall DMA_ATTR_V0, /* dma_attr version */ 621369Sdduvall 0x0000000000000000ull, /* dma_attr_addr_lo */ 631369Sdduvall 0xFFFFFFFFFFFFFFFFull, /* dma_attr_addr_hi */ 641369Sdduvall 0x00000000FFFFFFFFull, /* dma_attr_count_max */ 651369Sdduvall 0x0000000000000001ull, /* dma_attr_align */ 661369Sdduvall 0x00000FFF, /* dma_attr_burstsizes */ 671369Sdduvall 0x00000001, /* dma_attr_minxfer */ 681369Sdduvall 0x000000000000FFFFull, /* dma_attr_maxxfer */ 691369Sdduvall 0xFFFFFFFFFFFFFFFFull, /* dma_attr_seg */ 701369Sdduvall 1, /* dma_attr_sgllen */ 711369Sdduvall 0x00000001, /* dma_attr_granular */ 721865Sdilpreet DDI_DMA_FLAGERR /* dma_attr_flags */ 731369Sdduvall }; 741369Sdduvall 751369Sdduvall /* 761369Sdduvall * PIO access attributes for registers 771369Sdduvall */ 781369Sdduvall static ddi_device_acc_attr_t bge_reg_accattr = { 791369Sdduvall DDI_DEVICE_ATTR_V0, 801369Sdduvall DDI_NEVERSWAP_ACC, 811865Sdilpreet DDI_STRICTORDER_ACC, 821865Sdilpreet DDI_FLAGERR_ACC 831369Sdduvall }; 841369Sdduvall 851369Sdduvall /* 861369Sdduvall * DMA access attributes for descriptors: NOT to be byte swapped. 871369Sdduvall */ 881369Sdduvall static ddi_device_acc_attr_t bge_desc_accattr = { 891369Sdduvall DDI_DEVICE_ATTR_V0, 901369Sdduvall DDI_NEVERSWAP_ACC, 911865Sdilpreet DDI_STRICTORDER_ACC, 921865Sdilpreet DDI_FLAGERR_ACC 931369Sdduvall }; 941369Sdduvall 951369Sdduvall /* 961369Sdduvall * DMA access attributes for data: NOT to be byte swapped. 971369Sdduvall */ 981369Sdduvall static ddi_device_acc_attr_t bge_data_accattr = { 991369Sdduvall DDI_DEVICE_ATTR_V0, 1001369Sdduvall DDI_NEVERSWAP_ACC, 1011369Sdduvall DDI_STRICTORDER_ACC 1021369Sdduvall }; 1031369Sdduvall 1041369Sdduvall static ether_addr_t bge_broadcast_addr = { 1051369Sdduvall 0xff, 0xff, 0xff, 0xff, 0xff, 0xff 1061369Sdduvall }; 1071369Sdduvall 1081369Sdduvall /* 1091369Sdduvall * Versions of the O/S up to Solaris 8 didn't support network booting 1101369Sdduvall * from any network interface except the first (NET0). Patching this 1111369Sdduvall * flag to a non-zero value will tell the driver to work around this 1121369Sdduvall * limitation by creating an extra (internal) pathname node. To do 1131369Sdduvall * this, just add a line like the following to the CLIENT'S etc/system 1141369Sdduvall * file ON THE ROOT FILESYSTEM SERVER before booting the client: 1151369Sdduvall * 1161369Sdduvall * set bge:bge_net1_boot_support = 1; 1171369Sdduvall */ 1181369Sdduvall static uint32_t bge_net1_boot_support = 1; 1191369Sdduvall 120*2311Sseb static int bge_m_start(void *); 121*2311Sseb static void bge_m_stop(void *); 122*2311Sseb static int bge_m_promisc(void *, boolean_t); 123*2311Sseb static int bge_m_multicst(void *, boolean_t, const uint8_t *); 124*2311Sseb static int bge_m_unicst(void *, const uint8_t *); 125*2311Sseb static void bge_m_resources(void *); 126*2311Sseb static void bge_m_ioctl(void *, queue_t *, mblk_t *); 127*2311Sseb static boolean_t bge_m_getcapab(void *, mac_capab_t, void *); 128*2311Sseb 129*2311Sseb #define BGE_M_CALLBACK_FLAGS (MC_RESOURCES | MC_IOCTL | MC_GETCAPAB) 130*2311Sseb 131*2311Sseb static mac_callbacks_t bge_m_callbacks = { 132*2311Sseb BGE_M_CALLBACK_FLAGS, 133*2311Sseb bge_m_stat, 134*2311Sseb bge_m_start, 135*2311Sseb bge_m_stop, 136*2311Sseb bge_m_promisc, 137*2311Sseb bge_m_multicst, 138*2311Sseb bge_m_unicst, 139*2311Sseb bge_m_tx, 140*2311Sseb bge_m_resources, 141*2311Sseb bge_m_ioctl, 142*2311Sseb bge_m_getcapab 143*2311Sseb }; 144*2311Sseb 1451369Sdduvall /* 1461369Sdduvall * ========== Transmit and receive ring reinitialisation ========== 1471369Sdduvall */ 1481369Sdduvall 1491369Sdduvall /* 1501369Sdduvall * These <reinit> routines each reset the specified ring to an initial 1511369Sdduvall * state, assuming that the corresponding <init> routine has already 1521369Sdduvall * been called exactly once. 1531369Sdduvall */ 1541369Sdduvall 1551369Sdduvall static void 1561369Sdduvall bge_reinit_send_ring(send_ring_t *srp) 1571369Sdduvall { 1581369Sdduvall /* 1591369Sdduvall * Reinitialise control variables ... 1601369Sdduvall */ 1611369Sdduvall ASSERT(srp->tx_flow == 0); 1621369Sdduvall srp->tx_next = 0; 1631369Sdduvall srp->tx_free = srp->desc.nslots; 1641369Sdduvall 1651369Sdduvall ASSERT(mutex_owned(srp->tc_lock)); 1661369Sdduvall srp->tc_next = 0; 1671369Sdduvall 1681369Sdduvall /* 1691369Sdduvall * Zero and sync all the h/w Send Buffer Descriptors 1701369Sdduvall */ 1711369Sdduvall DMA_ZERO(srp->desc); 1721369Sdduvall DMA_SYNC(srp->desc, DDI_DMA_SYNC_FORDEV); 1731369Sdduvall } 1741369Sdduvall 1751369Sdduvall static void 1761369Sdduvall bge_reinit_recv_ring(recv_ring_t *rrp) 1771369Sdduvall { 1781369Sdduvall /* 1791369Sdduvall * Reinitialise control variables ... 1801369Sdduvall */ 1811369Sdduvall rrp->rx_next = 0; 1821369Sdduvall } 1831369Sdduvall 1841369Sdduvall static void 1851369Sdduvall bge_reinit_buff_ring(buff_ring_t *brp, uint64_t ring) 1861369Sdduvall { 1871369Sdduvall bge_rbd_t *hw_rbd_p; 1881369Sdduvall sw_rbd_t *srbdp; 1891369Sdduvall uint32_t bufsize; 1901369Sdduvall uint32_t nslots; 1911369Sdduvall uint32_t slot; 1921369Sdduvall 1931369Sdduvall static uint16_t ring_type_flag[BGE_BUFF_RINGS_MAX] = { 1941369Sdduvall RBD_FLAG_STD_RING, 1951369Sdduvall RBD_FLAG_JUMBO_RING, 1961369Sdduvall RBD_FLAG_MINI_RING 1971369Sdduvall }; 1981369Sdduvall 1991369Sdduvall /* 2001369Sdduvall * Zero, initialise and sync all the h/w Receive Buffer Descriptors 2011369Sdduvall * Note: all the remaining fields (<type>, <flags>, <ip_cksum>, 2021369Sdduvall * <tcp_udp_cksum>, <error_flag>, <vlan_tag>, and <reserved>) 2031369Sdduvall * should be zeroed, and so don't need to be set up specifically 2041369Sdduvall * once the whole area has been cleared. 2051369Sdduvall */ 2061369Sdduvall DMA_ZERO(brp->desc); 2071369Sdduvall 2081369Sdduvall hw_rbd_p = DMA_VPTR(brp->desc); 2091369Sdduvall nslots = brp->desc.nslots; 2101369Sdduvall ASSERT(brp->buf[0].nslots == nslots/BGE_SPLIT); 2111369Sdduvall bufsize = brp->buf[0].size; 2121369Sdduvall srbdp = brp->sw_rbds; 2131369Sdduvall for (slot = 0; slot < nslots; ++hw_rbd_p, ++srbdp, ++slot) { 2141369Sdduvall hw_rbd_p->host_buf_addr = srbdp->pbuf.cookie.dmac_laddress; 2151369Sdduvall hw_rbd_p->index = slot; 2161369Sdduvall hw_rbd_p->len = bufsize; 2171369Sdduvall hw_rbd_p->opaque = srbdp->pbuf.token; 2181369Sdduvall hw_rbd_p->flags |= ring_type_flag[ring]; 2191369Sdduvall } 2201369Sdduvall 2211369Sdduvall DMA_SYNC(brp->desc, DDI_DMA_SYNC_FORDEV); 2221369Sdduvall 2231369Sdduvall /* 2241369Sdduvall * Finally, reinitialise the ring control variables ... 2251369Sdduvall */ 2261369Sdduvall brp->rf_next = (nslots != 0) ? (nslots-1) : 0; 2271369Sdduvall } 2281369Sdduvall 2291369Sdduvall /* 2301369Sdduvall * Reinitialize all rings 2311369Sdduvall */ 2321369Sdduvall static void 2331369Sdduvall bge_reinit_rings(bge_t *bgep) 2341369Sdduvall { 2351369Sdduvall uint64_t ring; 2361369Sdduvall 2371369Sdduvall ASSERT(mutex_owned(bgep->genlock)); 2381369Sdduvall 2391369Sdduvall /* 2401369Sdduvall * Send Rings ... 2411369Sdduvall */ 2421369Sdduvall for (ring = 0; ring < bgep->chipid.tx_rings; ++ring) 2431369Sdduvall bge_reinit_send_ring(&bgep->send[ring]); 2441369Sdduvall 2451369Sdduvall /* 2461369Sdduvall * Receive Return Rings ... 2471369Sdduvall */ 2481369Sdduvall for (ring = 0; ring < bgep->chipid.rx_rings; ++ring) 2491369Sdduvall bge_reinit_recv_ring(&bgep->recv[ring]); 2501369Sdduvall 2511369Sdduvall /* 2521369Sdduvall * Receive Producer Rings ... 2531369Sdduvall */ 2541369Sdduvall for (ring = 0; ring < BGE_BUFF_RINGS_USED; ++ring) 2551369Sdduvall bge_reinit_buff_ring(&bgep->buff[ring], ring); 2561369Sdduvall } 2571369Sdduvall 2581369Sdduvall /* 2591369Sdduvall * ========== Internal state management entry points ========== 2601369Sdduvall */ 2611369Sdduvall 2621369Sdduvall #undef BGE_DBG 2631369Sdduvall #define BGE_DBG BGE_DBG_NEMO /* debug flag for this code */ 2641369Sdduvall 2651369Sdduvall /* 2661369Sdduvall * These routines provide all the functionality required by the 2671369Sdduvall * corresponding GLD entry points, but don't update the GLD state 2681369Sdduvall * so they can be called internally without disturbing our record 2691369Sdduvall * of what GLD thinks we should be doing ... 2701369Sdduvall */ 2711369Sdduvall 2721369Sdduvall /* 2731369Sdduvall * bge_reset() -- reset h/w & rings to initial state 2741369Sdduvall */ 2751865Sdilpreet static int 2761408Srandyf #ifdef BGE_IPMI_ASF 2771408Srandyf bge_reset(bge_t *bgep, uint_t asf_mode) 2781408Srandyf #else 2791369Sdduvall bge_reset(bge_t *bgep) 2801408Srandyf #endif 2811369Sdduvall { 2821369Sdduvall uint64_t ring; 2831865Sdilpreet int retval; 2841369Sdduvall 2851369Sdduvall BGE_TRACE(("bge_reset($%p)", (void *)bgep)); 2861369Sdduvall 2871369Sdduvall ASSERT(mutex_owned(bgep->genlock)); 2881369Sdduvall 2891369Sdduvall /* 2901369Sdduvall * Grab all the other mutexes in the world (this should 2911369Sdduvall * ensure no other threads are manipulating driver state) 2921369Sdduvall */ 2931369Sdduvall for (ring = 0; ring < BGE_RECV_RINGS_MAX; ++ring) 2941369Sdduvall mutex_enter(bgep->recv[ring].rx_lock); 2951369Sdduvall for (ring = 0; ring < BGE_BUFF_RINGS_MAX; ++ring) 2961369Sdduvall mutex_enter(bgep->buff[ring].rf_lock); 2971369Sdduvall rw_enter(bgep->errlock, RW_WRITER); 2981369Sdduvall for (ring = 0; ring < BGE_SEND_RINGS_MAX; ++ring) 2991369Sdduvall mutex_enter(bgep->send[ring].tc_lock); 3001369Sdduvall 3011408Srandyf #ifdef BGE_IPMI_ASF 3021865Sdilpreet retval = bge_chip_reset(bgep, B_TRUE, asf_mode); 3031408Srandyf #else 3041865Sdilpreet retval = bge_chip_reset(bgep, B_TRUE); 3051408Srandyf #endif 3061369Sdduvall bge_reinit_rings(bgep); 3071369Sdduvall 3081369Sdduvall /* 3091369Sdduvall * Free the world ... 3101369Sdduvall */ 3111369Sdduvall for (ring = BGE_SEND_RINGS_MAX; ring-- > 0; ) 3121369Sdduvall mutex_exit(bgep->send[ring].tc_lock); 3131369Sdduvall rw_exit(bgep->errlock); 3141369Sdduvall for (ring = BGE_BUFF_RINGS_MAX; ring-- > 0; ) 3151369Sdduvall mutex_exit(bgep->buff[ring].rf_lock); 3161369Sdduvall for (ring = BGE_RECV_RINGS_MAX; ring-- > 0; ) 3171369Sdduvall mutex_exit(bgep->recv[ring].rx_lock); 3181369Sdduvall 3191369Sdduvall BGE_DEBUG(("bge_reset($%p) done", (void *)bgep)); 3201865Sdilpreet return (retval); 3211369Sdduvall } 3221369Sdduvall 3231369Sdduvall /* 3241369Sdduvall * bge_stop() -- stop processing, don't reset h/w or rings 3251369Sdduvall */ 3261369Sdduvall static void 3271369Sdduvall bge_stop(bge_t *bgep) 3281369Sdduvall { 3291369Sdduvall BGE_TRACE(("bge_stop($%p)", (void *)bgep)); 3301369Sdduvall 3311369Sdduvall ASSERT(mutex_owned(bgep->genlock)); 3321369Sdduvall 3331408Srandyf #ifdef BGE_IPMI_ASF 3341408Srandyf if (bgep->asf_enabled) { 3351408Srandyf bgep->asf_pseudostop = B_TRUE; 3361408Srandyf } else { 3371408Srandyf #endif 3381408Srandyf bge_chip_stop(bgep, B_FALSE); 3391408Srandyf #ifdef BGE_IPMI_ASF 3401408Srandyf } 3411408Srandyf #endif 3421369Sdduvall 3431369Sdduvall BGE_DEBUG(("bge_stop($%p) done", (void *)bgep)); 3441369Sdduvall } 3451369Sdduvall 3461369Sdduvall /* 3471369Sdduvall * bge_start() -- start transmitting/receiving 3481369Sdduvall */ 3491865Sdilpreet static int 3501369Sdduvall bge_start(bge_t *bgep, boolean_t reset_phys) 3511369Sdduvall { 3521865Sdilpreet int retval; 3531865Sdilpreet 3541369Sdduvall BGE_TRACE(("bge_start($%p, %d)", (void *)bgep, reset_phys)); 3551369Sdduvall 3561369Sdduvall ASSERT(mutex_owned(bgep->genlock)); 3571369Sdduvall 3581369Sdduvall /* 3591369Sdduvall * Start chip processing, including enabling interrupts 3601369Sdduvall */ 3611865Sdilpreet retval = bge_chip_start(bgep, reset_phys); 3621369Sdduvall 3631369Sdduvall BGE_DEBUG(("bge_start($%p, %d) done", (void *)bgep, reset_phys)); 3641865Sdilpreet return (retval); 3651369Sdduvall } 3661369Sdduvall 3671369Sdduvall /* 3681369Sdduvall * bge_restart - restart transmitting/receiving after error or suspend 3691369Sdduvall */ 3701865Sdilpreet int 3711369Sdduvall bge_restart(bge_t *bgep, boolean_t reset_phys) 3721369Sdduvall { 3731865Sdilpreet int retval = DDI_SUCCESS; 3741369Sdduvall ASSERT(mutex_owned(bgep->genlock)); 3751369Sdduvall 3761408Srandyf #ifdef BGE_IPMI_ASF 3771408Srandyf if (bgep->asf_enabled) { 3781865Sdilpreet if (bge_reset(bgep, ASF_MODE_POST_INIT) != DDI_SUCCESS) 3791865Sdilpreet retval = DDI_FAILURE; 3801408Srandyf } else 3811865Sdilpreet if (bge_reset(bgep, ASF_MODE_NONE) != DDI_SUCCESS) 3821865Sdilpreet retval = DDI_FAILURE; 3831408Srandyf #else 3841865Sdilpreet if (bge_reset(bgep) != DDI_SUCCESS) 3851865Sdilpreet retval = DDI_FAILURE; 3861408Srandyf #endif 3871369Sdduvall if (bgep->bge_mac_state == BGE_MAC_STARTED) { 3881865Sdilpreet if (bge_start(bgep, reset_phys) != DDI_SUCCESS) 3891865Sdilpreet retval = DDI_FAILURE; 3901369Sdduvall bgep->watchdog = 0; 3911369Sdduvall ddi_trigger_softintr(bgep->resched_id); 3921369Sdduvall } 3931369Sdduvall 3941369Sdduvall BGE_DEBUG(("bge_restart($%p, %d) done", (void *)bgep, reset_phys)); 3951865Sdilpreet return (retval); 3961369Sdduvall } 3971369Sdduvall 3981369Sdduvall 3991369Sdduvall /* 4001369Sdduvall * ========== Nemo-required management entry points ========== 4011369Sdduvall */ 4021369Sdduvall 4031369Sdduvall #undef BGE_DBG 4041369Sdduvall #define BGE_DBG BGE_DBG_NEMO /* debug flag for this code */ 4051369Sdduvall 4061369Sdduvall /* 4071369Sdduvall * bge_m_stop() -- stop transmitting/receiving 4081369Sdduvall */ 4091369Sdduvall static void 4101369Sdduvall bge_m_stop(void *arg) 4111369Sdduvall { 4121369Sdduvall bge_t *bgep = arg; /* private device info */ 4131369Sdduvall 4141369Sdduvall BGE_TRACE(("bge_m_stop($%p)", arg)); 4151369Sdduvall 4161369Sdduvall /* 4171369Sdduvall * Just stop processing, then record new GLD state 4181369Sdduvall */ 4191369Sdduvall mutex_enter(bgep->genlock); 4201865Sdilpreet if (!(bgep->progress & PROGRESS_INTR)) { 4211865Sdilpreet /* can happen during autorecovery */ 4221865Sdilpreet mutex_exit(bgep->genlock); 4231865Sdilpreet return; 4241865Sdilpreet } 4251865Sdilpreet 4261369Sdduvall bgep->link_up_msg = bgep->link_down_msg = " (stopped)"; 4271369Sdduvall bge_stop(bgep); 4281369Sdduvall bgep->bge_mac_state = BGE_MAC_STOPPED; 4291369Sdduvall BGE_DEBUG(("bge_m_stop($%p) done", arg)); 4301865Sdilpreet if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) 4311865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_UNAFFECTED); 4321369Sdduvall mutex_exit(bgep->genlock); 4331369Sdduvall } 4341369Sdduvall 4351369Sdduvall /* 4361369Sdduvall * bge_m_start() -- start transmitting/receiving 4371369Sdduvall */ 4381369Sdduvall static int 4391369Sdduvall bge_m_start(void *arg) 4401369Sdduvall { 4411369Sdduvall bge_t *bgep = arg; /* private device info */ 4421369Sdduvall 4431369Sdduvall BGE_TRACE(("bge_m_start($%p)", arg)); 4441369Sdduvall 4451369Sdduvall /* 4461369Sdduvall * Start processing and record new GLD state 4471369Sdduvall */ 4481369Sdduvall mutex_enter(bgep->genlock); 4491865Sdilpreet if (!(bgep->progress & PROGRESS_INTR)) { 4501865Sdilpreet /* can happen during autorecovery */ 4511865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 4521865Sdilpreet mutex_exit(bgep->genlock); 4531865Sdilpreet return (EIO); 4541865Sdilpreet } 4551408Srandyf #ifdef BGE_IPMI_ASF 4561408Srandyf if (bgep->asf_enabled) { 4571408Srandyf if ((bgep->asf_status == ASF_STAT_RUN) && 4581408Srandyf (bgep->asf_pseudostop)) { 4591408Srandyf 4601408Srandyf bgep->link_up_msg = bgep->link_down_msg 4611408Srandyf = " (initialized)"; 4621408Srandyf bgep->bge_mac_state = BGE_MAC_STARTED; 4631408Srandyf mutex_exit(bgep->genlock); 4641408Srandyf return (0); 4651408Srandyf } 4661408Srandyf } 4671865Sdilpreet if (bge_reset(bgep, ASF_MODE_INIT) != DDI_SUCCESS) { 4681408Srandyf #else 4691865Sdilpreet if (bge_reset(bgep) != DDI_SUCCESS) { 4701408Srandyf #endif 4711865Sdilpreet (void) bge_check_acc_handle(bgep, bgep->cfg_handle); 4721865Sdilpreet (void) bge_check_acc_handle(bgep, bgep->io_handle); 4731865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 4741865Sdilpreet mutex_exit(bgep->genlock); 4751865Sdilpreet return (EIO); 4761865Sdilpreet } 4771369Sdduvall bgep->link_up_msg = bgep->link_down_msg = " (initialized)"; 4781865Sdilpreet if (bge_start(bgep, B_TRUE) != DDI_SUCCESS) { 4791865Sdilpreet (void) bge_check_acc_handle(bgep, bgep->cfg_handle); 4801865Sdilpreet (void) bge_check_acc_handle(bgep, bgep->io_handle); 4811865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 4821865Sdilpreet mutex_exit(bgep->genlock); 4831865Sdilpreet return (EIO); 4841865Sdilpreet } 4851369Sdduvall bgep->bge_mac_state = BGE_MAC_STARTED; 4861369Sdduvall BGE_DEBUG(("bge_m_start($%p) done", arg)); 4871408Srandyf 4881865Sdilpreet if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) { 4891865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 4901865Sdilpreet mutex_exit(bgep->genlock); 4911865Sdilpreet return (EIO); 4921865Sdilpreet } 4931865Sdilpreet if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) { 4941865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 4951865Sdilpreet mutex_exit(bgep->genlock); 4961865Sdilpreet return (EIO); 4971865Sdilpreet } 4981408Srandyf #ifdef BGE_IPMI_ASF 4991408Srandyf if (bgep->asf_enabled) { 5001408Srandyf if (bgep->asf_status != ASF_STAT_RUN) { 5011408Srandyf /* start ASF heart beat */ 5021408Srandyf bgep->asf_timeout_id = timeout(bge_asf_heartbeat, 5031408Srandyf (void *)bgep, 5041408Srandyf drv_usectohz(BGE_ASF_HEARTBEAT_INTERVAL)); 5051408Srandyf bgep->asf_status = ASF_STAT_RUN; 5061408Srandyf } 5071408Srandyf } 5081408Srandyf #endif 5091369Sdduvall mutex_exit(bgep->genlock); 5101369Sdduvall 5111369Sdduvall return (0); 5121369Sdduvall } 5131369Sdduvall 5141369Sdduvall /* 5151369Sdduvall * bge_m_unicst_set() -- set the physical network address 5161369Sdduvall */ 5171369Sdduvall static int 5181369Sdduvall bge_m_unicst(void *arg, const uint8_t *macaddr) 5191369Sdduvall { 5201369Sdduvall bge_t *bgep = arg; /* private device info */ 5211369Sdduvall 5221369Sdduvall BGE_TRACE(("bge_m_unicst_set($%p, %s)", arg, 5231369Sdduvall ether_sprintf((void *)macaddr))); 5241369Sdduvall 5251369Sdduvall /* 5261369Sdduvall * Remember the new current address in the driver state 5271369Sdduvall * Sync the chip's idea of the address too ... 5281369Sdduvall */ 5291369Sdduvall mutex_enter(bgep->genlock); 5301865Sdilpreet if (!(bgep->progress & PROGRESS_INTR)) { 5311865Sdilpreet /* can happen during autorecovery */ 5321865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 5331865Sdilpreet mutex_exit(bgep->genlock); 5341865Sdilpreet return (EIO); 5351865Sdilpreet } 5361369Sdduvall ethaddr_copy(macaddr, bgep->curr_addr.addr); 5371408Srandyf #ifdef BGE_IPMI_ASF 5381865Sdilpreet if (bge_chip_sync(bgep, B_FALSE) == DDI_FAILURE) { 5391865Sdilpreet #else 5401865Sdilpreet if (bge_chip_sync(bgep) == DDI_FAILURE) { 5411865Sdilpreet #endif 5421865Sdilpreet (void) bge_check_acc_handle(bgep, bgep->cfg_handle); 5431865Sdilpreet (void) bge_check_acc_handle(bgep, bgep->io_handle); 5441865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 5451865Sdilpreet mutex_exit(bgep->genlock); 5461865Sdilpreet return (EIO); 5471865Sdilpreet } 5481865Sdilpreet #ifdef BGE_IPMI_ASF 5491408Srandyf if (bgep->asf_enabled) { 5501408Srandyf /* 5511408Srandyf * The above bge_chip_sync() function wrote the ethernet MAC 5521408Srandyf * addresses registers which destroyed the IPMI/ASF sideband. 5531408Srandyf * Here, we have to reset chip to make IPMI/ASF sideband work. 5541408Srandyf */ 5551408Srandyf if (bgep->asf_status == ASF_STAT_RUN) { 5561408Srandyf /* 5571408Srandyf * We must stop ASF heart beat before bge_chip_stop(), 5581408Srandyf * otherwise some computers (ex. IBM HS20 blade server) 5591408Srandyf * may crash. 5601408Srandyf */ 5611408Srandyf bge_asf_update_status(bgep); 5621408Srandyf bge_asf_stop_timer(bgep); 5631408Srandyf bgep->asf_status = ASF_STAT_STOP; 5641408Srandyf 5651408Srandyf bge_asf_pre_reset_operations(bgep, BGE_INIT_RESET); 5661408Srandyf } 5671865Sdilpreet bge_chip_stop(bgep, B_FALSE); 5681408Srandyf 5691865Sdilpreet if (bge_restart(bgep, B_FALSE) == DDI_FAILURE) { 5701865Sdilpreet (void) bge_check_acc_handle(bgep, bgep->cfg_handle); 5711865Sdilpreet (void) bge_check_acc_handle(bgep, bgep->io_handle); 5721865Sdilpreet ddi_fm_service_impact(bgep->devinfo, 5731865Sdilpreet DDI_SERVICE_DEGRADED); 5741865Sdilpreet mutex_exit(bgep->genlock); 5751865Sdilpreet return (EIO); 5761865Sdilpreet } 5771865Sdilpreet 5781408Srandyf /* 5791408Srandyf * Start our ASF heartbeat counter as soon as possible. 5801408Srandyf */ 5811408Srandyf if (bgep->asf_status != ASF_STAT_RUN) { 5821408Srandyf /* start ASF heart beat */ 5831408Srandyf bgep->asf_timeout_id = timeout(bge_asf_heartbeat, 5841408Srandyf (void *)bgep, 5851408Srandyf drv_usectohz(BGE_ASF_HEARTBEAT_INTERVAL)); 5861408Srandyf bgep->asf_status = ASF_STAT_RUN; 5871408Srandyf } 5881408Srandyf } 5891408Srandyf #endif 5901369Sdduvall BGE_DEBUG(("bge_m_unicst_set($%p) done", arg)); 5911865Sdilpreet if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) { 5921865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 5931865Sdilpreet mutex_exit(bgep->genlock); 5941865Sdilpreet return (EIO); 5951865Sdilpreet } 5961865Sdilpreet if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) { 5971865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 5981865Sdilpreet mutex_exit(bgep->genlock); 5991865Sdilpreet return (EIO); 6001865Sdilpreet } 6011369Sdduvall mutex_exit(bgep->genlock); 6021369Sdduvall 6031369Sdduvall return (0); 6041369Sdduvall } 6051369Sdduvall 6061369Sdduvall /* 6071369Sdduvall * Compute the index of the required bit in the multicast hash map. 6081369Sdduvall * This must mirror the way the hardware actually does it! 6091369Sdduvall * See Broadcom document 570X-PG102-R page 125. 6101369Sdduvall */ 6111369Sdduvall static uint32_t 6121369Sdduvall bge_hash_index(const uint8_t *mca) 6131369Sdduvall { 6141369Sdduvall uint32_t hash; 6151369Sdduvall 6161369Sdduvall CRC32(hash, mca, ETHERADDRL, -1U, crc32_table); 6171369Sdduvall 6181369Sdduvall return (hash); 6191369Sdduvall } 6201369Sdduvall 6211369Sdduvall /* 6221369Sdduvall * bge_m_multicst_add() -- enable/disable a multicast address 6231369Sdduvall */ 6241369Sdduvall static int 6251369Sdduvall bge_m_multicst(void *arg, boolean_t add, const uint8_t *mca) 6261369Sdduvall { 6271369Sdduvall bge_t *bgep = arg; /* private device info */ 6281369Sdduvall uint32_t hash; 6291369Sdduvall uint32_t index; 6301369Sdduvall uint32_t word; 6311369Sdduvall uint32_t bit; 6321369Sdduvall uint8_t *refp; 6331369Sdduvall 6341369Sdduvall BGE_TRACE(("bge_m_multicst($%p, %s, %s)", arg, 6351369Sdduvall (add) ? "add" : "remove", ether_sprintf((void *)mca))); 6361369Sdduvall 6371369Sdduvall /* 6381369Sdduvall * Precalculate all required masks, pointers etc ... 6391369Sdduvall */ 6401369Sdduvall hash = bge_hash_index(mca); 6411369Sdduvall index = hash % BGE_HASH_TABLE_SIZE; 6421369Sdduvall word = index/32u; 6431369Sdduvall bit = 1 << (index % 32u); 6441369Sdduvall refp = &bgep->mcast_refs[index]; 6451369Sdduvall 6461369Sdduvall BGE_DEBUG(("bge_m_multicst: hash 0x%x index %d (%d:0x%x) = %d", 6471369Sdduvall hash, index, word, bit, *refp)); 6481369Sdduvall 6491369Sdduvall /* 6501369Sdduvall * We must set the appropriate bit in the hash map (and the 6511369Sdduvall * corresponding h/w register) when the refcount goes from 0 6521369Sdduvall * to >0, and clear it when the last ref goes away (refcount 6531369Sdduvall * goes from >0 back to 0). If we change the hash map, we 6541369Sdduvall * must also update the chip's hardware map registers. 6551369Sdduvall */ 6561369Sdduvall mutex_enter(bgep->genlock); 6571865Sdilpreet if (!(bgep->progress & PROGRESS_INTR)) { 6581865Sdilpreet /* can happen during autorecovery */ 6591865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 6601865Sdilpreet mutex_exit(bgep->genlock); 6611865Sdilpreet return (EIO); 6621865Sdilpreet } 6631369Sdduvall if (add) { 6641369Sdduvall if ((*refp)++ == 0) { 6651369Sdduvall bgep->mcast_hash[word] |= bit; 6661408Srandyf #ifdef BGE_IPMI_ASF 6671865Sdilpreet if (bge_chip_sync(bgep, B_TRUE) == DDI_FAILURE) { 6681408Srandyf #else 6691865Sdilpreet if (bge_chip_sync(bgep) == DDI_FAILURE) { 6701408Srandyf #endif 6711865Sdilpreet (void) bge_check_acc_handle(bgep, 6721865Sdilpreet bgep->cfg_handle); 6731865Sdilpreet (void) bge_check_acc_handle(bgep, 6741865Sdilpreet bgep->io_handle); 6751865Sdilpreet ddi_fm_service_impact(bgep->devinfo, 6761865Sdilpreet DDI_SERVICE_DEGRADED); 6771865Sdilpreet mutex_exit(bgep->genlock); 6781865Sdilpreet return (EIO); 6791865Sdilpreet } 6801369Sdduvall } 6811369Sdduvall } else { 6821369Sdduvall if (--(*refp) == 0) { 6831369Sdduvall bgep->mcast_hash[word] &= ~bit; 6841408Srandyf #ifdef BGE_IPMI_ASF 6851865Sdilpreet if (bge_chip_sync(bgep, B_TRUE) == DDI_FAILURE) { 6861408Srandyf #else 6871865Sdilpreet if (bge_chip_sync(bgep) == DDI_FAILURE) { 6881408Srandyf #endif 6891865Sdilpreet (void) bge_check_acc_handle(bgep, 6901865Sdilpreet bgep->cfg_handle); 6911865Sdilpreet (void) bge_check_acc_handle(bgep, 6921865Sdilpreet bgep->io_handle); 6931865Sdilpreet ddi_fm_service_impact(bgep->devinfo, 6941865Sdilpreet DDI_SERVICE_DEGRADED); 6951865Sdilpreet mutex_exit(bgep->genlock); 6961865Sdilpreet return (EIO); 6971865Sdilpreet } 6981369Sdduvall } 6991369Sdduvall } 7001369Sdduvall BGE_DEBUG(("bge_m_multicst($%p) done", arg)); 7011865Sdilpreet if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) { 7021865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 7031865Sdilpreet mutex_exit(bgep->genlock); 7041865Sdilpreet return (EIO); 7051865Sdilpreet } 7061865Sdilpreet if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) { 7071865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 7081865Sdilpreet mutex_exit(bgep->genlock); 7091865Sdilpreet return (EIO); 7101865Sdilpreet } 7111369Sdduvall mutex_exit(bgep->genlock); 7121369Sdduvall 7131369Sdduvall return (0); 7141369Sdduvall } 7151369Sdduvall 7161369Sdduvall /* 7171369Sdduvall * bge_m_promisc() -- set or reset promiscuous mode on the board 7181369Sdduvall * 7191369Sdduvall * Program the hardware to enable/disable promiscuous and/or 7201369Sdduvall * receive-all-multicast modes. 7211369Sdduvall */ 7221369Sdduvall static int 7231369Sdduvall bge_m_promisc(void *arg, boolean_t on) 7241369Sdduvall { 7251369Sdduvall bge_t *bgep = arg; 7261369Sdduvall 7271369Sdduvall BGE_TRACE(("bge_m_promisc_set($%p, %d)", arg, on)); 7281369Sdduvall 7291369Sdduvall /* 7301369Sdduvall * Store MAC layer specified mode and pass to chip layer to update h/w 7311369Sdduvall */ 7321369Sdduvall mutex_enter(bgep->genlock); 7331865Sdilpreet if (!(bgep->progress & PROGRESS_INTR)) { 7341865Sdilpreet /* can happen during autorecovery */ 7351865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 7361865Sdilpreet mutex_exit(bgep->genlock); 7371865Sdilpreet return (EIO); 7381865Sdilpreet } 7391369Sdduvall bgep->promisc = on; 7401408Srandyf #ifdef BGE_IPMI_ASF 7411865Sdilpreet if (bge_chip_sync(bgep, B_TRUE) == DDI_FAILURE) { 7421408Srandyf #else 7431865Sdilpreet if (bge_chip_sync(bgep) == DDI_FAILURE) { 7441408Srandyf #endif 7451865Sdilpreet (void) bge_check_acc_handle(bgep, bgep->cfg_handle); 7461865Sdilpreet (void) bge_check_acc_handle(bgep, bgep->io_handle); 7471865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 7481865Sdilpreet mutex_exit(bgep->genlock); 7491865Sdilpreet return (EIO); 7501865Sdilpreet } 7511369Sdduvall BGE_DEBUG(("bge_m_promisc_set($%p) done", arg)); 7521865Sdilpreet if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) { 7531865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 7541865Sdilpreet mutex_exit(bgep->genlock); 7551865Sdilpreet return (EIO); 7561865Sdilpreet } 7571865Sdilpreet if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) { 7581865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 7591865Sdilpreet mutex_exit(bgep->genlock); 7601865Sdilpreet return (EIO); 7611865Sdilpreet } 7621369Sdduvall mutex_exit(bgep->genlock); 7631369Sdduvall return (0); 7641369Sdduvall } 7651369Sdduvall 766*2311Sseb /*ARGSUSED*/ 767*2311Sseb static boolean_t 768*2311Sseb bge_m_getcapab(void *arg, mac_capab_t cap, void *cap_data) 769*2311Sseb { 770*2311Sseb switch (cap) { 771*2311Sseb case MAC_CAPAB_HCKSUM: { 772*2311Sseb uint32_t *txflags = cap_data; 773*2311Sseb 774*2311Sseb *txflags = HCKSUM_INET_FULL_V4 | HCKSUM_IPHDRCKSUM; 775*2311Sseb break; 776*2311Sseb } 777*2311Sseb case MAC_CAPAB_POLL: 778*2311Sseb /* 779*2311Sseb * There's nothing for us to fill in, simply returning 780*2311Sseb * B_TRUE stating that we support polling is sufficient. 781*2311Sseb */ 782*2311Sseb break; 783*2311Sseb default: 784*2311Sseb return (B_FALSE); 785*2311Sseb } 786*2311Sseb return (B_TRUE); 787*2311Sseb } 788*2311Sseb 7891369Sdduvall /* 7901369Sdduvall * Loopback ioctl code 7911369Sdduvall */ 7921369Sdduvall 7931369Sdduvall static lb_property_t loopmodes[] = { 7941369Sdduvall { normal, "normal", BGE_LOOP_NONE }, 7951369Sdduvall { external, "1000Mbps", BGE_LOOP_EXTERNAL_1000 }, 7961369Sdduvall { external, "100Mbps", BGE_LOOP_EXTERNAL_100 }, 7971369Sdduvall { external, "10Mbps", BGE_LOOP_EXTERNAL_10 }, 7981369Sdduvall { internal, "PHY", BGE_LOOP_INTERNAL_PHY }, 7991369Sdduvall { internal, "MAC", BGE_LOOP_INTERNAL_MAC } 8001369Sdduvall }; 8011369Sdduvall 8021369Sdduvall static enum ioc_reply 8031369Sdduvall bge_set_loop_mode(bge_t *bgep, uint32_t mode) 8041369Sdduvall { 8051369Sdduvall const char *msg; 8061369Sdduvall 8071369Sdduvall /* 8081369Sdduvall * If the mode isn't being changed, there's nothing to do ... 8091369Sdduvall */ 8101369Sdduvall if (mode == bgep->param_loop_mode) 8111369Sdduvall return (IOC_ACK); 8121369Sdduvall 8131369Sdduvall /* 8141369Sdduvall * Validate the requested mode and prepare a suitable message 8151369Sdduvall * to explain the link down/up cycle that the change will 8161369Sdduvall * probably induce ... 8171369Sdduvall */ 8181369Sdduvall switch (mode) { 8191369Sdduvall default: 8201369Sdduvall return (IOC_INVAL); 8211369Sdduvall 8221369Sdduvall case BGE_LOOP_NONE: 8231369Sdduvall msg = " (loopback disabled)"; 8241369Sdduvall break; 8251369Sdduvall 8261369Sdduvall case BGE_LOOP_EXTERNAL_1000: 8271369Sdduvall case BGE_LOOP_EXTERNAL_100: 8281369Sdduvall case BGE_LOOP_EXTERNAL_10: 8291369Sdduvall msg = " (external loopback selected)"; 8301369Sdduvall break; 8311369Sdduvall 8321369Sdduvall case BGE_LOOP_INTERNAL_PHY: 8331369Sdduvall msg = " (PHY internal loopback selected)"; 8341369Sdduvall break; 8351369Sdduvall 8361369Sdduvall case BGE_LOOP_INTERNAL_MAC: 8371369Sdduvall msg = " (MAC internal loopback selected)"; 8381369Sdduvall break; 8391369Sdduvall } 8401369Sdduvall 8411369Sdduvall /* 8421369Sdduvall * All OK; tell the caller to reprogram 8431369Sdduvall * the PHY and/or MAC for the new mode ... 8441369Sdduvall */ 8451369Sdduvall bgep->link_down_msg = bgep->link_up_msg = msg; 8461369Sdduvall bgep->param_loop_mode = mode; 8471369Sdduvall return (IOC_RESTART_ACK); 8481369Sdduvall } 8491369Sdduvall 8501369Sdduvall static enum ioc_reply 8511369Sdduvall bge_loop_ioctl(bge_t *bgep, queue_t *wq, mblk_t *mp, struct iocblk *iocp) 8521369Sdduvall { 8531369Sdduvall lb_info_sz_t *lbsp; 8541369Sdduvall lb_property_t *lbpp; 8551369Sdduvall uint32_t *lbmp; 8561369Sdduvall int cmd; 8571369Sdduvall 8581369Sdduvall _NOTE(ARGUNUSED(wq)) 8591369Sdduvall 8601369Sdduvall /* 8611369Sdduvall * Validate format of ioctl 8621369Sdduvall */ 8631369Sdduvall if (mp->b_cont == NULL) 8641369Sdduvall return (IOC_INVAL); 8651369Sdduvall 8661369Sdduvall cmd = iocp->ioc_cmd; 8671369Sdduvall switch (cmd) { 8681369Sdduvall default: 8691369Sdduvall /* NOTREACHED */ 8701369Sdduvall bge_error(bgep, "bge_loop_ioctl: invalid cmd 0x%x", cmd); 8711369Sdduvall return (IOC_INVAL); 8721369Sdduvall 8731369Sdduvall case LB_GET_INFO_SIZE: 8741369Sdduvall if (iocp->ioc_count != sizeof (lb_info_sz_t)) 8751369Sdduvall return (IOC_INVAL); 8761369Sdduvall lbsp = (lb_info_sz_t *)mp->b_cont->b_rptr; 8771369Sdduvall *lbsp = sizeof (loopmodes); 8781369Sdduvall return (IOC_REPLY); 8791369Sdduvall 8801369Sdduvall case LB_GET_INFO: 8811369Sdduvall if (iocp->ioc_count != sizeof (loopmodes)) 8821369Sdduvall return (IOC_INVAL); 8831369Sdduvall lbpp = (lb_property_t *)mp->b_cont->b_rptr; 8841369Sdduvall bcopy(loopmodes, lbpp, sizeof (loopmodes)); 8851369Sdduvall return (IOC_REPLY); 8861369Sdduvall 8871369Sdduvall case LB_GET_MODE: 8881369Sdduvall if (iocp->ioc_count != sizeof (uint32_t)) 8891369Sdduvall return (IOC_INVAL); 8901369Sdduvall lbmp = (uint32_t *)mp->b_cont->b_rptr; 8911369Sdduvall *lbmp = bgep->param_loop_mode; 8921369Sdduvall return (IOC_REPLY); 8931369Sdduvall 8941369Sdduvall case LB_SET_MODE: 8951369Sdduvall if (iocp->ioc_count != sizeof (uint32_t)) 8961369Sdduvall return (IOC_INVAL); 8971369Sdduvall lbmp = (uint32_t *)mp->b_cont->b_rptr; 8981369Sdduvall return (bge_set_loop_mode(bgep, *lbmp)); 8991369Sdduvall } 9001369Sdduvall } 9011369Sdduvall 9021369Sdduvall /* 9031369Sdduvall * Specific bge IOCTLs, the gld module handles the generic ones. 9041369Sdduvall */ 9051369Sdduvall static void 9061369Sdduvall bge_m_ioctl(void *arg, queue_t *wq, mblk_t *mp) 9071369Sdduvall { 9081369Sdduvall bge_t *bgep = arg; 9091369Sdduvall struct iocblk *iocp; 9101369Sdduvall enum ioc_reply status; 9111369Sdduvall boolean_t need_privilege; 9121369Sdduvall int err; 9131369Sdduvall int cmd; 9141369Sdduvall 9151369Sdduvall /* 9161369Sdduvall * Validate the command before bothering with the mutex ... 9171369Sdduvall */ 9181369Sdduvall iocp = (struct iocblk *)mp->b_rptr; 9191369Sdduvall iocp->ioc_error = 0; 9201369Sdduvall need_privilege = B_TRUE; 9211369Sdduvall cmd = iocp->ioc_cmd; 9221369Sdduvall switch (cmd) { 9231369Sdduvall default: 9241369Sdduvall miocnak(wq, mp, 0, EINVAL); 9251369Sdduvall return; 9261369Sdduvall 9271369Sdduvall case BGE_MII_READ: 9281369Sdduvall case BGE_MII_WRITE: 9291369Sdduvall case BGE_SEE_READ: 9301369Sdduvall case BGE_SEE_WRITE: 9311369Sdduvall case BGE_DIAG: 9321369Sdduvall case BGE_PEEK: 9331369Sdduvall case BGE_POKE: 9341369Sdduvall case BGE_PHY_RESET: 9351369Sdduvall case BGE_SOFT_RESET: 9361369Sdduvall case BGE_HARD_RESET: 9371369Sdduvall break; 9381369Sdduvall 9391369Sdduvall case LB_GET_INFO_SIZE: 9401369Sdduvall case LB_GET_INFO: 9411369Sdduvall case LB_GET_MODE: 9421369Sdduvall need_privilege = B_FALSE; 9431369Sdduvall /* FALLTHRU */ 9441369Sdduvall case LB_SET_MODE: 9451369Sdduvall break; 9461369Sdduvall 9471369Sdduvall case ND_GET: 9481369Sdduvall need_privilege = B_FALSE; 9491369Sdduvall /* FALLTHRU */ 9501369Sdduvall case ND_SET: 9511369Sdduvall break; 9521369Sdduvall } 9531369Sdduvall 9541369Sdduvall if (need_privilege) { 9551369Sdduvall /* 9561369Sdduvall * Check for specific net_config privilege on Solaris 10+. 9571369Sdduvall * Otherwise just check for root access ... 9581369Sdduvall */ 9591369Sdduvall if (secpolicy_net_config != NULL) 9601369Sdduvall err = secpolicy_net_config(iocp->ioc_cr, B_FALSE); 9611369Sdduvall else 9621369Sdduvall err = drv_priv(iocp->ioc_cr); 9631369Sdduvall if (err != 0) { 9641369Sdduvall miocnak(wq, mp, 0, err); 9651369Sdduvall return; 9661369Sdduvall } 9671369Sdduvall } 9681369Sdduvall 9691369Sdduvall mutex_enter(bgep->genlock); 9701865Sdilpreet if (!(bgep->progress & PROGRESS_INTR)) { 9711865Sdilpreet /* can happen during autorecovery */ 9721865Sdilpreet mutex_exit(bgep->genlock); 9731865Sdilpreet miocnak(wq, mp, 0, EIO); 9741865Sdilpreet return; 9751865Sdilpreet } 9761369Sdduvall 9771369Sdduvall switch (cmd) { 9781369Sdduvall default: 9791369Sdduvall _NOTE(NOTREACHED) 9801369Sdduvall status = IOC_INVAL; 9811369Sdduvall break; 9821369Sdduvall 9831369Sdduvall case BGE_MII_READ: 9841369Sdduvall case BGE_MII_WRITE: 9851369Sdduvall case BGE_SEE_READ: 9861369Sdduvall case BGE_SEE_WRITE: 9871369Sdduvall case BGE_DIAG: 9881369Sdduvall case BGE_PEEK: 9891369Sdduvall case BGE_POKE: 9901369Sdduvall case BGE_PHY_RESET: 9911369Sdduvall case BGE_SOFT_RESET: 9921369Sdduvall case BGE_HARD_RESET: 9931369Sdduvall status = bge_chip_ioctl(bgep, wq, mp, iocp); 9941369Sdduvall break; 9951369Sdduvall 9961369Sdduvall case LB_GET_INFO_SIZE: 9971369Sdduvall case LB_GET_INFO: 9981369Sdduvall case LB_GET_MODE: 9991369Sdduvall case LB_SET_MODE: 10001369Sdduvall status = bge_loop_ioctl(bgep, wq, mp, iocp); 10011369Sdduvall break; 10021369Sdduvall 10031369Sdduvall case ND_GET: 10041369Sdduvall case ND_SET: 10051369Sdduvall status = bge_nd_ioctl(bgep, wq, mp, iocp); 10061369Sdduvall break; 10071369Sdduvall } 10081369Sdduvall 10091369Sdduvall /* 10101369Sdduvall * Do we need to reprogram the PHY and/or the MAC? 10111369Sdduvall * Do it now, while we still have the mutex. 10121369Sdduvall * 10131369Sdduvall * Note: update the PHY first, 'cos it controls the 10141369Sdduvall * speed/duplex parameters that the MAC code uses. 10151369Sdduvall */ 10161369Sdduvall switch (status) { 10171369Sdduvall case IOC_RESTART_REPLY: 10181369Sdduvall case IOC_RESTART_ACK: 10191865Sdilpreet if (bge_phys_update(bgep) != DDI_SUCCESS) { 10201865Sdilpreet ddi_fm_service_impact(bgep->devinfo, 10211865Sdilpreet DDI_SERVICE_DEGRADED); 10221865Sdilpreet status = IOC_INVAL; 10231865Sdilpreet } 10241408Srandyf #ifdef BGE_IPMI_ASF 10251865Sdilpreet if (bge_chip_sync(bgep, B_FALSE) == DDI_FAILURE) { 10261408Srandyf #else 10271865Sdilpreet if (bge_chip_sync(bgep) == DDI_FAILURE) { 10281408Srandyf #endif 10291865Sdilpreet ddi_fm_service_impact(bgep->devinfo, 10301865Sdilpreet DDI_SERVICE_DEGRADED); 10311865Sdilpreet status = IOC_INVAL; 10321865Sdilpreet } 10331369Sdduvall if (bgep->intr_type == DDI_INTR_TYPE_MSI) 10341369Sdduvall bge_chip_msi_trig(bgep); 10351369Sdduvall break; 10361369Sdduvall } 10371369Sdduvall 10381865Sdilpreet if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) { 10391865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 10401865Sdilpreet status = IOC_INVAL; 10411865Sdilpreet } 10421865Sdilpreet if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) { 10431865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 10441865Sdilpreet status = IOC_INVAL; 10451865Sdilpreet } 10461369Sdduvall mutex_exit(bgep->genlock); 10471369Sdduvall 10481369Sdduvall /* 10491369Sdduvall * Finally, decide how to reply 10501369Sdduvall */ 10511369Sdduvall switch (status) { 10521369Sdduvall default: 10531369Sdduvall case IOC_INVAL: 10541369Sdduvall /* 10551369Sdduvall * Error, reply with a NAK and EINVAL or the specified error 10561369Sdduvall */ 10571369Sdduvall miocnak(wq, mp, 0, iocp->ioc_error == 0 ? 10581369Sdduvall EINVAL : iocp->ioc_error); 10591369Sdduvall break; 10601369Sdduvall 10611369Sdduvall case IOC_DONE: 10621369Sdduvall /* 10631369Sdduvall * OK, reply already sent 10641369Sdduvall */ 10651369Sdduvall break; 10661369Sdduvall 10671369Sdduvall case IOC_RESTART_ACK: 10681369Sdduvall case IOC_ACK: 10691369Sdduvall /* 10701369Sdduvall * OK, reply with an ACK 10711369Sdduvall */ 10721369Sdduvall miocack(wq, mp, 0, 0); 10731369Sdduvall break; 10741369Sdduvall 10751369Sdduvall case IOC_RESTART_REPLY: 10761369Sdduvall case IOC_REPLY: 10771369Sdduvall /* 10781369Sdduvall * OK, send prepared reply as ACK or NAK 10791369Sdduvall */ 10801369Sdduvall mp->b_datap->db_type = iocp->ioc_error == 0 ? 10811369Sdduvall M_IOCACK : M_IOCNAK; 10821369Sdduvall qreply(wq, mp); 10831369Sdduvall break; 10841369Sdduvall } 10851369Sdduvall } 10861369Sdduvall 10871369Sdduvall static void 10881369Sdduvall bge_m_resources(void *arg) 10891369Sdduvall { 10901369Sdduvall bge_t *bgep = arg; 10911369Sdduvall recv_ring_t *rrp; 10921369Sdduvall mac_rx_fifo_t mrf; 10931369Sdduvall int ring; 10941369Sdduvall 10951369Sdduvall mutex_enter(bgep->genlock); 10961369Sdduvall 10971369Sdduvall /* 10981369Sdduvall * Register Rx rings as resources and save mac 10991369Sdduvall * resource id for future reference 11001369Sdduvall */ 11011369Sdduvall mrf.mrf_type = MAC_RX_FIFO; 11021369Sdduvall mrf.mrf_blank = bge_chip_blank; 11031369Sdduvall mrf.mrf_arg = (void *)bgep; 11041369Sdduvall mrf.mrf_normal_blank_time = bge_rx_ticks_norm; 11051369Sdduvall mrf.mrf_normal_pkt_count = bge_rx_count_norm; 11061369Sdduvall 11071369Sdduvall for (ring = 0; ring < bgep->chipid.rx_rings; ring++) { 11081369Sdduvall rrp = &bgep->recv[ring]; 1109*2311Sseb rrp->handle = mac_resource_add(bgep->mh, 11101369Sdduvall (mac_resource_t *)&mrf); 11111369Sdduvall } 11121369Sdduvall 11131369Sdduvall mutex_exit(bgep->genlock); 11141369Sdduvall } 11151369Sdduvall 11161369Sdduvall /* 11171369Sdduvall * ========== Per-instance setup/teardown code ========== 11181369Sdduvall */ 11191369Sdduvall 11201369Sdduvall #undef BGE_DBG 11211369Sdduvall #define BGE_DBG BGE_DBG_INIT /* debug flag for this code */ 11221369Sdduvall 11231369Sdduvall /* 11241369Sdduvall * Utility routine to carve a slice off a chunk of allocated memory, 11251369Sdduvall * updating the chunk descriptor accordingly. The size of the slice 11261369Sdduvall * is given by the product of the <qty> and <size> parameters. 11271369Sdduvall */ 11281369Sdduvall static void 11291369Sdduvall bge_slice_chunk(dma_area_t *slice, dma_area_t *chunk, 11301369Sdduvall uint32_t qty, uint32_t size) 11311369Sdduvall { 11321369Sdduvall static uint32_t sequence = 0xbcd5704a; 11331369Sdduvall size_t totsize; 11341369Sdduvall 11351369Sdduvall totsize = qty*size; 11361369Sdduvall ASSERT(size >= 0); 11371369Sdduvall ASSERT(totsize <= chunk->alength); 11381369Sdduvall 11391369Sdduvall *slice = *chunk; 11401369Sdduvall slice->nslots = qty; 11411369Sdduvall slice->size = size; 11421369Sdduvall slice->alength = totsize; 11431369Sdduvall slice->token = ++sequence; 11441369Sdduvall 11451369Sdduvall chunk->mem_va = (caddr_t)chunk->mem_va + totsize; 11461369Sdduvall chunk->alength -= totsize; 11471369Sdduvall chunk->offset += totsize; 11481369Sdduvall chunk->cookie.dmac_laddress += totsize; 11491369Sdduvall chunk->cookie.dmac_size -= totsize; 11501369Sdduvall } 11511369Sdduvall 11521369Sdduvall /* 11531369Sdduvall * Initialise the specified Receive Producer (Buffer) Ring, using 11541369Sdduvall * the information in the <dma_area> descriptors that it contains 11551369Sdduvall * to set up all the other fields. This routine should be called 11561369Sdduvall * only once for each ring. 11571369Sdduvall */ 11581369Sdduvall static void 11591369Sdduvall bge_init_buff_ring(bge_t *bgep, uint64_t ring) 11601369Sdduvall { 11611369Sdduvall buff_ring_t *brp; 11621369Sdduvall bge_status_t *bsp; 11631369Sdduvall sw_rbd_t *srbdp; 11641369Sdduvall dma_area_t pbuf; 11651369Sdduvall uint32_t bufsize; 11661369Sdduvall uint32_t nslots; 11671369Sdduvall uint32_t slot; 11681369Sdduvall uint32_t split; 11691369Sdduvall 11701369Sdduvall static bge_regno_t nic_ring_addrs[BGE_BUFF_RINGS_MAX] = { 11711369Sdduvall NIC_MEM_SHADOW_BUFF_STD, 11721369Sdduvall NIC_MEM_SHADOW_BUFF_JUMBO, 11731369Sdduvall NIC_MEM_SHADOW_BUFF_MINI 11741369Sdduvall }; 11751369Sdduvall static bge_regno_t mailbox_regs[BGE_BUFF_RINGS_MAX] = { 11761369Sdduvall RECV_STD_PROD_INDEX_REG, 11771369Sdduvall RECV_JUMBO_PROD_INDEX_REG, 11781369Sdduvall RECV_MINI_PROD_INDEX_REG 11791369Sdduvall }; 11801369Sdduvall static bge_regno_t buff_cons_xref[BGE_BUFF_RINGS_MAX] = { 11811369Sdduvall STATUS_STD_BUFF_CONS_INDEX, 11821369Sdduvall STATUS_JUMBO_BUFF_CONS_INDEX, 11831369Sdduvall STATUS_MINI_BUFF_CONS_INDEX 11841369Sdduvall }; 11851369Sdduvall 11861369Sdduvall BGE_TRACE(("bge_init_buff_ring($%p, %d)", 11871369Sdduvall (void *)bgep, ring)); 11881369Sdduvall 11891369Sdduvall brp = &bgep->buff[ring]; 11901369Sdduvall nslots = brp->desc.nslots; 11911369Sdduvall ASSERT(brp->buf[0].nslots == nslots/BGE_SPLIT); 11921369Sdduvall bufsize = brp->buf[0].size; 11931369Sdduvall 11941369Sdduvall /* 11951369Sdduvall * Set up the copy of the h/w RCB 11961369Sdduvall * 11971369Sdduvall * Note: unlike Send & Receive Return Rings, (where the max_len 11981369Sdduvall * field holds the number of slots), in a Receive Buffer Ring 11991369Sdduvall * this field indicates the size of each buffer in the ring. 12001369Sdduvall */ 12011369Sdduvall brp->hw_rcb.host_ring_addr = brp->desc.cookie.dmac_laddress; 12021369Sdduvall brp->hw_rcb.max_len = bufsize; 12031369Sdduvall brp->hw_rcb.flags = nslots > 0 ? 0 : RCB_FLAG_RING_DISABLED; 12041369Sdduvall brp->hw_rcb.nic_ring_addr = nic_ring_addrs[ring]; 12051369Sdduvall 12061369Sdduvall /* 12071369Sdduvall * Other one-off initialisation of per-ring data 12081369Sdduvall */ 12091369Sdduvall brp->bgep = bgep; 12101369Sdduvall bsp = DMA_VPTR(bgep->status_block); 12111369Sdduvall brp->cons_index_p = &bsp->buff_cons_index[buff_cons_xref[ring]]; 12121369Sdduvall brp->chip_mbx_reg = mailbox_regs[ring]; 12131369Sdduvall mutex_init(brp->rf_lock, NULL, MUTEX_DRIVER, 12141369Sdduvall DDI_INTR_PRI(bgep->intr_pri)); 12151369Sdduvall 12161369Sdduvall /* 12171369Sdduvall * Allocate the array of s/w Receive Buffer Descriptors 12181369Sdduvall */ 12191369Sdduvall srbdp = kmem_zalloc(nslots*sizeof (*srbdp), KM_SLEEP); 12201369Sdduvall brp->sw_rbds = srbdp; 12211369Sdduvall 12221369Sdduvall /* 12231369Sdduvall * Now initialise each array element once and for all 12241369Sdduvall */ 12251369Sdduvall for (split = 0; split < BGE_SPLIT; ++split) { 12261369Sdduvall pbuf = brp->buf[split]; 12271369Sdduvall for (slot = 0; slot < nslots/BGE_SPLIT; ++srbdp, ++slot) 12281369Sdduvall bge_slice_chunk(&srbdp->pbuf, &pbuf, 1, bufsize); 12291369Sdduvall ASSERT(pbuf.alength == 0); 12301369Sdduvall } 12311369Sdduvall } 12321369Sdduvall 12331369Sdduvall /* 12341369Sdduvall * Clean up initialisation done above before the memory is freed 12351369Sdduvall */ 12361369Sdduvall static void 12371369Sdduvall bge_fini_buff_ring(bge_t *bgep, uint64_t ring) 12381369Sdduvall { 12391369Sdduvall buff_ring_t *brp; 12401369Sdduvall sw_rbd_t *srbdp; 12411369Sdduvall 12421369Sdduvall BGE_TRACE(("bge_fini_buff_ring($%p, %d)", 12431369Sdduvall (void *)bgep, ring)); 12441369Sdduvall 12451369Sdduvall brp = &bgep->buff[ring]; 12461369Sdduvall srbdp = brp->sw_rbds; 12471369Sdduvall kmem_free(srbdp, brp->desc.nslots*sizeof (*srbdp)); 12481369Sdduvall 12491369Sdduvall mutex_destroy(brp->rf_lock); 12501369Sdduvall } 12511369Sdduvall 12521369Sdduvall /* 12531369Sdduvall * Initialise the specified Receive (Return) Ring, using the 12541369Sdduvall * information in the <dma_area> descriptors that it contains 12551369Sdduvall * to set up all the other fields. This routine should be called 12561369Sdduvall * only once for each ring. 12571369Sdduvall */ 12581369Sdduvall static void 12591369Sdduvall bge_init_recv_ring(bge_t *bgep, uint64_t ring) 12601369Sdduvall { 12611369Sdduvall recv_ring_t *rrp; 12621369Sdduvall bge_status_t *bsp; 12631369Sdduvall uint32_t nslots; 12641369Sdduvall 12651369Sdduvall BGE_TRACE(("bge_init_recv_ring($%p, %d)", 12661369Sdduvall (void *)bgep, ring)); 12671369Sdduvall 12681369Sdduvall /* 12691369Sdduvall * The chip architecture requires that receive return rings have 12701369Sdduvall * 512 or 1024 or 2048 elements per ring. See 570X-PG108-R page 103. 12711369Sdduvall */ 12721369Sdduvall rrp = &bgep->recv[ring]; 12731369Sdduvall nslots = rrp->desc.nslots; 12741369Sdduvall ASSERT(nslots == 0 || nslots == 512 || 12751369Sdduvall nslots == 1024 || nslots == 2048); 12761369Sdduvall 12771369Sdduvall /* 12781369Sdduvall * Set up the copy of the h/w RCB 12791369Sdduvall */ 12801369Sdduvall rrp->hw_rcb.host_ring_addr = rrp->desc.cookie.dmac_laddress; 12811369Sdduvall rrp->hw_rcb.max_len = nslots; 12821369Sdduvall rrp->hw_rcb.flags = nslots > 0 ? 0 : RCB_FLAG_RING_DISABLED; 12831369Sdduvall rrp->hw_rcb.nic_ring_addr = 0; 12841369Sdduvall 12851369Sdduvall /* 12861369Sdduvall * Other one-off initialisation of per-ring data 12871369Sdduvall */ 12881369Sdduvall rrp->bgep = bgep; 12891369Sdduvall bsp = DMA_VPTR(bgep->status_block); 12901369Sdduvall rrp->prod_index_p = RECV_INDEX_P(bsp, ring); 12911369Sdduvall rrp->chip_mbx_reg = RECV_RING_CONS_INDEX_REG(ring); 12921369Sdduvall mutex_init(rrp->rx_lock, NULL, MUTEX_DRIVER, 12931369Sdduvall DDI_INTR_PRI(bgep->intr_pri)); 12941369Sdduvall } 12951369Sdduvall 12961369Sdduvall 12971369Sdduvall /* 12981369Sdduvall * Clean up initialisation done above before the memory is freed 12991369Sdduvall */ 13001369Sdduvall static void 13011369Sdduvall bge_fini_recv_ring(bge_t *bgep, uint64_t ring) 13021369Sdduvall { 13031369Sdduvall recv_ring_t *rrp; 13041369Sdduvall 13051369Sdduvall BGE_TRACE(("bge_fini_recv_ring($%p, %d)", 13061369Sdduvall (void *)bgep, ring)); 13071369Sdduvall 13081369Sdduvall rrp = &bgep->recv[ring]; 13091369Sdduvall if (rrp->rx_softint) 13101369Sdduvall ddi_remove_softintr(rrp->rx_softint); 13111369Sdduvall mutex_destroy(rrp->rx_lock); 13121369Sdduvall } 13131369Sdduvall 13141369Sdduvall /* 13151369Sdduvall * Initialise the specified Send Ring, using the information in the 13161369Sdduvall * <dma_area> descriptors that it contains to set up all the other 13171369Sdduvall * fields. This routine should be called only once for each ring. 13181369Sdduvall */ 13191369Sdduvall static void 13201369Sdduvall bge_init_send_ring(bge_t *bgep, uint64_t ring) 13211369Sdduvall { 13221369Sdduvall send_ring_t *srp; 13231369Sdduvall bge_status_t *bsp; 13241369Sdduvall sw_sbd_t *ssbdp; 13251369Sdduvall dma_area_t desc; 13261369Sdduvall dma_area_t pbuf; 13271369Sdduvall uint32_t nslots; 13281369Sdduvall uint32_t slot; 13291369Sdduvall uint32_t split; 13301369Sdduvall 13311369Sdduvall BGE_TRACE(("bge_init_send_ring($%p, %d)", 13321369Sdduvall (void *)bgep, ring)); 13331369Sdduvall 13341369Sdduvall /* 13351369Sdduvall * The chip architecture requires that host-based send rings 13361369Sdduvall * have 512 elements per ring. See 570X-PG102-R page 56. 13371369Sdduvall */ 13381369Sdduvall srp = &bgep->send[ring]; 13391369Sdduvall nslots = srp->desc.nslots; 13401369Sdduvall ASSERT(nslots == 0 || nslots == 512); 13411369Sdduvall 13421369Sdduvall /* 13431369Sdduvall * Set up the copy of the h/w RCB 13441369Sdduvall */ 13451369Sdduvall srp->hw_rcb.host_ring_addr = srp->desc.cookie.dmac_laddress; 13461369Sdduvall srp->hw_rcb.max_len = nslots; 13471369Sdduvall srp->hw_rcb.flags = nslots > 0 ? 0 : RCB_FLAG_RING_DISABLED; 13481369Sdduvall srp->hw_rcb.nic_ring_addr = NIC_MEM_SHADOW_SEND_RING(ring, nslots); 13491369Sdduvall 13501369Sdduvall /* 13511369Sdduvall * Other one-off initialisation of per-ring data 13521369Sdduvall */ 13531369Sdduvall srp->bgep = bgep; 13541369Sdduvall bsp = DMA_VPTR(bgep->status_block); 13551369Sdduvall srp->cons_index_p = SEND_INDEX_P(bsp, ring); 13561369Sdduvall srp->chip_mbx_reg = SEND_RING_HOST_INDEX_REG(ring); 13571369Sdduvall mutex_init(srp->tx_lock, NULL, MUTEX_DRIVER, 13581369Sdduvall DDI_INTR_PRI(bgep->intr_pri)); 13591369Sdduvall mutex_init(srp->tc_lock, NULL, MUTEX_DRIVER, 13601369Sdduvall DDI_INTR_PRI(bgep->intr_pri)); 13611369Sdduvall 13621369Sdduvall /* 13631369Sdduvall * Allocate the array of s/w Send Buffer Descriptors 13641369Sdduvall */ 13651369Sdduvall ssbdp = kmem_zalloc(nslots*sizeof (*ssbdp), KM_SLEEP); 13661369Sdduvall srp->sw_sbds = ssbdp; 13671369Sdduvall 13681369Sdduvall /* 13691369Sdduvall * Now initialise each array element once and for all 13701369Sdduvall */ 13711369Sdduvall desc = srp->desc; 13721369Sdduvall for (split = 0; split < BGE_SPLIT; ++split) { 13731369Sdduvall pbuf = srp->buf[split]; 13741369Sdduvall for (slot = 0; slot < nslots/BGE_SPLIT; ++ssbdp, ++slot) { 13751369Sdduvall bge_slice_chunk(&ssbdp->desc, &desc, 1, 13761369Sdduvall sizeof (bge_sbd_t)); 13771369Sdduvall bge_slice_chunk(&ssbdp->pbuf, &pbuf, 1, 13781369Sdduvall bgep->chipid.snd_buff_size); 13791369Sdduvall } 13801369Sdduvall ASSERT(pbuf.alength == 0); 13811369Sdduvall } 13821369Sdduvall ASSERT(desc.alength == 0); 13831369Sdduvall } 13841369Sdduvall 13851369Sdduvall /* 13861369Sdduvall * Clean up initialisation done above before the memory is freed 13871369Sdduvall */ 13881369Sdduvall static void 13891369Sdduvall bge_fini_send_ring(bge_t *bgep, uint64_t ring) 13901369Sdduvall { 13911369Sdduvall send_ring_t *srp; 13921369Sdduvall sw_sbd_t *ssbdp; 13931369Sdduvall 13941369Sdduvall BGE_TRACE(("bge_fini_send_ring($%p, %d)", 13951369Sdduvall (void *)bgep, ring)); 13961369Sdduvall 13971369Sdduvall srp = &bgep->send[ring]; 13981369Sdduvall ssbdp = srp->sw_sbds; 13991369Sdduvall kmem_free(ssbdp, srp->desc.nslots*sizeof (*ssbdp)); 14001369Sdduvall 14011369Sdduvall mutex_destroy(srp->tx_lock); 14021369Sdduvall mutex_destroy(srp->tc_lock); 14031369Sdduvall } 14041369Sdduvall 14051369Sdduvall /* 14061369Sdduvall * Initialise all transmit, receive, and buffer rings. 14071369Sdduvall */ 14081865Sdilpreet void 14091369Sdduvall bge_init_rings(bge_t *bgep) 14101369Sdduvall { 14111369Sdduvall uint64_t ring; 14121369Sdduvall 14131369Sdduvall BGE_TRACE(("bge_init_rings($%p)", (void *)bgep)); 14141369Sdduvall 14151369Sdduvall /* 14161369Sdduvall * Perform one-off initialisation of each ring ... 14171369Sdduvall */ 14181369Sdduvall for (ring = 0; ring < BGE_SEND_RINGS_MAX; ++ring) 14191369Sdduvall bge_init_send_ring(bgep, ring); 14201369Sdduvall for (ring = 0; ring < BGE_RECV_RINGS_MAX; ++ring) 14211369Sdduvall bge_init_recv_ring(bgep, ring); 14221369Sdduvall for (ring = 0; ring < BGE_BUFF_RINGS_MAX; ++ring) 14231369Sdduvall bge_init_buff_ring(bgep, ring); 14241369Sdduvall } 14251369Sdduvall 14261369Sdduvall /* 14271369Sdduvall * Undo the work of bge_init_rings() above before the memory is freed 14281369Sdduvall */ 14291865Sdilpreet void 14301369Sdduvall bge_fini_rings(bge_t *bgep) 14311369Sdduvall { 14321369Sdduvall uint64_t ring; 14331369Sdduvall 14341369Sdduvall BGE_TRACE(("bge_fini_rings($%p)", (void *)bgep)); 14351369Sdduvall 14361369Sdduvall for (ring = 0; ring < BGE_BUFF_RINGS_MAX; ++ring) 14371369Sdduvall bge_fini_buff_ring(bgep, ring); 14381369Sdduvall for (ring = 0; ring < BGE_RECV_RINGS_MAX; ++ring) 14391369Sdduvall bge_fini_recv_ring(bgep, ring); 14401369Sdduvall for (ring = 0; ring < BGE_SEND_RINGS_MAX; ++ring) 14411369Sdduvall bge_fini_send_ring(bgep, ring); 14421369Sdduvall } 14431369Sdduvall 14441369Sdduvall /* 14451369Sdduvall * Allocate an area of memory and a DMA handle for accessing it 14461369Sdduvall */ 14471369Sdduvall static int 14481369Sdduvall bge_alloc_dma_mem(bge_t *bgep, size_t memsize, ddi_device_acc_attr_t *attr_p, 14491369Sdduvall uint_t dma_flags, dma_area_t *dma_p) 14501369Sdduvall { 14511369Sdduvall caddr_t va; 14521369Sdduvall int err; 14531369Sdduvall 14541369Sdduvall BGE_TRACE(("bge_alloc_dma_mem($%p, %ld, $%p, 0x%x, $%p)", 14551369Sdduvall (void *)bgep, memsize, attr_p, dma_flags, dma_p)); 14561369Sdduvall 14571369Sdduvall /* 14581369Sdduvall * Allocate handle 14591369Sdduvall */ 14601369Sdduvall err = ddi_dma_alloc_handle(bgep->devinfo, &dma_attr, 14611369Sdduvall DDI_DMA_SLEEP, NULL, &dma_p->dma_hdl); 14621369Sdduvall if (err != DDI_SUCCESS) 14631369Sdduvall return (DDI_FAILURE); 14641369Sdduvall 14651369Sdduvall /* 14661369Sdduvall * Allocate memory 14671369Sdduvall */ 14681369Sdduvall err = ddi_dma_mem_alloc(dma_p->dma_hdl, memsize, attr_p, 14691369Sdduvall dma_flags & (DDI_DMA_CONSISTENT | DDI_DMA_STREAMING), 14701369Sdduvall DDI_DMA_SLEEP, NULL, &va, &dma_p->alength, &dma_p->acc_hdl); 14711369Sdduvall if (err != DDI_SUCCESS) 14721369Sdduvall return (DDI_FAILURE); 14731369Sdduvall 14741369Sdduvall /* 14751369Sdduvall * Bind the two together 14761369Sdduvall */ 14771369Sdduvall dma_p->mem_va = va; 14781369Sdduvall err = ddi_dma_addr_bind_handle(dma_p->dma_hdl, NULL, 14791369Sdduvall va, dma_p->alength, dma_flags, DDI_DMA_SLEEP, NULL, 14801369Sdduvall &dma_p->cookie, &dma_p->ncookies); 14811369Sdduvall 14821369Sdduvall BGE_DEBUG(("bge_alloc_dma_mem(): bind %d bytes; err %d, %d cookies", 14831369Sdduvall dma_p->alength, err, dma_p->ncookies)); 14841369Sdduvall 14851369Sdduvall if (err != DDI_DMA_MAPPED || dma_p->ncookies != 1) 14861369Sdduvall return (DDI_FAILURE); 14871369Sdduvall 14881369Sdduvall dma_p->nslots = ~0U; 14891369Sdduvall dma_p->size = ~0U; 14901369Sdduvall dma_p->token = ~0U; 14911369Sdduvall dma_p->offset = 0; 14921369Sdduvall return (DDI_SUCCESS); 14931369Sdduvall } 14941369Sdduvall 14951369Sdduvall /* 14961369Sdduvall * Free one allocated area of DMAable memory 14971369Sdduvall */ 14981369Sdduvall static void 14991369Sdduvall bge_free_dma_mem(dma_area_t *dma_p) 15001369Sdduvall { 15011369Sdduvall if (dma_p->dma_hdl != NULL) { 15021369Sdduvall if (dma_p->ncookies) { 15031369Sdduvall (void) ddi_dma_unbind_handle(dma_p->dma_hdl); 15041369Sdduvall dma_p->ncookies = 0; 15051369Sdduvall } 15061369Sdduvall ddi_dma_free_handle(&dma_p->dma_hdl); 15071369Sdduvall dma_p->dma_hdl = NULL; 15081369Sdduvall } 15091369Sdduvall 15101369Sdduvall if (dma_p->acc_hdl != NULL) { 15111369Sdduvall ddi_dma_mem_free(&dma_p->acc_hdl); 15121369Sdduvall dma_p->acc_hdl = NULL; 15131369Sdduvall } 15141369Sdduvall } 15151369Sdduvall 15161369Sdduvall /* 15171369Sdduvall * This function allocates all the transmit and receive buffers 15181369Sdduvall * and descriptors, in four chunks (or one, if MONOLITHIC). 15191369Sdduvall */ 15201865Sdilpreet int 15211369Sdduvall bge_alloc_bufs(bge_t *bgep) 15221369Sdduvall { 15231369Sdduvall dma_area_t area; 15241369Sdduvall size_t rxbuffsize; 15251369Sdduvall size_t txbuffsize; 15261369Sdduvall size_t rxbuffdescsize; 15271369Sdduvall size_t rxdescsize; 15281369Sdduvall size_t txdescsize; 15291369Sdduvall uint64_t ring; 15301369Sdduvall uint64_t rx_rings = bgep->chipid.rx_rings; 15311369Sdduvall uint64_t tx_rings = bgep->chipid.tx_rings; 15321369Sdduvall int split; 15331369Sdduvall int err; 15341369Sdduvall 15351369Sdduvall BGE_TRACE(("bge_alloc_bufs($%p)", 15361369Sdduvall (void *)bgep)); 15371369Sdduvall 15381908Sly149593 rxbuffsize = BGE_STD_SLOTS_USED*bgep->chipid.std_buf_size; 15391369Sdduvall rxbuffsize += bgep->chipid.jumbo_slots*bgep->chipid.recv_jumbo_size; 15401369Sdduvall rxbuffsize += BGE_MINI_SLOTS_USED*BGE_MINI_BUFF_SIZE; 15411369Sdduvall 15421369Sdduvall txbuffsize = BGE_SEND_SLOTS_USED*bgep->chipid.snd_buff_size; 15431369Sdduvall txbuffsize *= tx_rings; 15441369Sdduvall 15451369Sdduvall rxdescsize = rx_rings*bgep->chipid.recv_slots; 15461369Sdduvall rxdescsize *= sizeof (bge_rbd_t); 15471369Sdduvall 15481369Sdduvall rxbuffdescsize = BGE_STD_SLOTS_USED; 15491369Sdduvall rxbuffdescsize += bgep->chipid.jumbo_slots; 15501369Sdduvall rxbuffdescsize += BGE_MINI_SLOTS_USED; 15511369Sdduvall rxbuffdescsize *= sizeof (bge_rbd_t); 15521369Sdduvall 15531369Sdduvall txdescsize = tx_rings*BGE_SEND_SLOTS_USED; 15541369Sdduvall txdescsize *= sizeof (bge_sbd_t); 15551369Sdduvall txdescsize += sizeof (bge_statistics_t); 15561369Sdduvall txdescsize += sizeof (bge_status_t); 15571369Sdduvall txdescsize += BGE_STATUS_PADDING; 15581369Sdduvall 15591369Sdduvall #if BGE_MONOLITHIC 15601369Sdduvall 15611369Sdduvall err = bge_alloc_dma_mem(bgep, 15621369Sdduvall rxbuffsize+txbuffsize+rxbuffdescsize+rxdescsize+txdescsize, 15631369Sdduvall &bge_data_accattr, DDI_DMA_RDWR | DDI_DMA_CONSISTENT, &area); 15641369Sdduvall if (err != DDI_SUCCESS) 15651369Sdduvall return (DDI_FAILURE); 15661369Sdduvall 15671369Sdduvall BGE_DEBUG(("allocated range $%p-$%p (0x%lx-0x%lx)", 15681369Sdduvall DMA_VPTR(area), 15691369Sdduvall (caddr_t)DMA_VPTR(area)+area.alength, 15701369Sdduvall area.cookie.dmac_laddress, 15711369Sdduvall area.cookie.dmac_laddress+area.alength)); 15721369Sdduvall 15731369Sdduvall bge_slice_chunk(&bgep->rx_buff[0], &area, 1, rxbuffsize); 15741369Sdduvall bge_slice_chunk(&bgep->tx_buff[0], &area, 1, txbuffsize); 15751369Sdduvall bge_slice_chunk(&bgep->rx_desc[0], &area, 1, rxdescsize); 15761369Sdduvall bge_slice_chunk(&bgep->tx_desc, &area, 1, txdescsize); 15771369Sdduvall 15781369Sdduvall #else 15791369Sdduvall /* 15801369Sdduvall * Allocate memory & handles for RX buffers 15811369Sdduvall */ 15821369Sdduvall ASSERT((rxbuffsize % BGE_SPLIT) == 0); 15831369Sdduvall for (split = 0; split < BGE_SPLIT; ++split) { 15841369Sdduvall err = bge_alloc_dma_mem(bgep, rxbuffsize/BGE_SPLIT, 15851369Sdduvall &bge_data_accattr, DDI_DMA_READ | BGE_DMA_MODE, 15861369Sdduvall &bgep->rx_buff[split]); 15871369Sdduvall if (err != DDI_SUCCESS) 15881369Sdduvall return (DDI_FAILURE); 15891369Sdduvall } 15901369Sdduvall 15911369Sdduvall /* 15921369Sdduvall * Allocate memory & handles for TX buffers 15931369Sdduvall */ 15941369Sdduvall ASSERT((txbuffsize % BGE_SPLIT) == 0); 15951369Sdduvall for (split = 0; split < BGE_SPLIT; ++split) { 15961369Sdduvall err = bge_alloc_dma_mem(bgep, txbuffsize/BGE_SPLIT, 15971369Sdduvall &bge_data_accattr, DDI_DMA_WRITE | BGE_DMA_MODE, 15981369Sdduvall &bgep->tx_buff[split]); 15991369Sdduvall if (err != DDI_SUCCESS) 16001369Sdduvall return (DDI_FAILURE); 16011369Sdduvall } 16021369Sdduvall 16031369Sdduvall /* 16041369Sdduvall * Allocate memory & handles for receive return rings 16051369Sdduvall */ 16061369Sdduvall ASSERT((rxdescsize % rx_rings) == 0); 16071369Sdduvall for (split = 0; split < rx_rings; ++split) { 16081369Sdduvall err = bge_alloc_dma_mem(bgep, rxdescsize/rx_rings, 16091369Sdduvall &bge_desc_accattr, DDI_DMA_RDWR | DDI_DMA_CONSISTENT, 16101369Sdduvall &bgep->rx_desc[split]); 16111369Sdduvall if (err != DDI_SUCCESS) 16121369Sdduvall return (DDI_FAILURE); 16131369Sdduvall } 16141369Sdduvall 16151369Sdduvall /* 16161369Sdduvall * Allocate memory & handles for buffer (producer) descriptor rings 16171369Sdduvall */ 16181369Sdduvall err = bge_alloc_dma_mem(bgep, rxbuffdescsize, &bge_desc_accattr, 16191369Sdduvall DDI_DMA_RDWR | DDI_DMA_CONSISTENT, &bgep->rx_desc[split]); 16201369Sdduvall if (err != DDI_SUCCESS) 16211369Sdduvall return (DDI_FAILURE); 16221369Sdduvall 16231369Sdduvall /* 16241369Sdduvall * Allocate memory & handles for TX descriptor rings, 16251369Sdduvall * status block, and statistics area 16261369Sdduvall */ 16271369Sdduvall err = bge_alloc_dma_mem(bgep, txdescsize, &bge_desc_accattr, 16281369Sdduvall DDI_DMA_RDWR | DDI_DMA_CONSISTENT, &bgep->tx_desc); 16291369Sdduvall if (err != DDI_SUCCESS) 16301369Sdduvall return (DDI_FAILURE); 16311369Sdduvall 16321369Sdduvall #endif /* BGE_MONOLITHIC */ 16331369Sdduvall 16341369Sdduvall /* 16351369Sdduvall * Now carve up each of the allocated areas ... 16361369Sdduvall */ 16371369Sdduvall for (split = 0; split < BGE_SPLIT; ++split) { 16381369Sdduvall area = bgep->rx_buff[split]; 16391369Sdduvall bge_slice_chunk(&bgep->buff[BGE_STD_BUFF_RING].buf[split], 16401369Sdduvall &area, BGE_STD_SLOTS_USED/BGE_SPLIT, 16411908Sly149593 bgep->chipid.std_buf_size); 16421369Sdduvall bge_slice_chunk(&bgep->buff[BGE_JUMBO_BUFF_RING].buf[split], 16431369Sdduvall &area, bgep->chipid.jumbo_slots/BGE_SPLIT, 16441369Sdduvall bgep->chipid.recv_jumbo_size); 16451369Sdduvall bge_slice_chunk(&bgep->buff[BGE_MINI_BUFF_RING].buf[split], 16461369Sdduvall &area, BGE_MINI_SLOTS_USED/BGE_SPLIT, 16471369Sdduvall BGE_MINI_BUFF_SIZE); 16481369Sdduvall ASSERT(area.alength >= 0); 16491369Sdduvall } 16501369Sdduvall 16511369Sdduvall for (split = 0; split < BGE_SPLIT; ++split) { 16521369Sdduvall area = bgep->tx_buff[split]; 16531369Sdduvall for (ring = 0; ring < tx_rings; ++ring) 16541369Sdduvall bge_slice_chunk(&bgep->send[ring].buf[split], 16551369Sdduvall &area, BGE_SEND_SLOTS_USED/BGE_SPLIT, 16561369Sdduvall bgep->chipid.snd_buff_size); 16571369Sdduvall for (; ring < BGE_SEND_RINGS_MAX; ++ring) 16581369Sdduvall bge_slice_chunk(&bgep->send[ring].buf[split], 16591369Sdduvall &area, 0/BGE_SPLIT, 16601369Sdduvall bgep->chipid.snd_buff_size); 16611369Sdduvall ASSERT(area.alength >= 0); 16621369Sdduvall } 16631369Sdduvall 16641369Sdduvall for (ring = 0; ring < rx_rings; ++ring) 16651369Sdduvall bge_slice_chunk(&bgep->recv[ring].desc, &bgep->rx_desc[ring], 16661369Sdduvall bgep->chipid.recv_slots, sizeof (bge_rbd_t)); 16671369Sdduvall 16681369Sdduvall area = bgep->rx_desc[rx_rings]; 16691369Sdduvall for (; ring < BGE_RECV_RINGS_MAX; ++ring) 16701369Sdduvall bge_slice_chunk(&bgep->recv[ring].desc, &area, 16711369Sdduvall 0, sizeof (bge_rbd_t)); 16721369Sdduvall bge_slice_chunk(&bgep->buff[BGE_STD_BUFF_RING].desc, &area, 16731369Sdduvall BGE_STD_SLOTS_USED, sizeof (bge_rbd_t)); 16741369Sdduvall bge_slice_chunk(&bgep->buff[BGE_JUMBO_BUFF_RING].desc, &area, 16751369Sdduvall bgep->chipid.jumbo_slots, sizeof (bge_rbd_t)); 16761369Sdduvall bge_slice_chunk(&bgep->buff[BGE_MINI_BUFF_RING].desc, &area, 16771369Sdduvall BGE_MINI_SLOTS_USED, sizeof (bge_rbd_t)); 16781369Sdduvall ASSERT(area.alength == 0); 16791369Sdduvall 16801369Sdduvall area = bgep->tx_desc; 16811369Sdduvall for (ring = 0; ring < tx_rings; ++ring) 16821369Sdduvall bge_slice_chunk(&bgep->send[ring].desc, &area, 16831369Sdduvall BGE_SEND_SLOTS_USED, sizeof (bge_sbd_t)); 16841369Sdduvall for (; ring < BGE_SEND_RINGS_MAX; ++ring) 16851369Sdduvall bge_slice_chunk(&bgep->send[ring].desc, &area, 16861369Sdduvall 0, sizeof (bge_sbd_t)); 16871369Sdduvall bge_slice_chunk(&bgep->statistics, &area, 1, sizeof (bge_statistics_t)); 16881369Sdduvall bge_slice_chunk(&bgep->status_block, &area, 1, sizeof (bge_status_t)); 16891369Sdduvall ASSERT(area.alength == BGE_STATUS_PADDING); 16901369Sdduvall DMA_ZERO(bgep->status_block); 16911369Sdduvall 16921369Sdduvall return (DDI_SUCCESS); 16931369Sdduvall } 16941369Sdduvall 16951369Sdduvall /* 16961369Sdduvall * This routine frees the transmit and receive buffers and descriptors. 16971369Sdduvall * Make sure the chip is stopped before calling it! 16981369Sdduvall */ 16991865Sdilpreet void 17001369Sdduvall bge_free_bufs(bge_t *bgep) 17011369Sdduvall { 17021369Sdduvall int split; 17031369Sdduvall 17041369Sdduvall BGE_TRACE(("bge_free_bufs($%p)", 17051369Sdduvall (void *)bgep)); 17061369Sdduvall 17071369Sdduvall #if BGE_MONOLITHIC 17081369Sdduvall bge_free_dma_mem(&bgep->rx_buff[0]); 17091369Sdduvall #else 17101369Sdduvall bge_free_dma_mem(&bgep->tx_desc); 17111369Sdduvall for (split = 0; split < BGE_RECV_RINGS_SPLIT; ++split) 17121369Sdduvall bge_free_dma_mem(&bgep->rx_desc[split]); 17131369Sdduvall for (split = 0; split < BGE_SPLIT; ++split) 17141369Sdduvall bge_free_dma_mem(&bgep->tx_buff[split]); 17151369Sdduvall for (split = 0; split < BGE_SPLIT; ++split) 17161369Sdduvall bge_free_dma_mem(&bgep->rx_buff[split]); 17171369Sdduvall #endif /* BGE_MONOLITHIC */ 17181369Sdduvall } 17191369Sdduvall 17201369Sdduvall /* 17211369Sdduvall * Determine (initial) MAC address ("BIA") to use for this interface 17221369Sdduvall */ 17231369Sdduvall 17241369Sdduvall static void 17251369Sdduvall bge_find_mac_address(bge_t *bgep, chip_id_t *cidp) 17261369Sdduvall { 17271369Sdduvall struct ether_addr sysaddr; 17281369Sdduvall char propbuf[8]; /* "true" or "false", plus NUL */ 17291369Sdduvall uchar_t *bytes; 17301369Sdduvall int *ints; 17311369Sdduvall uint_t nelts; 17321369Sdduvall int err; 17331369Sdduvall 17341369Sdduvall BGE_TRACE(("bge_find_mac_address($%p)", 17351369Sdduvall (void *)bgep)); 17361369Sdduvall 17371369Sdduvall BGE_DEBUG(("bge_find_mac_address: hw_mac_addr %012llx, => %s (%sset)", 17381369Sdduvall cidp->hw_mac_addr, 17391369Sdduvall ether_sprintf((void *)cidp->vendor_addr.addr), 17401369Sdduvall cidp->vendor_addr.set ? "" : "not ")); 17411369Sdduvall 17421369Sdduvall /* 17431369Sdduvall * The "vendor's factory-set address" may already have 17441369Sdduvall * been extracted from the chip, but if the property 17451369Sdduvall * "local-mac-address" is set we use that instead. It 17461369Sdduvall * will normally be set by OBP, but it could also be 17471369Sdduvall * specified in a .conf file(!) 17481369Sdduvall * 17491369Sdduvall * There doesn't seem to be a way to define byte-array 17501369Sdduvall * properties in a .conf, so we check whether it looks 17511369Sdduvall * like an array of 6 ints instead. 17521369Sdduvall * 17531369Sdduvall * Then, we check whether it looks like an array of 6 17541369Sdduvall * bytes (which it should, if OBP set it). If we can't 17551369Sdduvall * make sense of it either way, we'll ignore it. 17561369Sdduvall */ 17571369Sdduvall err = ddi_prop_lookup_int_array(DDI_DEV_T_ANY, bgep->devinfo, 17581369Sdduvall DDI_PROP_DONTPASS, localmac_propname, &ints, &nelts); 17591369Sdduvall if (err == DDI_PROP_SUCCESS) { 17601369Sdduvall if (nelts == ETHERADDRL) { 17611369Sdduvall while (nelts--) 17621369Sdduvall cidp->vendor_addr.addr[nelts] = ints[nelts]; 17631369Sdduvall cidp->vendor_addr.set = 1; 17641369Sdduvall } 17651369Sdduvall ddi_prop_free(ints); 17661369Sdduvall } 17671369Sdduvall 17681369Sdduvall err = ddi_prop_lookup_byte_array(DDI_DEV_T_ANY, bgep->devinfo, 17691369Sdduvall DDI_PROP_DONTPASS, localmac_propname, &bytes, &nelts); 17701369Sdduvall if (err == DDI_PROP_SUCCESS) { 17711369Sdduvall if (nelts == ETHERADDRL) { 17721369Sdduvall while (nelts--) 17731369Sdduvall cidp->vendor_addr.addr[nelts] = bytes[nelts]; 17741369Sdduvall cidp->vendor_addr.set = 1; 17751369Sdduvall } 17761369Sdduvall ddi_prop_free(bytes); 17771369Sdduvall } 17781369Sdduvall 17791369Sdduvall BGE_DEBUG(("bge_find_mac_address: +local %s (%sset)", 17801369Sdduvall ether_sprintf((void *)cidp->vendor_addr.addr), 17811369Sdduvall cidp->vendor_addr.set ? "" : "not ")); 17821369Sdduvall 17831369Sdduvall /* 17841369Sdduvall * Look up the OBP property "local-mac-address?". Note that even 17851369Sdduvall * though its value is a string (which should be "true" or "false"), 17861369Sdduvall * it can't be decoded by ddi_prop_lookup_string(9F). So, we zero 17871369Sdduvall * the buffer first and then fetch the property as an untyped array; 17881369Sdduvall * this may or may not include a final NUL, but since there will 17891369Sdduvall * always be one left at the end of the buffer we can now treat it 17901369Sdduvall * as a string anyway. 17911369Sdduvall */ 17921369Sdduvall nelts = sizeof (propbuf); 17931369Sdduvall bzero(propbuf, nelts--); 17941369Sdduvall err = ddi_getlongprop_buf(DDI_DEV_T_ANY, bgep->devinfo, 17951369Sdduvall DDI_PROP_CANSLEEP, localmac_boolname, propbuf, (int *)&nelts); 17961369Sdduvall 17971369Sdduvall /* 17981369Sdduvall * Now, if the address still isn't set from the hardware (SEEPROM) 17991369Sdduvall * or the OBP or .conf property, OR if the user has foolishly set 18001369Sdduvall * 'local-mac-address? = false', use "the system address" instead 18011369Sdduvall * (but only if it's non-null i.e. has been set from the IDPROM). 18021369Sdduvall */ 18031369Sdduvall if (cidp->vendor_addr.set == 0 || strcmp(propbuf, "false") == 0) 18041369Sdduvall if (localetheraddr(NULL, &sysaddr) != 0) { 18051369Sdduvall ethaddr_copy(&sysaddr, cidp->vendor_addr.addr); 18061369Sdduvall cidp->vendor_addr.set = 1; 18071369Sdduvall } 18081369Sdduvall 18091369Sdduvall BGE_DEBUG(("bge_find_mac_address: +system %s (%sset)", 18101369Sdduvall ether_sprintf((void *)cidp->vendor_addr.addr), 18111369Sdduvall cidp->vendor_addr.set ? "" : "not ")); 18121369Sdduvall 18131369Sdduvall /* 18141369Sdduvall * Finally(!), if there's a valid "mac-address" property (created 18151369Sdduvall * if we netbooted from this interface), we must use this instead 18161369Sdduvall * of any of the above to ensure that the NFS/install server doesn't 18171369Sdduvall * get confused by the address changing as Solaris takes over! 18181369Sdduvall */ 18191369Sdduvall err = ddi_prop_lookup_byte_array(DDI_DEV_T_ANY, bgep->devinfo, 18201369Sdduvall DDI_PROP_DONTPASS, macaddr_propname, &bytes, &nelts); 18211369Sdduvall if (err == DDI_PROP_SUCCESS) { 18221369Sdduvall if (nelts == ETHERADDRL) { 18231369Sdduvall while (nelts--) 18241369Sdduvall cidp->vendor_addr.addr[nelts] = bytes[nelts]; 18251369Sdduvall cidp->vendor_addr.set = 1; 18261369Sdduvall } 18271369Sdduvall ddi_prop_free(bytes); 18281369Sdduvall } 18291369Sdduvall 18301369Sdduvall BGE_DEBUG(("bge_find_mac_address: =final %s (%sset)", 18311369Sdduvall ether_sprintf((void *)cidp->vendor_addr.addr), 18321369Sdduvall cidp->vendor_addr.set ? "" : "not ")); 18331369Sdduvall } 18341369Sdduvall 18351865Sdilpreet 18361865Sdilpreet /*ARGSUSED*/ 18371865Sdilpreet int 18381865Sdilpreet bge_check_acc_handle(bge_t *bgep, ddi_acc_handle_t handle) 18391865Sdilpreet { 18401865Sdilpreet ddi_fm_error_t de; 18411865Sdilpreet 18421865Sdilpreet ddi_fm_acc_err_get(handle, &de, DDI_FME_VERSION); 18431865Sdilpreet ddi_fm_acc_err_clear(handle, DDI_FME_VERSION); 18441865Sdilpreet return (de.fme_status); 18451865Sdilpreet } 18461865Sdilpreet 18471865Sdilpreet /*ARGSUSED*/ 18481865Sdilpreet int 18491865Sdilpreet bge_check_dma_handle(bge_t *bgep, ddi_dma_handle_t handle) 18501865Sdilpreet { 18511865Sdilpreet ddi_fm_error_t de; 18521865Sdilpreet 18531865Sdilpreet ASSERT(bgep->progress & PROGRESS_BUFS); 18541865Sdilpreet ddi_fm_dma_err_get(handle, &de, DDI_FME_VERSION); 18551865Sdilpreet return (de.fme_status); 18561865Sdilpreet } 18571865Sdilpreet 18581865Sdilpreet /* 18591865Sdilpreet * The IO fault service error handling callback function 18601865Sdilpreet */ 18611865Sdilpreet /*ARGSUSED*/ 18621865Sdilpreet static int 18631865Sdilpreet bge_fm_error_cb(dev_info_t *dip, ddi_fm_error_t *err, const void *impl_data) 18641865Sdilpreet { 18651865Sdilpreet /* 18661865Sdilpreet * as the driver can always deal with an error in any dma or 18671865Sdilpreet * access handle, we can just return the fme_status value. 18681865Sdilpreet */ 18691865Sdilpreet pci_ereport_post(dip, err, NULL); 18701865Sdilpreet return (err->fme_status); 18711865Sdilpreet } 18721865Sdilpreet 18731865Sdilpreet static void 18741865Sdilpreet bge_fm_init(bge_t *bgep) 18751865Sdilpreet { 18761865Sdilpreet ddi_iblock_cookie_t iblk; 18771865Sdilpreet 18781865Sdilpreet /* Only register with IO Fault Services if we have some capability */ 18791865Sdilpreet if (bgep->fm_capabilities) { 18801865Sdilpreet bge_reg_accattr.devacc_attr_access = DDI_FLAGERR_ACC; 18811865Sdilpreet bge_desc_accattr.devacc_attr_access = DDI_FLAGERR_ACC; 18821865Sdilpreet dma_attr.dma_attr_flags = DDI_DMA_FLAGERR; 18831865Sdilpreet 18841865Sdilpreet /* Register capabilities with IO Fault Services */ 18851865Sdilpreet ddi_fm_init(bgep->devinfo, &bgep->fm_capabilities, &iblk); 18861865Sdilpreet 18871865Sdilpreet /* 18881865Sdilpreet * Initialize pci ereport capabilities if ereport capable 18891865Sdilpreet */ 18901865Sdilpreet if (DDI_FM_EREPORT_CAP(bgep->fm_capabilities) || 18911865Sdilpreet DDI_FM_ERRCB_CAP(bgep->fm_capabilities)) 18921865Sdilpreet pci_ereport_setup(bgep->devinfo); 18931865Sdilpreet 18941865Sdilpreet /* 18951865Sdilpreet * Register error callback if error callback capable 18961865Sdilpreet */ 18971865Sdilpreet if (DDI_FM_ERRCB_CAP(bgep->fm_capabilities)) 18981865Sdilpreet ddi_fm_handler_register(bgep->devinfo, 18991865Sdilpreet bge_fm_error_cb, (void*) bgep); 19001865Sdilpreet } else { 19011865Sdilpreet /* 19021865Sdilpreet * These fields have to be cleared of FMA if there are no 19031865Sdilpreet * FMA capabilities at runtime. 19041865Sdilpreet */ 19051865Sdilpreet bge_reg_accattr.devacc_attr_access = DDI_DEFAULT_ACC; 19061865Sdilpreet bge_desc_accattr.devacc_attr_access = DDI_DEFAULT_ACC; 19071865Sdilpreet dma_attr.dma_attr_flags = 0; 19081865Sdilpreet } 19091865Sdilpreet } 19101865Sdilpreet 19111865Sdilpreet static void 19121865Sdilpreet bge_fm_fini(bge_t *bgep) 19131865Sdilpreet { 19141865Sdilpreet /* Only unregister FMA capabilities if we registered some */ 19151865Sdilpreet if (bgep->fm_capabilities) { 19161865Sdilpreet 19171865Sdilpreet /* 19181865Sdilpreet * Release any resources allocated by pci_ereport_setup() 19191865Sdilpreet */ 19201865Sdilpreet if (DDI_FM_EREPORT_CAP(bgep->fm_capabilities) || 19211865Sdilpreet DDI_FM_ERRCB_CAP(bgep->fm_capabilities)) 19221865Sdilpreet pci_ereport_teardown(bgep->devinfo); 19231865Sdilpreet 19241865Sdilpreet /* 19251865Sdilpreet * Un-register error callback if error callback capable 19261865Sdilpreet */ 19271865Sdilpreet if (DDI_FM_ERRCB_CAP(bgep->fm_capabilities)) 19281865Sdilpreet ddi_fm_handler_unregister(bgep->devinfo); 19291865Sdilpreet 19301865Sdilpreet /* Unregister from IO Fault Services */ 19311865Sdilpreet ddi_fm_fini(bgep->devinfo); 19321865Sdilpreet } 19331865Sdilpreet } 19341865Sdilpreet 19351369Sdduvall static void 19361408Srandyf #ifdef BGE_IPMI_ASF 19371408Srandyf bge_unattach(bge_t *bgep, uint_t asf_mode) 19381408Srandyf #else 19391369Sdduvall bge_unattach(bge_t *bgep) 19401408Srandyf #endif 19411369Sdduvall { 19421369Sdduvall BGE_TRACE(("bge_unattach($%p)", 19431369Sdduvall (void *)bgep)); 19441369Sdduvall 19451369Sdduvall /* 19461369Sdduvall * Flag that no more activity may be initiated 19471369Sdduvall */ 19481369Sdduvall bgep->progress &= ~PROGRESS_READY; 19491369Sdduvall 19501369Sdduvall /* 19511369Sdduvall * Quiesce the PHY and MAC (leave it reset but still powered). 19521369Sdduvall * Clean up and free all BGE data structures 19531369Sdduvall */ 19541369Sdduvall if (bgep->cyclic_id) { 19551369Sdduvall mutex_enter(&cpu_lock); 19561369Sdduvall cyclic_remove(bgep->cyclic_id); 19571369Sdduvall mutex_exit(&cpu_lock); 19581369Sdduvall } 19591369Sdduvall if (bgep->progress & PROGRESS_KSTATS) 19601369Sdduvall bge_fini_kstats(bgep); 19611369Sdduvall if (bgep->progress & PROGRESS_NDD) 19621369Sdduvall bge_nd_cleanup(bgep); 19631369Sdduvall if (bgep->progress & PROGRESS_PHY) 19641369Sdduvall bge_phys_reset(bgep); 19651369Sdduvall if (bgep->progress & PROGRESS_HWINT) { 19661369Sdduvall mutex_enter(bgep->genlock); 19671408Srandyf #ifdef BGE_IPMI_ASF 19681865Sdilpreet if (bge_chip_reset(bgep, B_FALSE, asf_mode) != DDI_SUCCESS) 19691865Sdilpreet #else 19701865Sdilpreet if (bge_chip_reset(bgep, B_FALSE) != DDI_SUCCESS) 19711865Sdilpreet #endif 19721865Sdilpreet ddi_fm_service_impact(bgep->devinfo, 19731865Sdilpreet DDI_SERVICE_UNAFFECTED); 19741865Sdilpreet #ifdef BGE_IPMI_ASF 19751408Srandyf if (bgep->asf_enabled) { 19761408Srandyf /* 19771408Srandyf * This register has been overlaid. We restore its 19781408Srandyf * initial value here. 19791408Srandyf */ 19801408Srandyf bge_nic_put32(bgep, BGE_NIC_DATA_SIG_ADDR, 19811408Srandyf BGE_NIC_DATA_SIG); 19821408Srandyf } 19831408Srandyf #endif 19841865Sdilpreet if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) 19851865Sdilpreet ddi_fm_service_impact(bgep->devinfo, 19861865Sdilpreet DDI_SERVICE_UNAFFECTED); 19871865Sdilpreet if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) 19881865Sdilpreet ddi_fm_service_impact(bgep->devinfo, 19891865Sdilpreet DDI_SERVICE_UNAFFECTED); 19901369Sdduvall mutex_exit(bgep->genlock); 19911369Sdduvall } 19921369Sdduvall if (bgep->progress & PROGRESS_INTR) { 19931865Sdilpreet bge_intr_disable(bgep); 19941369Sdduvall bge_fini_rings(bgep); 19951369Sdduvall } 19961865Sdilpreet if (bgep->progress & PROGRESS_HWINT) { 19971865Sdilpreet bge_rem_intrs(bgep); 19981865Sdilpreet rw_destroy(bgep->errlock); 19991865Sdilpreet mutex_destroy(bgep->softintrlock); 20001865Sdilpreet mutex_destroy(bgep->genlock); 20011865Sdilpreet } 20021369Sdduvall if (bgep->progress & PROGRESS_FACTOTUM) 20031369Sdduvall ddi_remove_softintr(bgep->factotum_id); 20041369Sdduvall if (bgep->progress & PROGRESS_RESCHED) 20051369Sdduvall ddi_remove_softintr(bgep->resched_id); 20061865Sdilpreet if (bgep->progress & PROGRESS_BUFS) 20071865Sdilpreet bge_free_bufs(bgep); 20081369Sdduvall if (bgep->progress & PROGRESS_REGS) 20091369Sdduvall ddi_regs_map_free(&bgep->io_handle); 20101369Sdduvall if (bgep->progress & PROGRESS_CFG) 20111369Sdduvall pci_config_teardown(&bgep->cfg_handle); 20121369Sdduvall 20131865Sdilpreet bge_fm_fini(bgep); 20141865Sdilpreet 20151369Sdduvall ddi_remove_minor_node(bgep->devinfo, NULL); 20161369Sdduvall kmem_free(bgep, sizeof (*bgep)); 20171369Sdduvall } 20181369Sdduvall 20191369Sdduvall static int 20201369Sdduvall bge_resume(dev_info_t *devinfo) 20211369Sdduvall { 20221369Sdduvall bge_t *bgep; /* Our private data */ 20231369Sdduvall chip_id_t *cidp; 20241369Sdduvall chip_id_t chipid; 20251369Sdduvall 20261369Sdduvall bgep = ddi_get_driver_private(devinfo); 20271369Sdduvall if (bgep == NULL) 20281369Sdduvall return (DDI_FAILURE); 20291369Sdduvall 20301369Sdduvall /* 20311369Sdduvall * Refuse to resume if the data structures aren't consistent 20321369Sdduvall */ 20331369Sdduvall if (bgep->devinfo != devinfo) 20341369Sdduvall return (DDI_FAILURE); 20351369Sdduvall 20361408Srandyf #ifdef BGE_IPMI_ASF 20371408Srandyf /* 20381408Srandyf * Power management hasn't been supported in BGE now. If you 20391408Srandyf * want to implement it, please add the ASF/IPMI related 20401408Srandyf * code here. 20411408Srandyf */ 20421408Srandyf 20431408Srandyf #endif 20441408Srandyf 20451369Sdduvall /* 20461369Sdduvall * Read chip ID & set up config space command register(s) 20471369Sdduvall * Refuse to resume if the chip has changed its identity! 20481369Sdduvall */ 20491369Sdduvall cidp = &bgep->chipid; 20501865Sdilpreet mutex_enter(bgep->genlock); 20511369Sdduvall bge_chip_cfg_init(bgep, &chipid, B_FALSE); 20521865Sdilpreet if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) { 20531865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST); 20541865Sdilpreet mutex_exit(bgep->genlock); 20551865Sdilpreet return (DDI_FAILURE); 20561865Sdilpreet } 20571865Sdilpreet mutex_exit(bgep->genlock); 20581369Sdduvall if (chipid.vendor != cidp->vendor) 20591369Sdduvall return (DDI_FAILURE); 20601369Sdduvall if (chipid.device != cidp->device) 20611369Sdduvall return (DDI_FAILURE); 20621369Sdduvall if (chipid.revision != cidp->revision) 20631369Sdduvall return (DDI_FAILURE); 20641369Sdduvall if (chipid.asic_rev != cidp->asic_rev) 20651369Sdduvall return (DDI_FAILURE); 20661369Sdduvall 20671369Sdduvall /* 20681369Sdduvall * All OK, reinitialise h/w & kick off GLD scheduling 20691369Sdduvall */ 20701369Sdduvall mutex_enter(bgep->genlock); 20711865Sdilpreet if (bge_restart(bgep, B_TRUE) != DDI_SUCCESS) { 20721865Sdilpreet (void) bge_check_acc_handle(bgep, bgep->cfg_handle); 20731865Sdilpreet (void) bge_check_acc_handle(bgep, bgep->io_handle); 20741865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST); 20751865Sdilpreet mutex_exit(bgep->genlock); 20761865Sdilpreet return (DDI_FAILURE); 20771865Sdilpreet } 20781865Sdilpreet if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) { 20791865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST); 20801865Sdilpreet mutex_exit(bgep->genlock); 20811865Sdilpreet return (DDI_FAILURE); 20821865Sdilpreet } 20831865Sdilpreet if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) { 20841865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST); 20851865Sdilpreet mutex_exit(bgep->genlock); 20861865Sdilpreet return (DDI_FAILURE); 20871865Sdilpreet } 20881369Sdduvall mutex_exit(bgep->genlock); 20891369Sdduvall return (DDI_SUCCESS); 20901369Sdduvall } 20911369Sdduvall 20921369Sdduvall /* 20931369Sdduvall * attach(9E) -- Attach a device to the system 20941369Sdduvall * 20951369Sdduvall * Called once for each board successfully probed. 20961369Sdduvall */ 20971369Sdduvall static int 20981369Sdduvall bge_attach(dev_info_t *devinfo, ddi_attach_cmd_t cmd) 20991369Sdduvall { 21001369Sdduvall bge_t *bgep; /* Our private data */ 2101*2311Sseb mac_register_t *macp; 21021369Sdduvall chip_id_t *cidp; 21031369Sdduvall cyc_handler_t cychand; 21041369Sdduvall cyc_time_t cyctime; 21051369Sdduvall caddr_t regs; 21061369Sdduvall int instance; 21071369Sdduvall int err; 21081369Sdduvall int intr_types; 21091408Srandyf #ifdef BGE_IPMI_ASF 21101408Srandyf uint32_t mhcrValue; 21111408Srandyf #endif 21121369Sdduvall 21131369Sdduvall instance = ddi_get_instance(devinfo); 21141369Sdduvall 21151369Sdduvall BGE_GTRACE(("bge_attach($%p, %d) instance %d", 21161369Sdduvall (void *)devinfo, cmd, instance)); 21171369Sdduvall BGE_BRKPT(NULL, "bge_attach"); 21181369Sdduvall 21191369Sdduvall switch (cmd) { 21201369Sdduvall default: 21211369Sdduvall return (DDI_FAILURE); 21221369Sdduvall 21231369Sdduvall case DDI_RESUME: 21241369Sdduvall return (bge_resume(devinfo)); 21251369Sdduvall 21261369Sdduvall case DDI_ATTACH: 21271369Sdduvall break; 21281369Sdduvall } 21291369Sdduvall 21301369Sdduvall bgep = kmem_zalloc(sizeof (*bgep), KM_SLEEP); 21311369Sdduvall ddi_set_driver_private(devinfo, bgep); 21321369Sdduvall bgep->bge_guard = BGE_GUARD; 21331369Sdduvall bgep->devinfo = devinfo; 21341369Sdduvall 21351369Sdduvall /* 21361369Sdduvall * Initialize more fields in BGE private data 21371369Sdduvall */ 21381369Sdduvall bgep->debug = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo, 21391369Sdduvall DDI_PROP_DONTPASS, debug_propname, bge_debug); 21401369Sdduvall (void) snprintf(bgep->ifname, sizeof (bgep->ifname), "%s%d", 21411369Sdduvall BGE_DRIVER_NAME, instance); 21421369Sdduvall 21431369Sdduvall /* 21441865Sdilpreet * Initialize for fma support 21451865Sdilpreet */ 21461865Sdilpreet bgep->fm_capabilities = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo, 21471865Sdilpreet DDI_PROP_DONTPASS, fm_cap, 21481865Sdilpreet DDI_FM_EREPORT_CAPABLE | DDI_FM_ACCCHK_CAPABLE | 21491865Sdilpreet DDI_FM_DMACHK_CAPABLE | DDI_FM_ERRCB_CAPABLE); 21501865Sdilpreet BGE_DEBUG(("bgep->fm_capabilities = %d", bgep->fm_capabilities)); 21511865Sdilpreet bge_fm_init(bgep); 21521865Sdilpreet 21531865Sdilpreet /* 21541369Sdduvall * Look up the IOMMU's page size for DVMA mappings (must be 21551369Sdduvall * a power of 2) and convert to a mask. This can be used to 21561369Sdduvall * determine whether a message buffer crosses a page boundary. 21571369Sdduvall * Note: in 2s complement binary notation, if X is a power of 21581369Sdduvall * 2, then -X has the representation "11...1100...00". 21591369Sdduvall */ 21601369Sdduvall bgep->pagemask = dvma_pagesize(devinfo); 21611369Sdduvall ASSERT(ddi_ffs(bgep->pagemask) == ddi_fls(bgep->pagemask)); 21621369Sdduvall bgep->pagemask = -bgep->pagemask; 21631369Sdduvall 21641369Sdduvall /* 21651369Sdduvall * Map config space registers 21661369Sdduvall * Read chip ID & set up config space command register(s) 21671369Sdduvall * 21681369Sdduvall * Note: this leaves the chip accessible by Memory Space 21691369Sdduvall * accesses, but with interrupts and Bus Mastering off. 21701369Sdduvall * This should ensure that nothing untoward will happen 21711369Sdduvall * if it has been left active by the (net-)bootloader. 21721369Sdduvall * We'll re-enable Bus Mastering once we've reset the chip, 21731369Sdduvall * and allow interrupts only when everything else is set up. 21741369Sdduvall */ 21751369Sdduvall err = pci_config_setup(devinfo, &bgep->cfg_handle); 21761408Srandyf #ifdef BGE_IPMI_ASF 21771408Srandyf mhcrValue = pci_config_get32(bgep->cfg_handle, PCI_CONF_BGE_MHCR); 21781408Srandyf if (mhcrValue & MHCR_ENABLE_ENDIAN_WORD_SWAP) { 21791408Srandyf bgep->asf_wordswapped = B_TRUE; 21801408Srandyf } else { 21811408Srandyf bgep->asf_wordswapped = B_FALSE; 21821408Srandyf } 21831408Srandyf bge_asf_get_config(bgep); 21841408Srandyf #endif 21851369Sdduvall if (err != DDI_SUCCESS) { 21861369Sdduvall bge_problem(bgep, "pci_config_setup() failed"); 21871369Sdduvall goto attach_fail; 21881369Sdduvall } 21891369Sdduvall bgep->progress |= PROGRESS_CFG; 21901369Sdduvall cidp = &bgep->chipid; 21911369Sdduvall bzero(cidp, sizeof (*cidp)); 21921369Sdduvall bge_chip_cfg_init(bgep, cidp, B_FALSE); 21931865Sdilpreet if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) { 21941865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST); 21951865Sdilpreet goto attach_fail; 21961865Sdilpreet } 21971369Sdduvall 21981408Srandyf #ifdef BGE_IPMI_ASF 21991408Srandyf if (DEVICE_5721_SERIES_CHIPSETS(bgep) || 22001408Srandyf DEVICE_5714_SERIES_CHIPSETS(bgep)) { 22011408Srandyf bgep->asf_newhandshake = B_TRUE; 22021408Srandyf } else { 22031408Srandyf bgep->asf_newhandshake = B_FALSE; 22041408Srandyf } 22051408Srandyf #endif 22061408Srandyf 22071369Sdduvall /* 22081369Sdduvall * Update those parts of the chip ID derived from volatile 22091369Sdduvall * registers with the values seen by OBP (in case the chip 22101369Sdduvall * has been reset externally and therefore lost them). 22111369Sdduvall */ 22121369Sdduvall cidp->subven = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo, 22131369Sdduvall DDI_PROP_DONTPASS, subven_propname, cidp->subven); 22141369Sdduvall cidp->subdev = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo, 22151369Sdduvall DDI_PROP_DONTPASS, subdev_propname, cidp->subdev); 22161369Sdduvall cidp->clsize = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo, 22171369Sdduvall DDI_PROP_DONTPASS, clsize_propname, cidp->clsize); 22181369Sdduvall cidp->latency = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo, 22191369Sdduvall DDI_PROP_DONTPASS, latency_propname, cidp->latency); 22201369Sdduvall cidp->rx_rings = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo, 22211369Sdduvall DDI_PROP_DONTPASS, rxrings_propname, cidp->rx_rings); 22221369Sdduvall cidp->tx_rings = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo, 22231369Sdduvall DDI_PROP_DONTPASS, txrings_propname, cidp->tx_rings); 22241369Sdduvall 22251369Sdduvall if (bge_jumbo_enable == B_TRUE) { 22261369Sdduvall cidp->default_mtu = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo, 22271369Sdduvall DDI_PROP_DONTPASS, default_mtu, BGE_DEFAULT_MTU); 22281369Sdduvall if ((cidp->default_mtu < BGE_DEFAULT_MTU)|| 22291369Sdduvall (cidp->default_mtu > BGE_MAXIMUM_MTU)) { 22301369Sdduvall cidp->default_mtu = BGE_DEFAULT_MTU; 22311369Sdduvall } 22321369Sdduvall } 22331369Sdduvall /* 22341369Sdduvall * Map operating registers 22351369Sdduvall */ 22361369Sdduvall err = ddi_regs_map_setup(devinfo, BGE_PCI_OPREGS_RNUMBER, 22371369Sdduvall ®s, 0, 0, &bge_reg_accattr, &bgep->io_handle); 22381369Sdduvall if (err != DDI_SUCCESS) { 22391369Sdduvall bge_problem(bgep, "ddi_regs_map_setup() failed"); 22401369Sdduvall goto attach_fail; 22411369Sdduvall } 22421369Sdduvall bgep->io_regs = regs; 22431369Sdduvall bgep->progress |= PROGRESS_REGS; 22441369Sdduvall 22451369Sdduvall /* 22461369Sdduvall * Characterise the device, so we know its requirements. 22471369Sdduvall * Then allocate the appropriate TX and RX descriptors & buffers. 22481369Sdduvall */ 22491865Sdilpreet if (bge_chip_id_init(bgep) == EIO) { 22501865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST); 22511865Sdilpreet goto attach_fail; 22521865Sdilpreet } 22531369Sdduvall err = bge_alloc_bufs(bgep); 22541369Sdduvall if (err != DDI_SUCCESS) { 22551369Sdduvall bge_problem(bgep, "DMA buffer allocation failed"); 22561369Sdduvall goto attach_fail; 22571369Sdduvall } 22581865Sdilpreet bgep->progress |= PROGRESS_BUFS; 22591369Sdduvall 22601369Sdduvall /* 22611369Sdduvall * Add the softint handlers: 22621369Sdduvall * 22631369Sdduvall * Both of these handlers are used to avoid restrictions on the 22641369Sdduvall * context and/or mutexes required for some operations. In 22651369Sdduvall * particular, the hardware interrupt handler and its subfunctions 22661369Sdduvall * can detect a number of conditions that we don't want to handle 22671369Sdduvall * in that context or with that set of mutexes held. So, these 22681369Sdduvall * softints are triggered instead: 22691369Sdduvall * 22702135Szh199473 * the <resched> softint is triggered if we have previously 22711369Sdduvall * had to refuse to send a packet because of resource shortage 22721369Sdduvall * (we've run out of transmit buffers), but the send completion 22731369Sdduvall * interrupt handler has now detected that more buffers have 22741369Sdduvall * become available. 22751369Sdduvall * 22761369Sdduvall * the <factotum> is triggered if the h/w interrupt handler 22771369Sdduvall * sees the <link state changed> or <error> bits in the status 22781369Sdduvall * block. It's also triggered periodically to poll the link 22791369Sdduvall * state, just in case we aren't getting link status change 22801369Sdduvall * interrupts ... 22811369Sdduvall */ 22821369Sdduvall err = ddi_add_softintr(devinfo, DDI_SOFTINT_LOW, &bgep->resched_id, 22831369Sdduvall NULL, NULL, bge_reschedule, (caddr_t)bgep); 22841369Sdduvall if (err != DDI_SUCCESS) { 22851369Sdduvall bge_problem(bgep, "ddi_add_softintr() failed"); 22861369Sdduvall goto attach_fail; 22871369Sdduvall } 22881369Sdduvall bgep->progress |= PROGRESS_RESCHED; 22891369Sdduvall err = ddi_add_softintr(devinfo, DDI_SOFTINT_LOW, &bgep->factotum_id, 22901369Sdduvall NULL, NULL, bge_chip_factotum, (caddr_t)bgep); 22911369Sdduvall if (err != DDI_SUCCESS) { 22921369Sdduvall bge_problem(bgep, "ddi_add_softintr() failed"); 22931369Sdduvall goto attach_fail; 22941369Sdduvall } 22951369Sdduvall bgep->progress |= PROGRESS_FACTOTUM; 22961369Sdduvall 22971369Sdduvall /* Get supported interrupt types */ 22981369Sdduvall if (ddi_intr_get_supported_types(devinfo, &intr_types) != DDI_SUCCESS) { 22991369Sdduvall bge_error(bgep, "ddi_intr_get_supported_types failed\n"); 23001369Sdduvall 23011369Sdduvall goto attach_fail; 23021369Sdduvall } 23031369Sdduvall 23041369Sdduvall bge_log(bgep, "ddi_intr_get_supported_types() returned: %x", 23051369Sdduvall intr_types); 23061369Sdduvall 23071369Sdduvall if ((intr_types & DDI_INTR_TYPE_MSI) && bgep->chipid.msi_enabled) { 23081369Sdduvall if (bge_add_intrs(bgep, DDI_INTR_TYPE_MSI) != DDI_SUCCESS) { 23091369Sdduvall bge_error(bgep, "MSI registration failed, " 23101369Sdduvall "trying FIXED interrupt type\n"); 23111369Sdduvall } else { 23121369Sdduvall bge_log(bgep, "Using MSI interrupt type\n"); 23131369Sdduvall 23141369Sdduvall bgep->intr_type = DDI_INTR_TYPE_MSI; 23151865Sdilpreet bgep->progress |= PROGRESS_HWINT; 23161369Sdduvall } 23171369Sdduvall } 23181369Sdduvall 23191865Sdilpreet if (!(bgep->progress & PROGRESS_HWINT) && 23201369Sdduvall (intr_types & DDI_INTR_TYPE_FIXED)) { 23211369Sdduvall if (bge_add_intrs(bgep, DDI_INTR_TYPE_FIXED) != DDI_SUCCESS) { 23221369Sdduvall bge_error(bgep, "FIXED interrupt " 23231369Sdduvall "registration failed\n"); 23241369Sdduvall goto attach_fail; 23251369Sdduvall } 23261369Sdduvall 23271369Sdduvall bge_log(bgep, "Using FIXED interrupt type\n"); 23281369Sdduvall 23291369Sdduvall bgep->intr_type = DDI_INTR_TYPE_FIXED; 23301865Sdilpreet bgep->progress |= PROGRESS_HWINT; 23311369Sdduvall } 23321369Sdduvall 23331865Sdilpreet if (!(bgep->progress & PROGRESS_HWINT)) { 23341369Sdduvall bge_error(bgep, "No interrupts registered\n"); 23351369Sdduvall goto attach_fail; 23361369Sdduvall } 23371369Sdduvall 23381369Sdduvall /* 23391369Sdduvall * Note that interrupts are not enabled yet as 23401865Sdilpreet * mutex locks are not initialized. Initialize mutex locks. 23411865Sdilpreet */ 23421865Sdilpreet mutex_init(bgep->genlock, NULL, MUTEX_DRIVER, 23431865Sdilpreet DDI_INTR_PRI(bgep->intr_pri)); 23441865Sdilpreet mutex_init(bgep->softintrlock, NULL, MUTEX_DRIVER, 23451865Sdilpreet DDI_INTR_PRI(bgep->intr_pri)); 23461865Sdilpreet rw_init(bgep->errlock, NULL, RW_DRIVER, 23471865Sdilpreet DDI_INTR_PRI(bgep->intr_pri)); 23481865Sdilpreet 23491865Sdilpreet /* 23501865Sdilpreet * Initialize rings. 23511369Sdduvall */ 23521369Sdduvall bge_init_rings(bgep); 23531369Sdduvall 23541369Sdduvall /* 23551369Sdduvall * Now that mutex locks are initialized, enable interrupts. 23561369Sdduvall */ 23571865Sdilpreet bge_intr_enable(bgep); 23581865Sdilpreet bgep->progress |= PROGRESS_INTR; 23591369Sdduvall 23601369Sdduvall /* 23611369Sdduvall * Initialise link state variables 23621369Sdduvall * Stop, reset & reinitialise the chip. 23631369Sdduvall * Initialise the (internal) PHY. 23641369Sdduvall */ 23651369Sdduvall bgep->link_state = LINK_STATE_UNKNOWN; 23661369Sdduvall bgep->link_up_msg = bgep->link_down_msg = " (initialized)"; 23671369Sdduvall 23681369Sdduvall mutex_enter(bgep->genlock); 23691369Sdduvall 23701369Sdduvall /* 23711369Sdduvall * Reset chip & rings to initial state; also reset address 23721369Sdduvall * filtering, promiscuity, loopback mode. 23731369Sdduvall */ 23741408Srandyf #ifdef BGE_IPMI_ASF 23751865Sdilpreet if (bge_reset(bgep, ASF_MODE_SHUTDOWN) != DDI_SUCCESS) { 23761408Srandyf #else 23771865Sdilpreet if (bge_reset(bgep) != DDI_SUCCESS) { 23781408Srandyf #endif 23791865Sdilpreet (void) bge_check_acc_handle(bgep, bgep->cfg_handle); 23801865Sdilpreet (void) bge_check_acc_handle(bgep, bgep->io_handle); 23811865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST); 23821865Sdilpreet mutex_exit(bgep->genlock); 23831865Sdilpreet goto attach_fail; 23841865Sdilpreet } 23851369Sdduvall 23861369Sdduvall bzero(bgep->mcast_hash, sizeof (bgep->mcast_hash)); 23871369Sdduvall bzero(bgep->mcast_refs, sizeof (bgep->mcast_refs)); 23881369Sdduvall bgep->promisc = B_FALSE; 23891369Sdduvall bgep->param_loop_mode = BGE_LOOP_NONE; 23901865Sdilpreet if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) { 23911865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST); 23921865Sdilpreet mutex_exit(bgep->genlock); 23931865Sdilpreet goto attach_fail; 23941865Sdilpreet } 23951865Sdilpreet if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) { 23961865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST); 23971865Sdilpreet mutex_exit(bgep->genlock); 23981865Sdilpreet goto attach_fail; 23991865Sdilpreet } 24001369Sdduvall 24011369Sdduvall mutex_exit(bgep->genlock); 24021369Sdduvall 24031865Sdilpreet if (bge_phys_init(bgep) == EIO) { 24041865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST); 24051865Sdilpreet goto attach_fail; 24061865Sdilpreet } 24071369Sdduvall bgep->progress |= PROGRESS_PHY; 24081369Sdduvall 24091369Sdduvall /* 24101369Sdduvall * Register NDD-tweakable parameters 24111369Sdduvall */ 24121369Sdduvall if (bge_nd_init(bgep)) { 24131369Sdduvall bge_problem(bgep, "bge_nd_init() failed"); 24141369Sdduvall goto attach_fail; 24151369Sdduvall } 24161369Sdduvall bgep->progress |= PROGRESS_NDD; 24171369Sdduvall 24181369Sdduvall /* 24191369Sdduvall * Create & initialise named kstats 24201369Sdduvall */ 24211369Sdduvall bge_init_kstats(bgep, instance); 24221369Sdduvall bgep->progress |= PROGRESS_KSTATS; 24231369Sdduvall 24241369Sdduvall /* 24251369Sdduvall * Determine whether to override the chip's own MAC address 24261369Sdduvall */ 24271369Sdduvall bge_find_mac_address(bgep, cidp); 24281369Sdduvall ethaddr_copy(cidp->vendor_addr.addr, bgep->curr_addr.addr); 24291369Sdduvall bgep->curr_addr.set = 1; 24301369Sdduvall 2431*2311Sseb if ((macp = mac_alloc(MAC_VERSION)) == NULL) 2432*2311Sseb goto attach_fail; 2433*2311Sseb macp->m_type_ident = MAC_PLUGIN_IDENT_ETHER; 2434*2311Sseb macp->m_driver = bgep; 24351369Sdduvall macp->m_dip = devinfo; 2436*2311Sseb macp->m_src_addr = bgep->curr_addr.addr; 2437*2311Sseb macp->m_callbacks = &bge_m_callbacks; 2438*2311Sseb macp->m_min_sdu = 0; 2439*2311Sseb macp->m_max_sdu = cidp->ethmax_size - sizeof (struct ether_header); 24401369Sdduvall /* 24411369Sdduvall * Finally, we're ready to register ourselves with the MAC layer 24421369Sdduvall * interface; if this succeeds, we're all ready to start() 24431369Sdduvall */ 2444*2311Sseb err = mac_register(macp, &bgep->mh); 2445*2311Sseb mac_free(macp); 2446*2311Sseb if (err != 0) 24471369Sdduvall goto attach_fail; 24481369Sdduvall 24491369Sdduvall cychand.cyh_func = bge_chip_cyclic; 24501369Sdduvall cychand.cyh_arg = bgep; 24511369Sdduvall cychand.cyh_level = CY_LOCK_LEVEL; 24521369Sdduvall cyctime.cyt_when = 0; 24531369Sdduvall cyctime.cyt_interval = BGE_CYCLIC_PERIOD; 24541369Sdduvall mutex_enter(&cpu_lock); 24551369Sdduvall bgep->cyclic_id = cyclic_add(&cychand, &cyctime); 24561369Sdduvall mutex_exit(&cpu_lock); 24571369Sdduvall 24581369Sdduvall bgep->progress |= PROGRESS_READY; 24591369Sdduvall ASSERT(bgep->bge_guard == BGE_GUARD); 24601369Sdduvall return (DDI_SUCCESS); 24611369Sdduvall 24621369Sdduvall attach_fail: 24631408Srandyf #ifdef BGE_IPMI_ASF 24641408Srandyf bge_unattach(bgep, ASF_MODE_NONE); 24651408Srandyf #else 24661369Sdduvall bge_unattach(bgep); 24671408Srandyf #endif 24681369Sdduvall return (DDI_FAILURE); 24691369Sdduvall } 24701369Sdduvall 24711369Sdduvall /* 24721369Sdduvall * bge_suspend() -- suspend transmit/receive for powerdown 24731369Sdduvall */ 24741369Sdduvall static int 24751369Sdduvall bge_suspend(bge_t *bgep) 24761369Sdduvall { 24771369Sdduvall /* 24781369Sdduvall * Stop processing and idle (powerdown) the PHY ... 24791369Sdduvall */ 24801369Sdduvall mutex_enter(bgep->genlock); 24811408Srandyf #ifdef BGE_IPMI_ASF 24821408Srandyf /* 24831408Srandyf * Power management hasn't been supported in BGE now. If you 24841408Srandyf * want to implement it, please add the ASF/IPMI related 24851408Srandyf * code here. 24861408Srandyf */ 24871408Srandyf #endif 24881369Sdduvall bge_stop(bgep); 24891865Sdilpreet if (bge_phys_idle(bgep) != DDI_SUCCESS) { 24901865Sdilpreet (void) bge_check_acc_handle(bgep, bgep->io_handle); 24911865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 24921865Sdilpreet mutex_exit(bgep->genlock); 24931865Sdilpreet return (DDI_FAILURE); 24941865Sdilpreet } 24951865Sdilpreet if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) { 24961865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 24971865Sdilpreet mutex_exit(bgep->genlock); 24981865Sdilpreet return (DDI_FAILURE); 24991865Sdilpreet } 25001369Sdduvall mutex_exit(bgep->genlock); 25011369Sdduvall 25021369Sdduvall return (DDI_SUCCESS); 25031369Sdduvall } 25041369Sdduvall 25051369Sdduvall /* 25061369Sdduvall * detach(9E) -- Detach a device from the system 25071369Sdduvall */ 25081369Sdduvall static int 25091369Sdduvall bge_detach(dev_info_t *devinfo, ddi_detach_cmd_t cmd) 25101369Sdduvall { 25111369Sdduvall bge_t *bgep; 25121408Srandyf #ifdef BGE_IPMI_ASF 25131408Srandyf uint_t asf_mode; 25141408Srandyf asf_mode = ASF_MODE_NONE; 25151408Srandyf #endif 25161369Sdduvall 25171369Sdduvall BGE_GTRACE(("bge_detach($%p, %d)", (void *)devinfo, cmd)); 25181369Sdduvall 25191369Sdduvall bgep = ddi_get_driver_private(devinfo); 25201369Sdduvall 25211369Sdduvall switch (cmd) { 25221369Sdduvall default: 25231369Sdduvall return (DDI_FAILURE); 25241369Sdduvall 25251369Sdduvall case DDI_SUSPEND: 25261369Sdduvall return (bge_suspend(bgep)); 25271369Sdduvall 25281369Sdduvall case DDI_DETACH: 25291369Sdduvall break; 25301369Sdduvall } 25311369Sdduvall 25321408Srandyf #ifdef BGE_IPMI_ASF 25331408Srandyf mutex_enter(bgep->genlock); 25341408Srandyf if (bgep->asf_enabled && (bgep->asf_status == ASF_STAT_RUN)) { 25351408Srandyf 25361408Srandyf bge_asf_update_status(bgep); 25371408Srandyf bge_asf_stop_timer(bgep); 25381408Srandyf bgep->asf_status = ASF_STAT_STOP; 25391408Srandyf 25401408Srandyf bge_asf_pre_reset_operations(bgep, BGE_SHUTDOWN_RESET); 25411408Srandyf 25421408Srandyf if (bgep->asf_pseudostop) { 25431408Srandyf bgep->link_up_msg = bgep->link_down_msg = " (stopped)"; 25441408Srandyf bge_chip_stop(bgep, B_FALSE); 25451408Srandyf bgep->bge_mac_state = BGE_MAC_STOPPED; 25461408Srandyf bgep->asf_pseudostop = B_FALSE; 25471408Srandyf } 25481408Srandyf 25491408Srandyf asf_mode = ASF_MODE_POST_SHUTDOWN; 25501865Sdilpreet 25511865Sdilpreet if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) 25521865Sdilpreet ddi_fm_service_impact(bgep->devinfo, 25531865Sdilpreet DDI_SERVICE_UNAFFECTED); 25541865Sdilpreet if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) 25551865Sdilpreet ddi_fm_service_impact(bgep->devinfo, 25561865Sdilpreet DDI_SERVICE_UNAFFECTED); 25571408Srandyf } 25581408Srandyf mutex_exit(bgep->genlock); 25591408Srandyf #endif 25601408Srandyf 25611369Sdduvall /* 25621369Sdduvall * Unregister from the GLD subsystem. This can fail, in 25631369Sdduvall * particular if there are DLPI style-2 streams still open - 25641369Sdduvall * in which case we just return failure without shutting 25651369Sdduvall * down chip operations. 25661369Sdduvall */ 2567*2311Sseb if (mac_unregister(bgep->mh) != 0) 25681369Sdduvall return (DDI_FAILURE); 25691369Sdduvall 25701369Sdduvall /* 25711369Sdduvall * All activity stopped, so we can clean up & exit 25721369Sdduvall */ 25731408Srandyf #ifdef BGE_IPMI_ASF 25741408Srandyf bge_unattach(bgep, asf_mode); 25751408Srandyf #else 25761369Sdduvall bge_unattach(bgep); 25771408Srandyf #endif 25781369Sdduvall return (DDI_SUCCESS); 25791369Sdduvall } 25801369Sdduvall 25811369Sdduvall 25821369Sdduvall /* 25831369Sdduvall * ========== Module Loading Data & Entry Points ========== 25841369Sdduvall */ 25851369Sdduvall 25861369Sdduvall #undef BGE_DBG 25871369Sdduvall #define BGE_DBG BGE_DBG_INIT /* debug flag for this code */ 25881369Sdduvall 25891369Sdduvall DDI_DEFINE_STREAM_OPS(bge_dev_ops, nulldev, nulldev, bge_attach, bge_detach, 25901369Sdduvall nodev, NULL, D_MP, NULL); 25911369Sdduvall 25921369Sdduvall static struct modldrv bge_modldrv = { 25931369Sdduvall &mod_driverops, /* Type of module. This one is a driver */ 25941369Sdduvall bge_ident, /* short description */ 25951369Sdduvall &bge_dev_ops /* driver specific ops */ 25961369Sdduvall }; 25971369Sdduvall 25981369Sdduvall static struct modlinkage modlinkage = { 25991369Sdduvall MODREV_1, (void *)&bge_modldrv, NULL 26001369Sdduvall }; 26011369Sdduvall 26021369Sdduvall 26031369Sdduvall int 26041369Sdduvall _info(struct modinfo *modinfop) 26051369Sdduvall { 26061369Sdduvall return (mod_info(&modlinkage, modinfop)); 26071369Sdduvall } 26081369Sdduvall 26091369Sdduvall int 26101369Sdduvall _init(void) 26111369Sdduvall { 26121369Sdduvall int status; 26131369Sdduvall 26141369Sdduvall mac_init_ops(&bge_dev_ops, "bge"); 26151369Sdduvall status = mod_install(&modlinkage); 26161369Sdduvall if (status == DDI_SUCCESS) 26171369Sdduvall mutex_init(bge_log_mutex, NULL, MUTEX_DRIVER, NULL); 26181369Sdduvall else 26191369Sdduvall mac_fini_ops(&bge_dev_ops); 26201369Sdduvall return (status); 26211369Sdduvall } 26221369Sdduvall 26231369Sdduvall int 26241369Sdduvall _fini(void) 26251369Sdduvall { 26261369Sdduvall int status; 26271369Sdduvall 26281369Sdduvall status = mod_remove(&modlinkage); 26291369Sdduvall if (status == DDI_SUCCESS) { 26301369Sdduvall mac_fini_ops(&bge_dev_ops); 26311369Sdduvall mutex_destroy(bge_log_mutex); 26321369Sdduvall } 26331369Sdduvall return (status); 26341369Sdduvall } 26351369Sdduvall 26361369Sdduvall 26371369Sdduvall /* 26381369Sdduvall * bge_add_intrs: 26391369Sdduvall * 26401369Sdduvall * Register FIXED or MSI interrupts. 26411369Sdduvall */ 26421369Sdduvall static int 26431369Sdduvall bge_add_intrs(bge_t *bgep, int intr_type) 26441369Sdduvall { 26451369Sdduvall dev_info_t *dip = bgep->devinfo; 26461369Sdduvall int avail, actual, intr_size, count = 0; 26471369Sdduvall int i, flag, ret; 26481369Sdduvall 26491369Sdduvall bge_log(bgep, "bge_add_intrs: interrupt type 0x%x\n", intr_type); 26501369Sdduvall 26511369Sdduvall /* Get number of interrupts */ 26521369Sdduvall ret = ddi_intr_get_nintrs(dip, intr_type, &count); 26531369Sdduvall if ((ret != DDI_SUCCESS) || (count == 0)) { 26541369Sdduvall bge_error(bgep, "ddi_intr_get_nintrs() failure, ret: %d, " 26551369Sdduvall "count: %d", ret, count); 26561369Sdduvall 26571369Sdduvall return (DDI_FAILURE); 26581369Sdduvall } 26591369Sdduvall 26601369Sdduvall /* Get number of available interrupts */ 26611369Sdduvall ret = ddi_intr_get_navail(dip, intr_type, &avail); 26621369Sdduvall if ((ret != DDI_SUCCESS) || (avail == 0)) { 26631369Sdduvall bge_error(bgep, "ddi_intr_get_navail() failure, " 26641369Sdduvall "ret: %d, avail: %d\n", ret, avail); 26651369Sdduvall 26661369Sdduvall return (DDI_FAILURE); 26671369Sdduvall } 26681369Sdduvall 26691369Sdduvall if (avail < count) { 26701369Sdduvall bge_log(bgep, "nitrs() returned %d, navail returned %d\n", 26711369Sdduvall count, avail); 26721369Sdduvall } 26731369Sdduvall 26741369Sdduvall /* 26751369Sdduvall * BGE hardware generates only single MSI even though it claims 26761369Sdduvall * to support multiple MSIs. So, hard code MSI count value to 1. 26771369Sdduvall */ 26781369Sdduvall if (intr_type == DDI_INTR_TYPE_MSI) { 26791369Sdduvall count = 1; 26801369Sdduvall flag = DDI_INTR_ALLOC_STRICT; 26811369Sdduvall } else { 26821369Sdduvall flag = DDI_INTR_ALLOC_NORMAL; 26831369Sdduvall } 26841369Sdduvall 26851369Sdduvall /* Allocate an array of interrupt handles */ 26861369Sdduvall intr_size = count * sizeof (ddi_intr_handle_t); 26871369Sdduvall bgep->htable = kmem_alloc(intr_size, KM_SLEEP); 26881369Sdduvall 26891369Sdduvall /* Call ddi_intr_alloc() */ 26901369Sdduvall ret = ddi_intr_alloc(dip, bgep->htable, intr_type, 0, 26911369Sdduvall count, &actual, flag); 26921369Sdduvall 26931369Sdduvall if ((ret != DDI_SUCCESS) || (actual == 0)) { 26941369Sdduvall bge_error(bgep, "ddi_intr_alloc() failed %d\n", ret); 26951369Sdduvall 26961369Sdduvall kmem_free(bgep->htable, intr_size); 26971369Sdduvall return (DDI_FAILURE); 26981369Sdduvall } 26991369Sdduvall 27001369Sdduvall if (actual < count) { 27011369Sdduvall bge_log(bgep, "Requested: %d, Received: %d\n", count, actual); 27021369Sdduvall } 27031369Sdduvall 27041369Sdduvall bgep->intr_cnt = actual; 27051369Sdduvall 27061369Sdduvall /* 27071369Sdduvall * Get priority for first msi, assume remaining are all the same 27081369Sdduvall */ 27091369Sdduvall if ((ret = ddi_intr_get_pri(bgep->htable[0], &bgep->intr_pri)) != 27101369Sdduvall DDI_SUCCESS) { 27111369Sdduvall bge_error(bgep, "ddi_intr_get_pri() failed %d\n", ret); 27121369Sdduvall 27131369Sdduvall /* Free already allocated intr */ 27141369Sdduvall for (i = 0; i < actual; i++) { 27151369Sdduvall (void) ddi_intr_free(bgep->htable[i]); 27161369Sdduvall } 27171369Sdduvall 27181369Sdduvall kmem_free(bgep->htable, intr_size); 27191369Sdduvall return (DDI_FAILURE); 27201369Sdduvall } 27211369Sdduvall 27221369Sdduvall /* Call ddi_intr_add_handler() */ 27231369Sdduvall for (i = 0; i < actual; i++) { 27241369Sdduvall if ((ret = ddi_intr_add_handler(bgep->htable[i], bge_intr, 27251369Sdduvall (caddr_t)bgep, (caddr_t)(uintptr_t)i)) != DDI_SUCCESS) { 27261369Sdduvall bge_error(bgep, "ddi_intr_add_handler() " 27271369Sdduvall "failed %d\n", ret); 27281369Sdduvall 27291369Sdduvall /* Free already allocated intr */ 27301369Sdduvall for (i = 0; i < actual; i++) { 27311369Sdduvall (void) ddi_intr_free(bgep->htable[i]); 27321369Sdduvall } 27331369Sdduvall 27341369Sdduvall kmem_free(bgep->htable, intr_size); 27351369Sdduvall return (DDI_FAILURE); 27361369Sdduvall } 27371369Sdduvall } 27381369Sdduvall 27391369Sdduvall if ((ret = ddi_intr_get_cap(bgep->htable[0], &bgep->intr_cap)) 27401369Sdduvall != DDI_SUCCESS) { 27411369Sdduvall bge_error(bgep, "ddi_intr_get_cap() failed %d\n", ret); 27421369Sdduvall 27431369Sdduvall for (i = 0; i < actual; i++) { 27441369Sdduvall (void) ddi_intr_remove_handler(bgep->htable[i]); 27451369Sdduvall (void) ddi_intr_free(bgep->htable[i]); 27461369Sdduvall } 27471369Sdduvall 27481369Sdduvall kmem_free(bgep->htable, intr_size); 27491369Sdduvall return (DDI_FAILURE); 27501369Sdduvall } 27511369Sdduvall 27521369Sdduvall return (DDI_SUCCESS); 27531369Sdduvall } 27541369Sdduvall 27551369Sdduvall /* 27561369Sdduvall * bge_rem_intrs: 27571369Sdduvall * 27581369Sdduvall * Unregister FIXED or MSI interrupts 27591369Sdduvall */ 27601369Sdduvall static void 27611369Sdduvall bge_rem_intrs(bge_t *bgep) 27621369Sdduvall { 27631369Sdduvall int i; 27641369Sdduvall 27651369Sdduvall bge_log(bgep, "bge_rem_intrs\n"); 27661369Sdduvall 27671865Sdilpreet /* Call ddi_intr_remove_handler() */ 27681865Sdilpreet for (i = 0; i < bgep->intr_cnt; i++) { 27691865Sdilpreet (void) ddi_intr_remove_handler(bgep->htable[i]); 27701865Sdilpreet (void) ddi_intr_free(bgep->htable[i]); 27711865Sdilpreet } 27721865Sdilpreet 27731865Sdilpreet kmem_free(bgep->htable, bgep->intr_cnt * sizeof (ddi_intr_handle_t)); 27741865Sdilpreet } 27751865Sdilpreet 27761865Sdilpreet 27771865Sdilpreet void 27781865Sdilpreet bge_intr_enable(bge_t *bgep) 27791865Sdilpreet { 27801865Sdilpreet int i; 27811865Sdilpreet 27821865Sdilpreet if (bgep->intr_cap & DDI_INTR_FLAG_BLOCK) { 27831865Sdilpreet /* Call ddi_intr_block_enable() for MSI interrupts */ 27841865Sdilpreet (void) ddi_intr_block_enable(bgep->htable, bgep->intr_cnt); 27851865Sdilpreet } else { 27861865Sdilpreet /* Call ddi_intr_enable for MSI or FIXED interrupts */ 27871865Sdilpreet for (i = 0; i < bgep->intr_cnt; i++) { 27881865Sdilpreet (void) ddi_intr_enable(bgep->htable[i]); 27891865Sdilpreet } 27901865Sdilpreet } 27911865Sdilpreet } 27921865Sdilpreet 27931865Sdilpreet 27941865Sdilpreet void 27951865Sdilpreet bge_intr_disable(bge_t *bgep) 27961865Sdilpreet { 27971865Sdilpreet int i; 27981865Sdilpreet 27991369Sdduvall if (bgep->intr_cap & DDI_INTR_FLAG_BLOCK) { 28001369Sdduvall /* Call ddi_intr_block_disable() */ 28011369Sdduvall (void) ddi_intr_block_disable(bgep->htable, bgep->intr_cnt); 28021369Sdduvall } else { 28031369Sdduvall for (i = 0; i < bgep->intr_cnt; i++) { 28041369Sdduvall (void) ddi_intr_disable(bgep->htable[i]); 28051369Sdduvall } 28061369Sdduvall } 28071369Sdduvall } 2808