1*6320Sbholler /* 2*6320Sbholler * CDDL HEADER START 3*6320Sbholler * 4*6320Sbholler * The contents of this file are subject to the terms of the 5*6320Sbholler * Common Development and Distribution License (the "License"). 6*6320Sbholler * You may not use this file except in compliance with the License. 7*6320Sbholler * 8*6320Sbholler * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9*6320Sbholler * or http://www.opensolaris.org/os/licensing. 10*6320Sbholler * See the License for the specific language governing permissions 11*6320Sbholler * and limitations under the License. 12*6320Sbholler * 13*6320Sbholler * When distributing Covered Code, include this CDDL HEADER in each 14*6320Sbholler * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15*6320Sbholler * If applicable, add the following below this CDDL HEADER, with the 16*6320Sbholler * fields enclosed by brackets "[]" replaced with your own identifying 17*6320Sbholler * information: Portions Copyright [yyyy] [name of copyright owner] 18*6320Sbholler * 19*6320Sbholler * CDDL HEADER END 20*6320Sbholler */ 21*6320Sbholler 22*6320Sbholler /* 23*6320Sbholler * Copyright (c) 2008, Intel Corporation 24*6320Sbholler * All rights reserved. 25*6320Sbholler */ 26*6320Sbholler 27*6320Sbholler #ifndef _PROC64_ID_H 28*6320Sbholler #define _PROC64_ID_H 29*6320Sbholler 30*6320Sbholler #pragma ident "%Z%%M% %I% %E% SMI" 31*6320Sbholler 32*6320Sbholler #include <sys/x86_archext.h> 33*6320Sbholler 34*6320Sbholler #ifdef __cplusplus 35*6320Sbholler extern "C" { 36*6320Sbholler #endif 37*6320Sbholler 38*6320Sbholler /* 39*6320Sbholler * Defines to determine what SSE instructions can be used for memops or strops. 40*6320Sbholler */ 41*6320Sbholler #define NO_SSE 0x00 /* Default -- Don't use SSE instructions */ 42*6320Sbholler #define USE_SSE2 0x01 /* SSE2 */ 43*6320Sbholler #define USE_SSE3 0x02 /* SSE3 */ 44*6320Sbholler #define USE_SSSE3 0x04 /* Supplemental SSE3 */ 45*6320Sbholler #define USE_SSE4_1 0x08 /* SSE 4.1 */ 46*6320Sbholler #define USE_SSE4_2 0x10 /* SSE 4.2 */ 47*6320Sbholler 48*6320Sbholler /* 49*6320Sbholler * Cache size defaults for Core 2 Duo 50*6320Sbholler */ 51*6320Sbholler #define INTEL_DFLT_L1_CACHE_SIZE (32 * 1024) 52*6320Sbholler #define INTEL_DFLT_L2_CACHE_SIZE (4 * 1024 * 1024) 53*6320Sbholler #define INTEL_DFLT_LARGEST_CACHE_SIZE (4 * 1024 * 1024) 54*6320Sbholler 55*6320Sbholler /* 56*6320Sbholler * Cache size defaults for AMD SledgeHammer 57*6320Sbholler */ 58*6320Sbholler #define AMD_DFLT_L1_CACHE_SIZE (64 * 1024) 59*6320Sbholler #define AMD_DFLT_L1_HALF_CACHE_SIZE (32 * 1024) 60*6320Sbholler #define AMD_DFLT_L2_CACHE_SIZE (1024 * 1024) 61*6320Sbholler #define AMD_DFLT_L2_HALF_CACHE_SIZE (512 * 1024) 62*6320Sbholler 63*6320Sbholler #ifdef _ASM 64*6320Sbholler .extern .memops_method 65*6320Sbholler #else 66*6320Sbholler 67*6320Sbholler void __libc_get_cpuid(int cpuid_function, void *out_reg, int cache_index); 68*6320Sbholler void __intel_set_memops_method(long sse_level); 69*6320Sbholler void __intel_set_cache_sizes(long l1_cache_size, long l2_cache_size, 70*6320Sbholler long largest_level_cache); 71*6320Sbholler 72*6320Sbholler #endif /* _ASM */ 73*6320Sbholler 74*6320Sbholler #ifdef __cplusplus 75*6320Sbholler } 76*6320Sbholler #endif 77*6320Sbholler 78*6320Sbholler #endif /* _PROC64_ID_H */ 79