xref: /onnv-gate/usr/src/lib/libc/amd64/gen/proc64_id.h (revision 10583:1058268e7f53)
16320Sbholler /*
26320Sbholler  * CDDL HEADER START
36320Sbholler  *
46320Sbholler  * The contents of this file are subject to the terms of the
56320Sbholler  * Common Development and Distribution License (the "License").
66320Sbholler  * You may not use this file except in compliance with the License.
76320Sbholler  *
86320Sbholler  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
96320Sbholler  * or http://www.opensolaris.org/os/licensing.
106320Sbholler  * See the License for the specific language governing permissions
116320Sbholler  * and limitations under the License.
126320Sbholler  *
136320Sbholler  * When distributing Covered Code, include this CDDL HEADER in each
146320Sbholler  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
156320Sbholler  * If applicable, add the following below this CDDL HEADER, with the
166320Sbholler  * fields enclosed by brackets "[]" replaced with your own identifying
176320Sbholler  * information: Portions Copyright [yyyy] [name of copyright owner]
186320Sbholler  *
196320Sbholler  * CDDL HEADER END
206320Sbholler  */
216320Sbholler 
226320Sbholler /*
23*10583SEdward.Gillett@Sun.COM  * Copyright (c) 2009, Intel Corporation
246320Sbholler  * All rights reserved.
256320Sbholler  */
266320Sbholler 
2710024Sbostrovs /*
2810024Sbostrovs  * Portions Copyright 2009 Advanced Micro Devices, Inc.
2910024Sbostrovs  */
3010024Sbostrovs 
316320Sbholler #ifndef	_PROC64_ID_H
326320Sbholler #define	_PROC64_ID_H
336320Sbholler 
346320Sbholler #include <sys/x86_archext.h>
356320Sbholler 
366320Sbholler #ifdef	__cplusplus
376320Sbholler extern "C" {
386320Sbholler #endif
396320Sbholler 
406320Sbholler /*
41*10583SEdward.Gillett@Sun.COM  * Defines to determine what SSE instructions can be used for memops or strops
426320Sbholler  */
436320Sbholler #define	NO_SSE		0x00	/* Default -- Don't use SSE instructions */
446320Sbholler #define	USE_SSE2	0x01	/* SSE2 */
456320Sbholler #define	USE_SSE3	0x02	/* SSE3 */
466320Sbholler #define	USE_SSSE3	0x04	/* Supplemental SSE3 */
476320Sbholler #define	USE_SSE4_1	0x08	/* SSE 4.1 */
486320Sbholler #define	USE_SSE4_2	0x10	/* SSE 4.2 */
49*10583SEdward.Gillett@Sun.COM #define	USE_BSF		0x20	/* USE BSF class of instructions */
506320Sbholler 
516320Sbholler /*
526320Sbholler  * Cache size defaults for Core 2 Duo
536320Sbholler  */
546320Sbholler #define	INTEL_DFLT_L1_CACHE_SIZE	(32 * 1024)
556320Sbholler #define	INTEL_DFLT_L2_CACHE_SIZE	(4 * 1024 * 1024)
566320Sbholler #define	INTEL_DFLT_LARGEST_CACHE_SIZE	(4 * 1024 * 1024)
576320Sbholler 
586320Sbholler /*
596320Sbholler  * Cache size defaults for AMD SledgeHammer
606320Sbholler  */
616320Sbholler #define	AMD_DFLT_L1_CACHE_SIZE		(64 * 1024)
626320Sbholler #define	AMD_DFLT_L2_CACHE_SIZE		(1024 * 1024)
636320Sbholler 
646320Sbholler #ifdef _ASM
656320Sbholler 	.extern .memops_method
666320Sbholler #else
676320Sbholler 
686320Sbholler void __libc_get_cpuid(int cpuid_function, void *out_reg, int cache_index);
696320Sbholler void __intel_set_memops_method(long sse_level);
7010024Sbostrovs void __set_cache_sizes(long l1_cache_size, long l2_cache_size,
716320Sbholler     long largest_level_cache);
726320Sbholler 
736320Sbholler #endif /* _ASM */
746320Sbholler 
756320Sbholler #ifdef	__cplusplus
766320Sbholler }
776320Sbholler #endif
786320Sbholler 
796320Sbholler #endif /* _PROC64_ID_H */
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