1*0Sstevel@tonic-gate /* 2*0Sstevel@tonic-gate * CDDL HEADER START 3*0Sstevel@tonic-gate * 4*0Sstevel@tonic-gate * The contents of this file are subject to the terms of the 5*0Sstevel@tonic-gate * Common Development and Distribution License, Version 1.0 only 6*0Sstevel@tonic-gate * (the "License"). You may not use this file except in compliance 7*0Sstevel@tonic-gate * with the License. 8*0Sstevel@tonic-gate * 9*0Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10*0Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 11*0Sstevel@tonic-gate * See the License for the specific language governing permissions 12*0Sstevel@tonic-gate * and limitations under the License. 13*0Sstevel@tonic-gate * 14*0Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 15*0Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16*0Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 17*0Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 18*0Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 19*0Sstevel@tonic-gate * 20*0Sstevel@tonic-gate * CDDL HEADER END 21*0Sstevel@tonic-gate */ 22*0Sstevel@tonic-gate /* 23*0Sstevel@tonic-gate * Copyright 2003 Sun Microsystems, Inc. All rights reserved. 24*0Sstevel@tonic-gate * Use is subject to license terms. 25*0Sstevel@tonic-gate */ 26*0Sstevel@tonic-gate 27*0Sstevel@tonic-gate #ifndef _SPD_DATA_H 28*0Sstevel@tonic-gate #define _SPD_DATA_H 29*0Sstevel@tonic-gate 30*0Sstevel@tonic-gate #pragma ident "%Z%%M% %I% %E% SMI" 31*0Sstevel@tonic-gate 32*0Sstevel@tonic-gate #ifdef __cplusplus 33*0Sstevel@tonic-gate extern "C" { 34*0Sstevel@tonic-gate #endif 35*0Sstevel@tonic-gate 36*0Sstevel@tonic-gate #include <stddef.h> 37*0Sstevel@tonic-gate #include <sys/types.h> 38*0Sstevel@tonic-gate 39*0Sstevel@tonic-gate size_t get_sp_sec_hdr(void *sec_hdr, size_t sec_hdr_len); 40*0Sstevel@tonic-gate size_t get_sp_seg_hdr(void *seg_hdr, size_t seg_hdr_len); 41*0Sstevel@tonic-gate int get_spd_data(int fd, char *spd_data, size_t ctr_len, off_t ctr_offset); 42*0Sstevel@tonic-gate int cvrt_dim_data(const char *spd_data, size_t spd_data_len, 43*0Sstevel@tonic-gate uchar_t **sp_seg_ptr, size_t *sp_seg_len); 44*0Sstevel@tonic-gate 45*0Sstevel@tonic-gate enum spd_memtype { 46*0Sstevel@tonic-gate SPDMEM_RESERVED = 0, 47*0Sstevel@tonic-gate SPDMEM_FPM_DRAM, 48*0Sstevel@tonic-gate SPDMEM_EDO, 49*0Sstevel@tonic-gate SPDMEM_PIPE, 50*0Sstevel@tonic-gate SPDMEM_SDRAM, 51*0Sstevel@tonic-gate SPDMEM_ROM, 52*0Sstevel@tonic-gate SPDMEM_SGRAM_DDR, 53*0Sstevel@tonic-gate SPDMEM_SDRAM_DDR, 54*0Sstevel@tonic-gate SPDMEM_DDR2_SDRAM 55*0Sstevel@tonic-gate }; 56*0Sstevel@tonic-gate 57*0Sstevel@tonic-gate typedef struct { 58*0Sstevel@tonic-gate uchar_t spd_len; /* bytes written by manufacturer */ 59*0Sstevel@tonic-gate uchar_t spd_max_len; /* total available prom space */ 60*0Sstevel@tonic-gate uchar_t memory_type; /* e.g. SDRAM DDR = 0x07 */ 61*0Sstevel@tonic-gate uchar_t n_rows; /* row address bits */ 62*0Sstevel@tonic-gate uchar_t n_cols; /* column address bits */ 63*0Sstevel@tonic-gate uchar_t n_mod_rows; /* number of module rows */ 64*0Sstevel@tonic-gate uchar_t ls_data_width; /* e.g. 72 bits */ 65*0Sstevel@tonic-gate uchar_t ms_data_width; 66*0Sstevel@tonic-gate uchar_t vddq_if; /* e.g. SSTL 2.5V = 0x04 */ 67*0Sstevel@tonic-gate uchar_t cycle_time25; /* cycle time at CAS latency 2.5 */ 68*0Sstevel@tonic-gate uchar_t access_time25; 69*0Sstevel@tonic-gate uchar_t config; /* e.g. ECC = 0x02 */ 70*0Sstevel@tonic-gate uchar_t refresh; /* e.g. 7.8uS & self refresh = 0x82 */ 71*0Sstevel@tonic-gate uchar_t primary_width; 72*0Sstevel@tonic-gate uchar_t err_chk_width; 73*0Sstevel@tonic-gate uchar_t tCCD; 74*0Sstevel@tonic-gate uchar_t burst_lengths; /* e.g. 2,4,8 = 0x0e */ 75*0Sstevel@tonic-gate uchar_t n_banks; 76*0Sstevel@tonic-gate uchar_t cas_lat; 77*0Sstevel@tonic-gate uchar_t cs_lat; 78*0Sstevel@tonic-gate uchar_t we_lat; 79*0Sstevel@tonic-gate uchar_t mod_attrs; 80*0Sstevel@tonic-gate uchar_t dev_attrs; 81*0Sstevel@tonic-gate uchar_t cycle_time20; /* cycle time at CAS latency 2.0 */ 82*0Sstevel@tonic-gate uchar_t access_time20; 83*0Sstevel@tonic-gate uchar_t cycle_time15; 84*0Sstevel@tonic-gate uchar_t access_time15; 85*0Sstevel@tonic-gate uchar_t tRP; 86*0Sstevel@tonic-gate uchar_t tRRD; 87*0Sstevel@tonic-gate uchar_t tRCD; 88*0Sstevel@tonic-gate uchar_t tRAS; 89*0Sstevel@tonic-gate uchar_t mod_row_density; 90*0Sstevel@tonic-gate uchar_t addr_ip_setup; 91*0Sstevel@tonic-gate uchar_t addr_ip_hold; 92*0Sstevel@tonic-gate uchar_t data_ip_setup; 93*0Sstevel@tonic-gate uchar_t data_ip_hold; 94*0Sstevel@tonic-gate uchar_t superset[62 - 36]; 95*0Sstevel@tonic-gate uchar_t spd_rev; 96*0Sstevel@tonic-gate uchar_t chksum_0_62; 97*0Sstevel@tonic-gate uchar_t jedec[8]; 98*0Sstevel@tonic-gate uchar_t manu_loc; 99*0Sstevel@tonic-gate uchar_t manu_part_no[91 - 73]; 100*0Sstevel@tonic-gate uchar_t manu_rev_pcb; 101*0Sstevel@tonic-gate uchar_t manu_rev_comp; 102*0Sstevel@tonic-gate uchar_t manu_year; 103*0Sstevel@tonic-gate uchar_t manu_week; 104*0Sstevel@tonic-gate uchar_t asmb_serial_no[4]; 105*0Sstevel@tonic-gate uchar_t manu_specific[128 - 99]; 106*0Sstevel@tonic-gate } spd_data_t; 107*0Sstevel@tonic-gate 108*0Sstevel@tonic-gate /* 109*0Sstevel@tonic-gate * sample section and SP segment headers 110*0Sstevel@tonic-gate */ 111*0Sstevel@tonic-gate #define SP_SEC_HDR \ 112*0Sstevel@tonic-gate { 0x08, 0x00, 0x01, 0x00, 0x33, 0x01 } 113*0Sstevel@tonic-gate 114*0Sstevel@tonic-gate #define SP_SEG_HDR \ 115*0Sstevel@tonic-gate { 'S', 'P', 0x00, 0x00, 0x41, 0xb6, 0x00, 0x00, 0x00, 0x8d } 116*0Sstevel@tonic-gate 117*0Sstevel@tonic-gate /* 118*0Sstevel@tonic-gate * sample SP segment 119*0Sstevel@tonic-gate */ 120*0Sstevel@tonic-gate #define SP_DATA { \ 121*0Sstevel@tonic-gate 0xc1, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, \ 122*0Sstevel@tonic-gate 0x00, 0x00, 0xf0, 0x00, 0xfb, 0x00, 0x00, 0x00, \ 123*0Sstevel@tonic-gate 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 124*0Sstevel@tonic-gate 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 125*0Sstevel@tonic-gate 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 126*0Sstevel@tonic-gate 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 127*0Sstevel@tonic-gate 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 128*0Sstevel@tonic-gate 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 129*0Sstevel@tonic-gate 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 130*0Sstevel@tonic-gate 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, \ 131*0Sstevel@tonic-gate 0x0c, 0x00, 0x00, 0x00, 0x00 } 132*0Sstevel@tonic-gate 133*0Sstevel@tonic-gate /* 134*0Sstevel@tonic-gate * offsets of records in SP_DATA 135*0Sstevel@tonic-gate */ 136*0Sstevel@tonic-gate #define DIMM_CAP_OFF 2 137*0Sstevel@tonic-gate #define SPD_R_OFF 13 138*0Sstevel@tonic-gate 139*0Sstevel@tonic-gate /* 140*0Sstevel@tonic-gate * offsets of certain fields within SPD-R record 141*0Sstevel@tonic-gate */ 142*0Sstevel@tonic-gate #define DATA_WIDTH 6 143*0Sstevel@tonic-gate #define MANUF_ID 64 144*0Sstevel@tonic-gate #define MANUF_LOC 66 145*0Sstevel@tonic-gate #define MANUF_YEAR 87 146*0Sstevel@tonic-gate #define MANUF_WEEK 89 147*0Sstevel@tonic-gate /* length of complete SPD-R record */ 148*0Sstevel@tonic-gate #define SPD_R_LEN 123 149*0Sstevel@tonic-gate 150*0Sstevel@tonic-gate #ifdef __cplusplus 151*0Sstevel@tonic-gate } 152*0Sstevel@tonic-gate #endif 153*0Sstevel@tonic-gate 154*0Sstevel@tonic-gate #endif /* _SPD_DATA_H */ 155