1/* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21/* 22 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26#pragma ident "%Z%%M% %I% %E% SMI" 27 28#pragma dictionary "SUN4" 29 30/* 31 * Eversholt rules for the Fire nexus driver 32 */ 33 34#define SW_FIT 5000 /* No real fit rate, SW */ 35#define HV_FIT 5000 /* No real fit rate, SW */ 36#define SW_HV_MISMATCH_FIT 20000 /* No real fit rate, SW */ 37#define HB_FIT 400 38#define HBUS_FIT 400 39#define CPU_FIT 500 40#define PCI_DEV_FIT 1000 41#define PCIEX_DEV_FIT 1000 42#define EBUS_FIT 1000 43#define LINK_EVENTS_COUNT 10 44#define LINK_EVENTS_TIME 1h 45#define CE_EVENTS_COUNT 10 46#define CE_EVENTS_TIME 1h 47 48/* 49 * Macros for CE Fabric ereports 50 * 51 * The current kernel sends ereports with a severity of PF_CE and PF_NO_ERROR. 52 * However, a simple change in the kernel may end up sending only a severity 53 * of PF_CE for CE errors. Since both methods are correct, we match on 54 * an ereport severity of either PF_CE only or PF_CE plus PF_NO_ERROR. 55 */ 56#define PF_NO_ERROR (1 << 0) 57#define PF_CE (1 << 1) 58#define MATCH_CE ((payloadprop("severity") == PF_CE) || \ 59 (payloadprop("severity") == (PF_CE | PF_NO_ERROR))) 60 61 62#define MATCH_UNRECOGNIZED ((payloadprop("sysino") == 0) && \ 63 (payloadprop("ehdl") == 0) && \ 64 (payloadprop("stick") == 0)) 65 66/* 67 * Test for primary or secondary ereports 68 */ 69#define IS_PRIMARY (payloadprop("primary")) 70#define IS_SECONDARY (! payloadprop("primary")) 71 72/* 73 * payload: imu-rds 74 * 75 * Extract the request id, the BDF, value in the IMU RDS log register 76 * Example: 77 * 0x7766554433221100 78 * ^^^^ 79 */ 80#define IMU_MATCH_BDF(b, d, f) \ 81 ( IS_PRIMARY && ((payloadprop("imu-rds") >> 32) & 0xFFFF) == \ 82 ((b << 8) | (d << 3) | f)) 83 84/*************** 85 * JBC ereports 86 ***************/ 87event ereport.io.fire.jbc.ape@hostbridge/pciexrc{within(5s)}; 88event ereport.io.fire.jbc.bjc@hostbridge/pciexrc{within(5s)}; 89event ereport.io.fire.jbc.ce_asyn@hostbridge/pciexrc{within(5s)}; 90event ereport.io.fire.jbc.cpe@hostbridge/pciexrc{within(5s)}; 91event ereport.io.fire.jbc.ebus_to@hostbridge/pciexrc{within(5s)}; 92event ereport.io.fire.jbc.ebus_to@hostbridge{within(5s)}; 93event ereport.io.fire.jbc.icise@hostbridge/pciexrc{within(5s)}; 94event ereport.io.fire.jbc.ijp@hostbridge/pciexrc{within(5s)}; 95event ereport.io.fire.jbc.ill_acc@hostbridge/pciexrc{within(5s)}; 96event ereport.io.fire.jbc.ill_acc_rd@hostbridge/pciexrc{within(5s)}; 97event ereport.io.fire.jbc.ill_bmr@hostbridge/pciexrc{within(5s)}; 98event ereport.io.fire.jbc.ill_bmw@hostbridge/pciexrc{within(5s)}; 99event ereport.io.fire.jbc.jbe@hostbridge/pciexrc{within(5s)}; 100event ereport.io.fire.jbc.jtceei@hostbridge/pciexrc{within(5s)}; 101event ereport.io.fire.jbc.jtceer@hostbridge/pciexrc{within(5s)}; 102event ereport.io.fire.jbc.jtceew@hostbridge/pciexrc{within(5s)}; 103event ereport.io.fire.jbc.jte@hostbridge/pciexrc{within(5s)}; 104event ereport.io.fire.jbc.jue@hostbridge/pciexrc{within(5s)}; 105event ereport.io.fire.jbc.mb_pea@hostbridge/pciexrc{within(5s)}; 106event ereport.io.fire.jbc.mb_per@hostbridge/pciexrc{within(5s)}; 107event ereport.io.fire.jbc.mb_pew@hostbridge/pciexrc{within(5s)}; 108event ereport.io.fire.jbc.pio_cpe@hostbridge/pciexrc{within(5s)}; 109event ereport.io.fire.jbc.pio_dpe@hostbridge/pciexrc{within(5s)}; 110event ereport.io.fire.jbc.pio_unmap@hostbridge/pciexrc{within(5s)}; 111event ereport.io.fire.jbc.pio_unmap_rd@hostbridge/pciexrc{within(5s)}; 112event ereport.io.fire.jbc.rd_dpe@hostbridge/pciexrc{within(5s)}; 113event ereport.io.fire.jbc.ue_asyn@hostbridge/pciexrc{within(5s)}; 114event ereport.io.fire.jbc.unsol_intr@hostbridge/pciexrc{within(5s)}; 115event ereport.io.fire.jbc.unsol_rd@hostbridge/pciexrc{within(5s)}; 116event ereport.io.fire.jbc.wr_dpe@hostbridge/pciexrc{within(5s)}; 117 118/*************** 119 * DMC ereports 120 ***************/ 121event ereport.io.fire.dmc.cor_not_en@hostbridge/pciexrc{within(5s)}; 122event ereport.io.fire.dmc.eq_not_en@hostbridge/pciexrc{within(5s)}; 123event ereport.io.fire.dmc.eq_over@hostbridge/pciexrc{within(5s)}; 124event ereport.io.fire.dmc.fatal_not_en@hostbridge/pciexrc{within(5s)}; 125event ereport.io.fire.dmc.msi_mal_err@hostbridge/pciexrc{within(5s)}; 126event ereport.io.fire.dmc.msi_not_en@hostbridge/pciexrc{within(5s)}; 127event ereport.io.fire.dmc.msi_par_err@hostbridge/pciexrc{within(5s)}; 128event ereport.io.fire.dmc.nonfatal_not_en@hostbridge/pciexrc{within(5s)}; 129event ereport.io.fire.dmc.pmeack_not_en@hostbridge/pciexrc{within(5s)}; 130event ereport.io.fire.dmc.pmpme_not_en@hostbridge/pciexrc{within(5s)}; 131event ereport.io.fire.dmc.tbw_dme@hostbridge/pciexrc{within(5s)}; 132event ereport.io.fire.dmc.tbw_dpe@hostbridge/pciexrc{within(5s)}; 133event ereport.io.fire.dmc.tbw_err@hostbridge/pciexrc{within(5s)}; 134event ereport.io.fire.dmc.tbw_ude@hostbridge/pciexrc{within(5s)}; 135event ereport.io.fire.dmc.trn_err@hostbridge/pciexrc{within(5s)}; 136event ereport.io.fire.dmc.ttc_cae@hostbridge/pciexrc{within(5s)}; 137event ereport.io.fire.dmc.ttc_dpe@hostbridge/pciexrc{within(5s)}; 138 139/*************** 140 * TLU Other Event ereports 141 ***************/ 142event ereport.io.fire.pec.crs@hostbridge/pciexrc{within(5s)}; 143event ereport.io.fire.pec.edp@hostbridge/pciexrc{within(5s)}; 144event ereport.io.fire.pec.ehp@hostbridge/pciexrc{within(5s)}; 145event ereport.io.fire.pec.eip@hostbridge/pciexrc{within(5s)}; 146event ereport.io.fire.pec.erp@hostbridge/pciexrc{within(5s)}; 147event ereport.io.fire.pec.ihb_pe@hostbridge/pciexrc{within(5s)}; 148event ereport.io.fire.pec.iip@hostbridge/pciexrc{within(5s)}; 149event ereport.io.fire.pec.ldn@hostbridge/pciexrc{within(5s)}; 150event ereport.io.fire.pec.lin@hostbridge/pciexrc{within(5s)}; 151event ereport.io.fire.pec.lrs@hostbridge/pciexrc{within(5s)}; 152event ereport.io.fire.pec.lup@hostbridge/pciexrc{within(5s)}; 153event ereport.io.fire.pec.mrc@hostbridge/pciexrc{within(5s)}; 154 155/*************** 156 * Fire Fabric ereport 157 * ------------- 158 * Whenever a leaf device sends an error message (fatal, non-fatal, or CE) to 159 * root complex, the nexus driver publishes this ereport to log the ereport. 160 ***************/ 161event ereport.io.fire.fabric@pciexbus/pciexdev/pciexfn {within(1s)}; 162event ereport.io.fire.fabric@pcibus/pcidev/pcifn {within(1s)}; 163event error.io.fire.fabric-sib@hostbridge/pciexrc; 164event error.io.fire.fabric@pciexbus/pciexdev/pciexfn; 165event error.io.fire.fabric@pcibus/pcidev/pcifn; 166 167/*************** 168 * sun4v unknown error packets 169 * ------------- 170 * In a sun4v system, if HV sends an epkt to the guest the following wrong 171 * things can happen. 172 * o HV sends malformed epkt 173 * o Guest has coding error and doesn't understand epkt 174 * o HV and Guest are out of sync. 175 ***************/ 176event ereport.io.fire.epkt@hostbridge/pciexrc {within(5s)}; 177 178/****************************** 179 * Generic Rules Begin Here * 180 ******************************/ 181 182/*************** 183 * Fire Asic HW error 184 * ------------- 185 * Errors caused by parity or unexpected behaviors in the asic. 186 ***************/ 187fru hostbridge/pciexrc; 188asru hostbridge/pciexrc; 189event fault.io.fire.asic@hostbridge/pciexrc, 190 FITrate=HB_FIT, 191 ASRU=hostbridge/pciexrc, 192 FRU=hostbridge/pciexrc; 193 194event error.io.fire.jbc.asic@hostbridge/pciexrc; 195event error.io.fire.dmc.asic@hostbridge/pciexrc; 196event error.io.fire.pec.asic@hostbridge/pciexrc; 197 198prop fault.io.fire.asic@hostbridge/pciexrc (0)-> 199 error.io.fire.jbc.asic@hostbridge/pciexrc, 200 error.io.fire.dmc.asic@hostbridge/pciexrc, 201 error.io.fire.pec.asic@hostbridge/pciexrc; 202 203/*************** 204 * Fire PX SW/HV error 205 * ------------- 206 * Errors caused by bad SW or HV 207 ***************/ 208event fault.io.fire.sw-epkt@hostbridge/pciexrc, retire=0, response=0, 209 FITrate=SW_FIT; 210event fault.io.fire.fw-epkt@hostbridge/pciexrc, retire=0, response=0, 211 FITrate=HV_FIT; 212event fault.io.fire.sw-fw-mismatch@hostbridge/pciexrc, retire=0, response=0, 213 FITrate=SW_HV_MISMATCH_FIT; 214event fault.io.fire.hb.sw-config@hostbridge/pciexrc, retire=0, response=0, 215 FITrate=SW_FIT; 216event fault.io.fire.dmc.sw-algorithm@hostbridge/pciexrc, retire=0, response=0, 217 FITrate=SW_FIT; 218event fault.io.fire.dmc.sw-state@hostbridge/pciexrc, retire=0, response=0, 219 FITrate=SW_FIT; 220event fault.io.fire.pec.sw-algorithm@hostbridge/pciexrc, retire=0, response=0, 221 FITrate=SW_FIT; 222 223event error.io.fire.jbc.driver@hostbridge/pciexrc; 224event error.io.fire.dmc.driver@hostbridge/pciexrc; 225event error.io.fire.dmc.bad_state@hostbridge/pciexrc; 226 227prop fault.io.fire.sw-epkt@hostbridge/pciexrc, 228 fault.io.fire.fw-epkt@hostbridge/pciexrc, 229 fault.io.fire.sw-fw-mismatch@hostbridge/pciexrc->(A) 230 ereport.io.fire.epkt@hostbridge/pciexrc { MATCH_UNRECOGNIZED }; 231 232prop fault.io.fire.hb.sw-config@hostbridge/pciexrc (0)-> 233 error.io.fire.jbc.driver@hostbridge/pciexrc; 234 235prop fault.io.fire.dmc.sw-algorithm@hostbridge/pciexrc (0)-> 236 error.io.fire.dmc.driver@hostbridge/pciexrc; 237 238prop fault.io.fire.dmc.sw-state@hostbridge/pciexrc (0)-> 239 error.io.fire.dmc.bad_state@hostbridge/pciexrc; 240 241/*************** 242 * PCI-E/PCI device fault and SW defects 243 ***************/ 244fru pciexbus/pciexdev; 245asru pciexbus/pciexdev/pciexfn; 246event fault.io.fire.pciex.device@pciexbus/pciexdev/pciexfn, 247 FRU=pciexbus/pciexdev, 248 ASRU=pciexbus/pciexdev/pciexfn, 249 FITrate=PCIEX_DEV_FIT; 250 251fru pcibus/pcidev; 252asru pcibus/pcidev/pcifn; 253event fault.io.fire.pci.device@pcibus/pcidev/pcifn, 254 FITrate=PCI_DEV_FIT, 255 FRU=pcibus/pcidev, 256 ASRU=pcibus/pcidev/pcifn; 257 258/****************************** 259 * JBC Rules Begin Here * 260 ******************************/ 261 262/*************** 263 * EBUS fault 264 * ------------- 265 * Errors involving the ebus 266 ***************/ 267fru hostbridge/pciexrc; 268asru hostbridge/pciexrc; 269event fault.io.ebus@hostbridge/pciexrc, 270 FITrate=EBUS_FIT, 271 FRU=hostbridge/pciexrc, 272 ASRU=hostbridge/pciexrc; 273 274/* 275 * A faulty ebus can cause ebus timeout ebus_to 276 * ebus_to ereport: 277 * sun4v: The fmri of the ereport is ioboard/hostbridge 278 * sun4u: The fmri of the ereport is pciexrc 279 */ 280prop fault.io.ebus@hostbridge/pciexrc (1)-> 281 ereport.io.fire.jbc.ebus_to@hostbridge, 282 ereport.io.fire.jbc.ebus_to@hostbridge/pciexrc; 283 284/*************** 285 * Fire Asic HW error 286 * ------------- 287 * Errors caused by parity or unexpected behaviors in the asic. 288 ***************/ 289prop error.io.fire.jbc.asic@hostbridge/pciexrc (1)-> 290 ereport.io.fire.jbc.cpe@hostbridge/pciexrc, 291 ereport.io.fire.jbc.mb_pea@hostbridge/pciexrc, 292 ereport.io.fire.jbc.mb_per@hostbridge/pciexrc, 293 ereport.io.fire.jbc.mb_pew@hostbridge/pciexrc, 294 ereport.io.fire.jbc.pio_cpe@hostbridge/pciexrc, 295 ereport.io.fire.jbc.pio_dpe@hostbridge/pciexrc; 296 297/*************** 298 * JBC Hostbus Link Errors 299 * ------------- 300 * Possible Parity Errors caused by bad links traces or cables. 301 * For instance on Ontarios there is a flex cable. For Chicagos 302 * it could be the link trace between the CPU and Fire. 303 ***************/ 304event error.io.fire.jbc.bad_link@hostbridge/pciexrc; 305 306prop error.io.fire.jbc.bad_link@hostbridge/pciexrc (1)-> 307 ereport.io.fire.jbc.ape@hostbridge/pciexrc, 308 ereport.io.fire.jbc.bjc@hostbridge/pciexrc, 309 ereport.io.fire.jbc.rd_dpe@hostbridge/pciexrc, 310 ereport.io.fire.jbc.wr_dpe@hostbridge/pciexrc; 311 312/*************** 313 * JBC Hostbus Errors 314 * ------------- 315 * Errors being returned from the hostbus side and detected by fire asic. 316 ***************/ 317fru hostbridge/pciexrc; 318asru hostbridge/pciexrc; 319event fault.io.fire.hbus@hostbridge/pciexrc, 320 FITrate=HBUS_FIT, 321 FRU=hostbridge/pciexrc, 322 ASRU=hostbridge/pciexrc; 323 324prop fault.io.fire.hbus@hostbridge/pciexrc (0)-> 325 error.io.fire.jbc.bad_link@hostbridge/pciexrc, 326 ereport.io.fire.jbc.icise@hostbridge/pciexrc, 327 ereport.io.fire.jbc.ill_bmr@hostbridge/pciexrc, 328 ereport.io.fire.jbc.jtceei@hostbridge/pciexrc, 329 ereport.io.fire.jbc.jtceer@hostbridge/pciexrc, 330 ereport.io.fire.jbc.jtceew@hostbridge/pciexrc; 331 332/*************** 333 * JBC Datapath Errors 334 * ------------- 335 * Errors resulting from the datapath of the hostbus and detected by fire asic. 336 ***************/ 337fru cmp; 338asru cmp; 339event fault.io.fire.datapath@cmp, 340 FITrate=CPU_FIT, 341 FRU=cmp, 342 ASRU=cmp; 343 344prop fault.io.fire.datapath@cmp (0)-> 345 error.io.fire.jbc.bad_link@hostbridge/pciexrc; 346 347/* Duplicate the above fault prop for cpumodule */ 348fru cpumodule/cpu; 349asru cpumodule/cpu; 350event fault.io.fire.datapath@cpumodule/cpu, 351 FITrate=CPU_FIT, 352 FRU=cpumodule/cpu, 353 ASRU=cpumodule/cpu; 354 355prop fault.io.fire.datapath@cpumodule/cpu (0)-> 356 error.io.fire.jbc.bad_link@hostbridge/pciexrc, 357 ereport.io.fire.jbc.wr_dpe@hostbridge/pciexrc; 358 359/*************** 360 * Fire driver is at fault. 361 * ------------- 362 * The px driver should not have been in this state. Defect the px driver. 363 ***************/ 364prop error.io.fire.jbc.driver@hostbridge/pciexrc (1)-> 365 ereport.io.fire.jbc.ijp@hostbridge/pciexrc, 366 ereport.io.fire.jbc.ill_acc@hostbridge/pciexrc, 367 ereport.io.fire.jbc.ill_acc_rd@hostbridge/pciexrc, 368 ereport.io.fire.jbc.ill_bmw@hostbridge/pciexrc, 369 ereport.io.fire.jbc.jue@hostbridge/pciexrc, 370 ereport.io.fire.jbc.pio_unmap@hostbridge/pciexrc, 371 ereport.io.fire.jbc.pio_unmap_rd@hostbridge/pciexrc; 372 373 374/****************************** 375 * DMC Rules Begin Here * 376 ******************************/ 377 378/*************** 379 * Fire PX SW error 380 * ------------- 381 * Errors caused by bad SW 382 ***************/ 383prop error.io.fire.dmc.driver@hostbridge/pciexrc (1)-> 384 ereport.io.fire.dmc.ttc_cae@hostbridge/pciexrc; 385 386/*************** 387 * Unexpected Fire State 388 * ------------- 389 * The px driver should not have been in this state. Defect the px driver. 390 ***************/ 391event error.io.fire.dmc.bad_state-mmu@hostbridge/pciexrc; 392 393prop error.io.fire.dmc.bad_state@hostbridge/pciexrc (1)-> 394 ereport.io.fire.dmc.cor_not_en@hostbridge/pciexrc, 395 ereport.io.fire.dmc.eq_not_en@hostbridge/pciexrc, 396 ereport.io.fire.dmc.fatal_not_en@hostbridge/pciexrc, 397 ereport.io.fire.dmc.msi_not_en@hostbridge/pciexrc, 398 ereport.io.fire.dmc.nonfatal_not_en@hostbridge/pciexrc, 399 ereport.io.fire.dmc.pmeack_not_en@hostbridge/pciexrc, 400 ereport.io.fire.dmc.pmpme_not_en@hostbridge/pciexrc; 401 402prop error.io.fire.dmc.bad_state-mmu@hostbridge/pciexrc (1)-> 403 ereport.io.fire.dmc.tbw_dme@hostbridge/pciexrc, 404 ereport.io.fire.dmc.trn_err@hostbridge/pciexrc; 405 406/*************** 407 * Fire Asic HW error 408 * ------------- 409 * Errors caused by parity or unexpected behaviors in the asic. 410 ***************/ 411event error.io.fire.dmc.bad_parity@hostbridge/pciexrc; 412 413prop error.io.fire.dmc.asic@hostbridge/pciexrc (1)-> 414 error.io.fire.dmc.bad_parity@hostbridge/pciexrc, 415 ereport.io.fire.dmc.eq_over@hostbridge/pciexrc; 416 417/*************** 418 * Parity errors caused by dmc 419 * ------------- 420 * Fire asic error. 421 ***************/ 422event error.io.fire.dmc.bad_parity-mmu@hostbridge/pciexrc; 423 424prop error.io.fire.dmc.bad_parity@hostbridge/pciexrc (1)-> 425 ereport.io.fire.dmc.msi_par_err@hostbridge/pciexrc; 426 427prop error.io.fire.dmc.bad_parity-mmu@hostbridge/pciexrc (1)-> 428 ereport.io.fire.dmc.tbw_dpe@hostbridge/pciexrc, 429 ereport.io.fire.dmc.tbw_ude@hostbridge/pciexrc, 430 ereport.io.fire.dmc.ttc_dpe@hostbridge/pciexrc; 431 432/*************** 433 * Malformed MSI 434 * ------------- 435 * A non-compliant PCIe/PCI device sent a malformed MSI. 436 ***************/ 437prop fault.io.fire.pciex.device@pciexbus[b]/pciexdev[d]/pciexfn[f] (0) -> 438 ereport.io.fire.dmc.msi_mal_err@hostbridge/pciexrc 439 { 440 IMU_MATCH_BDF(b, d, f) && 441 is_under(hostbridge/pciexrc, pciexbus[b]/pciexdev[d]/pciexfn[f]) 442 }; 443prop fault.io.fire.pci.device@pcibus[b]/pcidev[d]/pcifn[f] (0) -> 444 ereport.io.fire.dmc.msi_mal_err@hostbridge/pciexrc 445 { 446 IMU_MATCH_BDF(b, d, f) && 447 is_under(hostbridge/pciexrc, pcibus[b]/pcidev[d]/pcifn[f]) 448 }; 449 450/*************** 451 * Event queue overflow 452 * ------------- 453 * Since we don't know which devices are sending too many EQ's, we must 454 * indict Fire asic and all PCIe/PCI devices 455 ***************/ 456#define PROP_PLAT_FRU "FRU" 457#define GET_HB_FRU (confprop(asru(hostbridge/pciexrc), PROP_PLAT_FRU)) 458#define GET_PCIE_FRU (confprop(asru(pciexbus[b]/pciexdev[d]/pciexfn[0]), PROP_PLAT_FRU)) 459#define GET_PCI_FRU (confprop(asru(pcibus[b]/pcidev[d]/pcifn[0]), PROP_PLAT_FRU)) 460 461prop fault.io.fire.pciex.device@pciexbus[b]/pciexdev[d]/pciexfn[0] (0) -> 462 ereport.io.fire.dmc.eq_over@hostbridge/pciexrc 463 { 464 /* 465 * Indict PCI-E FRU(s) under this root complex excluding the 466 * one that the Fire ASIC resides on. 467 */ 468 is_under(hostbridge/pciexrc, pciexbus[b]/pciexdev[d]/pciexfn[0]) && 469 (GET_HB_FRU != GET_PCIE_FRU) 470 }; 471 472prop fault.io.fire.pci.device@pcibus[b]/pcidev[d]/pcifn[0] (0) -> 473 ereport.io.fire.dmc.eq_over@hostbridge/pciexrc 474 { 475 /* 476 * Indict PCI FRU(s) under this root complex excluding the 477 * one that the Fire ASIC resides on. 478 */ 479 is_under(hostbridge/pciexrc, pcibus[b]/pcidev[d]/pcifn[0]) && 480 (GET_HB_FRU != GET_PCI_FRU) 481 }; 482 483/*************** 484 * Secondary errors 485 * ------------- 486 * These are errors that require logs to be diagnosable. Secondary errors 487 * do not have logs so, just propagate them to no-diag. 488 ***************/ 489event error.io.fire.dmc.secondary@hostbridge/pciexrc; 490 491prop error.io.fire.dmc.secondary@hostbridge/pciexrc (0) -> 492 ereport.io.fire.dmc.msi_mal_err@hostbridge/pciexrc{ IS_SECONDARY }; 493 494/****************************** 495 * PEC Rules Begin Here * 496 ******************************/ 497 498event error.io.fire.pec.buffer-parity@hostbridge/pciexrc; 499event error.io.fire.pec.adjacentnode@hostbridge/pciexrc ; 500 501/*************** 502 * Fire PX SW error 503 * ------------- 504 * Errors caused by bad SW 505 ***************/ 506 507prop fault.io.fire.pec.sw-algorithm@hostbridge/pciexrc (0) -> 508 ereport.io.fire.pec.crs@hostbridge/pciexrc, 509 ereport.io.fire.pec.mrc@hostbridge/pciexrc; 510 511/*************** 512 * Fire Asic HW error 513 * ------------- 514 * Errors caused by parity or unexpected behaviors in the asic. 515 ***************/ 516prop error.io.fire.pec.asic@hostbridge/pciexrc (1)-> 517 error.io.fire.pec.buffer-parity@hostbridge/pciexrc, 518 error.io.fire.pec.adjacentnode@hostbridge/pciexrc; 519 520prop error.io.fire.pec.buffer-parity@hostbridge/pciexrc (1) -> 521 ereport.io.fire.pec.edp@hostbridge/pciexrc, 522 ereport.io.fire.pec.ehp@hostbridge/pciexrc, 523 ereport.io.fire.pec.eip@hostbridge/pciexrc, 524 ereport.io.fire.pec.erp@hostbridge/pciexrc, 525 ereport.io.fire.pec.ihb_pe@hostbridge/pciexrc, 526 ereport.io.fire.pec.iip@hostbridge/pciexrc; 527 528/*************** 529 * Failed Links 530 * ------------- 531 * They will cause the fabric to be scanned and a fire.fabric ereport 532 * for the suspected devices will be sent. Do no diagnose these 533 * ereports and let the fire.fabric ereport be diagnosed. 534 ***************/ 535event ereport.io.fire.link-events-trip@hostbridge/pciexrc ; 536 537engine serd.io.fire.link-events@hostbridge/pciexrc, 538 N=LINK_EVENTS_COUNT, T=LINK_EVENTS_TIME, method=persistent, 539 trip=ereport.io.fire.link-events-trip@hostbridge/pciexrc ; 540 541event upset.io.fire.link-events@hostbridge/pciexrc, 542 engine=serd.io.fire.link-events@hostbridge/pciexrc ; 543 544event error.io.fire.link-events@hostbridge/pciexrc; 545 546prop upset.io.fire.link-events@hostbridge/pciexrc (0)-> 547 error.io.fire.link-events@hostbridge/pciexrc; 548 549prop error.io.fire.link-events@hostbridge/pciexrc (1)-> 550 ereport.io.fire.pec.lrs@hostbridge/pciexrc, 551 ereport.io.fire.pec.ldn@hostbridge/pciexrc; 552 553 554/* 555 * Fault at the adjacent node which is right below the Fire ASIC 556 */ 557fru hostbridge/pciexrc/pciexbus/pciexdev; 558asru hostbridge/pciexrc/pciexbus/pciexdev/pciexfn; 559event fault.io.fire.pciex.device@hostbridge/pciexrc/pciexbus/pciexdev/pciexfn, 560 FITrate=HB_FIT, FRU=hostbridge/pciexrc/pciexbus/pciexdev, 561 ASRU=hostbridge/pciexrc/pciexbus/pciexdev/pciexfn; 562 563prop fault.io.fire.asic@hostbridge/pciexrc (0) -> 564 error.io.fire.pec.adjacentnode@hostbridge/pciexrc; 565 566prop fault.io.fire.pciex.device@hostbridge/pciexrc/pciexbus/pciexdev/pciexfn 567(0) -> 568 error.io.fire.pec.adjacentnode@hostbridge/pciexrc 569 { 570 is_under(hostbridge/pciexrc, 571 hostbridge/pciexrc/pciexbus/pciexdev/pciexfn) 572 }; 573 574prop error.io.fire.pec.adjacentnode@hostbridge/pciexrc (0) -> 575 ereport.io.fire.link-events-trip@hostbridge/pciexrc; 576 577 578/****************************** 579 * Fabric Rules Begin Here * 580 ******************************/ 581 582/*************** 583 * fire.fabric rules 584 * ------------- 585 * Below rules are so we get a single suspect list in 1 fault with percentage 586 * of indiction being equal among all the suspect FRUs 587 ***************/ 588prop fault.io.fire.pciex.device@pciexbus/pciexdev/pciexfn (0) -> 589 error.io.fire.fabric@pciexbus/pciexdev/pciexfn; 590 591prop fault.io.fire.pci.device@pcibus/pcidev/pcifn (0) -> 592 error.io.fire.fabric@pcibus/pcidev/pcifn; 593 594prop error.io.fire.fabric@pciexbus/pciexdev/pciexfn (1) -> 595 ereport.io.fire.fabric@pciexbus/pciexdev/pciexfn { !MATCH_CE }; 596 597prop error.io.fire.fabric@pcibus/pcidev/pcifn (1) -> 598 ereport.io.fire.fabric@pcibus/pcidev/pcifn; 599 600prop error.io.fire.fabric-sib@hostbridge/pciexrc (0) -> 601 ereport.io.fire.fabric@pciexbus/pciexdev/pciexfn { 602 is_under(hostbridge/pciexrc, pciexbus/pciexdev/pciexfn) && !MATCH_CE 603 }; 604 605prop error.io.fire.fabric-sib@hostbridge/pciexrc (0) -> 606 ereport.io.fire.fabric@pcibus/pcidev/pcifn { 607 is_under(hostbridge/pciexrc, pcibus/pcidev/pcifn) 608 }; 609 610prop error.io.fire.fabric@pciexbus/pciexdev/pciexfn (1) -> 611 error.io.fire.fabric-sib@hostbridge/pciexrc { 612 is_under(hostbridge/pciexrc, pciexbus/pciexdev/pciexfn) 613 }; 614 615prop error.io.fire.fabric@pcibus/pcidev/pcifn (1) -> 616 error.io.fire.fabric-sib@hostbridge/pciexrc { 617 is_under(hostbridge/pciexrc, pcibus/pcidev/pcifn) 618 }; 619 620event upset.io.fire.fabric@pciexbus/pciexdev/pciexfn{within(1s)}; 621event ereport.io.fire.pciex.ce@pciexbus/pciexdev/pciexfn{within(1s)}; 622 623/* SERD CEs */ 624prop upset.io.fire.fabric@pciexbus[b]/pciexdev[d]/pciexfn[f] (0) -> 625 ereport.io.fire.fabric@pciexbus[b]/pciexdev[d]/pciexfn[f] 626 { MATCH_CE }; 627 628event upset.io.fire.fabric@pciexbus/pciexdev/pciexfn, 629 engine=serd.io.fire.fabric@pciexbus/pciexdev/pciexfn; 630 631engine serd.io.fire.fabric@pciexbus/pciexdev/pciexfn, 632 N=CE_EVENTS_COUNT, T=CE_EVENTS_TIME, method=persistent, 633 trip=ereport.io.fire.pciex.ce@pciexbus/pciexdev/pciexfn; 634 635prop fault.io.fire.pciex.device@pciexbus/pciexdev/pciexfn (0) -> 636 ereport.io.fire.pciex.ce@pciexbus/pciexdev/pciexfn; 637 638/*************** 639 * Upsets 640 * ------------- 641 * Used to hide ereports that are not currently diagnose or should not be 642 * diagnosed 643 ***************/ 644event upset.io.fire.nodiag@hostbridge/pciexrc; 645event error.io.fire.dmc.nodiag@hostbridge/pciexrc; 646 647prop error.io.fire.dmc.nodiag@hostbridge/pciexrc (1)-> 648 ereport.io.fire.dmc.tbw_err@hostbridge/pciexrc; 649 650prop upset.io.fire.nodiag@hostbridge/pciexrc (0)-> 651 ereport.io.fire.jbc.ce_asyn@hostbridge/pciexrc, /* CPU */ 652 ereport.io.fire.jbc.jbe@hostbridge/pciexrc, /* CPU */ 653 ereport.io.fire.jbc.jte@hostbridge/pciexrc, /* CPU */ 654 ereport.io.fire.jbc.ue_asyn@hostbridge/pciexrc, /* CPU */ 655 ereport.io.fire.jbc.unsol_intr@hostbridge/pciexrc, /* CPU */ 656 ereport.io.fire.jbc.unsol_rd@hostbridge/pciexrc, /* CPU */ 657 ereport.io.fire.pec.lin@hostbridge/pciexrc, 658 ereport.io.fire.pec.lup@hostbridge/pciexrc, 659 error.io.fire.dmc.nodiag@hostbridge/pciexrc, 660 error.io.fire.dmc.secondary@hostbridge/pciexrc, 661 ereport.io.fire.epkt@hostbridge/pciexrc { !MATCH_UNRECOGNIZED }; 662