1/* $NetBSD: i386-asm.S,v 1.4 2015/03/01 18:02:42 tnn Exp $ */ 2 3/*- 4 * Copyright (c) 1998, 2000, 2004, 2006, 2007 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29#include <machine/asm.h> 30#include <machine/cputypes.h> 31#include <machine/psl.h> 32 33 .text 34 35ENTRY(x86_cpuid2) 36 pushl %ebx 37 pushl %edi 38 movl 12(%esp), %eax 39 movl 16(%esp), %ecx 40 movl 20(%esp), %edi 41 cpuid 42 movl %eax, 0(%edi) 43 movl %ebx, 4(%edi) 44 movl %ecx, 8(%edi) 45 movl %edx, 12(%edi) 46 popl %edi 47 popl %ebx 48 ret 49END(x86_cpuid2) 50 51ENTRY(x86_xgetbv) 52 xorl %ecx, %ecx 53 xgetbv 54 ret 55END(x86_xgetbv) 56 57ENTRY(x86_identify) 58 /* Try to toggle alignment check flag; does not exist on 386. */ 59 pushfl 60 popl %eax 61 movl %eax,%ecx 62 orl $PSL_AC,%eax 63 pushl %eax 64 popfl 65 pushfl 66 popl %eax 67 xorl %ecx,%eax 68 andl $PSL_AC,%eax 69 pushl %ecx 70 popfl 71 testl %eax,%eax 72 jnz try486 73 74 /* 75 * Try the test of a NexGen CPU -- ZF will not change on a DIV 76 * instruction on a NexGen, it will on an i386. Documented in 77 * Nx586 Processor Recognition Application Note, NexGen, Inc. 78 */ 79 movl $0x5555,%eax 80 xorl %edx,%edx 81 movl $2,%ecx 82 divl %ecx 83 jnz is386 84 85isnx586: 86 /* 87 * Don't try cpuid, as Nx586s reportedly don't support the 88 * PSL_ID bit. 89 */ 90 movl $CPU_NX586,%eax 91 ret 92is386: 93 movl $CPU_386,%eax 94 ret 95 96try486: /* Try to toggle identification flag; does not exist on early 486s. */ 97 pushfl 98 popl %eax 99 movl %eax,%ecx 100 xorl $PSL_ID,%eax 101 pushl %eax 102 popfl 103 pushfl 104 popl %eax 105 xorl %ecx,%eax 106 andl $PSL_ID,%eax 107 pushl %ecx 108 popfl 109 110 testl %eax,%eax 111 jz is486 112 113 /* Later cpu, caller will use cpuid instruction */ 114 movl $-1,%eax 115 ret 116 117is486: 118 /* 119 * Check Cyrix CPU 120 * Cyrix CPUs do not change the undefined flags following 121 * execution of the divide instruction which divides 5 by 2. 122 * 123 * Note: CPUID is enabled on M2, so it passes another way. 124 */ 125 pushfl 126 movl $0x5555, %eax 127 xorl %edx, %edx 128 movl $2, %ecx 129 clc 130 divl %ecx 131 jnc trycyrix486 132 popfl 133 movl $CPU_486,%eax 134 ret 135 136trycyrix486: 137 popfl 138 /* 139 * Check for Cyrix 486 CPU by seeing if the flags change during a 140 * divide. This is documented in the Cx486SLC/e SMM Programmer's 141 * Guide. 142 */ 143 xorl %edx,%edx 144 cmpl %edx,%edx # set flags to known state 145 pushl %ebx 146 pushfl 147 popl %ecx # store flags in ecx 148 movl $-1,%eax 149 movl $4,%ebx 150 divl %ebx # do a long division 151 pushfl 152 popl %eax 153 popl %ebx 154 xorl %ecx,%eax # are the flags different? 155 testl $0x8d5,%eax # only check C|PF|AF|Z|N|V 156 je is486dlc # yes => must be Cyrix 6x86 CPU 157 movl $CPU_6x86,%eax 158 ret 159 160is486dlc: 161 movl $CPU_486DLC,%eax 162 ret 163