xref: /netbsd-src/sys/uvm/pmap/pmap_tlb.h (revision b81e6fb41c9bc5dabcce4736e5be89776bccd5c4)
1*b81e6fb4Sskrll /*	$NetBSD: pmap_tlb.h,v 1.17 2023/10/06 08:48:16 skrll Exp $	*/
242a7dfa3Smatt 
342a7dfa3Smatt /*
442a7dfa3Smatt  * Copyright (c) 1992, 1993
542a7dfa3Smatt  *	The Regents of the University of California.  All rights reserved.
642a7dfa3Smatt  *
742a7dfa3Smatt  * This code is derived from software contributed to Berkeley by
842a7dfa3Smatt  * Ralph Campbell.
942a7dfa3Smatt  *
1042a7dfa3Smatt  * Redistribution and use in source and binary forms, with or without
1142a7dfa3Smatt  * modification, are permitted provided that the following conditions
1242a7dfa3Smatt  * are met:
1342a7dfa3Smatt  * 1. Redistributions of source code must retain the above copyright
1442a7dfa3Smatt  *    notice, this list of conditions and the following disclaimer.
1542a7dfa3Smatt  * 2. Redistributions in binary form must reproduce the above copyright
1642a7dfa3Smatt  *    notice, this list of conditions and the following disclaimer in the
1742a7dfa3Smatt  *    documentation and/or other materials provided with the distribution.
1842a7dfa3Smatt  * 3. Neither the name of the University nor the names of its contributors
1942a7dfa3Smatt  *    may be used to endorse or promote products derived from this software
2042a7dfa3Smatt  *    without specific prior written permission.
2142a7dfa3Smatt  *
2242a7dfa3Smatt  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
2342a7dfa3Smatt  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
2442a7dfa3Smatt  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
2542a7dfa3Smatt  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
2642a7dfa3Smatt  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
2742a7dfa3Smatt  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
2842a7dfa3Smatt  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
2942a7dfa3Smatt  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
3042a7dfa3Smatt  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
3142a7dfa3Smatt  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
3242a7dfa3Smatt  * SUCH DAMAGE.
3342a7dfa3Smatt  *
3442a7dfa3Smatt  *	@(#)pmap.h	8.1 (Berkeley) 6/10/93
3542a7dfa3Smatt  */
3642a7dfa3Smatt 
3742a7dfa3Smatt /*
3842a7dfa3Smatt  * Copyright (c) 1987 Carnegie-Mellon University
3942a7dfa3Smatt  *
4042a7dfa3Smatt  * This code is derived from software contributed to Berkeley by
4142a7dfa3Smatt  * Ralph Campbell.
4242a7dfa3Smatt  *
4342a7dfa3Smatt  * Redistribution and use in source and binary forms, with or without
4442a7dfa3Smatt  * modification, are permitted provided that the following conditions
4542a7dfa3Smatt  * are met:
4642a7dfa3Smatt  * 1. Redistributions of source code must retain the above copyright
4742a7dfa3Smatt  *    notice, this list of conditions and the following disclaimer.
4842a7dfa3Smatt  * 2. Redistributions in binary form must reproduce the above copyright
4942a7dfa3Smatt  *    notice, this list of conditions and the following disclaimer in the
5042a7dfa3Smatt  *    documentation and/or other materials provided with the distribution.
5142a7dfa3Smatt  * 3. All advertising materials mentioning features or use of this software
5242a7dfa3Smatt  *    must display the following acknowledgement:
5342a7dfa3Smatt  *	This product includes software developed by the University of
5442a7dfa3Smatt  *	California, Berkeley and its contributors.
5542a7dfa3Smatt  * 4. Neither the name of the University nor the names of its contributors
5642a7dfa3Smatt  *    may be used to endorse or promote products derived from this software
5742a7dfa3Smatt  *    without specific prior written permission.
5842a7dfa3Smatt  *
5942a7dfa3Smatt  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
6042a7dfa3Smatt  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
6142a7dfa3Smatt  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
6242a7dfa3Smatt  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
6342a7dfa3Smatt  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
6442a7dfa3Smatt  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
6542a7dfa3Smatt  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
6642a7dfa3Smatt  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
6742a7dfa3Smatt  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
6842a7dfa3Smatt  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
6942a7dfa3Smatt  * SUCH DAMAGE.
7042a7dfa3Smatt  *
7142a7dfa3Smatt  *	@(#)pmap.h	8.1 (Berkeley) 6/10/93
7242a7dfa3Smatt  */
7342a7dfa3Smatt 
740070107fSskrll #ifndef	_UVM_PMAP_PMAP_TLB_H_
750070107fSskrll #define	_UVM_PMAP_PMAP_TLB_H_
7642a7dfa3Smatt 
774dc16517Smatt #include <sys/evcnt.h>
78fe1b443aSmatt #include <sys/kcpuset.h>
79f90211bbSjdolecek #include <sys/bitops.h>
80fe1b443aSmatt 
8121b604c9Smatt #if !defined(PMAP_TLB_MAX)
8221b604c9Smatt # if defined(MULTIPROCESSOR)
83fe1b443aSmatt #  define PMAP_TLB_MAX		MAXCPUS
8421b604c9Smatt # else
8521b604c9Smatt #  define PMAP_TLB_MAX		1
8621b604c9Smatt # endif
87fe1b443aSmatt #endif
88fe1b443aSmatt 
89*b81e6fb4Sskrll #if !defined(PMAP_TLB_ALWAYS_ASIDS)
90*b81e6fb4Sskrll #define	PMAP_TLB_ALWAYS_ASIDS	true
91*b81e6fb4Sskrll #endif
92*b81e6fb4Sskrll 
9342a7dfa3Smatt /*
9442a7dfa3Smatt  * Per TLB (normally same as CPU) asid info
9542a7dfa3Smatt  */
9642a7dfa3Smatt struct pmap_asid_info {
9742a7dfa3Smatt 	LIST_ENTRY(pmap_asid_info) pai_link;
9842a7dfa3Smatt 	uint32_t	pai_asid;	/* TLB address space tag */
9942a7dfa3Smatt };
10042a7dfa3Smatt 
10142a7dfa3Smatt #define	TLBINFO_LOCK(ti)		mutex_spin_enter((ti)->ti_lock)
10242a7dfa3Smatt #define	TLBINFO_UNLOCK(ti)		mutex_spin_exit((ti)->ti_lock)
10377e6c61aSskrll #define	TLBINFO_OWNED(ti)		mutex_owned((ti)->ti_lock)
104*b81e6fb4Sskrll #define	PMAP_PAI_ASIDVALID_P(pai, ti)	(!tlbinfo_asids_p(ti) || (pai)->pai_asid != 0)
10542a7dfa3Smatt #define	PMAP_PAI(pmap, ti)		(&(pmap)->pm_pai[tlbinfo_index(ti)])
10642a7dfa3Smatt #define	PAI_PMAP(pai, ti)	\
10742a7dfa3Smatt 	((pmap_t)((intptr_t)(pai) \
10842a7dfa3Smatt 	    - offsetof(struct pmap, pm_pai[tlbinfo_index(ti)])))
10942a7dfa3Smatt 
11042a7dfa3Smatt enum tlb_invalidate_op {
11142a7dfa3Smatt 	TLBINV_NOBODY = 0,
11242a7dfa3Smatt 	TLBINV_ONE = 1,
11342a7dfa3Smatt 	TLBINV_ALLUSER = 2,
11442a7dfa3Smatt 	TLBINV_ALLKERNEL = 3,
11542a7dfa3Smatt 	TLBINV_ALL = 4
11642a7dfa3Smatt };
11742a7dfa3Smatt 
11842a7dfa3Smatt struct pmap_tlb_info {
11942a7dfa3Smatt 	char ti_name[8];
12042a7dfa3Smatt 	uint32_t ti_asids_free;		/* # of ASIDs free */
12142a7dfa3Smatt #define	tlbinfo_noasids_p(ti)	((ti)->ti_asids_free == 0)
12242a7dfa3Smatt 	kmutex_t *ti_lock;
12342a7dfa3Smatt 	u_int ti_wired;			/* # of wired TLB entries */
12442a7dfa3Smatt 	tlb_asid_t ti_asid_hint;	/* probable next ASID to use */
12542a7dfa3Smatt 	tlb_asid_t ti_asid_max;
12642a7dfa3Smatt 	LIST_HEAD(, pmap_asid_info) ti_pais; /* list of active ASIDs */
12742a7dfa3Smatt #ifdef MULTIPROCESSOR
12842a7dfa3Smatt 	pmap_t ti_victim;
12942a7dfa3Smatt 	uint32_t ti_synci_page_bitmap;	/* page indices needing a syncicache */
130fe1b443aSmatt #if PMAP_TLB_MAX > 1
131fe1b443aSmatt 	kcpuset_t *ti_kcpuset;		/* bitmask of CPUs sharing this TLB */
13242a7dfa3Smatt 	u_int ti_index;
133fe1b443aSmatt 	enum tlb_invalidate_op ti_tlbinvop;
13442a7dfa3Smatt #define tlbinfo_index(ti)	((ti)->ti_index)
135fe1b443aSmatt #else
1361627c0aeSmatt #define tlbinfo_index(ti)	((void)(ti), 0)
137fe1b443aSmatt #endif
1384248f17bSjdolecek #if !defined(PMAP_TLB_NO_SYNCI_EVCNT)
13942a7dfa3Smatt 	struct evcnt ti_evcnt_synci_asts;
14042a7dfa3Smatt 	struct evcnt ti_evcnt_synci_all;
14142a7dfa3Smatt 	struct evcnt ti_evcnt_synci_pages;
14242a7dfa3Smatt 	struct evcnt ti_evcnt_synci_deferred;
14342a7dfa3Smatt 	struct evcnt ti_evcnt_synci_desired;
14442a7dfa3Smatt 	struct evcnt ti_evcnt_synci_duplicate;
1454248f17bSjdolecek #endif /* !PMAP_TLB_NO_SYNCI_EVCNT */
14642a7dfa3Smatt #else
1471627c0aeSmatt #define tlbinfo_index(ti)	((void)(ti), 0)
14842a7dfa3Smatt #endif
14942a7dfa3Smatt 	struct evcnt ti_evcnt_asid_reinits;
150f90211bbSjdolecek #ifndef PMAP_TLB_BITMAP_LENGTH
151f90211bbSjdolecek #define	PMAP_TLB_BITMAP_LENGTH 256
152f90211bbSjdolecek #endif
153f90211bbSjdolecek 	__BITMAP_TYPE(, u_long, PMAP_TLB_BITMAP_LENGTH) ti_asid_bitmap;
15442a7dfa3Smatt };
15542a7dfa3Smatt 
15642a7dfa3Smatt #ifdef	_KERNEL
15742a7dfa3Smatt extern struct pmap_tlb_info pmap_tlb0_info;
15842a7dfa3Smatt #ifdef MULTIPROCESSOR
159038a2715Snonaka extern struct pmap_tlb_info *pmap_tlbs[PMAP_TLB_MAX];
16042a7dfa3Smatt extern u_int pmap_ntlbs;
16142a7dfa3Smatt #endif
16242a7dfa3Smatt 
16342a7dfa3Smatt #ifndef cpu_set_tlb_info
16442a7dfa3Smatt # define cpu_set_tlb_info(ci, ti)	((void)((ci)->ci_tlb_info = (ti)))
16542a7dfa3Smatt #endif
16642a7dfa3Smatt #ifndef cpu_tlb_info
16721b604c9Smatt # if PMAP_TLB_MAX > 1
16842a7dfa3Smatt #  define cpu_tlb_info(ci)		((ci)->ci_tlb_info)
169283b482bSmatt # else
170283b482bSmatt #  define cpu_tlb_info(ci)		(&pmap_tlb0_info)
171283b482bSmatt # endif
17242a7dfa3Smatt #endif
17342a7dfa3Smatt 
17442a7dfa3Smatt #ifdef MULTIPROCESSOR
17542a7dfa3Smatt void	pmap_tlb_shootdown_process(void);
17642a7dfa3Smatt bool	pmap_tlb_shootdown_bystanders(pmap_t pmap);
17742a7dfa3Smatt void	pmap_tlb_info_attach(struct pmap_tlb_info *, struct cpu_info *);
17842a7dfa3Smatt void	pmap_md_tlb_info_attach(struct pmap_tlb_info *, struct cpu_info *);
17942a7dfa3Smatt #endif
18042a7dfa3Smatt void	pmap_tlb_info_init(struct pmap_tlb_info *);
18142a7dfa3Smatt void	pmap_tlb_info_evcnt_attach(struct pmap_tlb_info *);
18242a7dfa3Smatt void	pmap_tlb_asid_acquire(pmap_t, struct lwp *l);
18342a7dfa3Smatt void	pmap_tlb_asid_deactivate(pmap_t);
18442a7dfa3Smatt void	pmap_tlb_asid_release_all(pmap_t);
1855528d7fdSmatt int	pmap_tlb_update_addr(pmap_t, vaddr_t, pt_entry_t, u_int);
18642a7dfa3Smatt #define	PMAP_TLB_NEED_IPI	0x01
18742a7dfa3Smatt #define	PMAP_TLB_INSERT		0x02
18842a7dfa3Smatt void	pmap_tlb_invalidate_addr(pmap_t, vaddr_t);
18942a7dfa3Smatt void	pmap_tlb_check(pmap_t, bool (*)(void *, vaddr_t, tlb_asid_t, pt_entry_t));
19042a7dfa3Smatt void	pmap_tlb_asid_check(void);
19142a7dfa3Smatt 
192196ee94dSskrll /* for ddb */
193196ee94dSskrll void pmap_db_tlb_print(struct pmap *, void (*)(const char *, ...) __printflike(1, 2));
194196ee94dSskrll 
195*b81e6fb4Sskrll static inline bool
tlbinfo_asids_p(struct pmap_tlb_info * ti)196*b81e6fb4Sskrll tlbinfo_asids_p(struct pmap_tlb_info *ti)
197*b81e6fb4Sskrll {
198*b81e6fb4Sskrll 	return PMAP_TLB_ALWAYS_ASIDS || (ti)->ti_asid_max != 0;
199*b81e6fb4Sskrll }
200*b81e6fb4Sskrll 
20142a7dfa3Smatt #endif	/* _KERNEL */
2020070107fSskrll #endif	/* _UVM_PMAP_PMAP_TLB_H_ */
203