1 /* $NetBSD: pmap_tlb.c,v 1.36 2020/08/11 06:54:14 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 2010 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Matt Thomas at 3am Software Foundry. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 34 __KERNEL_RCSID(0, "$NetBSD: pmap_tlb.c,v 1.36 2020/08/11 06:54:14 skrll Exp $"); 35 36 /* 37 * Manages address spaces in a TLB. 38 * 39 * Normally there is a 1:1 mapping between a TLB and a CPU. However, some 40 * implementations may share a TLB between multiple CPUs (really CPU thread 41 * contexts). This requires the TLB abstraction to be separated from the 42 * CPU abstraction. It also requires that the TLB be locked while doing 43 * TLB activities. 44 * 45 * For each TLB, we track the ASIDs in use in a bitmap and a list of pmaps 46 * that have a valid ASID. 47 * 48 * We allocate ASIDs in increasing order until we have exhausted the supply, 49 * then reinitialize the ASID space, and start allocating again at 1. When 50 * allocating from the ASID bitmap, we skip any ASID who has a corresponding 51 * bit set in the ASID bitmap. Eventually this causes the ASID bitmap to fill 52 * and, when completely filled, a reinitialization of the ASID space. 53 * 54 * To reinitialize the ASID space, the ASID bitmap is reset and then the ASIDs 55 * of non-kernel TLB entries get recorded in the ASID bitmap. If the entries 56 * in TLB consume more than half of the ASID space, all ASIDs are invalidated, 57 * the ASID bitmap is recleared, and the list of pmaps is emptied. Otherwise, 58 * (the normal case), any ASID present in the TLB (even those which are no 59 * longer used by a pmap) will remain active (allocated) and all other ASIDs 60 * will be freed. If the size of the TLB is much smaller than the ASID space, 61 * this algorithm completely avoids TLB invalidation. 62 * 63 * For multiprocessors, we also have to deal TLB invalidation requests from 64 * other CPUs, some of which are dealt with the reinitialization of the ASID 65 * space. Whereas above we keep the ASIDs of those pmaps which have active 66 * TLB entries, this type of reinitialization preserves the ASIDs of any 67 * "onproc" user pmap and all other ASIDs will be freed. We must do this 68 * since we can't change the current ASID. 69 * 70 * Each pmap has two bitmaps: pm_active and pm_onproc. Each bit in pm_active 71 * indicates whether that pmap has an allocated ASID for a CPU. Each bit in 72 * pm_onproc indicates that the pmap's ASID is in use, i.e. a CPU has it in its 73 * "current ASID" field, e.g. the ASID field of the COP 0 register EntryHi for 74 * MIPS, or the ASID field of TTBR0 for AA64. The bit number used in these 75 * bitmaps comes from the CPU's cpu_index(). Even though these bitmaps contain 76 * the bits for all CPUs, the bits that correspond to the bits belonging to 77 * the CPUs sharing a TLB can only be manipulated while holding that TLB's 78 * lock. Atomic ops must be used to update them since multiple CPUs may be 79 * changing different sets of bits at same time but these sets never overlap. 80 * 81 * When a change to the local TLB may require a change in the TLB's of other 82 * CPUs, we try to avoid sending an IPI if at all possible. For instance, if 83 * we are updating a PTE and that PTE previously was invalid and therefore 84 * couldn't support an active mapping, there's no need for an IPI since there 85 * can't be a TLB entry to invalidate. The other case is when we change a PTE 86 * to be modified we just update the local TLB. If another TLB has a stale 87 * entry, a TLB MOD exception will be raised and that will cause the local TLB 88 * to be updated. 89 * 90 * We never need to update a non-local TLB if the pmap doesn't have a valid 91 * ASID for that TLB. If it does have a valid ASID but isn't current "onproc" 92 * we simply reset its ASID for that TLB and then when it goes "onproc" it 93 * will allocate a new ASID and any existing TLB entries will be orphaned. 94 * Only in the case that pmap has an "onproc" ASID do we actually have to send 95 * an IPI. 96 * 97 * Once we determined we must send an IPI to shootdown a TLB, we need to send 98 * it to one of CPUs that share that TLB. We choose the lowest numbered CPU 99 * that has one of the pmap's ASID "onproc". In reality, any CPU sharing that 100 * TLB would do, but interrupting an active CPU seems best. 101 * 102 * A TLB might have multiple shootdowns active concurrently. The shootdown 103 * logic compresses these into a few cases: 104 * 0) nobody needs to have its TLB entries invalidated 105 * 1) one ASID needs to have its TLB entries invalidated 106 * 2) more than one ASID needs to have its TLB entries invalidated 107 * 3) the kernel needs to have its TLB entries invalidated 108 * 4) the kernel and one or more ASID need their TLB entries invalidated. 109 * 110 * And for each case we do: 111 * 0) nothing, 112 * 1) if that ASID is still "onproc", we invalidate the TLB entries for 113 * that single ASID. If not, just reset the pmap's ASID to invalidate 114 * and let it allocate a new ASID the next time it goes "onproc", 115 * 2) we reinitialize the ASID space (preserving any "onproc" ASIDs) and 116 * invalidate all non-wired non-global TLB entries, 117 * 3) we invalidate all of the non-wired global TLB entries, 118 * 4) we reinitialize the ASID space (again preserving any "onproc" ASIDs) 119 * invalidate all non-wired TLB entries. 120 * 121 * As you can see, shootdowns are not concerned with addresses, just address 122 * spaces. Since the number of TLB entries is usually quite small, this avoids 123 * a lot of overhead for not much gain. 124 */ 125 126 #define __PMAP_PRIVATE 127 128 #include "opt_multiprocessor.h" 129 130 #include <sys/param.h> 131 132 #include <sys/atomic.h> 133 #include <sys/cpu.h> 134 #include <sys/kernel.h> /* for cold */ 135 #include <sys/mutex.h> 136 #include <sys/proc.h> 137 #include <sys/systm.h> 138 139 #include <uvm/uvm.h> 140 141 static kmutex_t pmap_tlb0_lock __cacheline_aligned; 142 143 #define IFCONSTANT(x) (__builtin_constant_p((x)) ? (x) : 0) 144 145 #if KERNEL_PID > 31 146 #error "KERNEL_PID expected in range 0-31" 147 #endif 148 149 #define TLBINFO_ASID_MARK_UNUSED(ti, asid) \ 150 __BITMAP_CLR((asid), &(ti)->ti_asid_bitmap) 151 #define TLBINFO_ASID_MARK_USED(ti, asid) \ 152 __BITMAP_SET((asid), &(ti)->ti_asid_bitmap) 153 #define TLBINFO_ASID_INUSE_P(ti, asid) \ 154 __BITMAP_ISSET((asid), &(ti)->ti_asid_bitmap) 155 #define TLBINFO_ASID_RESET(ti) \ 156 do { \ 157 __BITMAP_ZERO(&ti->ti_asid_bitmap); \ 158 for (tlb_asid_t asid = 0; asid <= KERNEL_PID; asid++) \ 159 TLBINFO_ASID_MARK_USED(ti, asid); \ 160 } while (0) 161 #define TLBINFO_ASID_INITIAL_FREE(asid_max) \ 162 (asid_max + 1 /* 0 */ - (1 + KERNEL_PID)) 163 164 struct pmap_tlb_info pmap_tlb0_info = { 165 .ti_name = "tlb0", 166 .ti_asid_hint = KERNEL_PID + 1, 167 #ifdef PMAP_TLB_NUM_PIDS 168 .ti_asid_max = IFCONSTANT(PMAP_TLB_NUM_PIDS - 1), 169 .ti_asids_free = IFCONSTANT( 170 TLBINFO_ASID_INITIAL_FREE(PMAP_TLB_NUM_PIDS - 1)), 171 #endif 172 .ti_asid_bitmap._b[0] = __BITS(0, KERNEL_PID), 173 #ifdef PMAP_TLB_WIRED_UPAGES 174 .ti_wired = PMAP_TLB_WIRED_UPAGES, 175 #endif 176 .ti_lock = &pmap_tlb0_lock, 177 .ti_pais = LIST_HEAD_INITIALIZER(pmap_tlb0_info.ti_pais), 178 #if defined(MULTIPROCESSOR) && PMAP_TLB_MAX > 1 179 .ti_tlbinvop = TLBINV_NOBODY, 180 #endif 181 }; 182 183 #undef IFCONSTANT 184 185 #if defined(MULTIPROCESSOR) && PMAP_TLB_MAX > 1 186 struct pmap_tlb_info *pmap_tlbs[PMAP_TLB_MAX] = { 187 [0] = &pmap_tlb0_info, 188 }; 189 u_int pmap_ntlbs = 1; 190 #endif 191 192 #ifdef MULTIPROCESSOR 193 __unused static inline bool 194 pmap_tlb_intersecting_active_p(pmap_t pm, struct pmap_tlb_info *ti) 195 { 196 #if PMAP_TLB_MAX == 1 197 return !kcpuset_iszero(pm->pm_active); 198 #else 199 return kcpuset_intersecting_p(pm->pm_active, ti->ti_kcpuset); 200 #endif 201 } 202 203 static inline bool 204 pmap_tlb_intersecting_onproc_p(pmap_t pm, struct pmap_tlb_info *ti) 205 { 206 #if PMAP_TLB_MAX == 1 207 return !kcpuset_iszero(pm->pm_onproc); 208 #else 209 return kcpuset_intersecting_p(pm->pm_onproc, ti->ti_kcpuset); 210 #endif 211 } 212 #endif 213 214 static void 215 pmap_tlb_pai_check(struct pmap_tlb_info *ti, bool locked_p) 216 { 217 UVMHIST_FUNC(__func__); 218 UVMHIST_CALLARGS(maphist, "(ti=%#jx)", (uintptr_t)ti, 0, 0, 0); 219 220 #ifdef DIAGNOSTIC 221 struct pmap_asid_info *pai; 222 if (!locked_p) 223 TLBINFO_LOCK(ti); 224 LIST_FOREACH(pai, &ti->ti_pais, pai_link) { 225 KASSERT(pai != NULL); 226 KASSERT(PAI_PMAP(pai, ti) != pmap_kernel()); 227 KASSERT(pai->pai_asid > KERNEL_PID); 228 KASSERTMSG(pai->pai_asid <= ti->ti_asid_max, 229 "pm %p asid %#x", PAI_PMAP(pai, ti), pai->pai_asid); 230 KASSERTMSG(TLBINFO_ASID_INUSE_P(ti, pai->pai_asid), 231 "pm %p asid %u", PAI_PMAP(pai, ti), pai->pai_asid); 232 #ifdef MULTIPROCESSOR 233 KASSERT(pmap_tlb_intersecting_active_p(PAI_PMAP(pai, ti), ti)); 234 #endif 235 } 236 if (!locked_p) 237 TLBINFO_UNLOCK(ti); 238 #endif 239 UVMHIST_LOG(maphist, " <-- done", 0, 0, 0, 0); 240 } 241 242 static void 243 pmap_tlb_pai_reset(struct pmap_tlb_info *ti, struct pmap_asid_info *pai, 244 struct pmap *pm) 245 { 246 UVMHIST_FUNC(__func__); 247 UVMHIST_CALLARGS(maphist, "(ti=%#jx, pai=%#jx, pm=%#jx): asid %u", 248 (uintptr_t)ti, (uintptr_t)pai, (uintptr_t)pm, pai->pai_asid); 249 250 /* 251 * We must have an ASID but it must not be onproc (on a processor). 252 */ 253 KASSERT(pai->pai_asid > KERNEL_PID); 254 KASSERT(pai->pai_asid <= ti->ti_asid_max); 255 #if defined(MULTIPROCESSOR) 256 KASSERT(pmap_tlb_intersecting_active_p(pm, ti)); 257 KASSERT(!pmap_tlb_intersecting_onproc_p(pm, ti)); 258 #endif 259 LIST_REMOVE(pai, pai_link); 260 #ifdef DIAGNOSTIC 261 pai->pai_link.le_prev = NULL; /* tagged as unlinked */ 262 #endif 263 /* 264 * If the platform has a cheap way to flush ASIDs then free the ASID 265 * back into the pool. On multiprocessor systems, we will flush the 266 * ASID from the TLB when it's allocated. That way we know the flush 267 * was always done in the correct TLB space. On uniprocessor systems, 268 * just do the flush now since we know that it has been used. This has 269 * a bit less overhead. Either way, this will mean that we will only 270 * need to flush all ASIDs if all ASIDs are in use and we need to 271 * allocate a new one. 272 */ 273 if (PMAP_TLB_FLUSH_ASID_ON_RESET) { 274 #ifndef MULTIPROCESSOR 275 UVMHIST_LOG(maphist, " ... asid %u flushed", pai->pai_asid, 0, 276 0, 0); 277 tlb_invalidate_asids(pai->pai_asid, pai->pai_asid); 278 #endif 279 if (TLBINFO_ASID_INUSE_P(ti, pai->pai_asid)) { 280 UVMHIST_LOG(maphist, " ... asid marked unused", 281 pai->pai_asid, 0, 0, 0); 282 TLBINFO_ASID_MARK_UNUSED(ti, pai->pai_asid); 283 ti->ti_asids_free++; 284 } 285 } 286 /* 287 * Note that we don't mark the ASID as not in use in the TLB's ASID 288 * bitmap (thus it can't be allocated until the ASID space is exhausted 289 * and therefore reinitialized). We don't want to flush the TLB for 290 * entries belonging to this ASID so we will let natural TLB entry 291 * replacement flush them out of the TLB. Any new entries for this 292 * pmap will need a new ASID allocated. 293 */ 294 pai->pai_asid = 0; 295 296 #if defined(MULTIPROCESSOR) 297 /* 298 * The bits in pm_active belonging to this TLB can only be changed 299 * while this TLB's lock is held. 300 */ 301 #if PMAP_TLB_MAX == 1 302 kcpuset_zero(pm->pm_active); 303 #else 304 kcpuset_remove(pm->pm_active, ti->ti_kcpuset); 305 #endif 306 KASSERT(!pmap_tlb_intersecting_active_p(pm, ti)); 307 #endif /* MULTIPROCESSOR */ 308 309 UVMHIST_LOG(maphist, " <-- done", 0, 0, 0, 0); 310 } 311 312 void 313 pmap_tlb_info_evcnt_attach(struct pmap_tlb_info *ti) 314 { 315 #if defined(MULTIPROCESSOR) && !defined(PMAP_TLB_NO_SYNCI_EVCNT) 316 evcnt_attach_dynamic_nozero(&ti->ti_evcnt_synci_desired, 317 EVCNT_TYPE_MISC, NULL, 318 ti->ti_name, "icache syncs desired"); 319 evcnt_attach_dynamic_nozero(&ti->ti_evcnt_synci_asts, 320 EVCNT_TYPE_MISC, &ti->ti_evcnt_synci_desired, 321 ti->ti_name, "icache sync asts"); 322 evcnt_attach_dynamic_nozero(&ti->ti_evcnt_synci_all, 323 EVCNT_TYPE_MISC, &ti->ti_evcnt_synci_asts, 324 ti->ti_name, "icache full syncs"); 325 evcnt_attach_dynamic_nozero(&ti->ti_evcnt_synci_pages, 326 EVCNT_TYPE_MISC, &ti->ti_evcnt_synci_asts, 327 ti->ti_name, "icache pages synced"); 328 evcnt_attach_dynamic_nozero(&ti->ti_evcnt_synci_duplicate, 329 EVCNT_TYPE_MISC, &ti->ti_evcnt_synci_desired, 330 ti->ti_name, "icache dup pages skipped"); 331 evcnt_attach_dynamic_nozero(&ti->ti_evcnt_synci_deferred, 332 EVCNT_TYPE_MISC, &ti->ti_evcnt_synci_desired, 333 ti->ti_name, "icache pages deferred"); 334 #endif /* MULTIPROCESSOR && !PMAP_TLB_NO_SYNCI_EVCNT */ 335 evcnt_attach_dynamic_nozero(&ti->ti_evcnt_asid_reinits, 336 EVCNT_TYPE_MISC, NULL, 337 ti->ti_name, "asid pool reinit"); 338 } 339 340 void 341 pmap_tlb_info_init(struct pmap_tlb_info *ti) 342 { 343 #if defined(MULTIPROCESSOR) 344 #if PMAP_TLB_MAX == 1 345 KASSERT(ti == &pmap_tlb0_info); 346 #else 347 if (ti != &pmap_tlb0_info) { 348 KASSERT(pmap_ntlbs < PMAP_TLB_MAX); 349 350 KASSERT(pmap_tlbs[pmap_ntlbs] == NULL); 351 352 ti->ti_lock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_SCHED); 353 TLBINFO_ASID_RESET(ti); 354 ti->ti_asid_hint = KERNEL_PID + 1; 355 ti->ti_asid_max = pmap_tlbs[0]->ti_asid_max; 356 ti->ti_asids_free = TLBINFO_ASID_INITIAL_FREE(ti->ti_asid_max); 357 ti->ti_tlbinvop = TLBINV_NOBODY; 358 ti->ti_victim = NULL; 359 kcpuset_create(&ti->ti_kcpuset, true); 360 ti->ti_index = pmap_ntlbs++; 361 ti->ti_wired = 0; 362 pmap_tlbs[ti->ti_index] = ti; 363 snprintf(ti->ti_name, sizeof(ti->ti_name), "tlb%u", 364 ti->ti_index); 365 pmap_tlb_info_evcnt_attach(ti); 366 367 KASSERT(ti->ti_asid_max < PMAP_TLB_BITMAP_LENGTH); 368 return; 369 } 370 #endif 371 #endif /* MULTIPROCESSOR */ 372 KASSERT(ti == &pmap_tlb0_info); 373 KASSERT(ti->ti_lock == &pmap_tlb0_lock); 374 375 mutex_init(ti->ti_lock, MUTEX_DEFAULT, IPL_SCHED); 376 #if defined(MULTIPROCESSOR) && PMAP_TLB_MAX > 1 377 kcpuset_create(&ti->ti_kcpuset, true); 378 kcpuset_set(ti->ti_kcpuset, cpu_index(curcpu())); 379 #endif 380 381 if (ti->ti_asid_max == 0) { 382 ti->ti_asid_max = pmap_md_tlb_asid_max(); 383 ti->ti_asids_free = TLBINFO_ASID_INITIAL_FREE(ti->ti_asid_max); 384 } 385 386 KASSERT(ti->ti_asid_max < PMAP_TLB_BITMAP_LENGTH); 387 } 388 389 #if defined(MULTIPROCESSOR) 390 void 391 pmap_tlb_info_attach(struct pmap_tlb_info *ti, struct cpu_info *ci) 392 { 393 KASSERT(!CPU_IS_PRIMARY(ci)); 394 KASSERT(ci->ci_data.cpu_idlelwp != NULL); 395 KASSERT(cold); 396 397 TLBINFO_LOCK(ti); 398 #if PMAP_TLB_MAX > 1 399 kcpuset_set(ti->ti_kcpuset, cpu_index(ci)); 400 cpu_set_tlb_info(ci, ti); 401 #endif 402 403 /* 404 * Do any MD tlb info init. 405 */ 406 pmap_md_tlb_info_attach(ti, ci); 407 408 /* 409 * The kernel pmap uses the kcpuset_running set so it's always 410 * up-to-date. 411 */ 412 TLBINFO_UNLOCK(ti); 413 } 414 #endif /* MULTIPROCESSOR */ 415 416 #ifdef DIAGNOSTIC 417 static size_t 418 pmap_tlb_asid_count(struct pmap_tlb_info *ti) 419 { 420 size_t count = 0; 421 for (tlb_asid_t asid = 1; asid <= ti->ti_asid_max; asid++) { 422 if (TLBINFO_ASID_INUSE_P(ti, asid)) 423 count++; 424 } 425 return count; 426 } 427 #endif 428 429 static void 430 pmap_tlb_asid_reinitialize(struct pmap_tlb_info *ti, enum tlb_invalidate_op op) 431 { 432 UVMHIST_FUNC(__func__); 433 UVMHIST_CALLARGS(maphist, "(ti=%#jx, op=%ju)", (uintptr_t)ti, op, 0, 0); 434 435 pmap_tlb_pai_check(ti, true); 436 437 ti->ti_evcnt_asid_reinits.ev_count++; 438 439 /* 440 * First, clear the ASID bitmap (except for ASID 0 which belongs 441 * to the kernel). 442 */ 443 ti->ti_asids_free = TLBINFO_ASID_INITIAL_FREE(ti->ti_asid_max); 444 ti->ti_asid_hint = KERNEL_PID + 1; 445 TLBINFO_ASID_RESET(ti); 446 447 switch (op) { 448 #if defined(MULTIPROCESSOR) && defined(PMAP_TLB_NEED_SHOOTDOWN) 449 case TLBINV_ALL: 450 tlb_invalidate_all(); 451 break; 452 case TLBINV_ALLUSER: 453 tlb_invalidate_asids(KERNEL_PID + 1, ti->ti_asid_max); 454 break; 455 #endif /* MULTIPROCESSOR && PMAP_TLB_NEED_SHOOTDOWN */ 456 case TLBINV_NOBODY: { 457 /* 458 * If we are just reclaiming ASIDs in the TLB, let's go find 459 * what ASIDs are in use in the TLB. Since this is a 460 * semi-expensive operation, we don't want to do it too often. 461 * So if more half of the ASIDs are in use, we don't have 462 * enough free ASIDs so invalidate the TLB entries with ASIDs 463 * and clear the ASID bitmap. That will force everyone to 464 * allocate a new ASID. 465 */ 466 #if !defined(MULTIPROCESSOR) || defined(PMAP_TLB_NEED_SHOOTDOWN) 467 pmap_tlb_asid_check(); 468 const u_int asids_found = tlb_record_asids( 469 ti->ti_asid_bitmap._b, ti->ti_asid_max); 470 pmap_tlb_asid_check(); 471 #ifdef DIAGNOSTIC 472 const u_int asids_count = pmap_tlb_asid_count(ti); 473 #endif 474 KASSERTMSG(asids_found == asids_count, 475 "found %u != count %u", asids_found, asids_count); 476 if (__predict_false(asids_found >= ti->ti_asid_max / 2)) { 477 tlb_invalidate_asids(KERNEL_PID + 1, ti->ti_asid_max); 478 #else /* MULTIPROCESSOR && !PMAP_TLB_NEED_SHOOTDOWN */ 479 /* 480 * For those systems (PowerPC) that don't require 481 * cross cpu TLB shootdowns, we have to invalidate the 482 * entire TLB because we can't record the ASIDs in use 483 * on the other CPUs. This is hopefully cheaper than 484 * than trying to use an IPI to record all the ASIDs 485 * on all the CPUs (which would be a synchronization 486 * nightmare). 487 */ 488 tlb_invalidate_all(); 489 #endif /* MULTIPROCESSOR && !PMAP_TLB_NEED_SHOOTDOWN */ 490 TLBINFO_ASID_RESET(ti); 491 ti->ti_asids_free = TLBINFO_ASID_INITIAL_FREE( 492 ti->ti_asid_max); 493 #if !defined(MULTIPROCESSOR) || defined(PMAP_TLB_NEED_SHOOTDOWN) 494 } else { 495 ti->ti_asids_free -= asids_found; 496 } 497 #endif /* !MULTIPROCESSOR || PMAP_TLB_NEED_SHOOTDOWN */ 498 KASSERTMSG(ti->ti_asids_free <= ti->ti_asid_max, "%u", 499 ti->ti_asids_free); 500 break; 501 } 502 default: 503 panic("%s: unexpected op %d", __func__, op); 504 } 505 506 /* 507 * Now go through the active ASIDs. If the ASID is on a processor or 508 * we aren't invalidating all ASIDs and the TLB has an entry owned by 509 * that ASID, mark it as in use. Otherwise release the ASID. 510 */ 511 struct pmap_asid_info *pai, *next; 512 for (pai = LIST_FIRST(&ti->ti_pais); pai != NULL; pai = next) { 513 struct pmap * const pm = PAI_PMAP(pai, ti); 514 next = LIST_NEXT(pai, pai_link); 515 KASSERT(pm != pmap_kernel()); 516 KASSERT(pai->pai_asid > KERNEL_PID); 517 #if defined(MULTIPROCESSOR) 518 if (pmap_tlb_intersecting_onproc_p(pm, ti)) { 519 if (!TLBINFO_ASID_INUSE_P(ti, pai->pai_asid)) { 520 TLBINFO_ASID_MARK_USED(ti, pai->pai_asid); 521 ti->ti_asids_free--; 522 } 523 continue; 524 } 525 #endif /* MULTIPROCESSOR */ 526 if (TLBINFO_ASID_INUSE_P(ti, pai->pai_asid)) { 527 KASSERT(op == TLBINV_NOBODY); 528 } else { 529 pmap_tlb_pai_reset(ti, pai, pm); 530 } 531 } 532 #ifdef DIAGNOSTIC 533 size_t free_count __diagused = ti->ti_asid_max - pmap_tlb_asid_count(ti); 534 KASSERTMSG(free_count == ti->ti_asids_free, 535 "bitmap error: %zu != %u", free_count, ti->ti_asids_free); 536 #endif 537 UVMHIST_LOG(maphist, " <-- done", 0, 0, 0, 0); 538 } 539 540 #if defined(MULTIPROCESSOR) && defined(PMAP_TLB_NEED_SHOOTDOWN) 541 #if PMAP_TLB_MAX == 1 542 #error shootdown not required for single TLB systems 543 #endif 544 void 545 pmap_tlb_shootdown_process(void) 546 { 547 struct cpu_info * const ci = curcpu(); 548 struct pmap_tlb_info * const ti = cpu_tlb_info(ci); 549 #ifdef DIAGNOSTIC 550 struct pmap * const pm = curlwp->l_proc->p_vmspace->vm_map.pmap; 551 #endif 552 553 KASSERT(cpu_intr_p()); 554 KASSERTMSG(ci->ci_cpl >= IPL_SCHED, 555 "%s: cpl (%d) < IPL_SCHED (%d)", 556 __func__, ci->ci_cpl, IPL_SCHED); 557 558 TLBINFO_LOCK(ti); 559 560 switch (ti->ti_tlbinvop) { 561 case TLBINV_ONE: { 562 /* 563 * We only need to invalidate one user ASID. 564 */ 565 struct pmap_asid_info * const pai = PMAP_PAI(ti->ti_victim, ti); 566 KASSERT(ti->ti_victim != pmap_kernel()); 567 if (!pmap_tlb_intersecting_onproc_p(ti->ti_victim, ti)) { 568 /* 569 * The victim is an active pmap so we will just 570 * invalidate its TLB entries. 571 */ 572 KASSERT(pai->pai_asid > KERNEL_PID); 573 pmap_tlb_asid_check(); 574 tlb_invalidate_asids(pai->pai_asid, pai->pai_asid); 575 pmap_tlb_asid_check(); 576 } else if (pai->pai_asid) { 577 /* 578 * The victim is no longer an active pmap for this TLB. 579 * So simply clear its ASID and when pmap_activate is 580 * next called for this pmap, it will allocate a new 581 * ASID. 582 */ 583 KASSERT(!pmap_tlb_intersecting_onproc_p(pm, ti)); 584 pmap_tlb_pai_reset(ti, pai, PAI_PMAP(pai, ti)); 585 } 586 break; 587 } 588 case TLBINV_ALLUSER: 589 /* 590 * Flush all user TLB entries. 591 */ 592 pmap_tlb_asid_reinitialize(ti, TLBINV_ALLUSER); 593 break; 594 case TLBINV_ALLKERNEL: 595 /* 596 * We need to invalidate all global TLB entries. 597 */ 598 pmap_tlb_asid_check(); 599 tlb_invalidate_globals(); 600 pmap_tlb_asid_check(); 601 break; 602 case TLBINV_ALL: 603 /* 604 * Flush all the TLB entries (user and kernel). 605 */ 606 pmap_tlb_asid_reinitialize(ti, TLBINV_ALL); 607 break; 608 case TLBINV_NOBODY: 609 /* 610 * Might be spurious or another SMT CPU sharing this TLB 611 * could have already done the work. 612 */ 613 break; 614 } 615 616 /* 617 * Indicate we are done with shutdown event. 618 */ 619 ti->ti_victim = NULL; 620 ti->ti_tlbinvop = TLBINV_NOBODY; 621 TLBINFO_UNLOCK(ti); 622 } 623 624 /* 625 * This state machine could be encoded into an array of integers but since all 626 * the values fit in 3 bits, the 5 entry "table" fits in a 16 bit value which 627 * can be loaded in a single instruction. 628 */ 629 #define TLBINV_MAP(op, nobody, one, alluser, allkernel, all) \ 630 (((( (nobody) << 3*TLBINV_NOBODY) \ 631 | ( (one) << 3*TLBINV_ONE) \ 632 | ( (alluser) << 3*TLBINV_ALLUSER) \ 633 | ((allkernel) << 3*TLBINV_ALLKERNEL) \ 634 | ( (all) << 3*TLBINV_ALL)) >> 3*(op)) & 7) 635 636 #define TLBINV_USER_MAP(op) \ 637 TLBINV_MAP(op, TLBINV_ONE, TLBINV_ALLUSER, TLBINV_ALLUSER, \ 638 TLBINV_ALL, TLBINV_ALL) 639 640 #define TLBINV_KERNEL_MAP(op) \ 641 TLBINV_MAP(op, TLBINV_ALLKERNEL, TLBINV_ALL, TLBINV_ALL, \ 642 TLBINV_ALLKERNEL, TLBINV_ALL) 643 644 bool 645 pmap_tlb_shootdown_bystanders(pmap_t pm) 646 { 647 /* 648 * We don't need to deal with our own TLB. 649 */ 650 651 UVMHIST_FUNC(__func__); 652 UVMHIST_CALLARGS(maphist, "pm %#jx", (uintptr_t)pm, 0, 0, 0); 653 654 const struct cpu_info * const ci = curcpu(); 655 kcpuset_t *pm_active = ci->ci_shootdowncpus; 656 kcpuset_copy(pm_active, pm->pm_active); 657 kcpuset_remove(pm_active, cpu_tlb_info(curcpu())->ti_kcpuset); 658 const bool kernel_p = (pm == pmap_kernel()); 659 bool ipi_sent = false; 660 661 /* 662 * If pm_active gets more bits set, then it's after all our changes 663 * have been made so they will already be cognizant of them. 664 */ 665 666 for (size_t i = 0; !kcpuset_iszero(pm_active); i++) { 667 KASSERT(i < pmap_ntlbs); 668 struct pmap_tlb_info * const ti = pmap_tlbs[i]; 669 KASSERT(tlbinfo_index(ti) == i); 670 /* 671 * Skip this TLB if there are no active mappings for it. 672 */ 673 if (!kcpuset_intersecting_p(pm_active, ti->ti_kcpuset)) 674 continue; 675 struct pmap_asid_info * const pai = PMAP_PAI(pm, ti); 676 kcpuset_remove(pm_active, ti->ti_kcpuset); 677 TLBINFO_LOCK(ti); 678 cpuid_t j = kcpuset_ffs_intersecting(pm->pm_onproc, 679 ti->ti_kcpuset); 680 // post decrement since ffs returns bit + 1 or 0 if no bit 681 if (j-- > 0) { 682 if (kernel_p) { 683 ti->ti_tlbinvop = 684 TLBINV_KERNEL_MAP(ti->ti_tlbinvop); 685 ti->ti_victim = NULL; 686 } else { 687 KASSERT(pai->pai_asid); 688 if (__predict_false(ti->ti_victim == pm)) { 689 KASSERT(ti->ti_tlbinvop == TLBINV_ONE); 690 /* 691 * We still need to invalidate this one 692 * ASID so there's nothing to change. 693 */ 694 } else { 695 ti->ti_tlbinvop = 696 TLBINV_USER_MAP(ti->ti_tlbinvop); 697 if (ti->ti_tlbinvop == TLBINV_ONE) 698 ti->ti_victim = pm; 699 else 700 ti->ti_victim = NULL; 701 } 702 } 703 TLBINFO_UNLOCK(ti); 704 /* 705 * Now we can send out the shootdown IPIs to a CPU 706 * that shares this TLB and is currently using this 707 * pmap. That CPU will process the IPI and do the 708 * all the work. Any other CPUs sharing that TLB 709 * will take advantage of that work. pm_onproc might 710 * change now that we have released the lock but we 711 * can tolerate spurious shootdowns. 712 */ 713 cpu_send_ipi(cpu_lookup(j), IPI_SHOOTDOWN); 714 ipi_sent = true; 715 continue; 716 } 717 if (!pmap_tlb_intersecting_active_p(pm, ti)) { 718 /* 719 * If this pmap has an ASID assigned but it's not 720 * currently running, nuke its ASID. Next time the 721 * pmap is activated, it will allocate a new ASID. 722 * And best of all, we avoid an IPI. 723 */ 724 KASSERT(!kernel_p); 725 pmap_tlb_pai_reset(ti, pai, pm); 726 //ti->ti_evcnt_lazy_shots.ev_count++; 727 } 728 TLBINFO_UNLOCK(ti); 729 } 730 731 UVMHIST_LOG(maphist, " <-- done (ipi_sent=%jd)", ipi_sent, 0, 0, 0); 732 733 return ipi_sent; 734 } 735 #endif /* MULTIPROCESSOR && PMAP_TLB_NEED_SHOOTDOWN */ 736 737 #ifndef PMAP_HWPAGEWALKER 738 int 739 pmap_tlb_update_addr(pmap_t pm, vaddr_t va, pt_entry_t pte, u_int flags) 740 { 741 struct pmap_tlb_info * const ti = cpu_tlb_info(curcpu()); 742 struct pmap_asid_info * const pai = PMAP_PAI(pm, ti); 743 int rv = -1; 744 745 UVMHIST_FUNC(__func__); 746 UVMHIST_CALLARGS(maphist, " (pm=%#jx va=%#jx, pte=%#jx flags=%#jx)", 747 (uintptr_t)pm, va, pte_value(pte), flags); 748 749 KASSERT(kpreempt_disabled()); 750 751 KASSERTMSG(pte_valid_p(pte), "va %#"PRIxVADDR" %#"PRIxPTE, 752 va, pte_value(pte)); 753 754 TLBINFO_LOCK(ti); 755 if (pm == pmap_kernel() || PMAP_PAI_ASIDVALID_P(pai, ti)) { 756 pmap_tlb_asid_check(); 757 rv = tlb_update_addr(va, pai->pai_asid, pte, 758 (flags & PMAP_TLB_INSERT) != 0); 759 pmap_tlb_asid_check(); 760 UVMHIST_LOG(maphist, 761 " %jd <-- tlb_update_addr(%#jx, %#jx, %#jx, ...)", 762 rv, va, pai->pai_asid, pte_value(pte)); 763 KASSERTMSG((flags & PMAP_TLB_INSERT) == 0 || rv == 1, 764 "pmap %p (asid %u) va %#"PRIxVADDR" pte %#"PRIxPTE" rv %d", 765 pm, pai->pai_asid, va, pte_value(pte), rv); 766 } 767 #if defined(MULTIPROCESSOR) && defined(PMAP_TLB_NEED_SHOOTDOWN) 768 if (flags & PMAP_TLB_NEED_IPI) 769 pm->pm_shootdown_pending = 1; 770 #endif 771 TLBINFO_UNLOCK(ti); 772 773 UVMHIST_LOG(maphist, " <-- done (rv=%jd)", rv, 0, 0, 0); 774 775 return rv; 776 } 777 #endif /* !PMAP_HWPAGEWALKER */ 778 779 void 780 pmap_tlb_invalidate_addr(pmap_t pm, vaddr_t va) 781 { 782 struct pmap_tlb_info * const ti = cpu_tlb_info(curcpu()); 783 struct pmap_asid_info * const pai = PMAP_PAI(pm, ti); 784 785 UVMHIST_FUNC(__func__); 786 UVMHIST_CALLARGS(maphist, " (pm=%#jx va=%#jx) ti=%#jx asid=%#jx", 787 (uintptr_t)pm, va, (uintptr_t)ti, pai->pai_asid); 788 789 KASSERT(kpreempt_disabled()); 790 791 TLBINFO_LOCK(ti); 792 if (pm == pmap_kernel() || PMAP_PAI_ASIDVALID_P(pai, ti)) { 793 pmap_tlb_asid_check(); 794 UVMHIST_LOG(maphist, " invalidating %#jx asid %#jx", 795 va, pai->pai_asid, 0, 0); 796 tlb_invalidate_addr(va, pai->pai_asid); 797 pmap_tlb_asid_check(); 798 } 799 #if defined(MULTIPROCESSOR) && defined(PMAP_TLB_NEED_SHOOTDOWN) 800 pm->pm_shootdown_pending = 1; 801 #endif 802 TLBINFO_UNLOCK(ti); 803 UVMHIST_LOG(maphist, " <-- done", 0, 0, 0, 0); 804 } 805 806 static inline void 807 pmap_tlb_asid_alloc(struct pmap_tlb_info *ti, pmap_t pm, 808 struct pmap_asid_info *pai) 809 { 810 /* 811 * We shouldn't have an ASID assigned, and thusly must not be onproc 812 * nor active. 813 */ 814 KASSERT(pm != pmap_kernel()); 815 KASSERT(pai->pai_asid == 0); 816 KASSERT(pai->pai_link.le_prev == NULL); 817 #if defined(MULTIPROCESSOR) 818 KASSERT(!pmap_tlb_intersecting_onproc_p(pm, ti)); 819 KASSERT(!pmap_tlb_intersecting_active_p(pm, ti)); 820 #endif 821 KASSERT(ti->ti_asids_free > 0); 822 KASSERT(ti->ti_asid_hint > KERNEL_PID); 823 824 /* 825 * If the last ASID allocated was the maximum ASID, then the 826 * hint will be out of range. Reset the hint to first 827 * available ASID. 828 */ 829 if (PMAP_TLB_FLUSH_ASID_ON_RESET 830 && ti->ti_asid_hint > ti->ti_asid_max) { 831 ti->ti_asid_hint = KERNEL_PID + 1; 832 } 833 KASSERTMSG(ti->ti_asid_hint <= ti->ti_asid_max, "hint %u", 834 ti->ti_asid_hint); 835 836 /* 837 * Let's see if the hinted ASID is free. If not search for 838 * a new one. 839 */ 840 if (__predict_true(TLBINFO_ASID_INUSE_P(ti, ti->ti_asid_hint))) { 841 const size_t nbpw = NBBY * sizeof(ti->ti_asid_bitmap._b[0]); 842 size_t i; 843 u_long bits; 844 for (i = 0; (bits = ~ti->ti_asid_bitmap._b[i]) == 0; i++) { 845 KASSERT(i < __arraycount(ti->ti_asid_bitmap._b) - 1); 846 } 847 /* 848 * ffs wants to find the first bit set while we want 849 * to find the first bit cleared. 850 */ 851 const u_int n = __builtin_ffsl(bits) - 1; 852 KASSERTMSG((bits << (nbpw - (n+1))) == (1ul << (nbpw-1)), 853 "n %u bits %#lx", n, bits); 854 KASSERT(n < nbpw); 855 ti->ti_asid_hint = n + i * nbpw; 856 } 857 858 KASSERT(ti->ti_asid_hint > KERNEL_PID); 859 KASSERT(ti->ti_asid_hint <= ti->ti_asid_max); 860 KASSERTMSG(PMAP_TLB_FLUSH_ASID_ON_RESET 861 || TLBINFO_ASID_INUSE_P(ti, ti->ti_asid_hint - 1), 862 "hint %u bitmap %p", ti->ti_asid_hint, &ti->ti_asid_bitmap); 863 KASSERTMSG(!TLBINFO_ASID_INUSE_P(ti, ti->ti_asid_hint), 864 "hint %u bitmap %p", ti->ti_asid_hint, &ti->ti_asid_bitmap); 865 866 /* 867 * The hint contains our next ASID so take it and advance the hint. 868 * Mark it as used and insert the pai into the list of active asids. 869 * There is also one less asid free in this TLB. 870 */ 871 KASSERT(ti->ti_asid_hint > KERNEL_PID); 872 pai->pai_asid = ti->ti_asid_hint++; 873 #ifdef MULTIPROCESSOR 874 if (PMAP_TLB_FLUSH_ASID_ON_RESET) { 875 /* 876 * Clean the new ASID from the TLB. 877 */ 878 tlb_invalidate_asids(pai->pai_asid, pai->pai_asid); 879 } 880 #endif 881 TLBINFO_ASID_MARK_USED(ti, pai->pai_asid); 882 LIST_INSERT_HEAD(&ti->ti_pais, pai, pai_link); 883 ti->ti_asids_free--; 884 885 #if defined(MULTIPROCESSOR) 886 /* 887 * Mark that we now have an active ASID for all CPUs sharing this TLB. 888 * The bits in pm_active belonging to this TLB can only be changed 889 * while this TLBs lock is held. 890 */ 891 #if PMAP_TLB_MAX == 1 892 kcpuset_copy(pm->pm_active, kcpuset_running); 893 #else 894 kcpuset_merge(pm->pm_active, ti->ti_kcpuset); 895 #endif 896 #endif 897 } 898 899 /* 900 * Acquire a TLB address space tag (called ASID or TLBPID) and return it. 901 * ASID might have already been previously acquired. 902 */ 903 void 904 pmap_tlb_asid_acquire(pmap_t pm, struct lwp *l) 905 { 906 struct cpu_info * const ci = l->l_cpu; 907 struct pmap_tlb_info * const ti = cpu_tlb_info(ci); 908 struct pmap_asid_info * const pai = PMAP_PAI(pm, ti); 909 910 UVMHIST_FUNC(__func__); 911 UVMHIST_CALLARGS(maphist, "(pm=%#jx, l=%#jx, ti=%#jx)", (uintptr_t)pm, 912 (uintptr_t)l, (uintptr_t)ti, 0); 913 914 KASSERT(kpreempt_disabled()); 915 916 /* 917 * Kernels use a fixed ASID and thus doesn't need to acquire one. 918 */ 919 if (pm == pmap_kernel()) { 920 UVMHIST_LOG(maphist, " <-- done (kernel)", 0, 0, 0, 0); 921 return; 922 } 923 924 TLBINFO_LOCK(ti); 925 KASSERT(pai->pai_asid <= KERNEL_PID || pai->pai_link.le_prev != NULL); 926 KASSERT(pai->pai_asid > KERNEL_PID || pai->pai_link.le_prev == NULL); 927 pmap_tlb_pai_check(ti, true); 928 if (__predict_false(!PMAP_PAI_ASIDVALID_P(pai, ti))) { 929 /* 930 * If we've run out ASIDs, reinitialize the ASID space. 931 */ 932 if (__predict_false(tlbinfo_noasids_p(ti))) { 933 KASSERT(l == curlwp); 934 UVMHIST_LOG(maphist, " asid reinit", 0, 0, 0, 0); 935 pmap_tlb_asid_reinitialize(ti, TLBINV_NOBODY); 936 KASSERT(!tlbinfo_noasids_p(ti)); 937 } 938 939 /* 940 * Get an ASID. 941 */ 942 pmap_tlb_asid_alloc(ti, pm, pai); 943 UVMHIST_LOG(maphist, "allocated asid %#jx", pai->pai_asid, 944 0, 0, 0); 945 } 946 pmap_tlb_pai_check(ti, true); 947 #if defined(MULTIPROCESSOR) 948 KASSERT(kcpuset_isset(pm->pm_active, cpu_index(ci))); 949 #endif 950 951 if (l == curlwp) { 952 #if defined(MULTIPROCESSOR) 953 /* 954 * The bits in pm_onproc belonging to this TLB can only 955 * be changed while this TLBs lock is held unless atomic 956 * operations are used. 957 */ 958 KASSERT(pm != pmap_kernel()); 959 kcpuset_atomic_set(pm->pm_onproc, cpu_index(ci)); 960 #endif 961 ci->ci_pmap_asid_cur = pai->pai_asid; 962 UVMHIST_LOG(maphist, "setting asid to %#jx", pai->pai_asid, 963 0, 0, 0); 964 tlb_set_asid(pai->pai_asid); 965 pmap_tlb_asid_check(); 966 } else { 967 printf("%s: l (%p) != curlwp %p\n", __func__, l, curlwp); 968 } 969 TLBINFO_UNLOCK(ti); 970 UVMHIST_LOG(maphist, " <-- done", 0, 0, 0, 0); 971 } 972 973 void 974 pmap_tlb_asid_deactivate(pmap_t pm) 975 { 976 UVMHIST_FUNC(__func__); 977 UVMHIST_CALLARGS(maphist, "pm %#jx", (uintptr_t)pm, 0, 0, 0); 978 979 KASSERT(kpreempt_disabled()); 980 #if defined(MULTIPROCESSOR) 981 /* 982 * The kernel pmap is aways onproc and active and must never have 983 * those bits cleared. If pmap_remove_all was called, it has already 984 * deactivated the pmap and thusly onproc will be 0 so there's nothing 985 * to do. 986 */ 987 if (pm != pmap_kernel() && !kcpuset_iszero(pm->pm_onproc)) { 988 struct cpu_info * const ci = curcpu(); 989 KASSERT(!cpu_intr_p()); 990 KASSERTMSG(kcpuset_isset(pm->pm_onproc, cpu_index(ci)), 991 "%s: pmap %p onproc %p doesn't include cpu %d (%p)", 992 __func__, pm, pm->pm_onproc, cpu_index(ci), ci); 993 /* 994 * The bits in pm_onproc that belong to this TLB can 995 * be changed while this TLBs lock is not held as long 996 * as we use atomic ops. 997 */ 998 kcpuset_atomic_clear(pm->pm_onproc, cpu_index(ci)); 999 } 1000 #endif 1001 curcpu()->ci_pmap_asid_cur = KERNEL_PID; 1002 tlb_set_asid(KERNEL_PID); 1003 1004 pmap_tlb_pai_check(cpu_tlb_info(curcpu()), false); 1005 #if defined(DEBUG) 1006 pmap_tlb_asid_check(); 1007 #endif 1008 UVMHIST_LOG(maphist, " <-- done (pm=%#jx)", (uintptr_t)pm, 0, 0, 0); 1009 } 1010 1011 void 1012 pmap_tlb_asid_release_all(struct pmap *pm) 1013 { 1014 UVMHIST_FUNC(__func__); 1015 UVMHIST_CALLARGS(maphist, "(pm=%#jx)", (uintptr_t)pm, 0, 0, 0); 1016 1017 KASSERT(pm != pmap_kernel()); 1018 #if defined(MULTIPROCESSOR) 1019 //KASSERT(!kcpuset_iszero(pm->pm_onproc)); // XXX 1020 struct cpu_info * const ci __diagused = curcpu(); 1021 KASSERT(!kcpuset_isotherset(pm->pm_onproc, cpu_index(ci))); 1022 #if PMAP_TLB_MAX > 1 1023 for (u_int i = 0; !kcpuset_iszero(pm->pm_active); i++) { 1024 KASSERT(i < pmap_ntlbs); 1025 struct pmap_tlb_info * const ti = pmap_tlbs[i]; 1026 #else 1027 struct pmap_tlb_info * const ti = &pmap_tlb0_info; 1028 #endif 1029 struct pmap_asid_info * const pai = PMAP_PAI(pm, ti); 1030 TLBINFO_LOCK(ti); 1031 if (PMAP_PAI_ASIDVALID_P(pai, ti)) { 1032 /* 1033 * This pmap should not be in use by any other cpu so 1034 * we can just reset and be happy. 1035 */ 1036 if (ti->ti_victim == pm) 1037 ti->ti_victim = NULL; 1038 pmap_tlb_pai_reset(ti, pai, pm); 1039 } 1040 KASSERT(pai->pai_link.le_prev == NULL); 1041 TLBINFO_UNLOCK(ti); 1042 #if PMAP_TLB_MAX > 1 1043 } 1044 #endif 1045 #ifdef DIAGNOSTIC 1046 for (size_t i = 0; i < (PMAP_TLB_MAX > 1 ? pmap_ntlbs : 1); i++) { 1047 KASSERTMSG(pm->pm_pai[i].pai_asid == 0, 1048 "pm %p i %zu asid %u", 1049 pm, i, pm->pm_pai[i].pai_asid); 1050 } 1051 #endif 1052 #else 1053 /* 1054 * Handle the case of an UP kernel which only has, at most, one TLB. 1055 * If the pmap has an ASID allocated, free it. 1056 */ 1057 struct pmap_tlb_info * const ti = &pmap_tlb0_info; 1058 struct pmap_asid_info * const pai = PMAP_PAI(pm, ti); 1059 TLBINFO_LOCK(ti); 1060 if (pai->pai_asid > KERNEL_PID) { 1061 if (curcpu()->ci_pmap_asid_cur == pai->pai_asid) { 1062 tlb_invalidate_asids(pai->pai_asid, pai->pai_asid); 1063 } else { 1064 pmap_tlb_pai_reset(ti, pai, pm); 1065 } 1066 } 1067 TLBINFO_UNLOCK(ti); 1068 #endif /* MULTIPROCESSOR */ 1069 UVMHIST_LOG(maphist, " <-- done", 0, 0, 0, 0); 1070 } 1071 1072 void 1073 pmap_tlb_asid_check(void) 1074 { 1075 #ifdef DEBUG 1076 kpreempt_disable(); 1077 const tlb_asid_t asid __debugused = tlb_get_asid(); 1078 KDASSERTMSG(asid == curcpu()->ci_pmap_asid_cur, 1079 "%s: asid (%#x) != current asid (%#x)", 1080 __func__, asid, curcpu()->ci_pmap_asid_cur); 1081 kpreempt_enable(); 1082 #endif 1083 } 1084 1085 #ifdef DEBUG 1086 void 1087 pmap_tlb_check(pmap_t pm, bool (*func)(void *, vaddr_t, tlb_asid_t, pt_entry_t)) 1088 { 1089 struct pmap_tlb_info * const ti = cpu_tlb_info(curcpu()); 1090 struct pmap_asid_info * const pai = PMAP_PAI(pm, ti); 1091 TLBINFO_LOCK(ti); 1092 if (pm == pmap_kernel() || pai->pai_asid > KERNEL_PID) 1093 tlb_walk(pm, func); 1094 TLBINFO_UNLOCK(ti); 1095 } 1096 #endif /* DEBUG */ 1097