1 /* $NetBSD: pmap_tlb.c,v 1.1 2012/10/03 00:51:47 christos Exp $ */ 2 3 /*- 4 * Copyright (c) 2010 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Matt Thomas at 3am Software Foundry. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 34 __KERNEL_RCSID(0, "$NetBSD: pmap_tlb.c,v 1.1 2012/10/03 00:51:47 christos Exp $"); 35 36 /* 37 * Manages address spaces in a TLB. 38 * 39 * Normally there is a 1:1 mapping between a TLB and a CPU. However, some 40 * implementations may share a TLB between multiple CPUs (really CPU thread 41 * contexts). This requires the TLB abstraction to be separated from the 42 * CPU abstraction. It also requires that the TLB be locked while doing 43 * TLB activities. 44 * 45 * For each TLB, we track the ASIDs in use in a bitmap and a list of pmaps 46 * that have a valid ASID. 47 * 48 * We allocate ASIDs in increasing order until we have exhausted the supply, 49 * then reinitialize the ASID space, and start allocating again at 1. When 50 * allocating from the ASID bitmap, we skip any ASID who has a corresponding 51 * bit set in the ASID bitmap. Eventually this causes the ASID bitmap to fill 52 * and, when completely filled, a reinitialization of the ASID space. 53 * 54 * To reinitialize the ASID space, the ASID bitmap is reset and then the ASIDs 55 * of non-kernel TLB entries get recorded in the ASID bitmap. If the entries 56 * in TLB consume more than half of the ASID space, all ASIDs are invalidated, 57 * the ASID bitmap is recleared, and the list of pmaps is emptied. Otherwise, 58 * (the normal case), any ASID present in the TLB (even those which are no 59 * longer used by a pmap) will remain active (allocated) and all other ASIDs 60 * will be freed. If the size of the TLB is much smaller than the ASID space, 61 * this algorithm completely avoids TLB invalidation. 62 * 63 * For multiprocessors, we also have to deal TLB invalidation requests from 64 * other CPUs, some of which are dealt with the reinitialization of the ASID 65 * space. Whereas above we keep the ASIDs of those pmaps which have active 66 * TLB entries, this type of reinitialization preserves the ASIDs of any 67 * "onproc" user pmap and all other ASIDs will be freed. We must do this 68 * since we can't change the current ASID. 69 * 70 * Each pmap has two bitmaps: pm_active and pm_onproc. Each bit in pm_active 71 * indicates whether that pmap has an allocated ASID for a CPU. Each bit in 72 * pm_onproc indicates that pmap's ASID is active (equal to the ASID in COP 0 73 * register EntryHi) on a CPU. The bit number comes from the CPU's cpu_index(). 74 * Even though these bitmaps contain the bits for all CPUs, the bits that 75 * correspond to the bits belonging to the CPUs sharing a TLB can only be 76 * manipulated while holding that TLB's lock. Atomic ops must be used to 77 * update them since multiple CPUs may be changing different sets of bits at 78 * same time but these sets never overlap. 79 * 80 * When a change to the local TLB may require a change in the TLB's of other 81 * CPUs, we try to avoid sending an IPI if at all possible. For instance, if 82 * we are updating a PTE and that PTE previously was invalid and therefore 83 * couldn't support an active mapping, there's no need for an IPI since there 84 * can't be a TLB entry to invalidate. The other case is when we change a PTE 85 * to be modified we just update the local TLB. If another TLB has a stale 86 * entry, a TLB MOD exception will be raised and that will cause the local TLB 87 * to be updated. 88 * 89 * We never need to update a non-local TLB if the pmap doesn't have a valid 90 * ASID for that TLB. If it does have a valid ASID but isn't current "onproc" 91 * we simply reset its ASID for that TLB and then when it goes "onproc" it 92 * will allocate a new ASID and any existing TLB entries will be orphaned. 93 * Only in the case that pmap has an "onproc" ASID do we actually have to send 94 * an IPI. 95 * 96 * Once we determined we must send an IPI to shootdown a TLB, we need to send 97 * it to one of CPUs that share that TLB. We choose the lowest numbered CPU 98 * that has one of the pmap's ASID "onproc". In reality, any CPU sharing that 99 * TLB would do, but interrupting an active CPU seems best. 100 * 101 * A TLB might have multiple shootdowns active concurrently. The shootdown 102 * logic compresses these into a few cases: 103 * 0) nobody needs to have its TLB entries invalidated 104 * 1) one ASID needs to have its TLB entries invalidated 105 * 2) more than one ASID needs to have its TLB entries invalidated 106 * 3) the kernel needs to have its TLB entries invalidated 107 * 4) the kernel and one or more ASID need their TLB entries invalidated. 108 * 109 * And for each case we do: 110 * 0) nothing, 111 * 1) if that ASID is still "onproc", we invalidate the TLB entries for 112 * that single ASID. If not, just reset the pmap's ASID to invalidate 113 * and let it allocate a new ASID the next time it goes "onproc", 114 * 2) we reinitialize the ASID space (preserving any "onproc" ASIDs) and 115 * invalidate all non-wired non-global TLB entries, 116 * 3) we invalidate all of the non-wired global TLB entries, 117 * 4) we reinitialize the ASID space (again preserving any "onproc" ASIDs) 118 * invalidate all non-wired TLB entries. 119 * 120 * As you can see, shootdowns are not concerned with addresses, just address 121 * spaces. Since the number of TLB entries is usually quite small, this avoids 122 * a lot of overhead for not much gain. 123 */ 124 125 #define __PMAP_PRIVATE 126 127 #include "opt_multiprocessor.h" 128 129 #include <sys/param.h> 130 #include <sys/systm.h> 131 #include <sys/proc.h> 132 #include <sys/mutex.h> 133 #include <sys/atomic.h> 134 #include <sys/kernel.h> /* for cold */ 135 #include <sys/cpu.h> 136 137 #include <uvm/uvm.h> 138 139 static kmutex_t pmap_tlb0_mutex __cacheline_aligned; 140 141 #define IFCONSTANT(x) (__builtin_constant_p((x)) ? (x) : 0) 142 143 struct pmap_tlb_info pmap_tlb0_info = { 144 .ti_name = "tlb0", 145 .ti_asid_hint = KERNEL_PID + 1, 146 #ifdef PMAP_TLB_NUM_PIDS 147 .ti_asid_max = IFCONSTANT(PMAP_TLB_NUM_PIDS - 1), 148 .ti_asids_free = IFCONSTANT(PMAP_TLB_NUM_PIDS - (KERNEL_PID + 1)), 149 #endif 150 .ti_asid_bitmap[0] = (2 << KERNEL_PID) - 1, 151 #ifdef PMAP_TLB_WIRED_UPAGES 152 .ti_wired = PMAP_TLB_WIRED_UPAGES, 153 #endif 154 .ti_lock = &pmap_tlb0_mutex, 155 .ti_pais = LIST_HEAD_INITIALIZER(pmap_tlb0_info.ti_pais), 156 #if defined(MULTIPROCESSOR) 157 .ti_cpu_mask = 1, 158 .ti_tlbinvop = TLBINV_NOBODY, 159 #endif 160 }; 161 162 #undef IFCONSTANT 163 164 #if defined(MULTIPROCESSOR) 165 struct pmap_tlb_info *pmap_tlbs[MAXCPUS] = { 166 [0] = &pmap_tlb0_info, 167 }; 168 u_int pmap_ntlbs = 1; 169 #endif 170 171 #define __BITMAP_SET(bm, n) \ 172 ((bm)[(n) / (8*sizeof(bm[0]))] |= 1LU << ((n) % (8*sizeof(bm[0])))) 173 #define __BITMAP_CLR(bm, n) \ 174 ((bm)[(n) / (8*sizeof(bm[0]))] &= ~(1LU << ((n) % (8*sizeof(bm[0]))))) 175 #define __BITMAP_ISSET_P(bm, n) \ 176 (((bm)[(n) / (8*sizeof(bm[0]))] & (1LU << ((n) % (8*sizeof(bm[0]))))) != 0) 177 178 #define TLBINFO_ASID_MARK_USED(ti, asid) \ 179 __BITMAP_SET((ti)->ti_asid_bitmap, (asid)) 180 #define TLBINFO_ASID_INUSE_P(ti, asid) \ 181 __BITMAP_ISSET_P((ti)->ti_asid_bitmap, (asid)) 182 183 static void 184 pmap_pai_check(struct pmap_tlb_info *ti) 185 { 186 #ifdef DIAGNOSTIC 187 struct pmap_asid_info *pai; 188 LIST_FOREACH(pai, &ti->ti_pais, pai_link) { 189 KASSERT(pai != NULL); 190 KASSERT(PAI_PMAP(pai, ti) != pmap_kernel()); 191 KASSERT(pai->pai_asid > KERNEL_PID); 192 KASSERT(TLBINFO_ASID_INUSE_P(ti, pai->pai_asid)); 193 } 194 #endif 195 } 196 197 static inline void 198 pmap_pai_reset(struct pmap_tlb_info *ti, struct pmap_asid_info *pai, 199 struct pmap *pm) 200 { 201 /* 202 * We must have an ASID but it must not be onproc (on a processor). 203 */ 204 KASSERT(pai->pai_asid > KERNEL_PID); 205 #if defined(MULTIPROCESSOR) 206 KASSERT((pm->pm_onproc & ti->ti_cpu_mask) == 0); 207 #endif 208 LIST_REMOVE(pai, pai_link); 209 #ifdef DIAGNOSTIC 210 pai->pai_link.le_prev = NULL; /* tagged as unlinked */ 211 #endif 212 /* 213 * Note that we don't mark the ASID as not in use in the TLB's ASID 214 * bitmap (thus it can't be allocated until the ASID space is exhausted 215 * and therefore reinitialized). We don't want to flush the TLB for 216 * entries belonging to this ASID so we will let natural TLB entry 217 * replacement flush them out of the TLB. Any new entries for this 218 * pmap will need a new ASID allocated. 219 */ 220 pai->pai_asid = 0; 221 222 #if defined(MULTIPROCESSOR) 223 /* 224 * The bits in pm_active belonging to this TLB can only be changed 225 * while this TLB's lock is held. 226 */ 227 CPUSET_DELSET(pm->pm_active, ti->ti_cpu_mask); 228 #endif /* MULTIPROCESSOR */ 229 } 230 231 void 232 pmap_tlb_info_evcnt_attach(struct pmap_tlb_info *ti) 233 { 234 #if defined(MULTIPROCESSOR) 235 evcnt_attach_dynamic_nozero(&ti->ti_evcnt_synci_desired, 236 EVCNT_TYPE_MISC, NULL, 237 ti->ti_name, "icache syncs desired"); 238 evcnt_attach_dynamic_nozero(&ti->ti_evcnt_synci_asts, 239 EVCNT_TYPE_MISC, &ti->ti_evcnt_synci_desired, 240 ti->ti_name, "icache sync asts"); 241 evcnt_attach_dynamic_nozero(&ti->ti_evcnt_synci_all, 242 EVCNT_TYPE_MISC, &ti->ti_evcnt_synci_asts, 243 ti->ti_name, "icache full syncs"); 244 evcnt_attach_dynamic_nozero(&ti->ti_evcnt_synci_pages, 245 EVCNT_TYPE_MISC, &ti->ti_evcnt_synci_asts, 246 ti->ti_name, "icache pages synced"); 247 evcnt_attach_dynamic_nozero(&ti->ti_evcnt_synci_duplicate, 248 EVCNT_TYPE_MISC, &ti->ti_evcnt_synci_desired, 249 ti->ti_name, "icache dup pages skipped"); 250 evcnt_attach_dynamic_nozero(&ti->ti_evcnt_synci_deferred, 251 EVCNT_TYPE_MISC, &ti->ti_evcnt_synci_desired, 252 ti->ti_name, "icache pages deferred"); 253 #endif /* MULTIPROCESSOR */ 254 evcnt_attach_dynamic_nozero(&ti->ti_evcnt_asid_reinits, 255 EVCNT_TYPE_MISC, NULL, 256 ti->ti_name, "asid pool reinit"); 257 } 258 259 void 260 pmap_tlb_info_init(struct pmap_tlb_info *ti) 261 { 262 #if defined(MULTIPROCESSOR) 263 if (ti != &pmap_tlb0_info) { 264 265 KASSERT(pmap_tlbs[pmap_ntlbs] == NULL); 266 267 ti->ti_lock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_SCHED); 268 ti->ti_asid_bitmap[0] = (2 << KERNEL_PID) - 1; 269 ti->ti_asid_hint = KERNEL_PID + 1; 270 ti->ti_asid_max = pmap_tlbs[0]->ti_asid_max; 271 ti->ti_asids_free = ti->ti_asid_max - KERNEL_PID; 272 ti->ti_tlbinvop = TLBINV_NOBODY, 273 ti->ti_victim = NULL; 274 ti->ti_cpu_mask = 0; 275 ti->ti_index = pmap_ntlbs++; 276 ti->ti_wired = 0; 277 pmap_tlbs[ti->ti_index] = ti; 278 snprintf(ti->ti_name, sizeof(ti->ti_name), "tlb%u", 279 ti->ti_index); 280 pmap_tlb_info_evcnt_attach(ti); 281 return; 282 } 283 #endif /* MULTIPROCESSOR */ 284 KASSERT(ti == &pmap_tlb0_info); 285 mutex_init(ti->ti_lock, MUTEX_DEFAULT, IPL_SCHED); 286 if (ti->ti_asid_max == 0) { 287 ti->ti_asid_max = pmap_md_tlb_asid_max(); 288 ti->ti_asids_free = ti->ti_asid_max - (KERNEL_PID + 1); 289 } 290 291 KASSERT(ti->ti_asid_max < sizeof(ti->ti_asid_bitmap)*8); 292 } 293 294 #if defined(MULTIPROCESSOR) 295 void 296 pmap_tlb_info_attach(struct pmap_tlb_info *ti, struct cpu_info *ci) 297 { 298 KASSERT(!CPU_IS_PRIMARY(ci)); 299 KASSERT(ci->ci_data.cpu_idlelwp != NULL); 300 KASSERT(cold); 301 302 TLBINFO_LOCK(ti); 303 const __cpuset_t cpu_mask = CPUSET_SINGLE(cpu_index(ci)); 304 CPUSET_ADDSET(ti->ti_cpu_mask, cpu_mask); 305 ci->ci_tlb_info = ti; 306 307 /* 308 * Do any MD tlb info init. 309 */ 310 pmap_md_tlb_info_attach(ti, ci); 311 312 /* 313 * Mark the kernel as active and "onproc" for this cpu. We assume 314 * we are the only CPU running so atomic ops are not needed. 315 */ 316 CPUSET_ADDSET(pmap_kernel()->pm_active, cpu_mask); 317 CPUSET_ADDSET(pmap_kernel()->pm_onproc, cpu_mask); 318 TLBINFO_UNLOCK(ti); 319 } 320 #endif /* MULTIPROCESSOR */ 321 322 #ifdef DIAGNOSTIC 323 static size_t 324 pmap_tlb_asid_count(struct pmap_tlb_info *ti) 325 { 326 size_t count = 0; 327 for (tlb_asid_t asid = 1; asid <= ti->ti_asid_max; asid++) { 328 count += TLBINFO_ASID_INUSE_P(ti, asid); 329 } 330 return count; 331 } 332 #endif 333 334 static void 335 pmap_tlb_asid_reinitialize(struct pmap_tlb_info *ti, enum tlb_invalidate_op op) 336 { 337 const size_t asid_bitmap_words = 338 ti->ti_asid_max / (8 * sizeof(ti->ti_asid_bitmap[0])); 339 340 pmap_pai_check(ti); 341 342 /* 343 * First, clear the ASID bitmap (except for ASID 0 which belongs 344 * to the kernel). 345 */ 346 ti->ti_asids_free = ti->ti_asid_max - KERNEL_PID; 347 ti->ti_asid_hint = KERNEL_PID + 1; 348 ti->ti_asid_bitmap[0] = (2 << KERNEL_PID) - 1; 349 for (size_t word = 1; word <= asid_bitmap_words; word++) { 350 ti->ti_asid_bitmap[word] = 0; 351 } 352 353 switch (op) { 354 #if defined(MULTIPROCESSOR) && defined(PMAP_NEED_TLB_SHOOTDOWN) 355 case TLBINV_ALL: 356 tlb_invalidate_all(); 357 break; 358 case TLBINV_ALLUSER: 359 tlb_invalidate_asids(KERNEL_PID + 1, ti->ti_asid_max); 360 break; 361 #endif /* MULTIPROCESSOR && PMAP_NEED_TLB_SHOOTDOWN */ 362 case TLBINV_NOBODY: { 363 /* 364 * If we are just reclaiming ASIDs in the TLB, let's go find 365 * what ASIDs are in use in the TLB. Since this is a 366 * semi-expensive operation, we don't want to do it too often. 367 * So if more half of the ASIDs are in use, we don't have 368 * enough free ASIDs so invalidate the TLB entries with ASIDs 369 * and clear the ASID bitmap. That will force everyone to 370 * allocate a new ASID. 371 */ 372 #if !defined(MULTIPROCESSOR) || defined(PMAP_NEED_TLB_SHOOTDOWN) 373 pmap_tlb_asid_check(); 374 const u_int asids_found = tlb_record_asids(ti->ti_asid_bitmap); 375 pmap_tlb_asid_check(); 376 KASSERT(asids_found == pmap_tlb_asid_count(ti)); 377 if (__predict_false(asids_found >= ti->ti_asid_max / 2)) { 378 tlb_invalidate_asids(KERNEL_PID + 1, ti->ti_asid_max); 379 #else /* MULTIPROCESSOR && !PMAP_NEED_TLB_SHOOTDOWN */ 380 /* 381 * For those systems (PowerPC) that don't need require 382 * cross cpu TLB shootdowns, we have to invalidate the 383 * entire TLB because we can't record the ASIDs in use 384 * on the other CPUs. This is hopefully cheaper than 385 * than trying to use an IPI to record all the ASIDs 386 * on all the CPUs (which would be a synchronization 387 * nightmare). 388 */ 389 tlb_invalidate_all(); 390 #endif /* MULTIPROCESSOR && !PMAP_NEED_TLB_SHOOTDOWN */ 391 ti->ti_asid_bitmap[0] = (2 << KERNEL_PID) - 1; 392 for (size_t word = 1; 393 word <= asid_bitmap_words; 394 word++) { 395 ti->ti_asid_bitmap[word] = 0; 396 } 397 #if !defined(MULTIPROCESSOR) || defined(PMAP_NEED_TLB_SHOOTDOWN) 398 } else { 399 ti->ti_asids_free -= asids_found; 400 } 401 #endif /* !MULTIPROCESSOR || PMAP_NEED_TLB_SHOOTDOWN */ 402 break; 403 } 404 default: 405 panic("%s: unexpected op %d", __func__, op); 406 } 407 408 /* 409 * Now go through the active ASIDs. If the ASID is on a processor or 410 * we aren't invalidating all ASIDs and the TLB has an entry owned by 411 * that ASID, mark it as in use. Otherwise release the ASID. 412 */ 413 struct pmap_asid_info *pai, *next; 414 for (pai = LIST_FIRST(&ti->ti_pais); pai != NULL; pai = next) { 415 struct pmap * const pm = PAI_PMAP(pai, ti); 416 next = LIST_NEXT(pai, pai_link); 417 KASSERT(pm != pmap_kernel()); 418 KASSERT(pai->pai_asid > KERNEL_PID); 419 #if defined(MULTIPROCESSOR) 420 if (!CPUSET_EMPTY_P(CPUSET_SUBSET(pm->pm_onproc, ti->ti_cpu_mask))) { 421 if (!TLBINFO_ASID_INUSE_P(ti, pai->pai_asid)) { 422 TLBINFO_ASID_MARK_USED(ti, pai->pai_asid); 423 ti->ti_asids_free--; 424 } 425 continue; 426 } 427 #endif /* MULTIPROCESSOR */ 428 if (TLBINFO_ASID_INUSE_P(ti, pai->pai_asid)) { 429 KASSERT(op == TLBINV_NOBODY); 430 } else { 431 pmap_pai_reset(ti, pai, pm); 432 } 433 } 434 #ifdef DIAGNOSTIC 435 size_t free_count = ti->ti_asid_max - pmap_tlb_asid_count(ti); 436 if (free_count != ti->ti_asids_free) 437 panic("%s: bitmap error: %zu != %u", 438 __func__, free_count, ti->ti_asids_free); 439 #endif 440 } 441 442 #if defined(MULTIPROCESSOR) && defined(PMAP_NEED_TLB_SHOOTDOWN) 443 void 444 pmap_tlb_shootdown_process(void) 445 { 446 struct cpu_info * const ci = curcpu(); 447 struct pmap_tlb_info * const ti = ci->ci_tlb_info; 448 #ifdef DIAGNOSTIC 449 struct pmap * const pm = curlwp->l_proc->p_vmspace->vm_map.pmap; 450 #endif 451 452 KASSERT(cpu_intr_p()); 453 KASSERTMSG(ci->ci_cpl >= IPL_SCHED, 454 "%s: cpl (%d) < IPL_SCHED (%d)", 455 __func__, ci->ci_cpl, IPL_SCHED); 456 457 TLBINFO_LOCK(ti); 458 459 switch (ti->ti_tlbinvop) { 460 case TLBINV_ONE: { 461 /* 462 * We only need to invalidate one user ASID. 463 */ 464 struct pmap_asid_info * const pai = PMAP_PAI(ti->ti_victim, ti); 465 KASSERT(ti->ti_victim != pmap_kernel()); 466 if (!CPUSET_EMPTY_P(CPUSET_SUBSET(ti->ti_victim->pm_onproc, ti->ti_cpu_mask))) { 467 /* 468 * The victim is an active pmap so we will just 469 * invalidate its TLB entries. 470 */ 471 KASSERT(pai->pai_asid > KERNEL_PID); 472 pmap_tlb_asid_check(); 473 tlb_invalidate_asids(pai->pai_asid, pai->pai_asid); 474 pmap_tlb_asid_check(); 475 } else if (pai->pai_asid) { 476 /* 477 * The victim is no longer an active pmap for this TLB. 478 * So simply clear its ASID and when pmap_activate is 479 * next called for this pmap, it will allocate a new 480 * ASID. 481 */ 482 KASSERT(!CPUSET_EMPTY_P(CPUSET_SUBSET(pm->pm_onproc, ti->ti_cpu_mask))); 483 pmap_pai_reset(ti, pai, PAI_PMAP(pai, ti)); 484 } 485 break; 486 } 487 case TLBINV_ALLUSER: 488 /* 489 * Flush all user TLB entries. 490 */ 491 pmap_tlb_asid_reinitialize(ti, TLBINV_ALLUSER); 492 break; 493 case TLBINV_ALLKERNEL: 494 /* 495 * We need to invalidate all global TLB entries. 496 */ 497 pmap_tlb_asid_check(); 498 tlb_invalidate_globals(); 499 pmap_tlb_asid_check(); 500 break; 501 case TLBINV_ALL: 502 /* 503 * Flush all the TLB entries (user and kernel). 504 */ 505 pmap_tlb_asid_reinitialize(ti, TLBINV_ALL); 506 break; 507 case TLBINV_NOBODY: 508 /* 509 * Might be spurious or another SMT CPU sharing this TLB 510 * could have already done the work. 511 */ 512 break; 513 } 514 515 /* 516 * Indicate we are done with shutdown event. 517 */ 518 ti->ti_victim = NULL; 519 ti->ti_tlbinvop = TLBINV_NOBODY; 520 TLBINFO_UNLOCK(ti); 521 } 522 523 /* 524 * This state machine could be encoded into an array of integers but since all 525 * the values fit in 3 bits, the 5 entry "table" fits in a 16 bit value which 526 * can be loaded in a single instruction. 527 */ 528 #define TLBINV_MAP(op, nobody, one, alluser, allkernel, all) \ 529 (((( (nobody) << 3*TLBINV_NOBODY) \ 530 | ( (one) << 3*TLBINV_ONE) \ 531 | ( (alluser) << 3*TLBINV_ALLUSER) \ 532 | ((allkernel) << 3*TLBINV_ALLKERNEL) \ 533 | ( (all) << 3*TLBINV_ALL)) >> 3*(op)) & 7) 534 535 #define TLBINV_USER_MAP(op) \ 536 TLBINV_MAP(op, TLBINV_ONE, TLBINV_ALLUSER, TLBINV_ALLUSER, \ 537 TLBINV_ALL, TLBINV_ALL) 538 539 #define TLBINV_KERNEL_MAP(op) \ 540 TLBINV_MAP(op, TLBINV_ALLKERNEL, TLBINV_ALL, TLBINV_ALL, \ 541 TLBINV_ALLKERNEL, TLBINV_ALL) 542 543 bool 544 pmap_tlb_shootdown_bystanders(pmap_t pm) 545 { 546 /* 547 * We don't need to deal our own TLB. 548 */ 549 __cpuset_t pm_active = 550 CPUSET_EXCLUDE(pm->pm_active, curcpu()->ci_tlb_info->ti_cpu_mask); 551 const bool kernel_p = (pm == pmap_kernel()); 552 bool ipi_sent = false; 553 554 /* 555 * If pm_active gets more bits set, then it's after all our changes 556 * have been made so they will already be cognizant of them. 557 */ 558 559 for (size_t i = 0; !CPUSET_EMPTY_P(pm_active); i++) { 560 KASSERT(i < pmap_ntlbs); 561 struct pmap_tlb_info * const ti = pmap_tlbs[i]; 562 KASSERT(tlbinfo_index(ti) == i); 563 /* 564 * Skip this TLB if there are no active mappings for it. 565 */ 566 if (CPUSET_EMPTY_P(CPUSET_SUBSET(pm_active, ti->ti_cpu_mask))) 567 continue; 568 struct pmap_asid_info * const pai = PMAP_PAI(pm, ti); 569 CPUSET_DELSET(pm_active, ti->ti_cpu_mask); 570 TLBINFO_LOCK(ti); 571 const __cpuset onproc = CPUSET_SUBSET(pm->pm_onproc, 572 ti->ti_cpu_mask); 573 if (onproc != 0) { 574 if (kernel_p) { 575 ti->ti_tlbinvop = 576 TLBINV_KERNEL_MAP(ti->ti_tlbinvop); 577 ti->ti_victim = NULL; 578 } else { 579 KASSERT(pai->pai_asid); 580 if (__predict_false(ti->ti_victim == pm)) { 581 KASSERT(ti->ti_tlbinvop == TLBINV_ONE); 582 /* 583 * We still need to invalidate this one 584 * ASID so there's nothing to change. 585 */ 586 } else { 587 ti->ti_tlbinvop = 588 TLBINV_USER_MAP(ti->ti_tlbinvop); 589 if (ti->ti_tlbinvop == TLBINV_ONE) 590 ti->ti_victim = pm; 591 else 592 ti->ti_victim = NULL; 593 } 594 } 595 TLBINFO_UNLOCK(ti); 596 /* 597 * Now we can send out the shootdown IPIs to a CPU 598 * that shares this TLB and is currently using this 599 * pmap. That CPU will process the IPI and do the 600 * all the work. Any other CPUs sharing that TLB 601 * will take advantage of that work. pm_onproc might 602 * change now that we have released the lock but we 603 * can tolerate spurious shootdowns. 604 */ 605 KASSERT(!CPUSET_EMPTY_P(onproc)); 606 u_int j = CPUSET_NEXT(onproc); 607 cpu_send_ipi(cpu_lookup(j), IPI_SHOOTDOWN); 608 ipi_sent = true; 609 continue; 610 } 611 if (!CPUSET_EMPTY_P(CPUSET_SUBSET(pm->pm_active, ti->ti_cpu_mask) { 612 /* 613 * If this pmap has an ASID assigned but it's not 614 * currently running, nuke its ASID. Next time the 615 * pmap is activated, it will allocate a new ASID. 616 * And best of all, we avoid an IPI. 617 */ 618 KASSERT(!kernel_p); 619 pmap_pai_reset(ti, pai, pm); 620 //ti->ti_evcnt_lazy_shots.ev_count++; 621 } 622 TLBINFO_UNLOCK(ti); 623 } 624 625 return ipi_sent; 626 } 627 #endif /* MULTIPROCESSOR && PMAP_NEED_TLB_SHOOTDOWN */ 628 629 int 630 pmap_tlb_update_addr(pmap_t pm, vaddr_t va, pt_entry_t pt_entry, u_int flags) 631 { 632 struct pmap_tlb_info * const ti = curcpu()->ci_tlb_info; 633 struct pmap_asid_info * const pai = PMAP_PAI(pm, ti); 634 int rv = -1; 635 636 KASSERT(kpreempt_disabled()); 637 638 TLBINFO_LOCK(ti); 639 if (pm == pmap_kernel() || PMAP_PAI_ASIDVALID_P(pai, ti)) { 640 pmap_tlb_asid_check(); 641 rv = tlb_update_addr(va, pai->pai_asid, pt_entry, 642 (flags & PMAP_TLB_INSERT) != 0); 643 pmap_tlb_asid_check(); 644 } 645 #if defined(MULTIPROCESSOR) && defined(PMAP_NEED_TLB_SHOOTDOWN) 646 pm->pm_shootdown_pending = (flags & PMAP_TLB_NEED_IPI) != 0; 647 #endif 648 TLBINFO_UNLOCK(ti); 649 650 return rv; 651 } 652 653 void 654 pmap_tlb_invalidate_addr(pmap_t pm, vaddr_t va) 655 { 656 struct pmap_tlb_info * const ti = curcpu()->ci_tlb_info; 657 struct pmap_asid_info * const pai = PMAP_PAI(pm, ti); 658 659 KASSERT(kpreempt_disabled()); 660 661 TLBINFO_LOCK(ti); 662 if (pm == pmap_kernel() || PMAP_PAI_ASIDVALID_P(pai, ti)) { 663 pmap_tlb_asid_check(); 664 tlb_invalidate_addr(va, pai->pai_asid); 665 pmap_tlb_asid_check(); 666 } 667 #if defined(MULTIPROCESSOR) && defined(PMAP_NEED_TLB_SHOOTDOWN) 668 pm->pm_shootdown_pending = 1; 669 #endif 670 TLBINFO_UNLOCK(ti); 671 } 672 673 static inline void 674 pmap_tlb_asid_alloc(struct pmap_tlb_info *ti, pmap_t pm, 675 struct pmap_asid_info *pai) 676 { 677 /* 678 * We shouldn't have an ASID assigned, and thusly must not be onproc 679 * nor active. 680 */ 681 KASSERT(pm != pmap_kernel()); 682 KASSERT(pai->pai_asid == 0); 683 KASSERT(pai->pai_link.le_prev == NULL); 684 #if defined(MULTIPROCESSOR) 685 KASSERT(CPUSET_EMPTY_P(CPUSET_SUBSET(pm->pm_onproc, ti->ti_cpu_mask))); 686 KASSERT(CPUSET_EMPTY_P(CPUSET_SUBSET(pm->pm_active, ti->ti_cpu_mask))); 687 #endif 688 KASSERT(ti->ti_asids_free > 0); 689 KASSERT(ti->ti_asid_hint <= ti->ti_asid_max); 690 691 /* 692 * Let's see if the hinted ASID is free. If not search for 693 * a new one. 694 */ 695 if (__predict_false(TLBINFO_ASID_INUSE_P(ti, ti->ti_asid_hint))) { 696 #ifdef DIAGNOSTIC 697 const size_t words = __arraycount(ti->ti_asid_bitmap); 698 #endif 699 const size_t nbpw = 8 * sizeof(ti->ti_asid_bitmap[0]); 700 for (size_t i = 0; i < ti->ti_asid_hint / nbpw; i++) { 701 KASSERT(~ti->ti_asid_bitmap[i] == 0); 702 } 703 for (size_t i = ti->ti_asid_hint / nbpw;; i++) { 704 KASSERT(i < words); 705 /* 706 * ffs wants to find the first bit set while we want 707 * to find the first bit cleared. 708 */ 709 u_long bits = ~ti->ti_asid_bitmap[i]; 710 if (__predict_true(bits)) { 711 u_int n = 0; 712 if ((bits & 0xffffffff) == 0) { 713 bits = (bits >> 31) >> 1; 714 KASSERT(bits); 715 n += 32; 716 } 717 n += ffs(bits) - 1; 718 KASSERT(n < nbpw); 719 ti->ti_asid_hint = n + i * nbpw; 720 break; 721 } 722 } 723 KASSERT(ti->ti_asid_hint > KERNEL_PID); 724 KASSERT(TLBINFO_ASID_INUSE_P(ti, ti->ti_asid_hint-1)); 725 KASSERT(!TLBINFO_ASID_INUSE_P(ti, ti->ti_asid_hint)); 726 } 727 728 /* 729 * The hint contains our next ASID so take it and advance the hint. 730 * Mark it as used and insert the pai into the list of active asids. 731 * There is also one less asid free in this TLB. 732 */ 733 pai->pai_asid = ti->ti_asid_hint++; 734 TLBINFO_ASID_MARK_USED(ti, pai->pai_asid); 735 LIST_INSERT_HEAD(&ti->ti_pais, pai, pai_link); 736 ti->ti_asids_free--; 737 738 #if defined(MULTIPROCESSOR) 739 /* 740 * Mark that we now have an active ASID for all CPUs sharing this TLB. 741 * The bits in pm_active belonging to this TLB can only be changed 742 * while this TLBs lock is held. 743 */ 744 atomic_or_32(&pm->pm_active, ti->ti_cpu_mask); 745 #endif 746 } 747 748 /* 749 * Acquire a TLB address space tag (called ASID or TLBPID) and return it. 750 * ASID might have already been previously acquired. 751 */ 752 void 753 pmap_tlb_asid_acquire(pmap_t pm, struct lwp *l) 754 { 755 struct cpu_info * const ci = l->l_cpu; 756 struct pmap_tlb_info * const ti = ci->ci_tlb_info; 757 struct pmap_asid_info * const pai = PMAP_PAI(pm, ti); 758 759 KASSERT(kpreempt_disabled()); 760 761 /* 762 * Kernels use a fixed ASID and thus doesn't need to acquire one. 763 */ 764 if (pm == pmap_kernel()) 765 return; 766 767 TLBINFO_LOCK(ti); 768 KASSERT(pai->pai_asid <= KERNEL_PID || pai->pai_link.le_prev != NULL); 769 KASSERT(pai->pai_asid > KERNEL_PID || pai->pai_link.le_prev == NULL); 770 pmap_pai_check(ti); 771 if (__predict_false(!PMAP_PAI_ASIDVALID_P(pai, ti))) { 772 /* 773 * If we've run out ASIDs, reinitialize the ASID space. 774 */ 775 if (__predict_false(tlbinfo_noasids_p(ti))) { 776 KASSERT(l == curlwp); 777 pmap_tlb_asid_reinitialize(ti, TLBINV_NOBODY); 778 } 779 780 /* 781 * Get an ASID. 782 */ 783 pmap_tlb_asid_alloc(ti, pm, pai); 784 } 785 786 if (l == curlwp) { 787 #if defined(MULTIPROCESSOR) 788 /* 789 * The bits in pm_onproc belonging to this TLB can only 790 * be changed while this TLBs lock is held unless atomic 791 * operations are used. 792 */ 793 CPUSET_ADD(pm->pm_onproc, cpu_index(ci)); 794 #endif 795 ci->ci_pmap_asid_cur = pai->pai_asid; 796 tlb_set_asid(pai->pai_asid); 797 pmap_tlb_asid_check(); 798 } else { 799 printf("%s: l (%p) != curlwp %p\n", __func__, l, curlwp); 800 } 801 TLBINFO_UNLOCK(ti); 802 } 803 804 void 805 pmap_tlb_asid_deactivate(pmap_t pm) 806 { 807 KASSERT(kpreempt_disabled()); 808 #if defined(MULTIPROCESSOR) 809 /* 810 * The kernel pmap is aways onproc and active and must never have 811 * those bits cleared. If pmap_remove_all was called, it has already 812 * deactivated the pmap and thusly onproc will be 0 so there's nothing 813 * to do. 814 */ 815 if (pm != pmap_kernel() && pm->pm_onproc != 0) { 816 struct cpu_info * const ci = curcpu(); 817 KASSERT(!cpu_intr_p()); 818 KASSERTMSG(pm->pm_onproc & CPUSET_SINGLE(cpu_index(ci)), 819 "%s: pmap %p onproc %#x doesn't include cpu %d (%p)", 820 __func__, pm, pm->pm_onproc, cpu_index(ci), ci); 821 /* 822 * The bits in pm_onproc that belong to this TLB can 823 * be changed while this TLBs lock is not held as long 824 * as we use atomic ops. 825 */ 826 CPUSET_DEL(pm->pm_onproc, cpu_index(ci)); 827 } 828 #elif defined(DEBUG) 829 curcpu()->ci_pmap_asid_cur = 0; 830 tlb_set_asid(0); 831 pmap_tlb_asid_check(); 832 #endif 833 } 834 835 void 836 pmap_tlb_asid_release_all(struct pmap *pm) 837 { 838 KASSERT(pm != pmap_kernel()); 839 #if defined(MULTIPROCESSOR) 840 KASSERT(CPUSET_EMPTY_P(pm->pm_onproc)); 841 for (u_int i = 0; !CPUSET_EMPTY_P(pm->pm_active); i++) { 842 KASSERT(i < pmap_ntlbs); 843 struct pmap_tlb_info * const ti = pmap_tlbs[i]; 844 if (!CPUSET_EMPTY_P(CPUSET_SUBSET(pm->pm_active, ti->ti_cpu_mask))) { 845 struct pmap_asid_info * const pai = PMAP_PAI(pm, ti); 846 TLBINFO_LOCK(ti); 847 KASSERT(ti->ti_victim != pm); 848 pmap_pai_reset(ti, pai, pm); 849 TLBINFO_UNLOCK(ti); 850 } 851 } 852 #else 853 /* 854 * Handle the case of an UP kernel which only has, at most, one ASID. 855 * If the pmap has an ASID allocated, free it. 856 */ 857 struct pmap_tlb_info * const ti = &pmap_tlb0_info; 858 struct pmap_asid_info * const pai = PMAP_PAI(pm, ti); 859 TLBINFO_LOCK(ti); 860 if (pai->pai_asid > KERNEL_PID) { 861 pmap_pai_reset(ti, pai, pm); 862 } 863 TLBINFO_UNLOCK(ti); 864 #endif /* MULTIPROCESSOR */ 865 } 866 867 void 868 pmap_tlb_asid_check(void) 869 { 870 #ifdef DEBUG 871 kpreempt_disable(); 872 const tlb_asid_t asid = tlb_get_asid(); 873 KDASSERTMSG(asid == curcpu()->ci_pmap_asid_cur, 874 "%s: asid (%#x) != current asid (%#x)", 875 __func__, asid, curcpu()->ci_pmap_asid_cur); 876 kpreempt_enable(); 877 #endif 878 } 879 880 #ifdef DEBUG 881 void 882 pmap_tlb_check(pmap_t pm, bool (*func)(void *, vaddr_t, tlb_asid_t, pt_entry_t)) 883 { 884 struct pmap_tlb_info * const ti = curcpu()->ci_tlb_info; 885 struct pmap_asid_info * const pai = PMAP_PAI(pm, ti); 886 TLBINFO_LOCK(ti); 887 if (pm == pmap_kernel() || pai->pai_asid > KERNEL_PID) 888 tlb_walk(pm, func); 889 TLBINFO_UNLOCK(ti); 890 } 891 #endif /* DEBUG */ 892