1*3eaf14feSalnsn /* $NetBSD: cache.c,v 1.3 2019/01/22 01:25:53 alnsn Exp $ */
2c5e535c2Salnsn
3c5e535c2Salnsn /*-
4c5e535c2Salnsn * Copyright (c) 2014 Alexander Nasonov.
5c5e535c2Salnsn * All rights reserved.
6c5e535c2Salnsn *
7c5e535c2Salnsn * Redistribution and use in source and binary forms, with or without
8c5e535c2Salnsn * modification, are permitted provided that the following conditions
9c5e535c2Salnsn * are met:
10c5e535c2Salnsn * 1. Redistributions of source code must retain the above copyright
11c5e535c2Salnsn * notice, this list of conditions and the following disclaimer.
12c5e535c2Salnsn * 2. Redistributions in binary form must reproduce the above copyright
13c5e535c2Salnsn * notice, this list of conditions and the following disclaimer in the
14c5e535c2Salnsn * documentation and/or other materials provided with the distribution.
15c5e535c2Salnsn *
16c5e535c2Salnsn * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
17c5e535c2Salnsn * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18c5e535c2Salnsn * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19c5e535c2Salnsn * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20c5e535c2Salnsn * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21c5e535c2Salnsn * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22c5e535c2Salnsn * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23c5e535c2Salnsn * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24c5e535c2Salnsn * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25c5e535c2Salnsn * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26c5e535c2Salnsn * SUCH DAMAGE.
27c5e535c2Salnsn */
28c5e535c2Salnsn
29c5e535c2Salnsn #include <sys/cdefs.h>
30*3eaf14feSalnsn __KERNEL_RCSID(0, "$NetBSD: cache.c,v 1.3 2019/01/22 01:25:53 alnsn Exp $");
31c5e535c2Salnsn
32c5e535c2Salnsn /*
33c5e535c2Salnsn * Barebone implementation of mips cache routines for rump.
34c5e535c2Salnsn */
35c5e535c2Salnsn
36c5e535c2Salnsn #include <sys/types.h>
37c5e535c2Salnsn #include <mips/cache.h>
38c5e535c2Salnsn
39c5e535c2Salnsn #include "sljit_rump.h"
40c5e535c2Salnsn
4111498deeSalnsn static void icache_sync_range(register_t, vsize_t);
42c5e535c2Salnsn
43c5e535c2Salnsn struct mips_cache_ops mips_cache_ops = {
44c5e535c2Salnsn .mco_icache_sync_range = &icache_sync_range
45c5e535c2Salnsn };
46c5e535c2Salnsn
47c5e535c2Salnsn static void
icache_sync_range(register_t va,vsize_t sz)4811498deeSalnsn icache_sync_range(register_t va, vsize_t sz)
49c5e535c2Salnsn {
50c5e535c2Salnsn
51*3eaf14feSalnsn (void)rumpcomp_sync_icache((void *)(uintptr_t)va, (uint64_t)sz);
52c5e535c2Salnsn }
53