xref: /netbsd-src/sys/kern/subr_pcu.c (revision 5f2f42719cd62ff11fd913b40b7ce19f07c4fd25)
1 /*	$NetBSD: subr_pcu.c,v 1.26 2022/02/08 12:59:16 riastradh Exp $	*/
2 
3 /*-
4  * Copyright (c) 2011, 2014 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Mindaugas Rasiukevicius.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 /*
33  * Per CPU Unit (PCU) - is an interface to manage synchronization of any
34  * per CPU context (unit) tied with LWP context.  Typical use: FPU state.
35  *
36  * Concurrency notes:
37  *
38  *	PCU state may be loaded only by the current LWP, that is, curlwp.
39  *	Therefore, only LWP itself can set a CPU for lwp_t::l_pcu_cpu[id].
40  *
41  *	There are some important rules about operation calls.  The request
42  *	for a PCU release can be from a) the owner LWP (regardless whether
43  *	the PCU state is on the current CPU or remote CPU) b) any other LWP
44  *	running on that CPU (in such case, the owner LWP is on a remote CPU
45  *	or sleeping).
46  *
47  *	In any case, the PCU state can *only* be changed from the current
48  *	CPU.  If said PCU state is on the remote CPU, a cross-call will be
49  *	sent by the owner LWP.  Therefore struct cpu_info::ci_pcu_curlwp[id]
50  *	may only be changed by the current CPU and lwp_t::l_pcu_cpu[id] may
51  *	only be cleared by the CPU which has the PCU state loaded.
52  */
53 
54 #include <sys/cdefs.h>
55 __KERNEL_RCSID(0, "$NetBSD: subr_pcu.c,v 1.26 2022/02/08 12:59:16 riastradh Exp $");
56 
57 #include <sys/param.h>
58 #include <sys/cpu.h>
59 #include <sys/lwp.h>
60 #include <sys/pcu.h>
61 #include <sys/ipi.h>
62 
63 #if PCU_UNIT_COUNT > 0
64 
65 static inline void pcu_do_op(const pcu_ops_t *, lwp_t * const, const int);
66 static void pcu_lwp_op(const pcu_ops_t *, lwp_t *, const int);
67 
68 /*
69  * Internal PCU commands for the pcu_do_op() function.
70  */
71 #define	PCU_CMD_SAVE		0x01	/* save PCU state to the LWP */
72 #define	PCU_CMD_RELEASE		0x02	/* release PCU state on the CPU */
73 
74 /*
75  * Message structure for another CPU passed via ipi(9).
76  */
77 typedef struct {
78 	const pcu_ops_t *pcu;
79 	lwp_t *		owner;
80 	const int	flags;
81 } pcu_ipi_msg_t;
82 
83 /*
84  * PCU IPIs run at IPL_HIGH (aka IPL_PCU in this code).
85  */
86 #define	splpcu		splhigh
87 
88 /* PCU operations structure provided by the MD code. */
89 extern const pcu_ops_t * const pcu_ops_md_defs[];
90 
91 /*
92  * pcu_available_p: true if lwp is allowed to use PCU state.
93  */
94 static inline bool __diagused
95 pcu_available_p(struct lwp *l)
96 {
97 
98 	/* XXX Not sure this is safe unless l is locked!  */
99 	return (l->l_flag & (LW_SYSTEM|LW_SYSTEM_FPU)) != LW_SYSTEM;
100 }
101 
102 /*
103  * pcu_switchpoint: release PCU state if the LWP is being run on another CPU.
104  * This routine is called on each context switch by by mi_switch().
105  */
106 void
107 pcu_switchpoint(lwp_t *l)
108 {
109 	const uint32_t pcu_valid = l->l_pcu_valid;
110 	int s;
111 
112 	KASSERTMSG(l == curlwp, "l %p != curlwp %p", l, curlwp);
113 
114 	if (__predict_true(pcu_valid == 0)) {
115 		/* PCUs are not in use. */
116 		return;
117 	}
118 	s = splpcu();
119 	for (u_int id = 0; id < PCU_UNIT_COUNT; id++) {
120 		if ((pcu_valid & (1U << id)) == 0) {
121 			continue;
122 		}
123 		struct cpu_info * const pcu_ci = l->l_pcu_cpu[id];
124 		if (pcu_ci == l->l_cpu) {
125 			KASSERT(pcu_ci->ci_pcu_curlwp[id] == l);
126 			continue;
127 		}
128 		const pcu_ops_t * const pcu = pcu_ops_md_defs[id];
129 		pcu->pcu_state_release(l);
130 	}
131 	splx(s);
132 }
133 
134 /*
135  * pcu_discard_all: discard PCU state of the given LWP.
136  *
137  * Used by exec and LWP exit.
138  */
139 void
140 pcu_discard_all(lwp_t *l)
141 {
142 	const uint32_t pcu_valid = l->l_pcu_valid;
143 
144 	/*
145 	 * The check for LSIDL here is to catch the case where the LWP exits
146 	 * due to an error in the LWP creation path before it ever runs.
147 	 */
148 	KASSERT(l == curlwp || l->l_stat == LSIDL ||
149 		(!pcu_available_p(l) && pcu_valid == 0));
150 
151 	if (__predict_true(pcu_valid == 0)) {
152 		/* PCUs are not in use. */
153 		return;
154 	}
155 	for (u_int id = 0; id < PCU_UNIT_COUNT; id++) {
156 		if ((pcu_valid & (1U << id)) == 0) {
157 			continue;
158 		}
159 		if (__predict_true(l->l_pcu_cpu[id] == NULL)) {
160 			continue;
161 		}
162 		const pcu_ops_t * const pcu = pcu_ops_md_defs[id];
163 		pcu_lwp_op(pcu, l, PCU_CMD_RELEASE);
164 	}
165 	l->l_pcu_valid = 0;
166 }
167 
168 /*
169  * pcu_save_all: save PCU state of the given LWP so that eg. coredump can
170  * examine it.
171  */
172 void
173 pcu_save_all(lwp_t *l)
174 {
175 	const uint32_t pcu_valid = l->l_pcu_valid;
176 	int flags = PCU_CMD_SAVE;
177 
178 	/* If LW_WCORE, we are also releasing the state. */
179 	if (__predict_false(l->l_flag & LW_WCORE)) {
180 		flags |= PCU_CMD_RELEASE;
181 	}
182 
183 	/*
184 	 * Normally we save for the current LWP, but sometimes we get called
185 	 * with a different LWP (forking a system LWP or doing a coredump of
186 	 * a process with multiple threads) and we need to deal with that.
187 	 */
188 	KASSERT(l == curlwp || ((!pcu_available_p(l) ||
189 	    (curlwp->l_proc == l->l_proc && l->l_stat == LSSUSPENDED)) &&
190 	    pcu_valid == 0));
191 
192 	if (__predict_true(pcu_valid == 0)) {
193 		/* PCUs are not in use. */
194 		return;
195 	}
196 	for (u_int id = 0; id < PCU_UNIT_COUNT; id++) {
197 		if ((pcu_valid & (1U << id)) == 0) {
198 			continue;
199 		}
200 		if (__predict_true(l->l_pcu_cpu[id] == NULL)) {
201 			continue;
202 		}
203 		const pcu_ops_t * const pcu = pcu_ops_md_defs[id];
204 		pcu_lwp_op(pcu, l, flags);
205 	}
206 }
207 
208 /*
209  * pcu_do_op: save/release PCU state on the current CPU.
210  *
211  * => Must be called at IPL_PCU or from the interrupt.
212  */
213 static inline void
214 pcu_do_op(const pcu_ops_t *pcu, lwp_t * const l, const int flags)
215 {
216 	struct cpu_info * const ci = curcpu();
217 	const u_int id = pcu->pcu_id;
218 
219 	KASSERT(l->l_pcu_cpu[id] == ci);
220 
221 	if (flags & PCU_CMD_SAVE) {
222 		pcu->pcu_state_save(l);
223 	}
224 	if (flags & PCU_CMD_RELEASE) {
225 		pcu->pcu_state_release(l);
226 		ci->ci_pcu_curlwp[id] = NULL;
227 		l->l_pcu_cpu[id] = NULL;
228 	}
229 }
230 
231 /*
232  * pcu_cpu_ipi: helper routine to call pcu_do_op() via ipi(9).
233  */
234 static void
235 pcu_cpu_ipi(void *arg)
236 {
237 	const pcu_ipi_msg_t *pcu_msg = arg;
238 	const pcu_ops_t *pcu = pcu_msg->pcu;
239 	const u_int id = pcu->pcu_id;
240 	lwp_t *l = pcu_msg->owner;
241 
242 	KASSERT(pcu_msg->owner != NULL);
243 
244 	if (curcpu()->ci_pcu_curlwp[id] != l) {
245 		/*
246 		 * Different ownership: another LWP raced with us and
247 		 * perform save and release.  There is nothing to do.
248 		 */
249 		KASSERT(l->l_pcu_cpu[id] == NULL);
250 		return;
251 	}
252 	pcu_do_op(pcu, l, pcu_msg->flags);
253 }
254 
255 /*
256  * pcu_lwp_op: perform PCU state save, release or both operations on LWP.
257  */
258 static void
259 pcu_lwp_op(const pcu_ops_t *pcu, lwp_t *l, const int flags)
260 {
261 	const u_int id = pcu->pcu_id;
262 	struct cpu_info *ci;
263 	int s;
264 
265 	/*
266 	 * Caller should have re-checked if there is any state to manage.
267 	 * Block the interrupts and inspect again, since cross-call sent
268 	 * by remote CPU could have changed the state.
269 	 */
270 	s = splpcu();
271 	ci = l->l_pcu_cpu[id];
272 	if (ci == curcpu()) {
273 		/*
274 		 * State is on the current CPU - just perform the operations.
275 		 */
276 		KASSERTMSG(ci->ci_pcu_curlwp[id] == l,
277 		    "%s: cpu%u: pcu_curlwp[%u] (%p) != l (%p)",
278 		     __func__, cpu_index(ci), id, ci->ci_pcu_curlwp[id], l);
279 		pcu_do_op(pcu, l, flags);
280 		splx(s);
281 		return;
282 	}
283 	if (__predict_false(ci == NULL)) {
284 		/* Cross-call has won the race - no state to manage. */
285 		splx(s);
286 		return;
287 	}
288 
289 	/*
290 	 * The state is on the remote CPU: perform the operation(s) there.
291 	 */
292 	pcu_ipi_msg_t pcu_msg = { .pcu = pcu, .owner = l, .flags = flags };
293 	ipi_msg_t ipi_msg = { .func = pcu_cpu_ipi, .arg = &pcu_msg };
294 	ipi_unicast(&ipi_msg, ci);
295 	splx(s);
296 
297 	/* Wait for completion. */
298 	ipi_wait(&ipi_msg);
299 
300 	KASSERT((flags & PCU_CMD_RELEASE) == 0 || l->l_pcu_cpu[id] == NULL);
301 }
302 
303 /*
304  * pcu_load: load/initialize the PCU state of current LWP on current CPU.
305  */
306 void
307 pcu_load(const pcu_ops_t *pcu)
308 {
309 	lwp_t *oncpu_lwp, * const l = curlwp;
310 	const u_int id = pcu->pcu_id;
311 	struct cpu_info *ci, *curci;
312 	int s;
313 
314 	KASSERT(!cpu_intr_p() && !cpu_softintr_p());
315 
316 	s = splpcu();
317 	curci = curcpu();
318 	ci = l->l_pcu_cpu[id];
319 
320 	/* Does this CPU already have our PCU state loaded? */
321 	if (ci == curci) {
322 		/*
323 		 * Fault reoccurred while the PCU state is loaded and
324 		 * therefore PCU should be re‐enabled.  This happens
325 		 * if LWP is context switched to another CPU and then
326 		 * switched back to the original CPU while the state
327 		 * on that CPU has not been changed by other LWPs.
328 		 *
329 		 * It may also happen due to instruction "bouncing" on
330 		 * some architectures.
331 		 */
332 		KASSERT(curci->ci_pcu_curlwp[id] == l);
333 		KASSERT(pcu_valid_p(pcu, l));
334 		pcu->pcu_state_load(l, PCU_VALID | PCU_REENABLE);
335 		splx(s);
336 		return;
337 	}
338 
339 	/* If PCU state of this LWP is on the remote CPU - save it there. */
340 	if (ci) {
341 		pcu_ipi_msg_t pcu_msg = { .pcu = pcu, .owner = l,
342 		    .flags = PCU_CMD_SAVE | PCU_CMD_RELEASE };
343 		ipi_msg_t ipi_msg = { .func = pcu_cpu_ipi, .arg = &pcu_msg };
344 		ipi_unicast(&ipi_msg, ci);
345 		splx(s);
346 
347 		/*
348 		 * Wait for completion, re-enter IPL_PCU and re-fetch
349 		 * the current CPU.
350 		 */
351 		ipi_wait(&ipi_msg);
352 		s = splpcu();
353 		curci = curcpu();
354 	}
355 	KASSERT(l->l_pcu_cpu[id] == NULL);
356 
357 	/* Save the PCU state on the current CPU, if there is any. */
358 	if ((oncpu_lwp = curci->ci_pcu_curlwp[id]) != NULL) {
359 		pcu_do_op(pcu, oncpu_lwp, PCU_CMD_SAVE | PCU_CMD_RELEASE);
360 		KASSERT(curci->ci_pcu_curlwp[id] == NULL);
361 	}
362 
363 	/*
364 	 * Finally, load the state for this LWP on this CPU.  Indicate to
365 	 * the load function whether PCU state was valid before this call.
366 	 */
367 	const bool valid = ((1U << id) & l->l_pcu_valid) != 0;
368 	pcu->pcu_state_load(l, valid ? PCU_VALID : 0);
369 	curci->ci_pcu_curlwp[id] = l;
370 	l->l_pcu_cpu[id] = curci;
371 	l->l_pcu_valid |= (1U << id);
372 	splx(s);
373 }
374 
375 /*
376  * pcu_discard: discard the PCU state of the given LWP.  If "valid"
377  * parameter is true, then keep considering the PCU state as valid.
378  */
379 void
380 pcu_discard(const pcu_ops_t *pcu, lwp_t *l, bool valid)
381 {
382 	const u_int id = pcu->pcu_id;
383 
384 	KASSERT(!cpu_intr_p() && !cpu_softintr_p());
385 
386 	if (__predict_false(valid)) {
387 		l->l_pcu_valid |= (1U << id);
388 	} else {
389 		l->l_pcu_valid &= ~(1U << id);
390 	}
391 	if (__predict_true(l->l_pcu_cpu[id] == NULL)) {
392 		return;
393 	}
394 	pcu_lwp_op(pcu, l, PCU_CMD_RELEASE);
395 }
396 
397 /*
398  * pcu_save_lwp: save PCU state to the given LWP.
399  */
400 void
401 pcu_save(const pcu_ops_t *pcu, lwp_t *l)
402 {
403 	const u_int id = pcu->pcu_id;
404 
405 	KASSERT(!cpu_intr_p() && !cpu_softintr_p());
406 
407 	if (__predict_true(l->l_pcu_cpu[id] == NULL)) {
408 		return;
409 	}
410 	pcu_lwp_op(pcu, l, PCU_CMD_SAVE | PCU_CMD_RELEASE);
411 }
412 
413 /*
414  * pcu_save_all_on_cpu: save all PCU states on the current CPU.
415  */
416 void
417 pcu_save_all_on_cpu(void)
418 {
419 	int s;
420 
421 	s = splpcu();
422 	for (u_int id = 0; id < PCU_UNIT_COUNT; id++) {
423 		const pcu_ops_t * const pcu = pcu_ops_md_defs[id];
424 		lwp_t *l;
425 
426 		if ((l = curcpu()->ci_pcu_curlwp[id]) != NULL) {
427 			pcu_do_op(pcu, l, PCU_CMD_SAVE | PCU_CMD_RELEASE);
428 		}
429 	}
430 	splx(s);
431 }
432 
433 /*
434  * pcu_valid_p: return true if PCU state is considered valid.  Generally,
435  * it always becomes "valid" when pcu_load() is called.
436  */
437 bool
438 pcu_valid_p(const pcu_ops_t *pcu, const lwp_t *l)
439 {
440 	const u_int id = pcu->pcu_id;
441 
442 	return (l->l_pcu_valid & (1U << id)) != 0;
443 }
444 
445 #endif /* PCU_UNIT_COUNT > 0 */
446