xref: /netbsd-src/sys/external/gpl2/dts/dist/include/dt-bindings/reset/stm32mp1-resets.h (revision bdc22b2e01993381dcefeff2bc9b56ca75a4235c)
1 /*	$NetBSD: stm32mp1-resets.h,v 1.1.1.1 2018/04/28 18:25:54 jmcneill Exp $	*/
2 
3 /* SPDX-License-Identifier: GPL-2.0 or BSD-3-Clause */
4 /*
5  * Copyright (C) STMicroelectronics 2018 - All Rights Reserved
6  * Author: Gabriel Fernandez <gabriel.fernandez@st.com> for STMicroelectronics.
7  */
8 
9 #ifndef _DT_BINDINGS_STM32MP1_RESET_H_
10 #define _DT_BINDINGS_STM32MP1_RESET_H_
11 
12 #define LTDC_R		3072
13 #define DSI_R		3076
14 #define DDRPERFM_R	3080
15 #define USBPHY_R	3088
16 #define SPI6_R		3136
17 #define I2C4_R		3138
18 #define I2C6_R		3139
19 #define USART1_R	3140
20 #define STGEN_R		3156
21 #define GPIOZ_R		3200
22 #define CRYP1_R		3204
23 #define HASH1_R		3205
24 #define RNG1_R		3206
25 #define AXIM_R		3216
26 #define GPU_R		3269
27 #define ETHMAC_R	3274
28 #define FMC_R		3276
29 #define QSPI_R		3278
30 #define SDMMC1_R	3280
31 #define SDMMC2_R	3281
32 #define CRC1_R		3284
33 #define USBH_R		3288
34 #define MDMA_R		3328
35 #define MCU_R		8225
36 #define TIM2_R		19456
37 #define TIM3_R		19457
38 #define TIM4_R		19458
39 #define TIM5_R		19459
40 #define TIM6_R		19460
41 #define TIM7_R		19461
42 #define TIM12_R		16462
43 #define TIM13_R		16463
44 #define TIM14_R		16464
45 #define LPTIM1_R	19465
46 #define SPI2_R		19467
47 #define SPI3_R		19468
48 #define USART2_R	19470
49 #define USART3_R	19471
50 #define UART4_R		19472
51 #define UART5_R		19473
52 #define UART7_R		19474
53 #define UART8_R		19475
54 #define I2C1_R		19477
55 #define I2C2_R		19478
56 #define I2C3_R		19479
57 #define I2C5_R		19480
58 #define SPDIF_R		19482
59 #define CEC_R		19483
60 #define DAC12_R		19485
61 #define MDIO_R		19847
62 #define TIM1_R		19520
63 #define TIM8_R		19521
64 #define TIM15_R		19522
65 #define TIM16_R		19523
66 #define TIM17_R		19524
67 #define SPI1_R		19528
68 #define SPI4_R		19529
69 #define SPI5_R		19530
70 #define USART6_R	19533
71 #define SAI1_R		19536
72 #define SAI2_R		19537
73 #define SAI3_R		19538
74 #define DFSDM_R		19540
75 #define FDCAN_R		19544
76 #define LPTIM2_R	19584
77 #define LPTIM3_R	19585
78 #define LPTIM4_R	19586
79 #define LPTIM5_R	19587
80 #define SAI4_R		19592
81 #define SYSCFG_R	19595
82 #define VREF_R		19597
83 #define TMPSENS_R	19600
84 #define PMBCTRL_R	19601
85 #define DMA1_R		19648
86 #define DMA2_R		19649
87 #define DMAMUX_R	19650
88 #define ADC12_R		19653
89 #define USBO_R		19656
90 #define SDMMC3_R	19664
91 #define CAMITF_R	19712
92 #define CRYP2_R		19716
93 #define HASH2_R		19717
94 #define RNG2_R		19718
95 #define CRC2_R		19719
96 #define HSEM_R		19723
97 #define MBOX_R		19724
98 #define GPIOA_R		19776
99 #define GPIOB_R		19777
100 #define GPIOC_R		19778
101 #define GPIOD_R		19779
102 #define GPIOE_R		19780
103 #define GPIOF_R		19781
104 #define GPIOG_R		19782
105 #define GPIOH_R		19783
106 #define GPIOI_R		19784
107 #define GPIOJ_R		19785
108 #define GPIOK_R		19786
109 
110 #endif /* _DT_BINDINGS_STM32MP1_RESET_H_ */
111