1 /* $NetBSD: qcom,msm8974.h,v 1.1.1.1 2020/01/03 14:33:03 skrll Exp $ */ 2 3 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) */ 4 /* 5 * Qualcomm msm8974 interconnect IDs 6 * 7 * Copyright (c) 2019 Brian Masney <masneyb@onstation.org> 8 */ 9 10 #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_MSM8974_H 11 #define __DT_BINDINGS_INTERCONNECT_QCOM_MSM8974_H 12 13 #define BIMC_MAS_AMPSS_M0 0 14 #define BIMC_MAS_AMPSS_M1 1 15 #define BIMC_MAS_MSS_PROC 2 16 #define BIMC_TO_MNOC 3 17 #define BIMC_TO_SNOC 4 18 #define BIMC_SLV_EBI_CH0 5 19 #define BIMC_SLV_AMPSS_L2 6 20 21 #define CNOC_MAS_RPM_INST 0 22 #define CNOC_MAS_RPM_DATA 1 23 #define CNOC_MAS_RPM_SYS 2 24 #define CNOC_MAS_DEHR 3 25 #define CNOC_MAS_QDSS_DAP 4 26 #define CNOC_MAS_SPDM 5 27 #define CNOC_MAS_TIC 6 28 #define CNOC_SLV_CLK_CTL 7 29 #define CNOC_SLV_CNOC_MSS 8 30 #define CNOC_SLV_SECURITY 9 31 #define CNOC_SLV_TCSR 10 32 #define CNOC_SLV_TLMM 11 33 #define CNOC_SLV_CRYPTO_0_CFG 12 34 #define CNOC_SLV_CRYPTO_1_CFG 13 35 #define CNOC_SLV_IMEM_CFG 14 36 #define CNOC_SLV_MESSAGE_RAM 15 37 #define CNOC_SLV_BIMC_CFG 16 38 #define CNOC_SLV_BOOT_ROM 17 39 #define CNOC_SLV_PMIC_ARB 18 40 #define CNOC_SLV_SPDM_WRAPPER 19 41 #define CNOC_SLV_DEHR_CFG 20 42 #define CNOC_SLV_MPM 21 43 #define CNOC_SLV_QDSS_CFG 22 44 #define CNOC_SLV_RBCPR_CFG 23 45 #define CNOC_SLV_RBCPR_QDSS_APU_CFG 24 46 #define CNOC_TO_SNOC 25 47 #define CNOC_SLV_CNOC_ONOC_CFG 26 48 #define CNOC_SLV_CNOC_MNOC_MMSS_CFG 27 49 #define CNOC_SLV_CNOC_MNOC_CFG 28 50 #define CNOC_SLV_PNOC_CFG 29 51 #define CNOC_SLV_SNOC_MPU_CFG 30 52 #define CNOC_SLV_SNOC_CFG 31 53 #define CNOC_SLV_EBI1_DLL_CFG 32 54 #define CNOC_SLV_PHY_APU_CFG 33 55 #define CNOC_SLV_EBI1_PHY_CFG 34 56 #define CNOC_SLV_RPM 35 57 #define CNOC_SLV_SERVICE_CNOC 36 58 59 #define MNOC_MAS_GRAPHICS_3D 0 60 #define MNOC_MAS_JPEG 1 61 #define MNOC_MAS_MDP_PORT0 2 62 #define MNOC_MAS_VIDEO_P0 3 63 #define MNOC_MAS_VIDEO_P1 4 64 #define MNOC_MAS_VFE 5 65 #define MNOC_TO_CNOC 6 66 #define MNOC_TO_BIMC 7 67 #define MNOC_SLV_CAMERA_CFG 8 68 #define MNOC_SLV_DISPLAY_CFG 9 69 #define MNOC_SLV_OCMEM_CFG 10 70 #define MNOC_SLV_CPR_CFG 11 71 #define MNOC_SLV_CPR_XPU_CFG 12 72 #define MNOC_SLV_MISC_CFG 13 73 #define MNOC_SLV_MISC_XPU_CFG 14 74 #define MNOC_SLV_VENUS_CFG 15 75 #define MNOC_SLV_GRAPHICS_3D_CFG 16 76 #define MNOC_SLV_MMSS_CLK_CFG 17 77 #define MNOC_SLV_MMSS_CLK_XPU_CFG 18 78 #define MNOC_SLV_MNOC_MPU_CFG 19 79 #define MNOC_SLV_ONOC_MPU_CFG 20 80 #define MNOC_SLV_SERVICE_MNOC 21 81 82 #define OCMEM_NOC_TO_OCMEM_VNOC 0 83 #define OCMEM_MAS_JPEG_OCMEM 1 84 #define OCMEM_MAS_MDP_OCMEM 2 85 #define OCMEM_MAS_VIDEO_P0_OCMEM 3 86 #define OCMEM_MAS_VIDEO_P1_OCMEM 4 87 #define OCMEM_MAS_VFE_OCMEM 5 88 #define OCMEM_MAS_CNOC_ONOC_CFG 6 89 #define OCMEM_SLV_SERVICE_ONOC 7 90 #define OCMEM_VNOC_TO_SNOC 8 91 #define OCMEM_VNOC_TO_OCMEM_NOC 9 92 #define OCMEM_VNOC_MAS_GFX3D 10 93 #define OCMEM_SLV_OCMEM 11 94 95 #define PNOC_MAS_PNOC_CFG 0 96 #define PNOC_MAS_SDCC_1 1 97 #define PNOC_MAS_SDCC_3 2 98 #define PNOC_MAS_SDCC_4 3 99 #define PNOC_MAS_SDCC_2 4 100 #define PNOC_MAS_TSIF 5 101 #define PNOC_MAS_BAM_DMA 6 102 #define PNOC_MAS_BLSP_2 7 103 #define PNOC_MAS_USB_HSIC 8 104 #define PNOC_MAS_BLSP_1 9 105 #define PNOC_MAS_USB_HS 10 106 #define PNOC_TO_SNOC 11 107 #define PNOC_SLV_SDCC_1 12 108 #define PNOC_SLV_SDCC_3 13 109 #define PNOC_SLV_SDCC_2 14 110 #define PNOC_SLV_SDCC_4 15 111 #define PNOC_SLV_TSIF 16 112 #define PNOC_SLV_BAM_DMA 17 113 #define PNOC_SLV_BLSP_2 18 114 #define PNOC_SLV_USB_HSIC 19 115 #define PNOC_SLV_BLSP_1 20 116 #define PNOC_SLV_USB_HS 21 117 #define PNOC_SLV_PDM 22 118 #define PNOC_SLV_PERIPH_APU_CFG 23 119 #define PNOC_SLV_PNOC_MPU_CFG 24 120 #define PNOC_SLV_PRNG 25 121 #define PNOC_SLV_SERVICE_PNOC 26 122 123 #define SNOC_MAS_LPASS_AHB 0 124 #define SNOC_MAS_QDSS_BAM 1 125 #define SNOC_MAS_SNOC_CFG 2 126 #define SNOC_TO_BIMC 3 127 #define SNOC_TO_CNOC 4 128 #define SNOC_TO_PNOC 5 129 #define SNOC_TO_OCMEM_VNOC 6 130 #define SNOC_MAS_CRYPTO_CORE0 7 131 #define SNOC_MAS_CRYPTO_CORE1 8 132 #define SNOC_MAS_LPASS_PROC 9 133 #define SNOC_MAS_MSS 10 134 #define SNOC_MAS_MSS_NAV 11 135 #define SNOC_MAS_OCMEM_DMA 12 136 #define SNOC_MAS_WCSS 13 137 #define SNOC_MAS_QDSS_ETR 14 138 #define SNOC_MAS_USB3 15 139 #define SNOC_SLV_AMPSS 16 140 #define SNOC_SLV_LPASS 17 141 #define SNOC_SLV_USB3 18 142 #define SNOC_SLV_WCSS 19 143 #define SNOC_SLV_OCIMEM 20 144 #define SNOC_SLV_SNOC_OCMEM 21 145 #define SNOC_SLV_SERVICE_SNOC 22 146 #define SNOC_SLV_QDSS_STM 23 147 148 #endif 149