1 /* $NetBSD: r8a7791-cpg-mssr.h,v 1.1.1.1 2017/10/28 10:30:32 jmcneill Exp $ */ 2 3 /* 4 * Copyright (C) 2015 Renesas Electronics Corp. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 */ 11 12 #ifndef __DT_BINDINGS_CLOCK_R8A7791_CPG_MSSR_H__ 13 #define __DT_BINDINGS_CLOCK_R8A7791_CPG_MSSR_H__ 14 15 #include <dt-bindings/clock/renesas-cpg-mssr.h> 16 17 /* r8a7791 CPG Core Clocks */ 18 #define R8A7791_CLK_Z 0 19 #define R8A7791_CLK_ZG 1 20 #define R8A7791_CLK_ZTR 2 21 #define R8A7791_CLK_ZTRD2 3 22 #define R8A7791_CLK_ZT 4 23 #define R8A7791_CLK_ZX 5 24 #define R8A7791_CLK_ZS 6 25 #define R8A7791_CLK_HP 7 26 #define R8A7791_CLK_I 8 27 #define R8A7791_CLK_B 9 28 #define R8A7791_CLK_LB 10 29 #define R8A7791_CLK_P 11 30 #define R8A7791_CLK_CL 12 31 #define R8A7791_CLK_M2 13 32 #define R8A7791_CLK_ADSP 14 33 #define R8A7791_CLK_ZB3 15 34 #define R8A7791_CLK_ZB3D2 16 35 #define R8A7791_CLK_DDR 17 36 #define R8A7791_CLK_SDH 18 37 #define R8A7791_CLK_SD0 19 38 #define R8A7791_CLK_SD2 20 39 #define R8A7791_CLK_SD3 21 40 #define R8A7791_CLK_MMC0 22 41 #define R8A7791_CLK_MP 23 42 #define R8A7791_CLK_SSP 24 43 #define R8A7791_CLK_SSPRS 25 44 #define R8A7791_CLK_QSPI 26 45 #define R8A7791_CLK_CP 27 46 #define R8A7791_CLK_RCAN 28 47 #define R8A7791_CLK_R 29 48 #define R8A7791_CLK_OSC 30 49 50 #endif /* __DT_BINDINGS_CLOCK_R8A7791_CPG_MSSR_H__ */ 51