xref: /netbsd-src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/qcom,mmcc-msm8960.h (revision 7330f729ccf0bd976a06f95fad452fe774fc7fd1)
1 /*	$NetBSD: qcom,mmcc-msm8960.h,v 1.1.1.1 2017/06/15 20:14:23 jmcneill Exp $	*/
2 
3 /*
4  * Copyright (c) 2013, The Linux Foundation. All rights reserved.
5  *
6  * This software is licensed under the terms of the GNU General Public
7  * License version 2, as published by the Free Software Foundation, and
8  * may be copied, distributed, and modified under those terms.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  */
15 
16 #ifndef _DT_BINDINGS_CLK_MSM_MMCC_8960_H
17 #define _DT_BINDINGS_CLK_MSM_MMCC_8960_H
18 
19 #define MMSS_AHB_SRC					0
20 #define FAB_AHB_CLK					1
21 #define APU_AHB_CLK					2
22 #define TV_ENC_AHB_CLK					3
23 #define AMP_AHB_CLK					4
24 #define DSI2_S_AHB_CLK					5
25 #define JPEGD_AHB_CLK					6
26 #define GFX2D0_AHB_CLK					7
27 #define DSI_S_AHB_CLK					8
28 #define DSI2_M_AHB_CLK					9
29 #define VPE_AHB_CLK					10
30 #define SMMU_AHB_CLK					11
31 #define HDMI_M_AHB_CLK					12
32 #define VFE_AHB_CLK					13
33 #define ROT_AHB_CLK					14
34 #define VCODEC_AHB_CLK					15
35 #define MDP_AHB_CLK					16
36 #define DSI_M_AHB_CLK					17
37 #define CSI_AHB_CLK					18
38 #define MMSS_IMEM_AHB_CLK				19
39 #define IJPEG_AHB_CLK					20
40 #define HDMI_S_AHB_CLK					21
41 #define GFX3D_AHB_CLK					22
42 #define GFX2D1_AHB_CLK					23
43 #define MMSS_FPB_CLK					24
44 #define MMSS_AXI_SRC					25
45 #define MMSS_FAB_CORE					26
46 #define FAB_MSP_AXI_CLK					27
47 #define JPEGD_AXI_CLK					28
48 #define GMEM_AXI_CLK					29
49 #define MDP_AXI_CLK					30
50 #define MMSS_IMEM_AXI_CLK				31
51 #define IJPEG_AXI_CLK					32
52 #define GFX3D_AXI_CLK					33
53 #define VCODEC_AXI_CLK					34
54 #define VFE_AXI_CLK					35
55 #define VPE_AXI_CLK					36
56 #define ROT_AXI_CLK					37
57 #define VCODEC_AXI_A_CLK				38
58 #define VCODEC_AXI_B_CLK				39
59 #define MM_AXI_S3_FCLK					40
60 #define MM_AXI_S2_FCLK					41
61 #define MM_AXI_S1_FCLK					42
62 #define MM_AXI_S0_FCLK					43
63 #define MM_AXI_S2_CLK					44
64 #define MM_AXI_S1_CLK					45
65 #define MM_AXI_S0_CLK					46
66 #define CSI0_SRC					47
67 #define CSI0_CLK					48
68 #define CSI0_PHY_CLK					49
69 #define CSI1_SRC					50
70 #define CSI1_CLK					51
71 #define CSI1_PHY_CLK					52
72 #define CSI2_SRC					53
73 #define CSI2_CLK					54
74 #define CSI2_PHY_CLK					55
75 #define DSI_SRC						56
76 #define DSI_CLK						57
77 #define CSI_PIX_CLK					58
78 #define CSI_RDI_CLK					59
79 #define MDP_VSYNC_CLK					60
80 #define HDMI_DIV_CLK					61
81 #define HDMI_APP_CLK					62
82 #define CSI_PIX1_CLK					63
83 #define CSI_RDI2_CLK					64
84 #define CSI_RDI1_CLK					65
85 #define GFX2D0_SRC					66
86 #define GFX2D0_CLK					67
87 #define GFX2D1_SRC					68
88 #define GFX2D1_CLK					69
89 #define GFX3D_SRC					70
90 #define GFX3D_CLK					71
91 #define IJPEG_SRC					72
92 #define IJPEG_CLK					73
93 #define JPEGD_SRC					74
94 #define JPEGD_CLK					75
95 #define MDP_SRC						76
96 #define MDP_CLK						77
97 #define MDP_LUT_CLK					78
98 #define DSI2_PIXEL_SRC					79
99 #define DSI2_PIXEL_CLK					80
100 #define DSI2_SRC					81
101 #define DSI2_CLK					82
102 #define DSI1_BYTE_SRC					83
103 #define DSI1_BYTE_CLK					84
104 #define DSI2_BYTE_SRC					85
105 #define DSI2_BYTE_CLK					86
106 #define DSI1_ESC_SRC					87
107 #define DSI1_ESC_CLK					88
108 #define DSI2_ESC_SRC					89
109 #define DSI2_ESC_CLK					90
110 #define ROT_SRC						91
111 #define ROT_CLK						92
112 #define TV_ENC_CLK					93
113 #define TV_DAC_CLK					94
114 #define HDMI_TV_CLK					95
115 #define MDP_TV_CLK					96
116 #define TV_SRC						97
117 #define VCODEC_SRC					98
118 #define VCODEC_CLK					99
119 #define VFE_SRC						100
120 #define VFE_CLK						101
121 #define VFE_CSI_CLK					102
122 #define VPE_SRC						103
123 #define VPE_CLK						104
124 #define DSI_PIXEL_SRC					105
125 #define DSI_PIXEL_CLK					106
126 #define CAMCLK0_SRC					107
127 #define CAMCLK0_CLK					108
128 #define CAMCLK1_SRC					109
129 #define CAMCLK1_CLK					110
130 #define CAMCLK2_SRC					111
131 #define CAMCLK2_CLK					112
132 #define CSIPHYTIMER_SRC					113
133 #define CSIPHY2_TIMER_CLK				114
134 #define CSIPHY1_TIMER_CLK				115
135 #define CSIPHY0_TIMER_CLK				116
136 #define PLL1						117
137 #define PLL2						118
138 #define RGB_TV_CLK					119
139 #define NPL_TV_CLK					120
140 #define VCAP_AHB_CLK					121
141 #define VCAP_AXI_CLK					122
142 #define VCAP_SRC					123
143 #define VCAP_CLK					124
144 #define VCAP_NPL_CLK					125
145 #define PLL15						126
146 
147 #endif
148