1 /* $NetBSD: qcom,gcc-msm8994.h,v 1.1.1.1 2017/06/15 20:14:23 jmcneill Exp $ */ 2 3 /* 4 * Copyright (c) 2016, The Linux Foundation. All rights reserved. 5 * 6 * This software is licensed under the terms of the GNU General Public 7 * License version 2, as published by the Free Software Foundation, and 8 * may be copied, distributed, and modified under those terms. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 */ 15 16 17 #ifndef _DT_BINDINGS_CLK_MSM_GCC_8994_H 18 #define _DT_BINDINGS_CLK_MSM_GCC_8994_H 19 20 #define GPLL0_EARLY 0 21 #define GPLL0 1 22 #define GPLL4_EARLY 2 23 #define GPLL4 3 24 #define UFS_AXI_CLK_SRC 4 25 #define USB30_MASTER_CLK_SRC 5 26 #define BLSP1_QUP1_I2C_APPS_CLK_SRC 6 27 #define BLSP1_QUP1_SPI_APPS_CLK_SRC 7 28 #define BLSP1_QUP2_I2C_APPS_CLK_SRC 8 29 #define BLSP1_QUP2_SPI_APPS_CLK_SRC 9 30 #define BLSP1_QUP3_I2C_APPS_CLK_SRC 10 31 #define BLSP1_QUP3_SPI_APPS_CLK_SRC 11 32 #define BLSP1_QUP4_I2C_APPS_CLK_SRC 12 33 #define BLSP1_QUP4_SPI_APPS_CLK_SRC 13 34 #define BLSP1_QUP5_I2C_APPS_CLK_SRC 14 35 #define BLSP1_QUP5_SPI_APPS_CLK_SRC 15 36 #define BLSP1_QUP6_I2C_APPS_CLK_SRC 16 37 #define BLSP1_QUP6_SPI_APPS_CLK_SRC 17 38 #define BLSP1_UART1_APPS_CLK_SRC 18 39 #define BLSP1_UART2_APPS_CLK_SRC 19 40 #define BLSP1_UART3_APPS_CLK_SRC 20 41 #define BLSP1_UART4_APPS_CLK_SRC 21 42 #define BLSP1_UART5_APPS_CLK_SRC 22 43 #define BLSP1_UART6_APPS_CLK_SRC 23 44 #define BLSP2_QUP1_I2C_APPS_CLK_SRC 24 45 #define BLSP2_QUP1_SPI_APPS_CLK_SRC 25 46 #define BLSP2_QUP2_I2C_APPS_CLK_SRC 26 47 #define BLSP2_QUP2_SPI_APPS_CLK_SRC 27 48 #define BLSP2_QUP3_I2C_APPS_CLK_SRC 28 49 #define BLSP2_QUP3_SPI_APPS_CLK_SRC 29 50 #define BLSP2_QUP4_I2C_APPS_CLK_SRC 30 51 #define BLSP2_QUP4_SPI_APPS_CLK_SRC 31 52 #define BLSP2_QUP5_I2C_APPS_CLK_SRC 32 53 #define BLSP2_QUP5_SPI_APPS_CLK_SRC 33 54 #define BLSP2_QUP6_I2C_APPS_CLK_SRC 34 55 #define BLSP2_QUP6_SPI_APPS_CLK_SRC 35 56 #define BLSP2_UART1_APPS_CLK_SRC 36 57 #define BLSP2_UART2_APPS_CLK_SRC 37 58 #define BLSP2_UART3_APPS_CLK_SRC 38 59 #define BLSP2_UART4_APPS_CLK_SRC 39 60 #define BLSP2_UART5_APPS_CLK_SRC 40 61 #define BLSP2_UART6_APPS_CLK_SRC 41 62 #define GP1_CLK_SRC 42 63 #define GP2_CLK_SRC 43 64 #define GP3_CLK_SRC 44 65 #define PCIE_0_AUX_CLK_SRC 45 66 #define PCIE_0_PIPE_CLK_SRC 46 67 #define PCIE_1_AUX_CLK_SRC 47 68 #define PCIE_1_PIPE_CLK_SRC 48 69 #define PDM2_CLK_SRC 49 70 #define SDCC1_APPS_CLK_SRC 50 71 #define SDCC2_APPS_CLK_SRC 51 72 #define SDCC3_APPS_CLK_SRC 52 73 #define SDCC4_APPS_CLK_SRC 53 74 #define TSIF_REF_CLK_SRC 54 75 #define USB30_MOCK_UTMI_CLK_SRC 55 76 #define USB3_PHY_AUX_CLK_SRC 56 77 #define USB_HS_SYSTEM_CLK_SRC 57 78 #define GCC_BLSP1_AHB_CLK 58 79 #define GCC_BLSP1_QUP1_I2C_APPS_CLK 59 80 #define GCC_BLSP1_QUP1_SPI_APPS_CLK 60 81 #define GCC_BLSP1_QUP2_I2C_APPS_CLK 61 82 #define GCC_BLSP1_QUP2_SPI_APPS_CLK 62 83 #define GCC_BLSP1_QUP3_I2C_APPS_CLK 63 84 #define GCC_BLSP1_QUP3_SPI_APPS_CLK 64 85 #define GCC_BLSP1_QUP4_I2C_APPS_CLK 65 86 #define GCC_BLSP1_QUP4_SPI_APPS_CLK 66 87 #define GCC_BLSP1_QUP5_I2C_APPS_CLK 67 88 #define GCC_BLSP1_QUP5_SPI_APPS_CLK 68 89 #define GCC_BLSP1_QUP6_I2C_APPS_CLK 69 90 #define GCC_BLSP1_QUP6_SPI_APPS_CLK 70 91 #define GCC_BLSP1_UART1_APPS_CLK 71 92 #define GCC_BLSP1_UART2_APPS_CLK 72 93 #define GCC_BLSP1_UART3_APPS_CLK 73 94 #define GCC_BLSP1_UART4_APPS_CLK 74 95 #define GCC_BLSP1_UART5_APPS_CLK 75 96 #define GCC_BLSP1_UART6_APPS_CLK 76 97 #define GCC_BLSP2_AHB_CLK 77 98 #define GCC_BLSP2_QUP1_I2C_APPS_CLK 78 99 #define GCC_BLSP2_QUP1_SPI_APPS_CLK 79 100 #define GCC_BLSP2_QUP2_I2C_APPS_CLK 80 101 #define GCC_BLSP2_QUP2_SPI_APPS_CLK 81 102 #define GCC_BLSP2_QUP3_I2C_APPS_CLK 82 103 #define GCC_BLSP2_QUP3_SPI_APPS_CLK 83 104 #define GCC_BLSP2_QUP4_I2C_APPS_CLK 84 105 #define GCC_BLSP2_QUP4_SPI_APPS_CLK 85 106 #define GCC_BLSP2_QUP5_I2C_APPS_CLK 86 107 #define GCC_BLSP2_QUP5_SPI_APPS_CLK 87 108 #define GCC_BLSP2_QUP6_I2C_APPS_CLK 88 109 #define GCC_BLSP2_QUP6_SPI_APPS_CLK 89 110 #define GCC_BLSP2_UART1_APPS_CLK 90 111 #define GCC_BLSP2_UART2_APPS_CLK 91 112 #define GCC_BLSP2_UART3_APPS_CLK 92 113 #define GCC_BLSP2_UART4_APPS_CLK 93 114 #define GCC_BLSP2_UART5_APPS_CLK 94 115 #define GCC_BLSP2_UART6_APPS_CLK 95 116 #define GCC_GP1_CLK 96 117 #define GCC_GP2_CLK 97 118 #define GCC_GP3_CLK 98 119 #define GCC_PCIE_0_AUX_CLK 99 120 #define GCC_PCIE_0_PIPE_CLK 100 121 #define GCC_PCIE_1_AUX_CLK 101 122 #define GCC_PCIE_1_PIPE_CLK 102 123 #define GCC_PDM2_CLK 103 124 #define GCC_SDCC1_APPS_CLK 104 125 #define GCC_SDCC2_APPS_CLK 105 126 #define GCC_SDCC3_APPS_CLK 106 127 #define GCC_SDCC4_APPS_CLK 107 128 #define GCC_SYS_NOC_UFS_AXI_CLK 108 129 #define GCC_SYS_NOC_USB3_AXI_CLK 109 130 #define GCC_TSIF_REF_CLK 110 131 #define GCC_UFS_AXI_CLK 111 132 #define GCC_UFS_RX_CFG_CLK 112 133 #define GCC_UFS_TX_CFG_CLK 113 134 #define GCC_USB30_MASTER_CLK 114 135 #define GCC_USB30_MOCK_UTMI_CLK 115 136 #define GCC_USB3_PHY_AUX_CLK 116 137 #define GCC_USB_HS_SYSTEM_CLK 117 138 #define GCC_SDCC1_AHB_CLK 118 139 140 #endif 141