1 /* $NetBSD: qcom,gcc-msm8916.h,v 1.1.1.1 2017/06/15 20:14:23 jmcneill Exp $ */ 2 3 /* 4 * Copyright 2015 Linaro Limited 5 * 6 * This software is licensed under the terms of the GNU General Public 7 * License version 2, as published by the Free Software Foundation, and 8 * may be copied, distributed, and modified under those terms. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 */ 15 16 #ifndef _DT_BINDINGS_CLK_MSM_GCC_8916_H 17 #define _DT_BINDINGS_CLK_MSM_GCC_8916_H 18 19 #define GPLL0 0 20 #define GPLL0_VOTE 1 21 #define BIMC_PLL 2 22 #define BIMC_PLL_VOTE 3 23 #define GPLL1 4 24 #define GPLL1_VOTE 5 25 #define GPLL2 6 26 #define GPLL2_VOTE 7 27 #define PCNOC_BFDCD_CLK_SRC 8 28 #define SYSTEM_NOC_BFDCD_CLK_SRC 9 29 #define CAMSS_AHB_CLK_SRC 10 30 #define APSS_AHB_CLK_SRC 11 31 #define CSI0_CLK_SRC 12 32 #define CSI1_CLK_SRC 13 33 #define GFX3D_CLK_SRC 14 34 #define VFE0_CLK_SRC 15 35 #define BLSP1_QUP1_I2C_APPS_CLK_SRC 16 36 #define BLSP1_QUP1_SPI_APPS_CLK_SRC 17 37 #define BLSP1_QUP2_I2C_APPS_CLK_SRC 18 38 #define BLSP1_QUP2_SPI_APPS_CLK_SRC 19 39 #define BLSP1_QUP3_I2C_APPS_CLK_SRC 20 40 #define BLSP1_QUP3_SPI_APPS_CLK_SRC 21 41 #define BLSP1_QUP4_I2C_APPS_CLK_SRC 22 42 #define BLSP1_QUP4_SPI_APPS_CLK_SRC 23 43 #define BLSP1_QUP5_I2C_APPS_CLK_SRC 24 44 #define BLSP1_QUP5_SPI_APPS_CLK_SRC 25 45 #define BLSP1_QUP6_I2C_APPS_CLK_SRC 26 46 #define BLSP1_QUP6_SPI_APPS_CLK_SRC 27 47 #define BLSP1_UART1_APPS_CLK_SRC 28 48 #define BLSP1_UART2_APPS_CLK_SRC 29 49 #define CCI_CLK_SRC 30 50 #define CAMSS_GP0_CLK_SRC 31 51 #define CAMSS_GP1_CLK_SRC 32 52 #define JPEG0_CLK_SRC 33 53 #define MCLK0_CLK_SRC 34 54 #define MCLK1_CLK_SRC 35 55 #define CSI0PHYTIMER_CLK_SRC 36 56 #define CSI1PHYTIMER_CLK_SRC 37 57 #define CPP_CLK_SRC 38 58 #define CRYPTO_CLK_SRC 39 59 #define GP1_CLK_SRC 40 60 #define GP2_CLK_SRC 41 61 #define GP3_CLK_SRC 42 62 #define BYTE0_CLK_SRC 43 63 #define ESC0_CLK_SRC 44 64 #define MDP_CLK_SRC 45 65 #define PCLK0_CLK_SRC 46 66 #define VSYNC_CLK_SRC 47 67 #define PDM2_CLK_SRC 48 68 #define SDCC1_APPS_CLK_SRC 49 69 #define SDCC2_APPS_CLK_SRC 50 70 #define APSS_TCU_CLK_SRC 51 71 #define USB_HS_SYSTEM_CLK_SRC 52 72 #define VCODEC0_CLK_SRC 53 73 #define GCC_BLSP1_AHB_CLK 54 74 #define GCC_BLSP1_SLEEP_CLK 55 75 #define GCC_BLSP1_QUP1_I2C_APPS_CLK 56 76 #define GCC_BLSP1_QUP1_SPI_APPS_CLK 57 77 #define GCC_BLSP1_QUP2_I2C_APPS_CLK 58 78 #define GCC_BLSP1_QUP2_SPI_APPS_CLK 59 79 #define GCC_BLSP1_QUP3_I2C_APPS_CLK 60 80 #define GCC_BLSP1_QUP3_SPI_APPS_CLK 61 81 #define GCC_BLSP1_QUP4_I2C_APPS_CLK 62 82 #define GCC_BLSP1_QUP4_SPI_APPS_CLK 63 83 #define GCC_BLSP1_QUP5_I2C_APPS_CLK 64 84 #define GCC_BLSP1_QUP5_SPI_APPS_CLK 65 85 #define GCC_BLSP1_QUP6_I2C_APPS_CLK 66 86 #define GCC_BLSP1_QUP6_SPI_APPS_CLK 67 87 #define GCC_BLSP1_UART1_APPS_CLK 68 88 #define GCC_BLSP1_UART2_APPS_CLK 69 89 #define GCC_BOOT_ROM_AHB_CLK 70 90 #define GCC_CAMSS_CCI_AHB_CLK 71 91 #define GCC_CAMSS_CCI_CLK 72 92 #define GCC_CAMSS_CSI0_AHB_CLK 73 93 #define GCC_CAMSS_CSI0_CLK 74 94 #define GCC_CAMSS_CSI0PHY_CLK 75 95 #define GCC_CAMSS_CSI0PIX_CLK 76 96 #define GCC_CAMSS_CSI0RDI_CLK 77 97 #define GCC_CAMSS_CSI1_AHB_CLK 78 98 #define GCC_CAMSS_CSI1_CLK 79 99 #define GCC_CAMSS_CSI1PHY_CLK 80 100 #define GCC_CAMSS_CSI1PIX_CLK 81 101 #define GCC_CAMSS_CSI1RDI_CLK 82 102 #define GCC_CAMSS_CSI_VFE0_CLK 83 103 #define GCC_CAMSS_GP0_CLK 84 104 #define GCC_CAMSS_GP1_CLK 85 105 #define GCC_CAMSS_ISPIF_AHB_CLK 86 106 #define GCC_CAMSS_JPEG0_CLK 87 107 #define GCC_CAMSS_JPEG_AHB_CLK 88 108 #define GCC_CAMSS_JPEG_AXI_CLK 89 109 #define GCC_CAMSS_MCLK0_CLK 90 110 #define GCC_CAMSS_MCLK1_CLK 91 111 #define GCC_CAMSS_MICRO_AHB_CLK 92 112 #define GCC_CAMSS_CSI0PHYTIMER_CLK 93 113 #define GCC_CAMSS_CSI1PHYTIMER_CLK 94 114 #define GCC_CAMSS_AHB_CLK 95 115 #define GCC_CAMSS_TOP_AHB_CLK 96 116 #define GCC_CAMSS_CPP_AHB_CLK 97 117 #define GCC_CAMSS_CPP_CLK 98 118 #define GCC_CAMSS_VFE0_CLK 99 119 #define GCC_CAMSS_VFE_AHB_CLK 100 120 #define GCC_CAMSS_VFE_AXI_CLK 101 121 #define GCC_CRYPTO_AHB_CLK 102 122 #define GCC_CRYPTO_AXI_CLK 103 123 #define GCC_CRYPTO_CLK 104 124 #define GCC_OXILI_GMEM_CLK 105 125 #define GCC_GP1_CLK 106 126 #define GCC_GP2_CLK 107 127 #define GCC_GP3_CLK 108 128 #define GCC_MDSS_AHB_CLK 109 129 #define GCC_MDSS_AXI_CLK 110 130 #define GCC_MDSS_BYTE0_CLK 111 131 #define GCC_MDSS_ESC0_CLK 112 132 #define GCC_MDSS_MDP_CLK 113 133 #define GCC_MDSS_PCLK0_CLK 114 134 #define GCC_MDSS_VSYNC_CLK 115 135 #define GCC_MSS_CFG_AHB_CLK 116 136 #define GCC_OXILI_AHB_CLK 117 137 #define GCC_OXILI_GFX3D_CLK 118 138 #define GCC_PDM2_CLK 119 139 #define GCC_PDM_AHB_CLK 120 140 #define GCC_PRNG_AHB_CLK 121 141 #define GCC_SDCC1_AHB_CLK 122 142 #define GCC_SDCC1_APPS_CLK 123 143 #define GCC_SDCC2_AHB_CLK 124 144 #define GCC_SDCC2_APPS_CLK 125 145 #define GCC_GTCU_AHB_CLK 126 146 #define GCC_JPEG_TBU_CLK 127 147 #define GCC_MDP_TBU_CLK 128 148 #define GCC_SMMU_CFG_CLK 129 149 #define GCC_VENUS_TBU_CLK 130 150 #define GCC_VFE_TBU_CLK 131 151 #define GCC_USB2A_PHY_SLEEP_CLK 132 152 #define GCC_USB_HS_AHB_CLK 133 153 #define GCC_USB_HS_SYSTEM_CLK 134 154 #define GCC_VENUS0_AHB_CLK 135 155 #define GCC_VENUS0_AXI_CLK 136 156 #define GCC_VENUS0_VCODEC0_CLK 137 157 #define BIMC_DDR_CLK_SRC 138 158 #define GCC_APSS_TCU_CLK 139 159 #define GCC_GFX_TCU_CLK 140 160 #define BIMC_GPU_CLK_SRC 141 161 #define GCC_BIMC_GFX_CLK 142 162 #define GCC_BIMC_GPU_CLK 143 163 #define ULTAUDIO_LPAIF_PRI_I2S_CLK_SRC 144 164 #define ULTAUDIO_LPAIF_SEC_I2S_CLK_SRC 145 165 #define ULTAUDIO_LPAIF_AUX_I2S_CLK_SRC 146 166 #define ULTAUDIO_XO_CLK_SRC 147 167 #define ULTAUDIO_AHBFABRIC_CLK_SRC 148 168 #define CODEC_DIGCODEC_CLK_SRC 149 169 #define GCC_ULTAUDIO_PCNOC_MPORT_CLK 150 170 #define GCC_ULTAUDIO_PCNOC_SWAY_CLK 151 171 #define GCC_ULTAUDIO_AVSYNC_XO_CLK 152 172 #define GCC_ULTAUDIO_STC_XO_CLK 153 173 #define GCC_ULTAUDIO_AHBFABRIC_IXFABRIC_CLK 154 174 #define GCC_ULTAUDIO_AHBFABRIC_IXFABRIC_LPM_CLK 155 175 #define GCC_ULTAUDIO_LPAIF_PRI_I2S_CLK 156 176 #define GCC_ULTAUDIO_LPAIF_SEC_I2S_CLK 157 177 #define GCC_ULTAUDIO_LPAIF_AUX_I2S_CLK 158 178 #define GCC_CODEC_DIGCODEC_CLK 159 179 #define GCC_MSS_Q6_BIMC_AXI_CLK 160 180 181 /* Indexes for GDSCs */ 182 #define BIMC_GDSC 0 183 #define VENUS_GDSC 1 184 #define MDSS_GDSC 2 185 #define JPEG_GDSC 3 186 #define VFE_GDSC 4 187 #define OXILI_GDSC 5 188 189 #endif 190