1 /* $NetBSD: qcom,dispcc-sc7280.h,v 1.1.1.1 2021/11/07 16:49:57 jmcneill Exp $ */ 2 3 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 4 /* 5 * Copyright (c) 2021, The Linux Foundation. All rights reserved. 6 */ 7 8 #ifndef _DT_BINDINGS_CLK_QCOM_DISP_CC_SC7280_H 9 #define _DT_BINDINGS_CLK_QCOM_DISP_CC_SC7280_H 10 11 /* DISP_CC clocks */ 12 #define DISP_CC_PLL0 0 13 #define DISP_CC_MDSS_AHB_CLK 1 14 #define DISP_CC_MDSS_AHB_CLK_SRC 2 15 #define DISP_CC_MDSS_BYTE0_CLK 3 16 #define DISP_CC_MDSS_BYTE0_CLK_SRC 4 17 #define DISP_CC_MDSS_BYTE0_DIV_CLK_SRC 5 18 #define DISP_CC_MDSS_BYTE0_INTF_CLK 6 19 #define DISP_CC_MDSS_DP_AUX_CLK 7 20 #define DISP_CC_MDSS_DP_AUX_CLK_SRC 8 21 #define DISP_CC_MDSS_DP_CRYPTO_CLK 9 22 #define DISP_CC_MDSS_DP_CRYPTO_CLK_SRC 10 23 #define DISP_CC_MDSS_DP_LINK_CLK 11 24 #define DISP_CC_MDSS_DP_LINK_CLK_SRC 12 25 #define DISP_CC_MDSS_DP_LINK_DIV_CLK_SRC 13 26 #define DISP_CC_MDSS_DP_LINK_INTF_CLK 14 27 #define DISP_CC_MDSS_DP_PIXEL_CLK 15 28 #define DISP_CC_MDSS_DP_PIXEL_CLK_SRC 16 29 #define DISP_CC_MDSS_EDP_AUX_CLK 17 30 #define DISP_CC_MDSS_EDP_AUX_CLK_SRC 18 31 #define DISP_CC_MDSS_EDP_LINK_CLK 19 32 #define DISP_CC_MDSS_EDP_LINK_CLK_SRC 20 33 #define DISP_CC_MDSS_EDP_LINK_DIV_CLK_SRC 21 34 #define DISP_CC_MDSS_EDP_LINK_INTF_CLK 22 35 #define DISP_CC_MDSS_EDP_PIXEL_CLK 23 36 #define DISP_CC_MDSS_EDP_PIXEL_CLK_SRC 24 37 #define DISP_CC_MDSS_ESC0_CLK 25 38 #define DISP_CC_MDSS_ESC0_CLK_SRC 26 39 #define DISP_CC_MDSS_MDP_CLK 27 40 #define DISP_CC_MDSS_MDP_CLK_SRC 28 41 #define DISP_CC_MDSS_MDP_LUT_CLK 29 42 #define DISP_CC_MDSS_NON_GDSC_AHB_CLK 30 43 #define DISP_CC_MDSS_PCLK0_CLK 31 44 #define DISP_CC_MDSS_PCLK0_CLK_SRC 32 45 #define DISP_CC_MDSS_ROT_CLK 33 46 #define DISP_CC_MDSS_ROT_CLK_SRC 34 47 #define DISP_CC_MDSS_RSCC_AHB_CLK 35 48 #define DISP_CC_MDSS_RSCC_VSYNC_CLK 36 49 #define DISP_CC_MDSS_VSYNC_CLK 37 50 #define DISP_CC_MDSS_VSYNC_CLK_SRC 38 51 #define DISP_CC_SLEEP_CLK 39 52 #define DISP_CC_XO_CLK 40 53 54 /* DISP_CC power domains */ 55 #define DISP_CC_MDSS_CORE_GDSC 0 56 57 #endif 58