1 /* $NetBSD: histb-clock.h,v 1.1.1.4 2018/06/27 16:27:08 jmcneill Exp $ */ 2 3 /* 4 * Copyright (c) 2016 HiSilicon Technologies Co., Ltd. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program. If not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #ifndef __DTS_HISTB_CLOCK_H 21 #define __DTS_HISTB_CLOCK_H 22 23 /* clocks provided by core CRG */ 24 #define HISTB_OSC_CLK 0 25 #define HISTB_APB_CLK 1 26 #define HISTB_AHB_CLK 2 27 #define HISTB_UART1_CLK 3 28 #define HISTB_UART2_CLK 4 29 #define HISTB_UART3_CLK 5 30 #define HISTB_I2C0_CLK 6 31 #define HISTB_I2C1_CLK 7 32 #define HISTB_I2C2_CLK 8 33 #define HISTB_I2C3_CLK 9 34 #define HISTB_I2C4_CLK 10 35 #define HISTB_I2C5_CLK 11 36 #define HISTB_SPI0_CLK 12 37 #define HISTB_SPI1_CLK 13 38 #define HISTB_SPI2_CLK 14 39 #define HISTB_SCI_CLK 15 40 #define HISTB_FMC_CLK 16 41 #define HISTB_MMC_BIU_CLK 17 42 #define HISTB_MMC_CIU_CLK 18 43 #define HISTB_MMC_DRV_CLK 19 44 #define HISTB_MMC_SAMPLE_CLK 20 45 #define HISTB_SDIO0_BIU_CLK 21 46 #define HISTB_SDIO0_CIU_CLK 22 47 #define HISTB_SDIO0_DRV_CLK 23 48 #define HISTB_SDIO0_SAMPLE_CLK 24 49 #define HISTB_PCIE_AUX_CLK 25 50 #define HISTB_PCIE_PIPE_CLK 26 51 #define HISTB_PCIE_SYS_CLK 27 52 #define HISTB_PCIE_BUS_CLK 28 53 #define HISTB_ETH0_MAC_CLK 29 54 #define HISTB_ETH0_MACIF_CLK 30 55 #define HISTB_ETH1_MAC_CLK 31 56 #define HISTB_ETH1_MACIF_CLK 32 57 #define HISTB_COMBPHY1_CLK 33 58 #define HISTB_USB2_BUS_CLK 34 59 #define HISTB_USB2_PHY_CLK 35 60 #define HISTB_USB2_UTMI_CLK 36 61 #define HISTB_USB2_12M_CLK 37 62 #define HISTB_USB2_48M_CLK 38 63 #define HISTB_USB2_OTG_UTMI_CLK 39 64 #define HISTB_USB2_PHY1_REF_CLK 40 65 #define HISTB_USB2_PHY2_REF_CLK 41 66 #define HISTB_COMBPHY0_CLK 42 67 #define HISTB_USB3_BUS_CLK 43 68 #define HISTB_USB3_UTMI_CLK 44 69 #define HISTB_USB3_PIPE_CLK 45 70 #define HISTB_USB3_SUSPEND_CLK 46 71 #define HISTB_USB3_BUS_CLK1 47 72 #define HISTB_USB3_UTMI_CLK1 48 73 #define HISTB_USB3_PIPE_CLK1 49 74 #define HISTB_USB3_SUSPEND_CLK1 50 75 76 /* clocks provided by mcu CRG */ 77 #define HISTB_MCE_CLK 1 78 #define HISTB_IR_CLK 2 79 #define HISTB_TIMER01_CLK 3 80 #define HISTB_LEDC_CLK 4 81 #define HISTB_UART0_CLK 5 82 #define HISTB_LSADC_CLK 6 83 84 #endif /* __DTS_HISTB_CLOCK_H */ 85