1*d0c4f7d9Sjmcneill /** 2*d0c4f7d9Sjmcneill * Copyright (c) 2010-2012 Broadcom. All rights reserved. 3*d0c4f7d9Sjmcneill * 4*d0c4f7d9Sjmcneill * Redistribution and use in source and binary forms, with or without 5*d0c4f7d9Sjmcneill * modification, are permitted provided that the following conditions 6*d0c4f7d9Sjmcneill * are met: 7*d0c4f7d9Sjmcneill * 1. Redistributions of source code must retain the above copyright 8*d0c4f7d9Sjmcneill * notice, this list of conditions, and the following disclaimer, 9*d0c4f7d9Sjmcneill * without modification. 10*d0c4f7d9Sjmcneill * 2. Redistributions in binary form must reproduce the above copyright 11*d0c4f7d9Sjmcneill * notice, this list of conditions and the following disclaimer in the 12*d0c4f7d9Sjmcneill * documentation and/or other materials provided with the distribution. 13*d0c4f7d9Sjmcneill * 3. The names of the above-listed copyright holders may not be used 14*d0c4f7d9Sjmcneill * to endorse or promote products derived from this software without 15*d0c4f7d9Sjmcneill * specific prior written permission. 16*d0c4f7d9Sjmcneill * 17*d0c4f7d9Sjmcneill * ALTERNATIVELY, this software may be distributed under the terms of the 18*d0c4f7d9Sjmcneill * GNU General Public License ("GPL") version 2, as published by the Free 19*d0c4f7d9Sjmcneill * Software Foundation. 20*d0c4f7d9Sjmcneill * 21*d0c4f7d9Sjmcneill * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS 22*d0c4f7d9Sjmcneill * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 23*d0c4f7d9Sjmcneill * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24*d0c4f7d9Sjmcneill * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 25*d0c4f7d9Sjmcneill * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 26*d0c4f7d9Sjmcneill * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 27*d0c4f7d9Sjmcneill * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 28*d0c4f7d9Sjmcneill * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 29*d0c4f7d9Sjmcneill * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 30*d0c4f7d9Sjmcneill * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 31*d0c4f7d9Sjmcneill * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32*d0c4f7d9Sjmcneill */ 33*d0c4f7d9Sjmcneill 34*d0c4f7d9Sjmcneill #ifndef _VCHI_MESSAGE_H_ 35*d0c4f7d9Sjmcneill #define _VCHI_MESSAGE_H_ 36*d0c4f7d9Sjmcneill 37*d0c4f7d9Sjmcneill #include "interface/vchi/vchi_cfg_internal.h" 38*d0c4f7d9Sjmcneill #include "interface/vchi/vchi_common.h" 39*d0c4f7d9Sjmcneill 40*d0c4f7d9Sjmcneill 41*d0c4f7d9Sjmcneill typedef enum message_event_type { 42*d0c4f7d9Sjmcneill MESSAGE_EVENT_NONE, 43*d0c4f7d9Sjmcneill MESSAGE_EVENT_NOP, 44*d0c4f7d9Sjmcneill MESSAGE_EVENT_MESSAGE, 45*d0c4f7d9Sjmcneill MESSAGE_EVENT_SLOT_COMPLETE, 46*d0c4f7d9Sjmcneill MESSAGE_EVENT_RX_BULK_PAUSED, 47*d0c4f7d9Sjmcneill MESSAGE_EVENT_RX_BULK_COMPLETE, 48*d0c4f7d9Sjmcneill MESSAGE_EVENT_TX_COMPLETE, 49*d0c4f7d9Sjmcneill MESSAGE_EVENT_MSG_DISCARDED 50*d0c4f7d9Sjmcneill } MESSAGE_EVENT_TYPE_T; 51*d0c4f7d9Sjmcneill 52*d0c4f7d9Sjmcneill typedef enum vchi_msg_flags 53*d0c4f7d9Sjmcneill { 54*d0c4f7d9Sjmcneill VCHI_MSG_FLAGS_NONE = 0x0, 55*d0c4f7d9Sjmcneill VCHI_MSG_FLAGS_TERMINATE_DMA = 0x1 56*d0c4f7d9Sjmcneill } VCHI_MSG_FLAGS_T; 57*d0c4f7d9Sjmcneill 58*d0c4f7d9Sjmcneill typedef enum message_tx_channel 59*d0c4f7d9Sjmcneill { 60*d0c4f7d9Sjmcneill MESSAGE_TX_CHANNEL_MESSAGE = 0, 61*d0c4f7d9Sjmcneill MESSAGE_TX_CHANNEL_BULK = 1 // drivers may provide multiple bulk channels, from 1 upwards 62*d0c4f7d9Sjmcneill } MESSAGE_TX_CHANNEL_T; 63*d0c4f7d9Sjmcneill 64*d0c4f7d9Sjmcneill // Macros used for cycling through bulk channels 65*d0c4f7d9Sjmcneill #define MESSAGE_TX_CHANNEL_BULK_PREV(c) (MESSAGE_TX_CHANNEL_BULK+((c)-MESSAGE_TX_CHANNEL_BULK+VCHI_MAX_BULK_TX_CHANNELS_PER_CONNECTION-1)%VCHI_MAX_BULK_TX_CHANNELS_PER_CONNECTION) 66*d0c4f7d9Sjmcneill #define MESSAGE_TX_CHANNEL_BULK_NEXT(c) (MESSAGE_TX_CHANNEL_BULK+((c)-MESSAGE_TX_CHANNEL_BULK+1)%VCHI_MAX_BULK_TX_CHANNELS_PER_CONNECTION) 67*d0c4f7d9Sjmcneill 68*d0c4f7d9Sjmcneill typedef enum message_rx_channel 69*d0c4f7d9Sjmcneill { 70*d0c4f7d9Sjmcneill MESSAGE_RX_CHANNEL_MESSAGE = 0, 71*d0c4f7d9Sjmcneill MESSAGE_RX_CHANNEL_BULK = 1 // drivers may provide multiple bulk channels, from 1 upwards 72*d0c4f7d9Sjmcneill } MESSAGE_RX_CHANNEL_T; 73*d0c4f7d9Sjmcneill 74*d0c4f7d9Sjmcneill // Message receive slot information 75*d0c4f7d9Sjmcneill typedef struct rx_msg_slot_info { 76*d0c4f7d9Sjmcneill 77*d0c4f7d9Sjmcneill struct rx_msg_slot_info *next; 78*d0c4f7d9Sjmcneill //struct slot_info *prev; 79*d0c4f7d9Sjmcneill #if !defined VCHI_COARSE_LOCKING 80*d0c4f7d9Sjmcneill struct semaphore sem; 81*d0c4f7d9Sjmcneill #endif 82*d0c4f7d9Sjmcneill 83*d0c4f7d9Sjmcneill uint8_t *addr; // base address of slot 84*d0c4f7d9Sjmcneill uint32_t len; // length of slot in bytes 85*d0c4f7d9Sjmcneill 86*d0c4f7d9Sjmcneill uint32_t write_ptr; // hardware causes this to advance 87*d0c4f7d9Sjmcneill uint32_t read_ptr; // this module does the reading 88*d0c4f7d9Sjmcneill int active; // is this slot in the hardware dma fifo? 89*d0c4f7d9Sjmcneill uint32_t msgs_parsed; // count how many messages are in this slot 90*d0c4f7d9Sjmcneill uint32_t msgs_released; // how many messages have been released 91*d0c4f7d9Sjmcneill void *state; // connection state information 92*d0c4f7d9Sjmcneill uint8_t ref_count[VCHI_MAX_SERVICES_PER_CONNECTION]; // reference count for slots held by services 93*d0c4f7d9Sjmcneill } RX_MSG_SLOTINFO_T; 94*d0c4f7d9Sjmcneill 95*d0c4f7d9Sjmcneill // The message driver no longer needs to know about the fields of RX_BULK_SLOTINFO_T - sort this out. 96*d0c4f7d9Sjmcneill // In particular, it mustn't use addr and len - they're the client buffer, but the message 97*d0c4f7d9Sjmcneill // driver will be tasked with sending the aligned core section. 98*d0c4f7d9Sjmcneill typedef struct rx_bulk_slotinfo_t { 99*d0c4f7d9Sjmcneill struct rx_bulk_slotinfo_t *next; 100*d0c4f7d9Sjmcneill 101*d0c4f7d9Sjmcneill struct semaphore *blocking; 102*d0c4f7d9Sjmcneill 103*d0c4f7d9Sjmcneill // needed by DMA 104*d0c4f7d9Sjmcneill void *addr; 105*d0c4f7d9Sjmcneill uint32_t len; 106*d0c4f7d9Sjmcneill 107*d0c4f7d9Sjmcneill // needed for the callback 108*d0c4f7d9Sjmcneill void *service; 109*d0c4f7d9Sjmcneill void *handle; 110*d0c4f7d9Sjmcneill VCHI_FLAGS_T flags; 111*d0c4f7d9Sjmcneill } RX_BULK_SLOTINFO_T; 112*d0c4f7d9Sjmcneill 113*d0c4f7d9Sjmcneill 114*d0c4f7d9Sjmcneill /* ---------------------------------------------------------------------- 115*d0c4f7d9Sjmcneill * each connection driver will have a pool of the following struct. 116*d0c4f7d9Sjmcneill * 117*d0c4f7d9Sjmcneill * the pool will be managed by vchi_qman_* 118*d0c4f7d9Sjmcneill * this means there will be multiple queues (single linked lists) 119*d0c4f7d9Sjmcneill * a given struct message_info will be on exactly one of these queues 120*d0c4f7d9Sjmcneill * at any one time 121*d0c4f7d9Sjmcneill * -------------------------------------------------------------------- */ 122*d0c4f7d9Sjmcneill typedef struct rx_message_info { 123*d0c4f7d9Sjmcneill 124*d0c4f7d9Sjmcneill struct message_info *next; 125*d0c4f7d9Sjmcneill //struct message_info *prev; 126*d0c4f7d9Sjmcneill 127*d0c4f7d9Sjmcneill uint8_t *addr; 128*d0c4f7d9Sjmcneill uint32_t len; 129*d0c4f7d9Sjmcneill RX_MSG_SLOTINFO_T *slot; // points to whichever slot contains this message 130*d0c4f7d9Sjmcneill uint32_t tx_timestamp; 131*d0c4f7d9Sjmcneill uint32_t rx_timestamp; 132*d0c4f7d9Sjmcneill 133*d0c4f7d9Sjmcneill } RX_MESSAGE_INFO_T; 134*d0c4f7d9Sjmcneill 135*d0c4f7d9Sjmcneill typedef struct { 136*d0c4f7d9Sjmcneill MESSAGE_EVENT_TYPE_T type; 137*d0c4f7d9Sjmcneill 138*d0c4f7d9Sjmcneill struct { 139*d0c4f7d9Sjmcneill // for messages 140*d0c4f7d9Sjmcneill void *addr; // address of message 141*d0c4f7d9Sjmcneill uint16_t slot_delta; // whether this message indicated slot delta 142*d0c4f7d9Sjmcneill uint32_t len; // length of message 143*d0c4f7d9Sjmcneill RX_MSG_SLOTINFO_T *slot; // slot this message is in 144*d0c4f7d9Sjmcneill int32_t service; // service id this message is destined for 145*d0c4f7d9Sjmcneill uint32_t tx_timestamp; // timestamp from the header 146*d0c4f7d9Sjmcneill uint32_t rx_timestamp; // timestamp when we parsed it 147*d0c4f7d9Sjmcneill } message; 148*d0c4f7d9Sjmcneill 149*d0c4f7d9Sjmcneill // FIXME: cleanup slot reporting... 150*d0c4f7d9Sjmcneill RX_MSG_SLOTINFO_T *rx_msg; 151*d0c4f7d9Sjmcneill RX_BULK_SLOTINFO_T *rx_bulk; 152*d0c4f7d9Sjmcneill void *tx_handle; 153*d0c4f7d9Sjmcneill MESSAGE_TX_CHANNEL_T tx_channel; 154*d0c4f7d9Sjmcneill 155*d0c4f7d9Sjmcneill } MESSAGE_EVENT_T; 156*d0c4f7d9Sjmcneill 157*d0c4f7d9Sjmcneill 158*d0c4f7d9Sjmcneill // callbacks 159*d0c4f7d9Sjmcneill typedef void VCHI_MESSAGE_DRIVER_EVENT_CALLBACK_T( void *state ); 160*d0c4f7d9Sjmcneill 161*d0c4f7d9Sjmcneill typedef struct { 162*d0c4f7d9Sjmcneill VCHI_MESSAGE_DRIVER_EVENT_CALLBACK_T *event_callback; 163*d0c4f7d9Sjmcneill } VCHI_MESSAGE_DRIVER_OPEN_T; 164*d0c4f7d9Sjmcneill 165*d0c4f7d9Sjmcneill 166*d0c4f7d9Sjmcneill // handle to this instance of message driver (as returned by ->open) 167*d0c4f7d9Sjmcneill typedef struct opaque_mhandle_t *VCHI_MDRIVER_HANDLE_T; 168*d0c4f7d9Sjmcneill 169*d0c4f7d9Sjmcneill struct opaque_vchi_message_driver_t { 170*d0c4f7d9Sjmcneill VCHI_MDRIVER_HANDLE_T *(*open)( VCHI_MESSAGE_DRIVER_OPEN_T *params, void *state ); 171*d0c4f7d9Sjmcneill int32_t (*suspending)( VCHI_MDRIVER_HANDLE_T *handle ); 172*d0c4f7d9Sjmcneill int32_t (*resumed)( VCHI_MDRIVER_HANDLE_T *handle ); 173*d0c4f7d9Sjmcneill int32_t (*power_control)( VCHI_MDRIVER_HANDLE_T *handle, MESSAGE_TX_CHANNEL_T, int32_t enable ); 174*d0c4f7d9Sjmcneill int32_t (*add_msg_rx_slot)( VCHI_MDRIVER_HANDLE_T *handle, RX_MSG_SLOTINFO_T *slot ); // rx message 175*d0c4f7d9Sjmcneill int32_t (*add_bulk_rx)( VCHI_MDRIVER_HANDLE_T *handle, void *data, uint32_t len, RX_BULK_SLOTINFO_T *slot ); // rx data (bulk) 176*d0c4f7d9Sjmcneill int32_t (*send)( VCHI_MDRIVER_HANDLE_T *handle, MESSAGE_TX_CHANNEL_T channel, const void *data, uint32_t len, VCHI_MSG_FLAGS_T flags, void *send_handle ); // tx (message & bulk) 177*d0c4f7d9Sjmcneill void (*next_event)( VCHI_MDRIVER_HANDLE_T *handle, MESSAGE_EVENT_T *event ); // get the next event from message_driver 178*d0c4f7d9Sjmcneill int32_t (*enable)( VCHI_MDRIVER_HANDLE_T *handle ); 179*d0c4f7d9Sjmcneill int32_t (*form_message)( VCHI_MDRIVER_HANDLE_T *handle, int32_t service_id, VCHI_MSG_VECTOR_T *vector, uint32_t count, void 180*d0c4f7d9Sjmcneill *address, uint32_t length_avail, uint32_t max_total_length, int32_t pad_to_fill, int32_t allow_partial ); 181*d0c4f7d9Sjmcneill 182*d0c4f7d9Sjmcneill int32_t (*update_message)( VCHI_MDRIVER_HANDLE_T *handle, void *dest, int16_t *slot_count ); 183*d0c4f7d9Sjmcneill int32_t (*buffer_aligned)( VCHI_MDRIVER_HANDLE_T *handle, int tx, int uncached, const void *address, const uint32_t length ); 184*d0c4f7d9Sjmcneill void * (*allocate_buffer)( VCHI_MDRIVER_HANDLE_T *handle, uint32_t *length ); 185*d0c4f7d9Sjmcneill void (*free_buffer)( VCHI_MDRIVER_HANDLE_T *handle, void *address ); 186*d0c4f7d9Sjmcneill int (*rx_slot_size)( VCHI_MDRIVER_HANDLE_T *handle, int msg_size ); 187*d0c4f7d9Sjmcneill int (*tx_slot_size)( VCHI_MDRIVER_HANDLE_T *handle, int msg_size ); 188*d0c4f7d9Sjmcneill 189*d0c4f7d9Sjmcneill int32_t (*tx_supports_terminate)( const VCHI_MDRIVER_HANDLE_T *handle, MESSAGE_TX_CHANNEL_T channel ); 190*d0c4f7d9Sjmcneill uint32_t (*tx_bulk_chunk_size)( const VCHI_MDRIVER_HANDLE_T *handle, MESSAGE_TX_CHANNEL_T channel ); 191*d0c4f7d9Sjmcneill int (*tx_alignment)( const VCHI_MDRIVER_HANDLE_T *handle, MESSAGE_TX_CHANNEL_T channel ); 192*d0c4f7d9Sjmcneill int (*rx_alignment)( const VCHI_MDRIVER_HANDLE_T *handle, MESSAGE_RX_CHANNEL_T channel ); 193*d0c4f7d9Sjmcneill void (*form_bulk_aux)( VCHI_MDRIVER_HANDLE_T *handle, MESSAGE_TX_CHANNEL_T channel, const void *data, uint32_t len, uint32_t chunk_size, const void **aux_data, int32_t *aux_len ); 194*d0c4f7d9Sjmcneill void (*debug)( VCHI_MDRIVER_HANDLE_T *handle ); 195*d0c4f7d9Sjmcneill }; 196*d0c4f7d9Sjmcneill 197*d0c4f7d9Sjmcneill 198*d0c4f7d9Sjmcneill #endif // _VCHI_MESSAGE_H_ 199*d0c4f7d9Sjmcneill 200*d0c4f7d9Sjmcneill /****************************** End of file ***********************************/ 201