xref: /netbsd-src/sys/external/bsd/dwc2/dwc2var.h (revision 6a493d6bc668897c91594964a732d38505b70cbb)
1 /*	$NetBSD: dwc2var.h,v 1.3 2013/10/22 12:57:40 skrll Exp $	*/
2 
3 /*-
4  * Copyright (c) 2013 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Nick Hudson
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #ifndef	_DWC2VAR_H_
33 #define	_DWC2VAR_H_
34 
35 #include <sys/pool.h>
36 
37 #define DWC2_MAXISOCPACKETS	16
38 struct dwc2_hsotg;
39 struct dwc2_qtd;
40 
41 struct dwc2_xfer {
42 	struct usbd_xfer xfer;			/* Needs to be first */
43 	struct usb_task	abort_task;
44 
45 	struct dwc2_hcd_urb *urb;
46 	int packet_count;
47 
48 	TAILQ_ENTRY(dwc2_xfer) xnext;		/* list of complete xfers */
49 };
50 
51 struct dwc2_pipe {
52 	struct usbd_pipe pipe;		/* Must be first */
53 
54 	/* Current transfer */
55 	void *priv;			/* QH */
56 
57 	 /* DMA buffer for control endpoint requests */
58 	usb_dma_t req_dma;
59 };
60 
61 
62 #define	DWC2_BUS2SC(bus)	((bus)->hci_private)
63 #define	DWC2_PIPE2SC(pipe)	DWC2_BUS2SC((pipe)->device->bus)
64 #define	DWC2_XFER2SC(xfer)	DWC2_PIPE2SC((xfer)->pipe)
65 #define	DWC2_DPIPE2SC(d)	DWC2_BUS2SC((d)->pipe.device->bus)
66 
67 #define	DWC2_XFER2DXFER(x)	(struct dwc2_xfer *)(x)
68 
69 #define	DWC2_XFER2DPIPE(x)	(struct dwc2_pipe *)(x)->pipe;
70 #define	DWC2_PIPE2DPIPE(p)	(struct dwc2_pipe *)(p)
71 
72 
73 typedef struct dwc2_softc {
74 	device_t sc_dev;
75 
76  	bus_space_tag_t		sc_iot;
77  	bus_space_handle_t	sc_ioh;
78  	bus_dma_tag_t		sc_dmat;
79 	struct dwc2_core_params *sc_params;
80 
81 	/*
82 	 * Private
83 	 */
84 
85 	struct usbd_bus sc_bus;
86 	struct dwc2_hsotg *sc_hsotg;
87 
88 	kmutex_t sc_lock;
89 
90 	bool sc_hcdenabled;
91 	void *sc_rhc_si;
92 
93 	usbd_xfer_handle sc_intrxfer;
94 
95 	device_t sc_child;		/* /dev/usb# device */
96 	char sc_dying;
97 	struct usb_dma_reserve sc_dma_reserve;
98 
99 	char sc_vendor[32];		/* vendor string for root hub */
100 	int sc_id_vendor;		/* vendor ID for root hub */
101 
102 	TAILQ_HEAD(, dwc2_xfer) sc_complete;	/* complete transfers */
103 
104 	uint8_t sc_addr;		/* device address */
105 	uint8_t sc_conf;		/* device configuration */
106 
107 	pool_cache_t sc_xferpool;
108 	pool_cache_t sc_qhpool;
109 	pool_cache_t sc_qtdpool;
110 
111 } dwc2_softc_t;
112 
113 int		dwc2_init(struct dwc2_softc *);
114 int		dwc2_intr(void *);
115 int		dwc2_detach(dwc2_softc_t *, int);
116 bool		dwc2_shutdown(device_t, int);
117 void		dwc2_childdet(device_t, device_t);
118 int		dwc2_activate(device_t, enum devact);
119 bool		dwc2_resume(device_t, const pmf_qual_t *);
120 bool		dwc2_suspend(device_t, const pmf_qual_t *);
121 
122 void		dwc2_worker(struct work *, void *);
123 
124 void		dwc2_host_complete(struct dwc2_hsotg *, struct dwc2_qtd *,
125 				   int);
126 
127 static inline void
128 dwc2_root_intr(dwc2_softc_t *sc)
129 {
130 
131 	softint_schedule(sc->sc_rhc_si);
132 }
133 
134 #endif	/* _DWC_OTGVAR_H_ */
135