xref: /netbsd-src/sys/external/bsd/dwc2/dwc2.c (revision 6a493d6bc668897c91594964a732d38505b70cbb)
1 /*	$NetBSD: dwc2.c,v 1.21 2013/11/28 06:56:36 skrll Exp $	*/
2 
3 /*-
4  * Copyright (c) 2013 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Nick Hudson
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: dwc2.c,v 1.21 2013/11/28 06:56:36 skrll Exp $");
34 
35 #include "opt_usb.h"
36 
37 #include <sys/param.h>
38 #include <sys/systm.h>
39 #include <sys/kmem.h>
40 #include <sys/kernel.h>
41 #include <sys/device.h>
42 #include <sys/select.h>
43 #include <sys/proc.h>
44 #include <sys/queue.h>
45 #include <sys/cpu.h>
46 
47 #include <machine/endian.h>
48 
49 #include <dev/usb/usb.h>
50 #include <dev/usb/usbdi.h>
51 #include <dev/usb/usbdivar.h>
52 #include <dev/usb/usb_mem.h>
53 
54 #include <dev/usb/usbroothub_subr.h>
55 
56 #include <dwc2/dwc2.h>
57 #include <dwc2/dwc2var.h>
58 
59 #include "dwc2_core.h"
60 #include "dwc2_hcd.h"
61 
62 #ifdef DWC2_COUNTERS
63 #define	DWC2_EVCNT_ADD(a,b)	((void)((a).ev_count += (b)))
64 #else
65 #define	DWC2_EVCNT_ADD(a,b)	do { } while (/*CONSTCOND*/0)
66 #endif
67 #define	DWC2_EVCNT_INCR(a)	DWC2_EVCNT_ADD((a), 1)
68 
69 #ifdef DWC2_DEBUG
70 #define	DPRINTFN(n,fmt,...) do {			\
71 	if (dwc2debug >= (n)) {			\
72 		printf("%s: " fmt,			\
73 		__FUNCTION__,## __VA_ARGS__);		\
74 	}						\
75 } while (0)
76 #define	DPRINTF(...)	DPRINTFN(1, __VA_ARGS__)
77 int dwc2debug = 0;
78 #else
79 #define	DPRINTF(...) do { } while (0)
80 #define	DPRINTFN(...) do { } while (0)
81 #endif
82 
83 Static usbd_status	dwc2_open(usbd_pipe_handle);
84 Static void		dwc2_poll(struct usbd_bus *);
85 Static void		dwc2_softintr(void *);
86 Static void		dwc2_waitintr(struct dwc2_softc *, usbd_xfer_handle);
87 
88 Static usbd_status	dwc2_allocm(struct usbd_bus *, usb_dma_t *, uint32_t);
89 Static void		dwc2_freem(struct usbd_bus *, usb_dma_t *);
90 
91 Static usbd_xfer_handle	dwc2_allocx(struct usbd_bus *);
92 Static void		dwc2_freex(struct usbd_bus *, usbd_xfer_handle);
93 Static void		dwc2_get_lock(struct usbd_bus *, kmutex_t **);
94 
95 Static usbd_status	dwc2_root_ctrl_transfer(usbd_xfer_handle);
96 Static usbd_status	dwc2_root_ctrl_start(usbd_xfer_handle);
97 Static void		dwc2_root_ctrl_abort(usbd_xfer_handle);
98 Static void		dwc2_root_ctrl_close(usbd_pipe_handle);
99 Static void		dwc2_root_ctrl_done(usbd_xfer_handle);
100 
101 Static usbd_status	dwc2_root_intr_transfer(usbd_xfer_handle);
102 Static usbd_status	dwc2_root_intr_start(usbd_xfer_handle);
103 Static void		dwc2_root_intr_abort(usbd_xfer_handle);
104 Static void		dwc2_root_intr_close(usbd_pipe_handle);
105 Static void		dwc2_root_intr_done(usbd_xfer_handle);
106 
107 Static usbd_status	dwc2_device_ctrl_transfer(usbd_xfer_handle);
108 Static usbd_status	dwc2_device_ctrl_start(usbd_xfer_handle);
109 Static void		dwc2_device_ctrl_abort(usbd_xfer_handle);
110 Static void		dwc2_device_ctrl_close(usbd_pipe_handle);
111 Static void		dwc2_device_ctrl_done(usbd_xfer_handle);
112 
113 Static usbd_status	dwc2_device_bulk_transfer(usbd_xfer_handle);
114 Static usbd_status	dwc2_device_bulk_start(usbd_xfer_handle);
115 Static void		dwc2_device_bulk_abort(usbd_xfer_handle);
116 Static void		dwc2_device_bulk_close(usbd_pipe_handle);
117 Static void		dwc2_device_bulk_done(usbd_xfer_handle);
118 
119 Static usbd_status	dwc2_device_intr_transfer(usbd_xfer_handle);
120 Static usbd_status	dwc2_device_intr_start(usbd_xfer_handle);
121 Static void		dwc2_device_intr_abort(usbd_xfer_handle);
122 Static void		dwc2_device_intr_close(usbd_pipe_handle);
123 Static void		dwc2_device_intr_done(usbd_xfer_handle);
124 
125 Static usbd_status	dwc2_device_isoc_transfer(usbd_xfer_handle);
126 Static usbd_status	dwc2_device_isoc_start(usbd_xfer_handle);
127 Static void		dwc2_device_isoc_abort(usbd_xfer_handle);
128 Static void		dwc2_device_isoc_close(usbd_pipe_handle);
129 Static void		dwc2_device_isoc_done(usbd_xfer_handle);
130 
131 Static usbd_status	dwc2_device_start(usbd_xfer_handle);
132 
133 Static void		dwc2_close_pipe(usbd_pipe_handle);
134 Static void		dwc2_abort_xfer(usbd_xfer_handle, usbd_status);
135 
136 Static void		dwc2_device_clear_toggle(usbd_pipe_handle);
137 Static void		dwc2_noop(usbd_pipe_handle pipe);
138 
139 Static int		dwc2_interrupt(struct dwc2_softc *);
140 Static void		dwc2_rhc(void *);
141 
142 Static void		dwc2_timeout(void *);
143 Static void		dwc2_timeout_task(void *);
144 
145 
146 
147 static inline void
148 dwc2_allocate_bus_bandwidth(struct dwc2_hsotg *hsotg, u16 bw,
149 			    usbd_xfer_handle xfer)
150 {
151 }
152 
153 static inline void
154 dwc2_free_bus_bandwidth(struct dwc2_hsotg *hsotg, u16 bw,
155 			usbd_xfer_handle xfer)
156 {
157 }
158 
159 #define DWC2_INTR_ENDPT 1
160 
161 Static const struct usbd_bus_methods dwc2_bus_methods = {
162 	.open_pipe =	dwc2_open,
163 	.soft_intr =	dwc2_softintr,
164 	.do_poll =	dwc2_poll,
165 	.allocm =	dwc2_allocm,
166 	.freem =	dwc2_freem,
167 	.allocx =	dwc2_allocx,
168 	.freex =	dwc2_freex,
169 	.get_lock =	dwc2_get_lock,
170 };
171 
172 Static const struct usbd_pipe_methods dwc2_root_ctrl_methods = {
173 	.transfer =	dwc2_root_ctrl_transfer,
174 	.start =	dwc2_root_ctrl_start,
175 	.abort =	dwc2_root_ctrl_abort,
176 	.close =	dwc2_root_ctrl_close,
177 	.cleartoggle =	dwc2_noop,
178 	.done =		dwc2_root_ctrl_done,
179 };
180 
181 Static const struct usbd_pipe_methods dwc2_root_intr_methods = {
182 	.transfer =	dwc2_root_intr_transfer,
183 	.start =	dwc2_root_intr_start,
184 	.abort =	dwc2_root_intr_abort,
185 	.close =	dwc2_root_intr_close,
186 	.cleartoggle =	dwc2_noop,
187 	.done =		dwc2_root_intr_done,
188 };
189 
190 Static const struct usbd_pipe_methods dwc2_device_ctrl_methods = {
191 	.transfer =	dwc2_device_ctrl_transfer,
192 	.start =	dwc2_device_ctrl_start,
193 	.abort =	dwc2_device_ctrl_abort,
194 	.close =	dwc2_device_ctrl_close,
195 	.cleartoggle =	dwc2_noop,
196 	.done =		dwc2_device_ctrl_done,
197 };
198 
199 Static const struct usbd_pipe_methods dwc2_device_intr_methods = {
200 	.transfer =	dwc2_device_intr_transfer,
201 	.start =	dwc2_device_intr_start,
202 	.abort =	dwc2_device_intr_abort,
203 	.close =	dwc2_device_intr_close,
204 	.cleartoggle =	dwc2_device_clear_toggle,
205 	.done =		dwc2_device_intr_done,
206 };
207 
208 Static const struct usbd_pipe_methods dwc2_device_bulk_methods = {
209 	.transfer =	dwc2_device_bulk_transfer,
210 	.start =	dwc2_device_bulk_start,
211 	.abort =	dwc2_device_bulk_abort,
212 	.close =	dwc2_device_bulk_close,
213 	.cleartoggle =	dwc2_device_clear_toggle,
214 	.done =		dwc2_device_bulk_done,
215 };
216 
217 Static const struct usbd_pipe_methods dwc2_device_isoc_methods = {
218 	.transfer =	dwc2_device_isoc_transfer,
219 	.start =	dwc2_device_isoc_start,
220 	.abort =	dwc2_device_isoc_abort,
221 	.close =	dwc2_device_isoc_close,
222 	.cleartoggle =	dwc2_noop,
223 	.done =		dwc2_device_isoc_done,
224 };
225 
226 Static usbd_status
227 dwc2_allocm(struct usbd_bus *bus, usb_dma_t *dma, uint32_t size)
228 {
229 	struct dwc2_softc *sc = DWC2_BUS2SC(bus);
230 	usbd_status status;
231 
232 	DPRINTFN(10, "\n");
233 
234 	status = usb_allocmem(&sc->sc_bus, size, 0, dma);
235 	if (status == USBD_NOMEM)
236 		status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size);
237 	return status;
238 }
239 
240 Static void
241 dwc2_freem(struct usbd_bus *bus, usb_dma_t *dma)
242 {
243         struct dwc2_softc *sc = DWC2_BUS2SC(bus);
244 
245 	DPRINTFN(10, "\n");
246 
247         if (dma->block->flags & USB_DMA_RESERVE) {
248                 usb_reserve_freem(&sc->sc_dma_reserve, dma);
249                 return;
250         }
251         usb_freemem(&sc->sc_bus, dma);
252 }
253 
254 usbd_xfer_handle
255 dwc2_allocx(struct usbd_bus *bus)
256 {
257 	struct dwc2_softc *sc = DWC2_BUS2SC(bus);
258 	struct dwc2_xfer *dxfer;
259 
260 	DPRINTFN(10, "\n");
261 
262 	DWC2_EVCNT_INCR(sc->sc_ev_xferpoolget);
263 	dxfer = pool_cache_get(sc->sc_xferpool, PR_NOWAIT);
264 	if (dxfer != NULL) {
265 		memset(dxfer, 0, sizeof(*dxfer));
266 
267 		dxfer->urb = dwc2_hcd_urb_alloc(sc->sc_hsotg,
268 		    DWC2_MAXISOCPACKETS, GFP_KERNEL);
269 
270 #ifdef DIAGNOSTIC
271 		dxfer->xfer.busy_free = XFER_BUSY;
272 #endif
273 	}
274 	return (usbd_xfer_handle)dxfer;
275 }
276 
277 void
278 dwc2_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
279 {
280 	struct dwc2_xfer *dxfer = DWC2_XFER2DXFER(xfer);
281 	struct dwc2_softc *sc = DWC2_BUS2SC(bus);
282 
283 	DPRINTFN(10, "\n");
284 
285 #ifdef DIAGNOSTIC
286 	if (xfer->busy_free != XFER_BUSY) {
287 		DPRINTF("xfer=%p not busy, 0x%08x\n", xfer, xfer->busy_free);
288 	}
289 	xfer->busy_free = XFER_FREE;
290 #endif
291 	DWC2_EVCNT_INCR(sc->sc_ev_xferpoolput);
292 	dwc2_hcd_urb_free(sc->sc_hsotg, dxfer->urb, DWC2_MAXISOCPACKETS);
293 	pool_cache_put(sc->sc_xferpool, xfer);
294 }
295 
296 Static void
297 dwc2_get_lock(struct usbd_bus *bus, kmutex_t **lock)
298 {
299 	struct dwc2_softc *sc = DWC2_BUS2SC(bus);
300 
301 	*lock = &sc->sc_lock;
302 }
303 
304 Static void
305 dwc2_rhc(void *addr)
306 {
307 	struct dwc2_softc *sc = addr;
308 	usbd_xfer_handle xfer;
309 	u_char *p;
310 
311 	DPRINTF("\n");
312 	mutex_enter(&sc->sc_lock);
313 	xfer = sc->sc_intrxfer;
314 
315 	if (xfer == NULL) {
316 		/* Just ignore the change. */
317 		mutex_exit(&sc->sc_lock);
318 		return;
319 
320 	}
321 	/* set port bit */
322 	p = KERNADDR(&xfer->dmabuf, 0);
323 
324 	p[0] = 0x02;	/* we only have one port (1 << 1) */
325 
326 	xfer->actlen = xfer->length;
327 	xfer->status = USBD_NORMAL_COMPLETION;
328 
329 	usb_transfer_complete(xfer);
330 	mutex_exit(&sc->sc_lock);
331 }
332 
333 Static void
334 dwc2_softintr(void *v)
335 {
336 	struct usbd_bus *bus = v;
337 	struct dwc2_softc *sc = DWC2_BUS2SC(bus);
338 	struct dwc2_hsotg *hsotg = sc->sc_hsotg;
339 	struct dwc2_xfer *dxfer;
340 
341 	KASSERT(sc->sc_bus.use_polling || mutex_owned(&sc->sc_lock));
342 
343 	mutex_spin_enter(&hsotg->lock);
344 	while ((dxfer = TAILQ_FIRST(&sc->sc_complete)) != NULL) {
345 		/*
346 		 * dwc2_abort_xfer will remove this transfer from the
347 		 * sc_complete queue
348 		 */
349 		/*XXXNH not tested */
350 		if (dxfer->xfer.hcflags & UXFER_ABORTING) {
351 			cv_broadcast(&dxfer->xfer.hccv);
352 			continue;
353 		}
354 
355 		TAILQ_REMOVE(&sc->sc_complete, dxfer, xnext);
356 		/* XXXNH Already done - can I assert this? */
357 		callout_stop(&dxfer->xfer.timeout_handle);
358 
359 		mutex_spin_exit(&hsotg->lock);
360 		usb_transfer_complete(&dxfer->xfer);
361 		mutex_spin_enter(&hsotg->lock);
362 	}
363 	mutex_spin_exit(&hsotg->lock);
364 }
365 
366 Static void
367 dwc2_waitintr(struct dwc2_softc *sc, usbd_xfer_handle xfer)
368 {
369 	struct dwc2_hsotg *hsotg = sc->sc_hsotg;
370 	uint32_t intrs;
371 	int timo;
372 
373 	xfer->status = USBD_IN_PROGRESS;
374 	for (timo = xfer->timeout; timo >= 0; timo--) {
375 		usb_delay_ms(&sc->sc_bus, 1);
376 		if (sc->sc_dying)
377 			break;
378 		intrs = dwc2_read_core_intr(hsotg);
379 
380 		DPRINTFN(15, "0x%08x\n", intrs);
381 
382 		if (intrs) {
383 			mutex_spin_enter(&hsotg->lock);
384 			dwc2_interrupt(sc);
385 			mutex_spin_exit(&hsotg->lock);
386 			if (xfer->status != USBD_IN_PROGRESS)
387 				return;
388 		}
389 	}
390 
391 	/* Timeout */
392 	DPRINTF("timeout\n");
393 
394 	mutex_enter(&sc->sc_lock);
395 	xfer->status = USBD_TIMEOUT;
396 	usb_transfer_complete(xfer);
397 	mutex_exit(&sc->sc_lock);
398 }
399 
400 Static void
401 dwc2_timeout(void *addr)
402 {
403 	usbd_xfer_handle xfer = addr;
404 	struct dwc2_xfer *dxfer = DWC2_XFER2DXFER(xfer);
405 // 	struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer);
406  	struct dwc2_softc *sc = DWC2_XFER2SC(xfer);
407 
408 	DPRINTF("dxfer=%p\n", dxfer);
409 
410 	if (sc->sc_dying) {
411 		mutex_enter(&sc->sc_lock);
412 		dwc2_abort_xfer(&dxfer->xfer, USBD_TIMEOUT);
413 		mutex_exit(&sc->sc_lock);
414 		return;
415 	}
416 
417 	/* Execute the abort in a process context. */
418 	usb_init_task(&dxfer->abort_task, dwc2_timeout_task, addr,
419 	    USB_TASKQ_MPSAFE);
420 	usb_add_task(dxfer->xfer.pipe->device, &dxfer->abort_task,
421 	    USB_TASKQ_HC);
422 }
423 
424 Static void
425 dwc2_timeout_task(void *addr)
426 {
427 	usbd_xfer_handle xfer = addr;
428  	struct dwc2_softc *sc = DWC2_XFER2SC(xfer);
429 
430 	DPRINTF("xfer=%p\n", xfer);
431 
432 	mutex_enter(&sc->sc_lock);
433 	dwc2_abort_xfer(xfer, USBD_TIMEOUT);
434 	mutex_exit(&sc->sc_lock);
435 }
436 
437 usbd_status
438 dwc2_open(usbd_pipe_handle pipe)
439 {
440 	usbd_device_handle dev = pipe->device;
441 	struct dwc2_softc *sc = DWC2_PIPE2SC(pipe);
442 	struct dwc2_pipe *dpipe = DWC2_PIPE2DPIPE(pipe);
443 	usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
444 	uint8_t addr = dev->address;
445 	uint8_t xfertype = UE_GET_XFERTYPE(ed->bmAttributes);
446 	usbd_status err;
447 
448 	DPRINTF("pipe %p addr %d xfertype %d dir %s\n", pipe, addr, xfertype,
449 	    UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN ? "in" : "out");
450 
451 	if (sc->sc_dying) {
452 		return USBD_IOERROR;
453 	}
454 
455 	if (addr == sc->sc_addr) {
456 		switch (ed->bEndpointAddress) {
457 		case USB_CONTROL_ENDPOINT:
458 			pipe->methods = &dwc2_root_ctrl_methods;
459 			break;
460 		case UE_DIR_IN | DWC2_INTR_ENDPT:
461 			pipe->methods = &dwc2_root_intr_methods;
462 			break;
463 		default:
464 			DPRINTF("bad bEndpointAddress 0x%02x\n",
465 			    ed->bEndpointAddress);
466 			return USBD_INVAL;
467 		}
468 		DPRINTF("root hub pipe open\n");
469 		return USBD_NORMAL_COMPLETION;
470 	}
471 
472 	switch (xfertype) {
473 	case UE_CONTROL:
474 		pipe->methods = &dwc2_device_ctrl_methods;
475 		err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t),
476 		    0, &dpipe->req_dma);
477 		if (err)
478 			return err;
479 		break;
480 	case UE_INTERRUPT:
481 		pipe->methods = &dwc2_device_intr_methods;
482 		break;
483 	case UE_ISOCHRONOUS:
484 		pipe->methods = &dwc2_device_isoc_methods;
485 		break;
486 	case UE_BULK:
487 		pipe->methods = &dwc2_device_bulk_methods;
488 		break;
489 	default:
490 		DPRINTF("bad xfer type %d\n", xfertype);
491 		return USBD_INVAL;
492 	}
493 
494 	dpipe->priv = NULL;	/* QH */
495 
496 	return USBD_NORMAL_COMPLETION;
497 }
498 
499 Static void
500 dwc2_poll(struct usbd_bus *bus)
501 {
502 	struct dwc2_softc *sc = DWC2_BUS2SC(bus);
503 	struct dwc2_hsotg *hsotg = sc->sc_hsotg;
504 
505 	mutex_spin_enter(&hsotg->lock);
506 	dwc2_interrupt(sc);
507 	mutex_spin_exit(&hsotg->lock);
508 }
509 
510 /*
511  * Close a reqular pipe.
512  * Assumes that there are no pending transactions.
513  */
514 Static void
515 dwc2_close_pipe(usbd_pipe_handle pipe)
516 {
517 #ifdef DIAGNOSTIC
518 	struct dwc2_softc *sc = pipe->device->bus->hci_private;
519 #endif
520 
521 	KASSERT(mutex_owned(&sc->sc_lock));
522 }
523 
524 /*
525  * Abort a device request.
526  */
527 Static void
528 dwc2_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
529 {
530 	struct dwc2_xfer *dxfer = DWC2_XFER2DXFER(xfer);
531 	struct dwc2_softc *sc = DWC2_XFER2SC(xfer);
532 	struct dwc2_hsotg *hsotg = sc->sc_hsotg;
533 	struct dwc2_xfer *d, *tmp;
534 	bool wake;
535 	int err;
536 
537 	DPRINTF("xfer=%p\n", xfer);
538 
539 	KASSERT(mutex_owned(&sc->sc_lock));
540 	KASSERT(!cpu_intr_p() && !cpu_softintr_p());
541 
542 	if (sc->sc_dying) {
543 		xfer->status = status;
544 		callout_stop(&xfer->timeout_handle);
545 		usb_transfer_complete(xfer);
546 		return;
547 	}
548 
549 	/*
550 	 * If an abort is already in progress then just wait for it to
551 	 * complete and return.
552 	 */
553 	if (xfer->hcflags & UXFER_ABORTING) {
554 		xfer->status = status;
555 		xfer->hcflags |= UXFER_ABORTWAIT;
556 		while (xfer->hcflags & UXFER_ABORTING)
557 			cv_wait(&xfer->hccv, &sc->sc_lock);
558 		return;
559 	}
560 
561 	/*
562 	 * Step 1: Make the stack ignore it and stop the callout.
563 	 */
564 	mutex_spin_enter(&hsotg->lock);
565 	xfer->hcflags |= UXFER_ABORTING;
566 
567 	xfer->status = status;	/* make software ignore it */
568 	callout_stop(&xfer->timeout_handle);
569 
570 	/* XXXNH suboptimal */
571 	TAILQ_FOREACH_SAFE(d, &sc->sc_complete, xnext, tmp) {
572 		if (d == dxfer) {
573 			TAILQ_REMOVE(&sc->sc_complete, dxfer, xnext);
574 		}
575 	}
576 
577 	err = dwc2_hcd_urb_dequeue(hsotg, dxfer->urb);
578 	if (err) {
579 		DPRINTF("dwc2_hcd_urb_dequeue failed\n");
580 	}
581 
582 	mutex_spin_exit(&hsotg->lock);
583 
584 	/*
585 	 * Step 2: Execute callback.
586 	 */
587 	wake = xfer->hcflags & UXFER_ABORTWAIT;
588 	xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT);
589 
590 	usb_transfer_complete(xfer);
591 	if (wake) {
592 		cv_broadcast(&xfer->hccv);
593 	}
594 }
595 
596 Static void
597 dwc2_noop(usbd_pipe_handle pipe)
598 {
599 
600 }
601 
602 Static void
603 dwc2_device_clear_toggle(usbd_pipe_handle pipe)
604 {
605 
606 	DPRINTF("toggle %d -> 0", pipe->endpoint->datatoggle);
607 }
608 
609 /***********************************************************************/
610 
611 /*
612  * Data structures and routines to emulate the root hub.
613  */
614 
615 Static const usb_device_descriptor_t dwc2_devd = {
616 	.bLength = sizeof(usb_device_descriptor_t),
617 	.bDescriptorType = UDESC_DEVICE,
618 	.bcdUSB = {0x00, 0x02},
619 	.bDeviceClass = UDCLASS_HUB,
620 	.bDeviceSubClass = UDSUBCLASS_HUB,
621 	.bDeviceProtocol = UDPROTO_HSHUBSTT,
622 	.bMaxPacketSize = 64,
623 	.bcdDevice = {0x00, 0x01},
624 	.iManufacturer = 1,
625 	.iProduct = 2,
626 	.bNumConfigurations = 1,
627 };
628 
629 struct dwc2_config_desc {
630 	usb_config_descriptor_t confd;
631 	usb_interface_descriptor_t ifcd;
632 	usb_endpoint_descriptor_t endpd;
633 } __packed;
634 
635 Static const struct dwc2_config_desc dwc2_confd = {
636 	.confd = {
637 		.bLength = USB_CONFIG_DESCRIPTOR_SIZE,
638 		.bDescriptorType = UDESC_CONFIG,
639 		.wTotalLength[0] = sizeof(dwc2_confd),
640 		.bNumInterface = 1,
641 		.bConfigurationValue = 1,
642 		.iConfiguration = 0,
643 		.bmAttributes = UC_SELF_POWERED,
644 		.bMaxPower = 0,
645 	},
646 	.ifcd = {
647 		.bLength = USB_INTERFACE_DESCRIPTOR_SIZE,
648 		.bDescriptorType = UDESC_INTERFACE,
649 		.bInterfaceNumber = 0,
650 		.bAlternateSetting = 0,
651 		.bNumEndpoints = 1,
652 		.bInterfaceClass = UICLASS_HUB,
653 		.bInterfaceSubClass = UISUBCLASS_HUB,
654 		.bInterfaceProtocol = UIPROTO_HSHUBSTT,
655 		.iInterface = 0
656 	},
657 	.endpd = {
658 		.bLength = USB_ENDPOINT_DESCRIPTOR_SIZE,
659 		.bDescriptorType = UDESC_ENDPOINT,
660 		.bEndpointAddress = UE_DIR_IN | DWC2_INTR_ENDPT,
661 		.bmAttributes = UE_INTERRUPT,
662 		.wMaxPacketSize = {8, 0},			/* max packet */
663 		.bInterval = 255,
664 	},
665 };
666 
667 #define	HSETW(ptr, val) ptr = { (uint8_t)(val), (uint8_t)((val) >> 8) }
668 Static const usb_hub_descriptor_t dwc2_hubd = {
669 	.bDescLength = USB_HUB_DESCRIPTOR_SIZE,
670 	.bDescriptorType = UDESC_HUB,
671 	.bNbrPorts = 1,
672 	HSETW(.wHubCharacteristics, (UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL)),
673 	.bPwrOn2PwrGood = 50,
674 	.bHubContrCurrent = 0,
675 	.DeviceRemovable = {0},		/* port is removable */
676 };
677 
678 Static usbd_status
679 dwc2_root_ctrl_transfer(usbd_xfer_handle xfer)
680 {
681 	struct dwc2_softc *sc = DWC2_XFER2SC(xfer);
682 	usbd_status err;
683 
684 	mutex_enter(&sc->sc_lock);
685 	err = usb_insert_transfer(xfer);
686 	mutex_exit(&sc->sc_lock);
687 	if (err)
688 		return err;
689 
690 	return dwc2_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
691 }
692 
693 Static usbd_status
694 dwc2_root_ctrl_start(usbd_xfer_handle xfer)
695 {
696 	struct dwc2_softc *sc = DWC2_XFER2SC(xfer);
697 	usb_device_request_t *req;
698 	uint8_t *buf;
699 	uint16_t len;
700 	int value, index, l, totlen;
701 	usbd_status err = USBD_IOERROR;
702 
703 	if (sc->sc_dying)
704 		return USBD_IOERROR;
705 
706 	req = &xfer->request;
707 
708 	DPRINTFN(4, "type=0x%02x request=%02x\n",
709 	    req->bmRequestType, req->bRequest);
710 
711 	len = UGETW(req->wLength);
712 	value = UGETW(req->wValue);
713 	index = UGETW(req->wIndex);
714 
715 	buf = len ? KERNADDR(&xfer->dmabuf, 0) : NULL;
716 
717 	totlen = 0;
718 
719 #define C(x,y) ((x) | ((y) << 8))
720 	switch (C(req->bRequest, req->bmRequestType)) {
721 	case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
722 	case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
723 	case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
724 		/*
725 		 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
726 		 * for the integrated root hub.
727 		 */
728 		break;
729 	case C(UR_GET_CONFIG, UT_READ_DEVICE):
730 		if (len > 0) {
731 			*buf = sc->sc_conf;
732 			totlen = 1;
733 		}
734 		break;
735 	case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
736 		DPRINTFN(8, "wValue=0x%04x\n", value);
737 
738 		if (len == 0)
739 			break;
740 		switch (value) {
741 		case C(0, UDESC_DEVICE):
742 			l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
743 // 			USETW(dwc2_devd.idVendor, sc->sc_id_vendor);
744 			memcpy(buf, &dwc2_devd, l);
745 			buf += l;
746 			len -= l;
747 			totlen += l;
748 
749 			break;
750 		case C(0, UDESC_CONFIG):
751 			l = min(len, sizeof(dwc2_confd));
752 			memcpy(buf, &dwc2_confd, l);
753 			buf += l;
754 			len -= l;
755 			totlen += l;
756 
757 			break;
758 #define sd ((usb_string_descriptor_t *)buf)
759 		case C(0, UDESC_STRING):
760 			totlen = usb_makelangtbl(sd, len);
761 			break;
762 		case C(1, UDESC_STRING):
763 			totlen = usb_makestrdesc(sd, len, sc->sc_vendor);
764 			break;
765 		case C(2, UDESC_STRING):
766 			totlen = usb_makestrdesc(sd, len, "DWC2 root hub");
767 			break;
768 #undef sd
769 		default:
770 			goto fail;
771 		}
772 		break;
773 	case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
774 		if (len > 0) {
775 			*buf = 0;
776 			totlen = 1;
777 		}
778 		break;
779 	case C(UR_GET_STATUS, UT_READ_DEVICE):
780 		if (len > 1) {
781 			USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
782 			totlen = 2;
783 		}
784 		break;
785 	case C(UR_GET_STATUS, UT_READ_INTERFACE):
786 	case C(UR_GET_STATUS, UT_READ_ENDPOINT):
787 		if (len > 1) {
788 			USETW(((usb_status_t *)buf)->wStatus, 0);
789 			totlen = 2;
790 		}
791 		break;
792 	case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
793 		DPRINTF("UR_SET_ADDRESS, UT_WRITE_DEVICE: addr %d\n",
794 		    value);
795 		if (value >= USB_MAX_DEVICES)
796 			goto fail;
797 
798 		sc->sc_addr = value;
799 		break;
800 	case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
801 		if (value != 0 && value != 1)
802 			goto fail;
803 
804 		sc->sc_conf = value;
805 		break;
806 	case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
807 		break;
808 	case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
809 	case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
810 	case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
811 		err = USBD_IOERROR;
812 		goto fail;
813 	case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
814 		break;
815 	case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
816 		break;
817 	default:
818 	    	/* Hub requests - XXXNH len check? */
819 		err = dwc2_hcd_hub_control(sc->sc_hsotg,
820 		    C(req->bRequest, req->bmRequestType), value, index,
821 		    buf, len);
822 		if (err) {
823 			err = USBD_IOERROR;
824 			goto fail;
825 		}
826 		totlen = len;
827 	}
828 	xfer->actlen = totlen;
829 	err = USBD_NORMAL_COMPLETION;
830 
831 fail:
832 	mutex_enter(&sc->sc_lock);
833 	xfer->status = err;
834 	usb_transfer_complete(xfer);
835 	mutex_exit(&sc->sc_lock);
836 
837 	return USBD_IN_PROGRESS;
838 }
839 
840 Static void
841 dwc2_root_ctrl_abort(usbd_xfer_handle xfer)
842 {
843 	DPRINTFN(10, "\n");
844 
845 	/* Nothing to do, all transfers are synchronous. */
846 }
847 
848 Static void
849 dwc2_root_ctrl_close(usbd_pipe_handle pipe)
850 {
851 	DPRINTFN(10, "\n");
852 
853 	/* Nothing to do. */
854 }
855 
856 Static void
857 dwc2_root_ctrl_done(usbd_xfer_handle xfer)
858 {
859 	DPRINTFN(10, "\n");
860 
861 	/* Nothing to do. */
862 }
863 
864 Static usbd_status
865 dwc2_root_intr_transfer(usbd_xfer_handle xfer)
866 {
867 	struct dwc2_softc *sc = DWC2_XFER2SC(xfer);
868 	usbd_status err;
869 
870 	DPRINTF("\n");
871 
872 	/* Insert last in queue. */
873 	mutex_enter(&sc->sc_lock);
874 	err = usb_insert_transfer(xfer);
875 	mutex_exit(&sc->sc_lock);
876 	if (err)
877 		return err;
878 
879 	/* Pipe isn't running, start first */
880 	return dwc2_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
881 }
882 
883 Static usbd_status
884 dwc2_root_intr_start(usbd_xfer_handle xfer)
885 {
886 	struct dwc2_softc *sc = DWC2_PIPE2SC(xfer);
887 
888 	DPRINTF("\n");
889 
890 	if (sc->sc_dying)
891 		return USBD_IOERROR;
892 
893 	mutex_enter(&sc->sc_lock);
894 	KASSERT(sc->sc_intrxfer == NULL);
895 	sc->sc_intrxfer = xfer;
896 	mutex_exit(&sc->sc_lock);
897 
898 	return USBD_IN_PROGRESS;
899 }
900 
901 /* Abort a root interrupt request. */
902 Static void
903 dwc2_root_intr_abort(usbd_xfer_handle xfer)
904 {
905 #ifdef DIAGNOSTIC
906 	struct dwc2_softc *sc = DWC2_XFER2SC(xfer);
907 #endif
908 	DPRINTF("xfer=%p\n", xfer);
909 
910 	KASSERT(mutex_owned(&sc->sc_lock));
911 
912 	if (xfer->pipe->intrxfer == xfer) {
913 		DPRINTF("remove\n");
914 		xfer->pipe->intrxfer = NULL;
915 	}
916 	xfer->status = USBD_CANCELLED;
917 	usb_transfer_complete(xfer);
918 }
919 
920 Static void
921 dwc2_root_intr_close(usbd_pipe_handle pipe)
922 {
923 	struct dwc2_softc *sc = DWC2_PIPE2SC(pipe);
924 
925 	DPRINTF("\n");
926 
927 	KASSERT(mutex_owned(&sc->sc_lock));
928 
929 	sc->sc_intrxfer = NULL;
930 }
931 
932 Static void
933 dwc2_root_intr_done(usbd_xfer_handle xfer)
934 {
935 
936 	DPRINTF("\n");
937 }
938 
939 /***********************************************************************/
940 
941 Static usbd_status
942 dwc2_device_ctrl_transfer(usbd_xfer_handle xfer)
943 {
944 	struct dwc2_softc *sc = DWC2_XFER2SC(xfer);
945 	usbd_status err;
946 
947 	DPRINTF("\n");
948 
949 	/* Insert last in queue. */
950 	mutex_enter(&sc->sc_lock);
951 	err = usb_insert_transfer(xfer);
952 	mutex_exit(&sc->sc_lock);
953 	if (err)
954 		return err;
955 
956 	/* Pipe isn't running, start first */
957 	return dwc2_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
958 }
959 
960 Static usbd_status
961 dwc2_device_ctrl_start(usbd_xfer_handle xfer)
962 {
963 	struct dwc2_softc *sc = DWC2_XFER2SC(xfer);
964 	usbd_status err;
965 
966 	DPRINTF("\n");
967 
968 	mutex_enter(&sc->sc_lock);
969 	xfer->status = USBD_IN_PROGRESS;
970 	err = dwc2_device_start(xfer);
971 	mutex_exit(&sc->sc_lock);
972 
973 	if (err)
974 		return err;
975 
976 	if (sc->sc_bus.use_polling)
977 		dwc2_waitintr(sc, xfer);
978 
979 	return USBD_IN_PROGRESS;
980 }
981 
982 Static void
983 dwc2_device_ctrl_abort(usbd_xfer_handle xfer)
984 {
985 #ifdef DIAGNOSTIC
986 	struct dwc2_softc *sc = DWC2_XFER2SC(xfer);
987 #endif
988 	KASSERT(mutex_owned(&sc->sc_lock));
989 
990 	DPRINTF("xfer=%p\n", xfer);
991 	dwc2_abort_xfer(xfer, USBD_CANCELLED);
992 }
993 
994 Static void
995 dwc2_device_ctrl_close(usbd_pipe_handle pipe)
996 {
997 
998 	DPRINTF("pipe=%p\n", pipe);
999 	dwc2_close_pipe(pipe);
1000 }
1001 
1002 Static void
1003 dwc2_device_ctrl_done(usbd_xfer_handle xfer)
1004 {
1005 
1006 	DPRINTF("xfer=%p\n", xfer);
1007 }
1008 
1009 /***********************************************************************/
1010 
1011 Static usbd_status
1012 dwc2_device_bulk_transfer(usbd_xfer_handle xfer)
1013 {
1014 	struct dwc2_softc *sc = DWC2_XFER2SC(xfer);
1015 	usbd_status err;
1016 
1017 	DPRINTF("xfer=%p\n", xfer);
1018 
1019 	/* Insert last in queue. */
1020 	mutex_enter(&sc->sc_lock);
1021 	err = usb_insert_transfer(xfer);
1022 	mutex_exit(&sc->sc_lock);
1023 	if (err)
1024 		return err;
1025 
1026 	/* Pipe isn't running, start first */
1027 	return dwc2_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
1028 }
1029 
1030 Static usbd_status
1031 dwc2_device_bulk_start(usbd_xfer_handle xfer)
1032 {
1033 	struct dwc2_softc *sc = DWC2_XFER2SC(xfer);
1034 	usbd_status err;
1035 
1036 	DPRINTF("xfer=%p\n", xfer);
1037 	mutex_enter(&sc->sc_lock);
1038 	xfer->status = USBD_IN_PROGRESS;
1039 	err = dwc2_device_start(xfer);
1040 	mutex_exit(&sc->sc_lock);
1041 
1042 	return err;
1043 }
1044 
1045 Static void
1046 dwc2_device_bulk_abort(usbd_xfer_handle xfer)
1047 {
1048 #ifdef DIAGNOSTIC
1049 	struct dwc2_softc *sc = DWC2_XFER2SC(xfer);
1050 #endif
1051 	KASSERT(mutex_owned(&sc->sc_lock));
1052 
1053 	DPRINTF("xfer=%p\n", xfer);
1054 	dwc2_abort_xfer(xfer, USBD_CANCELLED);
1055 }
1056 
1057 Static void
1058 dwc2_device_bulk_close(usbd_pipe_handle pipe)
1059 {
1060 
1061 	DPRINTF("pipe=%p\n", pipe);
1062 
1063 	dwc2_close_pipe(pipe);
1064 }
1065 
1066 Static void
1067 dwc2_device_bulk_done(usbd_xfer_handle xfer)
1068 {
1069 
1070     	DPRINTF("xfer=%p\n", xfer);
1071 }
1072 
1073 /***********************************************************************/
1074 
1075 Static usbd_status
1076 dwc2_device_intr_transfer(usbd_xfer_handle xfer)
1077 {
1078 	struct dwc2_softc *sc = DWC2_XFER2SC(xfer);
1079 	usbd_status err;
1080 
1081 	DPRINTF("xfer=%p\n", xfer);
1082 
1083 	/* Insert last in queue. */
1084 	mutex_enter(&sc->sc_lock);
1085 	err = usb_insert_transfer(xfer);
1086 	mutex_exit(&sc->sc_lock);
1087 	if (err)
1088 		return err;
1089 
1090 	/* Pipe isn't running, start first */
1091 	return dwc2_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
1092 }
1093 
1094 Static usbd_status
1095 dwc2_device_intr_start(usbd_xfer_handle xfer)
1096 {
1097 	struct dwc2_pipe *dpipe = (struct dwc2_pipe *)xfer->pipe;
1098 	usbd_device_handle dev = dpipe->pipe.device;
1099 	struct dwc2_softc *sc = dev->bus->hci_private;
1100 	usbd_status err;
1101 
1102 	mutex_enter(&sc->sc_lock);
1103 	xfer->status = USBD_IN_PROGRESS;
1104 	err = dwc2_device_start(xfer);
1105 	mutex_exit(&sc->sc_lock);
1106 
1107 	if (err)
1108 		return err;
1109 
1110 	if (sc->sc_bus.use_polling)
1111 		dwc2_waitintr(sc, xfer);
1112 
1113 	return USBD_IN_PROGRESS;
1114 }
1115 
1116 /* Abort a device interrupt request. */
1117 Static void
1118 dwc2_device_intr_abort(usbd_xfer_handle xfer)
1119 {
1120 #ifdef DIAGNOSTIC
1121 	struct dwc2_softc *sc = DWC2_XFER2SC(xfer);
1122 #endif
1123 
1124 	KASSERT(mutex_owned(&sc->sc_lock));
1125 
1126 	if (xfer->pipe->intrxfer == xfer) {
1127 		DPRINTF("remove\n");
1128 		xfer->pipe->intrxfer = NULL;
1129 	}
1130 	DPRINTF("xfer=%p\n", xfer);
1131 	dwc2_abort_xfer(xfer, USBD_CANCELLED);
1132 }
1133 
1134 Static void
1135 dwc2_device_intr_close(usbd_pipe_handle pipe)
1136 {
1137 
1138 	DPRINTF("pipe=%p\n", pipe);
1139 
1140 	dwc2_close_pipe(pipe);
1141 }
1142 
1143 Static void
1144 dwc2_device_intr_done(usbd_xfer_handle xfer)
1145 {
1146 
1147 	DPRINTF("\n");
1148 
1149 	if (xfer->pipe->repeat) {
1150 		xfer->status = USBD_IN_PROGRESS;
1151 		dwc2_device_start(xfer);
1152 	}
1153 }
1154 
1155 /***********************************************************************/
1156 
1157 usbd_status
1158 dwc2_device_isoc_transfer(usbd_xfer_handle xfer)
1159 {
1160 	struct dwc2_softc *sc = DWC2_XFER2SC(xfer);
1161 	usbd_status err;
1162 
1163 	DPRINTF("xfer=%p\n", xfer);
1164 
1165 	/* Insert last in queue. */
1166 	mutex_enter(&sc->sc_lock);
1167 	err = usb_insert_transfer(xfer);
1168 	mutex_exit(&sc->sc_lock);
1169 	if (err)
1170 		return err;
1171 
1172 	/* Pipe isn't running, start first */
1173 	return dwc2_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
1174 }
1175 
1176 usbd_status
1177 dwc2_device_isoc_start(usbd_xfer_handle xfer)
1178 {
1179 	struct dwc2_pipe *dpipe = (struct dwc2_pipe *)xfer->pipe;
1180 	usbd_device_handle dev = dpipe->pipe.device;
1181 	struct dwc2_softc *sc = dev->bus->hci_private;
1182 	usbd_status err;
1183 
1184 	mutex_enter(&sc->sc_lock);
1185 	xfer->status = USBD_IN_PROGRESS;
1186 	err = dwc2_device_start(xfer);
1187 	mutex_exit(&sc->sc_lock);
1188 
1189 	if (sc->sc_bus.use_polling)
1190 		dwc2_waitintr(sc, xfer);
1191 
1192 	return err;
1193 }
1194 
1195 void
1196 dwc2_device_isoc_abort(usbd_xfer_handle xfer)
1197 {
1198 #ifdef DIAGNOSTIC
1199 	struct dwc2_softc *sc = DWC2_XFER2SC(xfer);
1200 #endif
1201 	KASSERT(mutex_owned(&sc->sc_lock));
1202 
1203 	DPRINTF("xfer=%p\n", xfer);
1204 	dwc2_abort_xfer(xfer, USBD_CANCELLED);
1205 }
1206 
1207 void
1208 dwc2_device_isoc_close(usbd_pipe_handle pipe)
1209 {
1210 	DPRINTF("\n");
1211 
1212 	dwc2_close_pipe(pipe);
1213 }
1214 
1215 void
1216 dwc2_device_isoc_done(usbd_xfer_handle xfer)
1217 {
1218 
1219 	DPRINTF("\n");
1220 }
1221 
1222 
1223 usbd_status
1224 dwc2_device_start(usbd_xfer_handle xfer)
1225 {
1226  	struct dwc2_xfer *dxfer = DWC2_XFER2DXFER(xfer);
1227 	struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer);
1228 	struct dwc2_softc *sc = DWC2_XFER2SC(xfer);
1229 	struct dwc2_hsotg *hsotg = sc->sc_hsotg;
1230         struct dwc2_hcd_urb *dwc2_urb;
1231 
1232 	usbd_device_handle dev = xfer->pipe->device;
1233 	usb_endpoint_descriptor_t *ed = xfer->pipe->endpoint->edesc;
1234 	uint8_t addr = dev->address;
1235 	uint8_t xfertype = UE_GET_XFERTYPE(ed->bmAttributes);
1236 	uint8_t epnum = UE_GET_ADDR(ed->bEndpointAddress);
1237 	uint8_t dir = UE_GET_DIR(ed->bEndpointAddress);
1238 	uint16_t mps = UE_GET_SIZE(UGETW(ed->wMaxPacketSize));
1239 	uint32_t len;
1240 
1241 	uint32_t flags = 0;
1242 	uint32_t off = 0;
1243 	int retval, err = USBD_IN_PROGRESS;
1244 	int alloc_bandwidth = 0;
1245 	int i;
1246 
1247 	DPRINTFN(1, "xfer=%p pipe=%p\n", xfer, xfer->pipe);
1248 
1249 	if (xfertype == UE_ISOCHRONOUS ||
1250 	    xfertype == UE_INTERRUPT) {
1251 		mutex_spin_enter(&hsotg->lock);
1252 		if (!dwc2_hcd_is_bandwidth_allocated(hsotg, xfer))
1253 			alloc_bandwidth = 1;
1254 		mutex_spin_exit(&hsotg->lock);
1255 	}
1256 
1257 	/*
1258 	 * For Control pipe the direction is from the request, all other
1259 	 * transfers have been set correctly at pipe open time.
1260 	 */
1261 	if (xfertype == UE_CONTROL) {
1262 		usb_device_request_t *req = &xfer->request;
1263 
1264 		DPRINTFN(3, "xfer=%p type=0x%02x request=0x%02x wValue=0x%04x "
1265 		    "wIndex=0x%04x len=%d addr=%d endpt=%d dir=%s speed=%d "
1266 		    "mps=%d\n",
1267 		    xfer, req->bmRequestType, req->bRequest, UGETW(req->wValue),
1268 		    UGETW(req->wIndex), UGETW(req->wLength), dev->address,
1269 		    epnum, dir == UT_READ ? "in" :"out", dev->speed, mps);
1270 
1271 		/* Copy request packet to our DMA buffer */
1272 		memcpy(KERNADDR(&dpipe->req_dma, 0), req, sizeof(*req));
1273 		usb_syncmem(&dpipe->req_dma, 0, sizeof(*req),
1274 			    BUS_DMASYNC_PREWRITE);
1275 		len = UGETW(req->wLength);
1276 		if ((req->bmRequestType & UT_READ) == UT_READ) {
1277 			dir = UE_DIR_IN;
1278 		} else {
1279 			dir = UE_DIR_OUT;
1280 		}
1281 
1282 		DPRINTFN(3, "req = %p dma = %" PRIxBUSADDR " len %d dir %s\n",
1283 		    KERNADDR(&dpipe->req_dma, 0), DMAADDR(&dpipe->req_dma, 0),
1284 		    len, dir == UE_DIR_IN ? "in" : "out");
1285 	} else {
1286 		DPRINTFN(3, "xfer=%p len=%d flags=%d addr=%d endpt=%d,"
1287 		    " mps=%d dir %s\n", xfer, xfer->length, xfer->flags, addr,
1288 		    epnum, mps, dir == UT_READ ? "in" :"out");
1289 
1290 		len = xfer->length;
1291 	}
1292 
1293 	dwc2_urb = dxfer->urb;
1294 	if (!dwc2_urb)
1295 		    return USBD_NOMEM;
1296 
1297 	memset(dwc2_urb, 0, sizeof(*dwc2_urb) +
1298 	    sizeof(dwc2_urb->iso_descs[0]) * DWC2_MAXISOCPACKETS);
1299 
1300 	dwc2_urb->priv = xfer;
1301 	dwc2_hcd_urb_set_pipeinfo(hsotg, dwc2_urb, addr, epnum, xfertype, dir,
1302 				  mps);
1303 
1304 	if (xfertype == UE_CONTROL) {
1305 		dwc2_urb->setup_usbdma = &dpipe->req_dma;
1306 		dwc2_urb->setup_packet = KERNADDR(&dpipe->req_dma, 0);
1307 		dwc2_urb->setup_dma = DMAADDR(&dpipe->req_dma, 0);
1308 	} else {
1309 		/* XXXNH - % mps required? */
1310 		if ((xfer->flags & USBD_FORCE_SHORT_XFER) && (len % mps) == 0)
1311 		    flags |= URB_SEND_ZERO_PACKET;
1312 	}
1313 	flags |= URB_GIVEBACK_ASAP;
1314 
1315 	/* XXXNH this shouldn't be required */
1316 	if (xfertype == UE_CONTROL && len == 0) {
1317 		dwc2_urb->usbdma = &dpipe->req_dma;
1318 	} else {
1319 		dwc2_urb->usbdma = &xfer->dmabuf;
1320 	}
1321 	dwc2_urb->buf = KERNADDR(dwc2_urb->usbdma, 0);
1322 	dwc2_urb->dma = DMAADDR(dwc2_urb->usbdma, 0);
1323 	dwc2_urb->length = len;
1324  	dwc2_urb->flags = flags;
1325 	dwc2_urb->status = -EINPROGRESS;
1326 	dwc2_urb->packet_count = xfer->nframes;
1327 
1328 	if (xfertype == UE_INTERRUPT ||
1329 	    xfertype == UE_ISOCHRONOUS) {
1330 		uint16_t ival;
1331 
1332 		if (xfertype == UE_INTERRUPT &&
1333 		    dpipe->pipe.interval != USBD_DEFAULT_INTERVAL) {
1334 			ival = dpipe->pipe.interval;
1335 		} else {
1336 			ival = ed->bInterval;
1337 		}
1338 
1339 		if (ival < 1) {
1340 			retval = -ENODEV;
1341 			goto fail;
1342 		}
1343 		if (dev->speed == USB_SPEED_HIGH ||
1344 		   (dev->speed == USB_SPEED_FULL && xfertype == UE_ISOCHRONOUS)) {
1345 			if (ival > 16) {
1346 				/*
1347 				 * illegal with HS/FS, but there were
1348 				 * documentation bugs in the spec
1349 				 */
1350 				ival = 256;
1351 			} else {
1352 				ival = (1 << (ival - 1));
1353 			}
1354 		} else {
1355 			if (xfertype == UE_INTERRUPT && ival < 10)
1356 				ival = 10;
1357 		}
1358 		dwc2_urb->interval = ival;
1359 	}
1360 
1361 	/* XXXNH bring down from callers?? */
1362 // 	mutex_enter(&sc->sc_lock);
1363 
1364 	xfer->actlen = 0;
1365 
1366 	KASSERT(xfertype != UE_ISOCHRONOUS ||
1367 	    xfer->nframes < DWC2_MAXISOCPACKETS);
1368 	KASSERTMSG(xfer->nframes == 0 || xfertype == UE_ISOCHRONOUS,
1369 	    "nframes %d xfertype %d\n", xfer->nframes, xfertype);
1370 
1371 	for (off = i = 0; i < xfer->nframes; ++i) {
1372 		DPRINTFN(3, "xfer=%p frame=%d offset=%d length=%d\n", xfer, i,
1373 		    off, xfer->frlengths[i]);
1374 
1375 		dwc2_hcd_urb_set_iso_desc_params(dwc2_urb, i, off,
1376 		    xfer->frlengths[i]);
1377 		off += xfer->frlengths[i];
1378 	}
1379 
1380 	/* might need to check cpu_intr_p */
1381 	retval = dwc2_hcd_urb_enqueue(hsotg, dwc2_urb, &dpipe->priv, 0);
1382 	if (retval)
1383 		goto fail;
1384 
1385 	if (xfer->timeout && !sc->sc_bus.use_polling) {
1386 		callout_reset(&xfer->timeout_handle, mstohz(xfer->timeout),
1387 		    dwc2_timeout, xfer);
1388 	}
1389 
1390 	if (alloc_bandwidth) {
1391 		mutex_spin_enter(&hsotg->lock);
1392 		dwc2_allocate_bus_bandwidth(hsotg,
1393 				dwc2_hcd_get_ep_bandwidth(hsotg, dpipe),
1394 				xfer);
1395 		mutex_spin_exit(&hsotg->lock);
1396 	}
1397 
1398 fail:
1399 // 	mutex_exit(&sc->sc_lock);
1400 
1401 	switch (retval) {
1402 	case 0:
1403 		break;
1404 	case -ENODEV:
1405 		err = USBD_INVAL;
1406 		break;
1407 	case -ENOMEM:
1408 		err = USBD_NOMEM;
1409 		break;
1410 	default:
1411 		err = USBD_IOERROR;
1412 	}
1413 
1414 	return err;
1415 
1416 }
1417 
1418 void
1419 dwc2_worker(struct work *wk, void *priv)
1420 {
1421 	struct dwc2_softc *sc = priv;
1422 	struct dwc2_hsotg *hsotg = sc->sc_hsotg;
1423 
1424 Debugger();
1425 #if 0
1426 	usbd_xfer_handle xfer = dwork->xfer;
1427 	struct dwc2_xfer *dxfer = DWC2_XFER2DXFER(xfer);
1428 
1429 	dwc2_hcd_endpoint_disable(sc->dwc_dev.hcd, dpipe->priv, 250);
1430 	dwc_free(NULL, dpipe->urb);
1431 #endif
1432 
1433 	mutex_enter(&sc->sc_lock);
1434 	if (wk == &hsotg->wf_otg) {
1435 		dwc2_conn_id_status_change(wk);
1436 	} else if (wk == &hsotg->start_work.work) {
1437 		dwc2_hcd_start_func(wk);
1438 	} else if (wk == &hsotg->reset_work.work) {
1439 		dwc2_hcd_reset_func(wk);
1440 	} else {
1441 #if 0
1442 		KASSERT(dwork->xfer != NULL);
1443 		KASSERT(dxfer->queued == true);
1444 
1445 		if (!(xfer->hcflags & UXFER_ABORTING)) {
1446 			dwc2_start_standard_chain(xfer);
1447 		}
1448 		dxfer->queued = false;
1449 		cv_broadcast(&xfer->hccv);
1450 #endif
1451 	}
1452 	mutex_exit(&sc->sc_lock);
1453 }
1454 
1455 int dwc2_intr(void *p)
1456 {
1457 	struct dwc2_softc *sc = p;
1458 	struct dwc2_hsotg *hsotg;
1459 	int ret = 0;
1460 
1461 	if (sc == NULL)
1462 		return 0;
1463 
1464 	hsotg = sc->sc_hsotg;
1465 	mutex_spin_enter(&hsotg->lock);
1466 
1467 	if (sc->sc_dying || !device_has_power(sc->sc_dev))
1468 		goto done;
1469 
1470 	if (sc->sc_bus.use_polling) {
1471 		uint32_t intrs;
1472 
1473 		intrs = dwc2_read_core_intr(hsotg);
1474 		DWC2_WRITE_4(hsotg, GINTSTS, intrs);
1475 	} else {
1476 		ret = dwc2_interrupt(sc);
1477 	}
1478 
1479 done:
1480 	mutex_spin_exit(&hsotg->lock);
1481 
1482 	return ret;
1483 }
1484 
1485 int
1486 dwc2_interrupt(struct dwc2_softc *sc)
1487 {
1488 	int ret = 0;
1489 
1490 	if (sc->sc_hcdenabled) {
1491 		ret |= dwc2_handle_hcd_intr(sc->sc_hsotg);
1492 	}
1493 
1494 	ret |= dwc2_handle_common_intr(sc->sc_hsotg);
1495 
1496 	return ret;
1497 }
1498 
1499 /***********************************************************************/
1500 
1501 int
1502 dwc2_detach(struct dwc2_softc *sc, int flags)
1503 {
1504 	int rv = 0;
1505 
1506 	if (sc->sc_child != NULL)
1507 		rv = config_detach(sc->sc_child, flags);
1508 
1509 	return rv;
1510 }
1511 
1512 bool
1513 dwc2_shutdown(device_t self, int flags)
1514 {
1515 	struct dwc2_softc *sc = device_private(self);
1516 
1517 	sc = sc;
1518 
1519 	return true;
1520 }
1521 
1522 void
1523 dwc2_childdet(device_t self, device_t child)
1524 {
1525 	struct dwc2_softc *sc = device_private(self);
1526 
1527 	sc = sc;
1528 }
1529 
1530 int
1531 dwc2_activate(device_t self, enum devact act)
1532 {
1533 	struct dwc2_softc *sc = device_private(self);
1534 
1535 	sc = sc;
1536 
1537 	return 0;
1538 }
1539 
1540 bool
1541 dwc2_resume(device_t dv, const pmf_qual_t *qual)
1542 {
1543 	struct dwc2_softc *sc = device_private(dv);
1544 
1545 	sc = sc;
1546 
1547 	return true;
1548 }
1549 
1550 bool
1551 dwc2_suspend(device_t dv, const pmf_qual_t *qual)
1552 {
1553 	struct dwc2_softc *sc = device_private(dv);
1554 
1555 	sc = sc;
1556 
1557 	return true;
1558 }
1559 
1560 /***********************************************************************/
1561 int
1562 dwc2_init(struct dwc2_softc *sc)
1563 {
1564 	int err = 0;
1565 
1566 	sc->sc_bus.hci_private = sc;
1567 	sc->sc_bus.usbrev = USBREV_2_0;
1568 	sc->sc_bus.methods = &dwc2_bus_methods;
1569 	sc->sc_bus.pipe_size = sizeof(struct dwc2_pipe);
1570 	sc->sc_hcdenabled = false;
1571 
1572 	mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB);
1573 
1574 	TAILQ_INIT(&sc->sc_complete);
1575 
1576 	sc->sc_rhc_si = softint_establish(SOFTINT_NET | SOFTINT_MPSAFE,
1577 	    dwc2_rhc, sc);
1578 
1579 	usb_setup_reserve(sc->sc_dev, &sc->sc_dma_reserve, sc->sc_bus.dmatag,
1580 		USB_MEM_RESERVE);
1581 
1582 	sc->sc_xferpool = pool_cache_init(sizeof(struct dwc2_xfer), 0, 0, 0,
1583 	    "dwc2xfer", NULL, IPL_USB, NULL, NULL, NULL);
1584 	sc->sc_qhpool = pool_cache_init(sizeof(struct dwc2_qh), 0, 0, 0,
1585 	    "dwc2qh", NULL, IPL_USB, NULL, NULL, NULL);
1586 	sc->sc_qtdpool = pool_cache_init(sizeof(struct dwc2_qtd), 0, 0, 0,
1587 	    "dwc2qtd", NULL, IPL_USB, NULL, NULL, NULL);
1588 
1589 	sc->sc_hsotg = kmem_zalloc(sizeof(struct dwc2_hsotg), KM_SLEEP);
1590 	if (sc->sc_hsotg == NULL) {
1591 		err = ENOMEM;
1592 		goto fail1;
1593 	}
1594 
1595 	sc->sc_hsotg->hsotg_sc = sc;
1596 	sc->sc_hsotg->dev = sc->sc_dev;
1597 	sc->sc_hcdenabled = true;
1598 
1599 	err = dwc2_hcd_init(sc->sc_hsotg, sc->sc_params);
1600 	if (err) {
1601 		err = -err;
1602 		goto fail2;
1603 	}
1604 
1605 	return 0;
1606 
1607 fail2:
1608 	kmem_free(sc->sc_hsotg, sizeof(struct dwc2_hsotg));
1609 fail1:
1610 	softint_disestablish(sc->sc_rhc_si);
1611 
1612 	return err;
1613 }
1614 
1615 #if 0
1616 /*
1617  * curmode is a mode indication bit 0 = device, 1 = host
1618  */
1619 static const char * const intnames[32] = {
1620 	"curmode",	"modemis",	"otgint",	"sof",
1621 	"rxflvl",	"nptxfemp",	"ginnakeff",	"goutnakeff",
1622 	"ulpickint",	"i2cint",	"erlysusp",	"usbsusp",
1623 	"usbrst",	"enumdone",	"isooutdrop",	"eopf",
1624 	"restore_done",	"epmis",	"iepint",	"oepint",
1625 	"incompisoin",	"incomplp",	"fetsusp",	"resetdet",
1626 	"prtint",	"hchint",	"ptxfemp",	"lpm",
1627 	"conidstschng",	"disconnint",	"sessreqint",	"wkupint"
1628 };
1629 
1630 
1631 /***********************************************************************/
1632 
1633 #endif
1634 
1635 
1636 void
1637 dw_callout(void *arg)
1638 {
1639 	struct delayed_work *dw = arg;
1640 
1641 	workqueue_enqueue(dw->dw_wq, &dw->work, NULL);
1642 }
1643 
1644 void dwc2_host_hub_info(struct dwc2_hsotg *hsotg, void *context, int *hub_addr,
1645 			int *hub_port)
1646 {
1647 	usbd_xfer_handle xfer = context;
1648 	struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer);
1649 	usbd_device_handle dev = dpipe->pipe.device;
1650 
1651 	*hub_addr = dev->myhsport->parent->address;
1652  	*hub_port = dev->myhsport->portno;
1653 }
1654 
1655 int dwc2_host_get_speed(struct dwc2_hsotg *hsotg, void *context)
1656 {
1657 	usbd_xfer_handle xfer = context;
1658 	struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer);
1659 	usbd_device_handle dev = dpipe->pipe.device;
1660 
1661 	return dev->speed;
1662 }
1663 
1664 /*
1665  * Sets the final status of an URB and returns it to the upper layer. Any
1666  * required cleanup of the URB is performed.
1667  *
1668  * Must be called with interrupt disabled and spinlock held
1669  */
1670 void dwc2_host_complete(struct dwc2_hsotg *hsotg, struct dwc2_qtd *qtd,
1671                         int status)
1672 {
1673 	usbd_xfer_handle xfer;
1674 	struct dwc2_xfer *dxfer;
1675 	struct dwc2_softc *sc;
1676 	usb_endpoint_descriptor_t *ed;
1677 	uint8_t xfertype;
1678 
1679 	if (!qtd) {
1680 		dev_dbg(hsotg->dev, "## %s: qtd is NULL ##\n", __func__);
1681 		return;
1682 	}
1683 
1684 	if (!qtd->urb) {
1685 		dev_dbg(hsotg->dev, "## %s: qtd->urb is NULL ##\n", __func__);
1686 		return;
1687 	}
1688 
1689 	xfer = qtd->urb->priv;
1690 	if (!xfer) {
1691 		dev_dbg(hsotg->dev, "## %s: urb->priv is NULL ##\n", __func__);
1692 		return;
1693 	}
1694 
1695 	dxfer = DWC2_XFER2DXFER(xfer);
1696 	sc = DWC2_XFER2SC(xfer);
1697 	ed = xfer->pipe->endpoint->edesc;
1698 	xfertype = UE_GET_XFERTYPE(ed->bmAttributes);
1699 
1700 	xfer->actlen = dwc2_hcd_urb_get_actual_length(qtd->urb);
1701 
1702 	if (xfertype == UE_ISOCHRONOUS && dbg_perio()) {
1703 		int i;
1704 
1705 		for (i = 0; i < xfer->nframes; i++)
1706 			dev_vdbg(hsotg->dev, " ISO Desc %d status %d\n",
1707 				 i, qtd->urb->iso_descs[i].status);
1708 	}
1709 
1710 	if (xfertype == UE_ISOCHRONOUS) {
1711 		int i;
1712 
1713 		xfer->actlen = 0;
1714 		for (i = 0; i < xfer->nframes; ++i) {
1715 			xfer->frlengths[i] =
1716 				dwc2_hcd_urb_get_iso_desc_actual_length(
1717 						qtd->urb, i);
1718 			xfer->actlen += xfer->frlengths[i];
1719 		}
1720 	}
1721 
1722 	if (!status) {
1723 		if (!(xfer->flags & USBD_SHORT_XFER_OK) &&
1724 		    xfer->actlen < xfer->length)
1725 			status = -EIO;
1726 	}
1727 
1728 	switch (status) {
1729 	case 0:
1730 		xfer->status = USBD_NORMAL_COMPLETION;
1731 		break;
1732 	case -EPIPE:
1733 		xfer->status = USBD_STALLED;
1734 		break;
1735 	case -ETIMEDOUT:
1736 		xfer->status = USBD_TIMEOUT;
1737 		break;
1738 	case -EPROTO:
1739 		xfer->status = USBD_INVAL;
1740 		break;
1741 	case -EIO:
1742 		xfer->status = USBD_IOERROR;
1743 		break;
1744 	case -EOVERFLOW:
1745 		xfer->status = USBD_IOERROR;
1746 		break;
1747 	default:
1748 		printf("%s: unknown error status %d\n", __func__, status);
1749 	}
1750 
1751 	if (xfertype == UE_ISOCHRONOUS ||
1752 	    xfertype == UE_INTERRUPT) {
1753 		struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer);
1754 
1755 		dwc2_free_bus_bandwidth(hsotg,
1756 					dwc2_hcd_get_ep_bandwidth(hsotg, dpipe),
1757 					xfer);
1758 	}
1759 
1760 	qtd->urb = NULL;
1761 	callout_stop(&xfer->timeout_handle);
1762 
1763 	KASSERT(mutex_owned(&hsotg->lock));
1764 
1765 	TAILQ_INSERT_TAIL(&sc->sc_complete, dxfer, xnext);
1766 
1767 	mutex_spin_exit(&hsotg->lock);
1768 	usb_schedsoftintr(&sc->sc_bus);
1769 	mutex_spin_enter(&hsotg->lock);
1770 }
1771 
1772 
1773 int
1774 _dwc2_hcd_start(struct dwc2_hsotg *hsotg)
1775 {
1776 	dev_dbg(hsotg->dev, "DWC OTG HCD START\n");
1777 
1778 	mutex_spin_enter(&hsotg->lock);
1779 
1780 	hsotg->op_state = OTG_STATE_A_HOST;
1781 
1782 	dwc2_hcd_reinit(hsotg);
1783 
1784 	/*XXXNH*/
1785 	delay(50);
1786 
1787 	mutex_spin_exit(&hsotg->lock);
1788 	return 0;
1789 }
1790 
1791 int dwc2_host_is_b_hnp_enabled(struct dwc2_hsotg *hsotg)
1792 {
1793 
1794 	return false;
1795 }
1796