1*9ca2ac75Sskrll /* $NetBSD: dwc2_coreintr.c,v 1.11 2016/02/24 22:17:54 skrll Exp $ */
2244c883eSskrll
3970b0700Sskrll /*
4970b0700Sskrll * core_intr.c - DesignWare HS OTG Controller common interrupt handling
5970b0700Sskrll *
6970b0700Sskrll * Copyright (C) 2004-2013 Synopsys, Inc.
7970b0700Sskrll *
8970b0700Sskrll * Redistribution and use in source and binary forms, with or without
9970b0700Sskrll * modification, are permitted provided that the following conditions
10970b0700Sskrll * are met:
11970b0700Sskrll * 1. Redistributions of source code must retain the above copyright
12970b0700Sskrll * notice, this list of conditions, and the following disclaimer,
13970b0700Sskrll * without modification.
14970b0700Sskrll * 2. Redistributions in binary form must reproduce the above copyright
15970b0700Sskrll * notice, this list of conditions and the following disclaimer in the
16970b0700Sskrll * documentation and/or other materials provided with the distribution.
17970b0700Sskrll * 3. The names of the above-listed copyright holders may not be used
18970b0700Sskrll * to endorse or promote products derived from this software without
19970b0700Sskrll * specific prior written permission.
20970b0700Sskrll *
21970b0700Sskrll * ALTERNATIVELY, this software may be distributed under the terms of the
22970b0700Sskrll * GNU General Public License ("GPL") as published by the Free Software
23970b0700Sskrll * Foundation; either version 2 of the License, or (at your option) any
24970b0700Sskrll * later version.
25970b0700Sskrll *
26970b0700Sskrll * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
27970b0700Sskrll * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
28970b0700Sskrll * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29970b0700Sskrll * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
30970b0700Sskrll * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
31970b0700Sskrll * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
32970b0700Sskrll * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
33970b0700Sskrll * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
34970b0700Sskrll * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
35970b0700Sskrll * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
36970b0700Sskrll * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37970b0700Sskrll */
38970b0700Sskrll
39970b0700Sskrll /*
40970b0700Sskrll * This file contains the common interrupt handlers
41970b0700Sskrll */
42c8117e49Sskrll
43c8117e49Sskrll #include <sys/cdefs.h>
44*9ca2ac75Sskrll __KERNEL_RCSID(0, "$NetBSD: dwc2_coreintr.c,v 1.11 2016/02/24 22:17:54 skrll Exp $");
45c8117e49Sskrll
46c8117e49Sskrll #include <sys/param.h>
47c8117e49Sskrll #include <sys/kernel.h>
48c8117e49Sskrll #include <sys/mutex.h>
49c8117e49Sskrll #include <sys/pool.h>
50c8117e49Sskrll #include <sys/bus.h>
51c8117e49Sskrll #include <sys/callout.h>
52c8117e49Sskrll
53c8117e49Sskrll #include <dev/usb/usb.h>
54c8117e49Sskrll #include <dev/usb/usbdi.h>
55c8117e49Sskrll #include <dev/usb/usbdivar.h>
56c8117e49Sskrll #include <dev/usb/usb_mem.h>
57c8117e49Sskrll
58970b0700Sskrll #include <linux/kernel.h>
59c8117e49Sskrll #include <linux/list.h>
609c7e1469Sskrll #include <linux/err.h>
61970b0700Sskrll
62c8117e49Sskrll #include <dwc2/dwc2.h>
63c8117e49Sskrll #include <dwc2/dwc2var.h>
64970b0700Sskrll
65c8117e49Sskrll #include "dwc2_core.h"
66c8117e49Sskrll #include "dwc2_hcd.h"
67970b0700Sskrll
68c8117e49Sskrll #ifdef DWC2_DEBUG
dwc2_op_state_str(struct dwc2_hsotg * hsotg)69970b0700Sskrll static const char *dwc2_op_state_str(struct dwc2_hsotg *hsotg)
70970b0700Sskrll {
71970b0700Sskrll switch (hsotg->op_state) {
72970b0700Sskrll case OTG_STATE_A_HOST:
73970b0700Sskrll return "a_host";
74970b0700Sskrll case OTG_STATE_A_SUSPEND:
75970b0700Sskrll return "a_suspend";
76970b0700Sskrll case OTG_STATE_A_PERIPHERAL:
77970b0700Sskrll return "a_peripheral";
78970b0700Sskrll case OTG_STATE_B_PERIPHERAL:
79970b0700Sskrll return "b_peripheral";
80970b0700Sskrll case OTG_STATE_B_HOST:
81970b0700Sskrll return "b_host";
82970b0700Sskrll default:
83970b0700Sskrll return "unknown";
84970b0700Sskrll }
85f913003cSskrll }
86b8d7a8daSskrll #endif
87f913003cSskrll
88f913003cSskrll /**
89f913003cSskrll * dwc2_handle_usb_port_intr - handles OTG PRTINT interrupts.
90f913003cSskrll * When the PRTINT interrupt fires, there are certain status bits in the Host
91f913003cSskrll * Port that needs to get cleared.
92f913003cSskrll *
93f913003cSskrll * @hsotg: Programming view of DWC_otg controller
94f913003cSskrll */
dwc2_handle_usb_port_intr(struct dwc2_hsotg * hsotg)95f913003cSskrll static void dwc2_handle_usb_port_intr(struct dwc2_hsotg *hsotg)
96f913003cSskrll {
97f913003cSskrll u32 hprt0 = DWC2_READ_4(hsotg, HPRT0);
98f913003cSskrll
99f913003cSskrll if (hprt0 & HPRT0_ENACHG) {
100f913003cSskrll hprt0 &= ~HPRT0_ENA;
101f913003cSskrll DWC2_WRITE_4(hsotg, HPRT0, hprt0);
102f913003cSskrll }
103970b0700Sskrll }
104970b0700Sskrll
105970b0700Sskrll /**
106970b0700Sskrll * dwc2_handle_mode_mismatch_intr() - Logs a mode mismatch warning message
107970b0700Sskrll *
108970b0700Sskrll * @hsotg: Programming view of DWC_otg controller
109970b0700Sskrll */
dwc2_handle_mode_mismatch_intr(struct dwc2_hsotg * hsotg)110970b0700Sskrll static void dwc2_handle_mode_mismatch_intr(struct dwc2_hsotg *hsotg)
111970b0700Sskrll {
112970b0700Sskrll /* Clear interrupt */
113c8117e49Sskrll DWC2_WRITE_4(hsotg, GINTSTS, GINTSTS_MODEMIS);
1145064f7beSskrll
1155064f7beSskrll dev_warn(hsotg->dev, "Mode Mismatch Interrupt: currently in %s mode\n",
1165064f7beSskrll dwc2_is_host_mode(hsotg) ? "Host" : "Device");
117970b0700Sskrll }
118970b0700Sskrll
119970b0700Sskrll /**
120970b0700Sskrll * dwc2_handle_otg_intr() - Handles the OTG Interrupts. It reads the OTG
121970b0700Sskrll * Interrupt Register (GOTGINT) to determine what interrupt has occurred.
122970b0700Sskrll *
123970b0700Sskrll * @hsotg: Programming view of DWC_otg controller
124970b0700Sskrll */
dwc2_handle_otg_intr(struct dwc2_hsotg * hsotg)125970b0700Sskrll static void dwc2_handle_otg_intr(struct dwc2_hsotg *hsotg)
126970b0700Sskrll {
127970b0700Sskrll u32 gotgint;
128970b0700Sskrll u32 gotgctl;
129970b0700Sskrll u32 gintmsk;
130970b0700Sskrll
131c8117e49Sskrll gotgint = DWC2_READ_4(hsotg, GOTGINT);
132c8117e49Sskrll gotgctl = DWC2_READ_4(hsotg, GOTGCTL);
133970b0700Sskrll dev_dbg(hsotg->dev, "++OTG Interrupt gotgint=%0x [%s]\n", gotgint,
134970b0700Sskrll dwc2_op_state_str(hsotg));
135970b0700Sskrll
136970b0700Sskrll if (gotgint & GOTGINT_SES_END_DET) {
137970b0700Sskrll dev_dbg(hsotg->dev,
138970b0700Sskrll " ++OTG Interrupt: Session End Detected++ (%s)\n",
139970b0700Sskrll dwc2_op_state_str(hsotg));
140c8117e49Sskrll gotgctl = DWC2_READ_4(hsotg, GOTGCTL);
141970b0700Sskrll
1429c7e1469Sskrll if (dwc2_is_device_mode(hsotg))
1435064f7beSskrll dwc2_hsotg_disconnect(hsotg);
1449c7e1469Sskrll
145970b0700Sskrll if (hsotg->op_state == OTG_STATE_B_HOST) {
146970b0700Sskrll hsotg->op_state = OTG_STATE_B_PERIPHERAL;
147970b0700Sskrll } else {
148970b0700Sskrll /*
149970b0700Sskrll * If not B_HOST and Device HNP still set, HNP did
150970b0700Sskrll * not succeed!
151970b0700Sskrll */
152970b0700Sskrll if (gotgctl & GOTGCTL_DEVHNPEN) {
153970b0700Sskrll dev_dbg(hsotg->dev, "Session End Detected\n");
154970b0700Sskrll dev_err(hsotg->dev,
155970b0700Sskrll "Device Not Connected/Responding!\n");
156970b0700Sskrll }
157970b0700Sskrll
158970b0700Sskrll /*
159970b0700Sskrll * If Session End Detected the B-Cable has been
160970b0700Sskrll * disconnected
161970b0700Sskrll */
162970b0700Sskrll /* Reset to a clean state */
163970b0700Sskrll hsotg->lx_state = DWC2_L0;
164970b0700Sskrll }
165970b0700Sskrll
166c8117e49Sskrll gotgctl = DWC2_READ_4(hsotg, GOTGCTL);
167970b0700Sskrll gotgctl &= ~GOTGCTL_DEVHNPEN;
168c8117e49Sskrll DWC2_WRITE_4(hsotg, GOTGCTL, gotgctl);
169970b0700Sskrll }
170970b0700Sskrll
171970b0700Sskrll if (gotgint & GOTGINT_SES_REQ_SUC_STS_CHNG) {
172970b0700Sskrll dev_dbg(hsotg->dev,
173970b0700Sskrll " ++OTG Interrupt: Session Request Success Status Change++\n");
174c8117e49Sskrll gotgctl = DWC2_READ_4(hsotg, GOTGCTL);
175970b0700Sskrll if (gotgctl & GOTGCTL_SESREQSCS) {
176970b0700Sskrll if (hsotg->core_params->phy_type ==
177970b0700Sskrll DWC2_PHY_TYPE_PARAM_FS
178970b0700Sskrll && hsotg->core_params->i2c_enable > 0) {
179970b0700Sskrll hsotg->srp_success = 1;
180970b0700Sskrll } else {
181970b0700Sskrll /* Clear Session Request */
182c8117e49Sskrll gotgctl = DWC2_READ_4(hsotg, GOTGCTL);
183970b0700Sskrll gotgctl &= ~GOTGCTL_SESREQ;
184c8117e49Sskrll DWC2_WRITE_4(hsotg, GOTGCTL, gotgctl);
185970b0700Sskrll }
186970b0700Sskrll }
187970b0700Sskrll }
188970b0700Sskrll
189970b0700Sskrll if (gotgint & GOTGINT_HST_NEG_SUC_STS_CHNG) {
190970b0700Sskrll /*
191970b0700Sskrll * Print statements during the HNP interrupt handling
192970b0700Sskrll * can cause it to fail
193970b0700Sskrll */
194c8117e49Sskrll gotgctl = DWC2_READ_4(hsotg, GOTGCTL);
195970b0700Sskrll /*
196970b0700Sskrll * WA for 3.00a- HW is not setting cur_mode, even sometimes
197970b0700Sskrll * this does not help
198970b0700Sskrll */
199cb22e524Sskrll if (hsotg->hw_params.snpsid >= DWC2_CORE_REV_3_00a)
200970b0700Sskrll udelay(100);
201970b0700Sskrll if (gotgctl & GOTGCTL_HSTNEGSCS) {
202970b0700Sskrll if (dwc2_is_host_mode(hsotg)) {
203970b0700Sskrll hsotg->op_state = OTG_STATE_B_HOST;
204970b0700Sskrll /*
205970b0700Sskrll * Need to disable SOF interrupt immediately.
206970b0700Sskrll * When switching from device to host, the PCD
207970b0700Sskrll * interrupt handler won't handle the interrupt
208970b0700Sskrll * if host mode is already set. The HCD
209970b0700Sskrll * interrupt handler won't get called if the
210970b0700Sskrll * HCD state is HALT. This means that the
211970b0700Sskrll * interrupt does not get handled and Linux
212970b0700Sskrll * complains loudly.
213970b0700Sskrll */
214c8117e49Sskrll gintmsk = DWC2_READ_4(hsotg, GINTMSK);
215970b0700Sskrll gintmsk &= ~GINTSTS_SOF;
216c8117e49Sskrll DWC2_WRITE_4(hsotg, GINTMSK, gintmsk);
217970b0700Sskrll
218970b0700Sskrll /*
219970b0700Sskrll * Call callback function with spin lock
220970b0700Sskrll * released
221970b0700Sskrll */
222970b0700Sskrll spin_unlock(&hsotg->lock);
223970b0700Sskrll
224970b0700Sskrll /* Initialize the Core for Host mode */
225970b0700Sskrll dwc2_hcd_start(hsotg);
226970b0700Sskrll spin_lock(&hsotg->lock);
227970b0700Sskrll hsotg->op_state = OTG_STATE_B_HOST;
228970b0700Sskrll }
229970b0700Sskrll } else {
230c8117e49Sskrll gotgctl = DWC2_READ_4(hsotg, GOTGCTL);
231970b0700Sskrll gotgctl &= ~(GOTGCTL_HNPREQ | GOTGCTL_DEVHNPEN);
232c8117e49Sskrll DWC2_WRITE_4(hsotg, GOTGCTL, gotgctl);
233970b0700Sskrll dev_dbg(hsotg->dev, "HNP Failed\n");
234970b0700Sskrll dev_err(hsotg->dev,
235970b0700Sskrll "Device Not Connected/Responding\n");
236970b0700Sskrll }
237970b0700Sskrll }
238970b0700Sskrll
239970b0700Sskrll if (gotgint & GOTGINT_HST_NEG_DET) {
240970b0700Sskrll /*
241970b0700Sskrll * The disconnect interrupt is set at the same time as
242970b0700Sskrll * Host Negotiation Detected. During the mode switch all
243970b0700Sskrll * interrupts are cleared so the disconnect interrupt
244970b0700Sskrll * handler will not get executed.
245970b0700Sskrll */
246970b0700Sskrll dev_dbg(hsotg->dev,
247970b0700Sskrll " ++OTG Interrupt: Host Negotiation Detected++ (%s)\n",
248970b0700Sskrll (dwc2_is_host_mode(hsotg) ? "Host" : "Device"));
249970b0700Sskrll if (dwc2_is_device_mode(hsotg)) {
250970b0700Sskrll dev_dbg(hsotg->dev, "a_suspend->a_peripheral (%d)\n",
251970b0700Sskrll hsotg->op_state);
252970b0700Sskrll spin_unlock(&hsotg->lock);
2535064f7beSskrll dwc2_hcd_disconnect(hsotg, false);
254970b0700Sskrll spin_lock(&hsotg->lock);
255970b0700Sskrll hsotg->op_state = OTG_STATE_A_PERIPHERAL;
256970b0700Sskrll } else {
257970b0700Sskrll /* Need to disable SOF interrupt immediately */
258c8117e49Sskrll gintmsk = DWC2_READ_4(hsotg, GINTMSK);
259970b0700Sskrll gintmsk &= ~GINTSTS_SOF;
260c8117e49Sskrll DWC2_WRITE_4(hsotg, GINTMSK, gintmsk);
261970b0700Sskrll spin_unlock(&hsotg->lock);
262970b0700Sskrll dwc2_hcd_start(hsotg);
263970b0700Sskrll spin_lock(&hsotg->lock);
264970b0700Sskrll hsotg->op_state = OTG_STATE_A_HOST;
265970b0700Sskrll }
266970b0700Sskrll }
267970b0700Sskrll
268970b0700Sskrll if (gotgint & GOTGINT_A_DEV_TOUT_CHG)
269970b0700Sskrll dev_dbg(hsotg->dev,
270970b0700Sskrll " ++OTG Interrupt: A-Device Timeout Change++\n");
271970b0700Sskrll if (gotgint & GOTGINT_DBNCE_DONE)
272970b0700Sskrll dev_dbg(hsotg->dev, " ++OTG Interrupt: Debounce Done++\n");
273970b0700Sskrll
274970b0700Sskrll /* Clear GOTGINT */
275c8117e49Sskrll DWC2_WRITE_4(hsotg, GOTGINT, gotgint);
276970b0700Sskrll }
277970b0700Sskrll
278970b0700Sskrll /**
279970b0700Sskrll * dwc2_handle_conn_id_status_change_intr() - Handles the Connector ID Status
280970b0700Sskrll * Change Interrupt
281970b0700Sskrll *
282970b0700Sskrll * @hsotg: Programming view of DWC_otg controller
283970b0700Sskrll *
284970b0700Sskrll * Reads the OTG Interrupt Register (GOTCTL) to determine whether this is a
285970b0700Sskrll * Device to Host Mode transition or a Host to Device Mode transition. This only
286970b0700Sskrll * occurs when the cable is connected/removed from the PHY connector.
287970b0700Sskrll */
dwc2_handle_conn_id_status_change_intr(struct dwc2_hsotg * hsotg)288970b0700Sskrll static void dwc2_handle_conn_id_status_change_intr(struct dwc2_hsotg *hsotg)
289970b0700Sskrll {
2905064f7beSskrll u32 gintmsk;
2915064f7beSskrll
2925064f7beSskrll /* Clear interrupt */
2935064f7beSskrll DWC2_WRITE_4(hsotg, GINTSTS, GINTSTS_CONIDSTSCHNG);
294970b0700Sskrll
295970b0700Sskrll /* Need to disable SOF interrupt immediately */
2965064f7beSskrll gintmsk = DWC2_READ_4(hsotg, GINTMSK);
297970b0700Sskrll gintmsk &= ~GINTSTS_SOF;
298c8117e49Sskrll DWC2_WRITE_4(hsotg, GINTMSK, gintmsk);
299970b0700Sskrll
300970b0700Sskrll dev_dbg(hsotg->dev, " ++Connector ID Status Change Interrupt++ (%s)\n",
301970b0700Sskrll dwc2_is_host_mode(hsotg) ? "Host" : "Device");
302970b0700Sskrll
303970b0700Sskrll /*
304970b0700Sskrll * Need to schedule a work, as there are possible DELAY function calls.
305970b0700Sskrll * Release lock before scheduling workq as it holds spinlock during
306970b0700Sskrll * scheduling.
307970b0700Sskrll */
3089c7e1469Sskrll if (hsotg->wq_otg) {
309970b0700Sskrll spin_unlock(&hsotg->lock);
310*9ca2ac75Sskrll queue_work(hsotg->wq_otg, &hsotg->wf_otg);
311970b0700Sskrll spin_lock(&hsotg->lock);
3129c7e1469Sskrll }
313970b0700Sskrll }
314970b0700Sskrll
315970b0700Sskrll /**
316970b0700Sskrll * dwc2_handle_session_req_intr() - This interrupt indicates that a device is
317970b0700Sskrll * initiating the Session Request Protocol to request the host to turn on bus
318970b0700Sskrll * power so a new session can begin
319970b0700Sskrll *
320970b0700Sskrll * @hsotg: Programming view of DWC_otg controller
321970b0700Sskrll *
322970b0700Sskrll * This handler responds by turning on bus power. If the DWC_otg controller is
323970b0700Sskrll * in low power mode, this handler brings the controller out of low power mode
324970b0700Sskrll * before turning on bus power.
325970b0700Sskrll */
dwc2_handle_session_req_intr(struct dwc2_hsotg * hsotg)326970b0700Sskrll static void dwc2_handle_session_req_intr(struct dwc2_hsotg *hsotg)
327970b0700Sskrll {
3285064f7beSskrll int ret;
329970b0700Sskrll
330970b0700Sskrll /* Clear interrupt */
331c8117e49Sskrll DWC2_WRITE_4(hsotg, GINTSTS, GINTSTS_SESSREQINT);
3329c7e1469Sskrll
3335064f7beSskrll dev_dbg(hsotg->dev, "Session request interrupt - lx_state=%d\n",
3345064f7beSskrll hsotg->lx_state);
3355064f7beSskrll
3365064f7beSskrll if (dwc2_is_device_mode(hsotg)) {
3375064f7beSskrll if (hsotg->lx_state == DWC2_L2) {
3385064f7beSskrll ret = dwc2_exit_hibernation(hsotg, true);
3395064f7beSskrll if (ret && (ret != -ENOTSUPP))
3405064f7beSskrll dev_err(hsotg->dev,
3415064f7beSskrll "exit hibernation failed\n");
3425064f7beSskrll }
3435064f7beSskrll
3449c7e1469Sskrll /*
3455064f7beSskrll * Report disconnect if there is any previous session
3465064f7beSskrll * established
3479c7e1469Sskrll */
3485064f7beSskrll dwc2_hsotg_disconnect(hsotg);
3495064f7beSskrll }
350970b0700Sskrll }
351970b0700Sskrll
352970b0700Sskrll /*
353970b0700Sskrll * This interrupt indicates that the DWC_otg controller has detected a
354970b0700Sskrll * resume or remote wakeup sequence. If the DWC_otg controller is in
355970b0700Sskrll * low power mode, the handler must brings the controller out of low
356970b0700Sskrll * power mode. The controller automatically begins resume signaling.
357970b0700Sskrll * The handler schedules a time to stop resume signaling.
358970b0700Sskrll */
dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg * hsotg)359970b0700Sskrll static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg)
360970b0700Sskrll {
3619c7e1469Sskrll int ret;
3625064f7beSskrll
3635064f7beSskrll /* Clear interrupt */
3645064f7beSskrll DWC2_WRITE_4(hsotg, GINTSTS, GINTSTS_WKUPINT);
3655064f7beSskrll
366970b0700Sskrll dev_dbg(hsotg->dev, "++Resume or Remote Wakeup Detected Interrupt++\n");
367970b0700Sskrll dev_dbg(hsotg->dev, "%s lxstate = %d\n", __func__, hsotg->lx_state);
368970b0700Sskrll
369970b0700Sskrll if (dwc2_is_device_mode(hsotg)) {
370c8117e49Sskrll dev_dbg(hsotg->dev, "DSTS=0x%0x\n", DWC2_READ_4(hsotg, DSTS));
371970b0700Sskrll if (hsotg->lx_state == DWC2_L2) {
372c8117e49Sskrll u32 dctl = DWC2_READ_4(hsotg, DCTL);
373970b0700Sskrll
374970b0700Sskrll /* Clear Remote Wakeup Signaling */
375970b0700Sskrll dctl &= ~DCTL_RMTWKUPSIG;
376c8117e49Sskrll DWC2_WRITE_4(hsotg, DCTL, dctl);
3779c7e1469Sskrll ret = dwc2_exit_hibernation(hsotg, true);
3789c7e1469Sskrll if (ret && (ret != -ENOTSUPP))
3799c7e1469Sskrll dev_err(hsotg->dev, "exit hibernation failed\n");
3809c7e1469Sskrll
3819c7e1469Sskrll call_gadget(hsotg, resume);
382970b0700Sskrll }
383970b0700Sskrll /* Change to L0 state */
384970b0700Sskrll hsotg->lx_state = DWC2_L0;
385970b0700Sskrll } else {
3865064f7beSskrll if (hsotg->core_params->hibernation)
3875064f7beSskrll return;
3885064f7beSskrll
389970b0700Sskrll if (hsotg->lx_state != DWC2_L1) {
390c8117e49Sskrll u32 pcgcctl = DWC2_READ_4(hsotg, PCGCTL);
391970b0700Sskrll
392970b0700Sskrll /* Restart the Phy Clock */
393970b0700Sskrll pcgcctl &= ~PCGCTL_STOPPCLK;
394c8117e49Sskrll DWC2_WRITE_4(hsotg, PCGCTL, pcgcctl);
395c8117e49Sskrll callout_reset(&hsotg->wkp_timer, mstohz(71),
396c8117e49Sskrll dwc2_wakeup_detected, hsotg);
397970b0700Sskrll } else {
398970b0700Sskrll /* Change to L0 state */
399970b0700Sskrll hsotg->lx_state = DWC2_L0;
400970b0700Sskrll }
401970b0700Sskrll }
402970b0700Sskrll }
403970b0700Sskrll
404970b0700Sskrll /*
405970b0700Sskrll * This interrupt indicates that a device has been disconnected from the
406970b0700Sskrll * root port
407970b0700Sskrll */
dwc2_handle_disconnect_intr(struct dwc2_hsotg * hsotg)408970b0700Sskrll static void dwc2_handle_disconnect_intr(struct dwc2_hsotg *hsotg)
409970b0700Sskrll {
4105064f7beSskrll DWC2_WRITE_4(hsotg, GINTSTS, GINTSTS_DISCONNINT);
4115064f7beSskrll
412970b0700Sskrll dev_dbg(hsotg->dev, "++Disconnect Detected Interrupt++ (%s) %s\n",
413970b0700Sskrll dwc2_is_host_mode(hsotg) ? "Host" : "Device",
414970b0700Sskrll dwc2_op_state_str(hsotg));
415970b0700Sskrll
4169c7e1469Sskrll if (hsotg->op_state == OTG_STATE_A_HOST)
4175064f7beSskrll dwc2_hcd_disconnect(hsotg, false);
418970b0700Sskrll }
419970b0700Sskrll
420970b0700Sskrll /*
421970b0700Sskrll * This interrupt indicates that SUSPEND state has been detected on the USB.
422970b0700Sskrll *
423970b0700Sskrll * For HNP the USB Suspend interrupt signals the change from "a_peripheral"
424970b0700Sskrll * to "a_host".
425970b0700Sskrll *
426970b0700Sskrll * When power management is enabled the core will be put in low power mode.
427970b0700Sskrll */
dwc2_handle_usb_suspend_intr(struct dwc2_hsotg * hsotg)428970b0700Sskrll static void dwc2_handle_usb_suspend_intr(struct dwc2_hsotg *hsotg)
429970b0700Sskrll {
4309c7e1469Sskrll u32 dsts;
4319c7e1469Sskrll int ret;
4329c7e1469Sskrll
4335064f7beSskrll /* Clear interrupt */
4345064f7beSskrll DWC2_WRITE_4(hsotg, GINTSTS, GINTSTS_USBSUSP);
4355064f7beSskrll
436970b0700Sskrll dev_dbg(hsotg->dev, "USB SUSPEND\n");
437970b0700Sskrll
438970b0700Sskrll if (dwc2_is_device_mode(hsotg)) {
439970b0700Sskrll /*
440970b0700Sskrll * Check the Device status register to determine if the Suspend
441970b0700Sskrll * state is active
442970b0700Sskrll */
443c8117e49Sskrll dsts = DWC2_READ_4(hsotg, DSTS);
444970b0700Sskrll dev_dbg(hsotg->dev, "DSTS=0x%0x\n", dsts);
445970b0700Sskrll dev_dbg(hsotg->dev,
446970b0700Sskrll "DSTS.Suspend Status=%d HWCFG4.Power Optimize=%d\n",
447970b0700Sskrll !!(dsts & DSTS_SUSPSTS),
448cb22e524Sskrll hsotg->hw_params.power_optimized);
4499c7e1469Sskrll if ((dsts & DSTS_SUSPSTS) && hsotg->hw_params.power_optimized) {
4509c7e1469Sskrll /* Ignore suspend request before enumeration */
4519c7e1469Sskrll if (!dwc2_is_device_connected(hsotg)) {
4529c7e1469Sskrll dev_dbg(hsotg->dev,
4539c7e1469Sskrll "ignore suspend request before enumeration\n");
4545064f7beSskrll return;
4559c7e1469Sskrll }
4569c7e1469Sskrll
4579c7e1469Sskrll ret = dwc2_enter_hibernation(hsotg);
4589c7e1469Sskrll if (ret) {
4599c7e1469Sskrll if (ret != -ENOTSUPP)
4609c7e1469Sskrll dev_err(hsotg->dev,
4619c7e1469Sskrll "enter hibernation failed\n");
4629c7e1469Sskrll goto skip_power_saving;
4639c7e1469Sskrll }
4649c7e1469Sskrll
4659c7e1469Sskrll udelay(100);
4669c7e1469Sskrll
4679c7e1469Sskrll /* Ask phy to be suspended */
4689c7e1469Sskrll if (!IS_ERR_OR_NULL(hsotg->uphy))
4699c7e1469Sskrll usb_phy_set_suspend(hsotg->uphy, true);
4709c7e1469Sskrll skip_power_saving:
4719c7e1469Sskrll /*
4729c7e1469Sskrll * Change to L2 (suspend) state before releasing
4739c7e1469Sskrll * spinlock
4749c7e1469Sskrll */
4759c7e1469Sskrll hsotg->lx_state = DWC2_L2;
4769c7e1469Sskrll
4779c7e1469Sskrll /* Call gadget suspend callback */
4789c7e1469Sskrll call_gadget(hsotg, suspend);
4799c7e1469Sskrll }
480970b0700Sskrll } else {
481970b0700Sskrll if (hsotg->op_state == OTG_STATE_A_PERIPHERAL) {
482970b0700Sskrll dev_dbg(hsotg->dev, "a_peripheral->a_host\n");
483970b0700Sskrll
4849c7e1469Sskrll /* Change to L2 (suspend) state */
4859c7e1469Sskrll hsotg->lx_state = DWC2_L2;
486970b0700Sskrll /* Clear the a_peripheral flag, back to a_host */
487970b0700Sskrll spin_unlock(&hsotg->lock);
488970b0700Sskrll dwc2_hcd_start(hsotg);
489970b0700Sskrll spin_lock(&hsotg->lock);
490970b0700Sskrll hsotg->op_state = OTG_STATE_A_HOST;
491970b0700Sskrll }
492970b0700Sskrll }
493970b0700Sskrll }
494970b0700Sskrll
495970b0700Sskrll #define GINTMSK_COMMON (GINTSTS_WKUPINT | GINTSTS_SESSREQINT | \
496970b0700Sskrll GINTSTS_CONIDSTSCHNG | GINTSTS_OTGINT | \
497970b0700Sskrll GINTSTS_MODEMIS | GINTSTS_DISCONNINT | \
498970b0700Sskrll GINTSTS_USBSUSP | GINTSTS_PRTINT)
499970b0700Sskrll
500970b0700Sskrll /*
501970b0700Sskrll * This function returns the Core Interrupt register
502970b0700Sskrll */
dwc2_read_common_intr(struct dwc2_hsotg * hsotg)503970b0700Sskrll static u32 dwc2_read_common_intr(struct dwc2_hsotg *hsotg)
504970b0700Sskrll {
505970b0700Sskrll u32 gintsts;
506970b0700Sskrll u32 gintmsk;
507970b0700Sskrll u32 gahbcfg;
508970b0700Sskrll u32 gintmsk_common = GINTMSK_COMMON;
509970b0700Sskrll
510c8117e49Sskrll gintsts = DWC2_READ_4(hsotg, GINTSTS);
511c8117e49Sskrll gintmsk = DWC2_READ_4(hsotg, GINTMSK);
512c8117e49Sskrll gahbcfg = DWC2_READ_4(hsotg, GAHBCFG);
513970b0700Sskrll
514970b0700Sskrll /* If any common interrupts set */
515970b0700Sskrll if (gintsts & gintmsk_common)
516970b0700Sskrll dev_dbg(hsotg->dev, "gintsts=%08x gintmsk=%08x\n",
517970b0700Sskrll gintsts, gintmsk);
518970b0700Sskrll
519970b0700Sskrll if (gahbcfg & GAHBCFG_GLBL_INTR_EN)
520970b0700Sskrll return gintsts & gintmsk & gintmsk_common;
521970b0700Sskrll else
522970b0700Sskrll return 0;
523970b0700Sskrll }
524970b0700Sskrll
525970b0700Sskrll /*
526970b0700Sskrll * Common interrupt handler
527970b0700Sskrll *
528970b0700Sskrll * The common interrupts are those that occur in both Host and Device mode.
529970b0700Sskrll * This handler handles the following interrupts:
530970b0700Sskrll * - Mode Mismatch Interrupt
531970b0700Sskrll * - OTG Interrupt
532970b0700Sskrll * - Connector ID Status Change Interrupt
533970b0700Sskrll * - Disconnect Interrupt
534970b0700Sskrll * - Session Request Interrupt
535970b0700Sskrll * - Resume / Remote Wakeup Detected Interrupt
536970b0700Sskrll * - Suspend Interrupt
537970b0700Sskrll */
dwc2_handle_common_intr(void * dev)538c8117e49Sskrll irqreturn_t dwc2_handle_common_intr(void *dev)
539970b0700Sskrll {
540970b0700Sskrll struct dwc2_hsotg *hsotg = dev;
541970b0700Sskrll u32 gintsts;
542970b0700Sskrll irqreturn_t retval = IRQ_NONE;
543970b0700Sskrll
544f913003cSskrll if (!dwc2_is_controller_alive(hsotg)) {
545f913003cSskrll dev_warn(hsotg->dev, "Controller is dead\n");
546970b0700Sskrll goto out;
547970b0700Sskrll }
548970b0700Sskrll
549852b18f9Sskrll KASSERT(mutex_owned(&hsotg->lock));
550970b0700Sskrll
551970b0700Sskrll gintsts = dwc2_read_common_intr(hsotg);
552970b0700Sskrll if (gintsts & ~GINTSTS_PRTINT)
553970b0700Sskrll retval = IRQ_HANDLED;
554970b0700Sskrll
555970b0700Sskrll if (gintsts & GINTSTS_MODEMIS)
556970b0700Sskrll dwc2_handle_mode_mismatch_intr(hsotg);
557970b0700Sskrll if (gintsts & GINTSTS_OTGINT)
558970b0700Sskrll dwc2_handle_otg_intr(hsotg);
559970b0700Sskrll if (gintsts & GINTSTS_CONIDSTSCHNG)
560970b0700Sskrll dwc2_handle_conn_id_status_change_intr(hsotg);
561970b0700Sskrll if (gintsts & GINTSTS_DISCONNINT)
562970b0700Sskrll dwc2_handle_disconnect_intr(hsotg);
563970b0700Sskrll if (gintsts & GINTSTS_SESSREQINT)
564970b0700Sskrll dwc2_handle_session_req_intr(hsotg);
565970b0700Sskrll if (gintsts & GINTSTS_WKUPINT)
566970b0700Sskrll dwc2_handle_wakeup_detected_intr(hsotg);
567970b0700Sskrll if (gintsts & GINTSTS_USBSUSP)
568970b0700Sskrll dwc2_handle_usb_suspend_intr(hsotg);
569970b0700Sskrll
570970b0700Sskrll if (gintsts & GINTSTS_PRTINT) {
571970b0700Sskrll /*
572970b0700Sskrll * The port interrupt occurs while in device mode with HPRT0
573970b0700Sskrll * Port Enable/Disable
574970b0700Sskrll */
575970b0700Sskrll if (dwc2_is_device_mode(hsotg)) {
576970b0700Sskrll dev_dbg(hsotg->dev,
577970b0700Sskrll " --Port interrupt received in Device mode--\n");
578f913003cSskrll dwc2_handle_usb_port_intr(hsotg);
579cb22e524Sskrll retval = IRQ_HANDLED;
580970b0700Sskrll }
581970b0700Sskrll }
582970b0700Sskrll
583970b0700Sskrll out:
584970b0700Sskrll return retval;
585970b0700Sskrll }
586