1 /* $NetBSD: pci.h,v 1.8 2014/08/13 20:56:21 riastradh Exp $ */ 2 3 /*- 4 * Copyright (c) 2013 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Taylor R. Campbell. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #ifndef _LINUX_PCI_H_ 33 #define _LINUX_PCI_H_ 34 35 #include <sys/types.h> 36 #include <sys/param.h> 37 #include <sys/bus.h> 38 #include <sys/cdefs.h> 39 #include <sys/kmem.h> 40 #include <sys/systm.h> 41 42 #include <machine/limits.h> 43 44 #include <dev/pci/pcidevs.h> 45 #include <dev/pci/pcireg.h> 46 #include <dev/pci/pcivar.h> 47 #include <dev/pci/agpvar.h> 48 49 #include <linux/dma-mapping.h> 50 #include <linux/ioport.h> 51 52 struct pci_bus; 53 54 struct pci_device_id { 55 uint32_t vendor; 56 uint32_t device; 57 uint32_t subvendor; 58 uint32_t subdevice; 59 uint32_t class; 60 uint32_t class_mask; 61 unsigned long driver_data; 62 }; 63 64 #define PCI_ANY_ID ((pcireg_t)-1) 65 66 #define PCI_BASE_CLASS_DISPLAY PCI_CLASS_DISPLAY 67 68 #define PCI_CLASS_BRIDGE_ISA \ 69 ((PCI_CLASS_BRIDGE << 8) | PCI_SUBCLASS_BRIDGE_ISA) 70 CTASSERT(PCI_CLASS_BRIDGE_ISA == 0x0601); 71 72 /* XXX This is getting silly... */ 73 #define PCI_VENDOR_ID_ASUSTEK PCI_VENDOR_ASUSTEK 74 #define PCI_VENDOR_ID_ATI PCI_VENDOR_ATI 75 #define PCI_VENDOR_ID_DELL PCI_VENDOR_DELL 76 #define PCI_VENDOR_ID_IBM PCI_VENDOR_IBM 77 #define PCI_VENDOR_ID_HP PCI_VENDOR_HP 78 #define PCI_VENDOR_ID_INTEL PCI_VENDOR_INTEL 79 #define PCI_VENDOR_ID_NVIDIA PCI_VENDOR_NVIDIA 80 #define PCI_VENDOR_ID_SONY PCI_VENDOR_SONY 81 #define PCI_VENDOR_ID_VIA PCI_VENDOR_VIATECH 82 83 #define PCI_DEVICE_ID_ATI_RADEON_QY PCI_PRODUCT_ATI_RADEON_RV100_QY 84 85 #define PCI_DEVFN(DEV, FN) \ 86 (__SHIFTIN((DEV), __BITS(3, 7)) | __SHIFTIN((FN), __BITS(0, 2))) 87 #define PCI_SLOT(DEVFN) __SHIFTOUT((DEVFN), __BITS(3, 7)) 88 #define PCI_FUNC(DEVFN) __SHIFTOUT((DEVFN), __BITS(0, 2)) 89 90 #define PCI_NUM_RESOURCES ((PCI_MAPREG_END - PCI_MAPREG_START) / 4) 91 #define DEVICE_COUNT_RESOURCE PCI_NUM_RESOURCES 92 93 #define PCI_CAP_ID_AGP PCI_CAP_AGP 94 95 typedef int pci_power_t; 96 97 #define PCI_D0 0 98 #define PCI_D1 1 99 #define PCI_D2 2 100 #define PCI_D3hot 3 101 #define PCI_D3cold 4 102 103 #define __pci_iomem 104 105 struct pci_dev { 106 struct pci_attach_args pd_pa; 107 int pd_kludges; /* Gotta lose 'em... */ 108 #define NBPCI_KLUDGE_GET_MUMBLE 0x01 109 #define NBPCI_KLUDGE_MAP_ROM 0x02 110 bus_space_tag_t pd_rom_bst; 111 bus_space_handle_t pd_rom_bsh; 112 bus_size_t pd_rom_size; 113 void *pd_rom_vaddr; 114 device_t pd_dev; 115 struct { 116 pcireg_t type; 117 bus_addr_t addr; 118 bus_size_t size; 119 int flags; 120 bus_space_tag_t bst; 121 bus_space_handle_t bsh; 122 void __pci_iomem *kva; 123 } pd_resources[PCI_NUM_RESOURCES]; 124 struct pci_conf_state *pd_saved_state; 125 struct device dev; /* XXX Don't believe me! */ 126 struct pci_bus *bus; 127 uint32_t devfn; 128 uint16_t vendor; 129 uint16_t device; 130 uint16_t subsystem_vendor; 131 uint16_t subsystem_device; 132 uint8_t revision; 133 uint32_t class; 134 bool msi_enabled; 135 }; 136 137 static inline device_t 138 pci_dev_dev(struct pci_dev *pdev) 139 { 140 return pdev->pd_dev; 141 } 142 143 static inline void 144 linux_pci_dev_init(struct pci_dev *pdev, device_t dev, 145 const struct pci_attach_args *pa, int kludges) 146 { 147 const uint32_t subsystem_id = pci_conf_read(pa->pa_pc, pa->pa_tag, 148 PCI_SUBSYS_ID_REG); 149 unsigned i; 150 151 pdev->pd_pa = *pa; 152 pdev->pd_kludges = kludges; 153 pdev->pd_rom_vaddr = NULL; 154 pdev->pd_dev = dev; 155 pdev->bus = NULL; /* XXX struct pci_dev::bus */ 156 pdev->devfn = PCI_DEVFN(pa->pa_device, pa->pa_function); 157 pdev->vendor = PCI_VENDOR(pa->pa_id); 158 pdev->device = PCI_PRODUCT(pa->pa_id); 159 pdev->subsystem_vendor = PCI_SUBSYS_VENDOR(subsystem_id); 160 pdev->subsystem_device = PCI_SUBSYS_ID(subsystem_id); 161 pdev->revision = PCI_REVISION(pa->pa_class); 162 pdev->class = __SHIFTOUT(pa->pa_class, 0xffffff00UL); /* ? */ 163 164 CTASSERT(__arraycount(pdev->pd_resources) == PCI_NUM_RESOURCES); 165 for (i = 0; i < PCI_NUM_RESOURCES; i++) { 166 const int reg = PCI_BAR(i); 167 168 pdev->pd_resources[i].type = pci_mapreg_type(pa->pa_pc, 169 pa->pa_tag, reg); 170 if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, reg, 171 pdev->pd_resources[i].type, 172 &pdev->pd_resources[i].addr, 173 &pdev->pd_resources[i].size, 174 &pdev->pd_resources[i].flags)) { 175 pdev->pd_resources[i].addr = 0; 176 pdev->pd_resources[i].size = 0; 177 pdev->pd_resources[i].flags = 0; 178 } 179 pdev->pd_resources[i].kva = NULL; 180 } 181 } 182 183 static inline int 184 pci_find_capability(struct pci_dev *pdev, int cap) 185 { 186 return pci_get_capability(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, cap, 187 NULL, NULL); 188 } 189 190 static inline int 191 pci_read_config_dword(struct pci_dev *pdev, int reg, uint32_t *valuep) 192 { 193 KASSERT(!ISSET(reg, 3)); 194 *valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg); 195 return 0; 196 } 197 198 static inline int 199 pci_read_config_word(struct pci_dev *pdev, int reg, uint16_t *valuep) 200 { 201 KASSERT(!ISSET(reg, 1)); 202 *valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, 203 (reg &~ 2)) >> (8 * (reg & 2)); 204 return 0; 205 } 206 207 static inline int 208 pci_read_config_byte(struct pci_dev *pdev, int reg, uint8_t *valuep) 209 { 210 *valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, 211 (reg &~ 3)) >> (8 * (reg & 3)); 212 return 0; 213 } 214 215 static inline int 216 pci_write_config_dword(struct pci_dev *pdev, int reg, uint32_t value) 217 { 218 KASSERT(!ISSET(reg, 3)); 219 pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg, value); 220 return 0; 221 } 222 223 static inline void 224 pci_rmw_config(struct pci_dev *pdev, int reg, unsigned int bytes, 225 uint32_t value) 226 { 227 const uint32_t mask = ~((~0UL) << (8 * bytes)); 228 const int reg32 = (reg &~ 3); 229 const unsigned int shift = (8 * (reg & 3)); 230 uint32_t value32; 231 232 KASSERT(bytes <= 4); 233 KASSERT(!ISSET(value, ~mask)); 234 pci_read_config_dword(pdev, reg32, &value32); 235 value32 &=~ (mask << shift); 236 value32 |= (value << shift); 237 pci_write_config_dword(pdev, reg32, value32); 238 } 239 240 static inline int 241 pci_write_config_word(struct pci_dev *pdev, int reg, uint16_t value) 242 { 243 KASSERT(!ISSET(reg, 1)); 244 pci_rmw_config(pdev, reg, 2, value); 245 return 0; 246 } 247 248 static inline int 249 pci_write_config_byte(struct pci_dev *pdev, int reg, uint8_t value) 250 { 251 pci_rmw_config(pdev, reg, 1, value); 252 return 0; 253 } 254 255 /* 256 * XXX pci msi 257 */ 258 static inline int 259 pci_enable_msi(struct pci_dev *pdev) 260 { 261 return -ENOSYS; 262 } 263 264 static inline void 265 pci_disable_msi(struct pci_dev *pdev __unused) 266 { 267 KASSERT(pdev->msi_enabled); 268 } 269 270 static inline void 271 pci_set_master(struct pci_dev *pdev) 272 { 273 pcireg_t csr; 274 275 csr = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, 276 PCI_COMMAND_STATUS_REG); 277 csr |= PCI_COMMAND_MASTER_ENABLE; 278 pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, 279 PCI_COMMAND_STATUS_REG, csr); 280 } 281 282 static inline void 283 pci_clear_master(struct pci_dev *pdev) 284 { 285 pcireg_t csr; 286 287 csr = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, 288 PCI_COMMAND_STATUS_REG); 289 csr &= ~(pcireg_t)PCI_COMMAND_MASTER_ENABLE; 290 pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, 291 PCI_COMMAND_STATUS_REG, csr); 292 } 293 294 #define PCIBIOS_MIN_MEM 0 /* XXX bogus x86 kludge bollocks */ 295 296 static inline bus_addr_t 297 pcibios_align_resource(void *p, const struct resource *resource, 298 bus_addr_t addr, bus_size_t size) 299 { 300 panic("pcibios_align_resource has accessed unaligned neurons!"); 301 } 302 303 static inline int 304 pci_bus_alloc_resource(struct pci_bus *bus, struct resource *resource, 305 bus_size_t size, bus_size_t align, bus_addr_t start, int type __unused, 306 bus_addr_t (*align_fn)(void *, const struct resource *, bus_addr_t, 307 bus_size_t) __unused, 308 struct pci_dev *pdev) 309 { 310 const struct pci_attach_args *const pa = &pdev->pd_pa; 311 bus_space_tag_t bst; 312 int error; 313 314 switch (resource->flags) { 315 case IORESOURCE_MEM: 316 bst = pa->pa_memt; 317 break; 318 319 case IORESOURCE_IO: 320 bst = pa->pa_iot; 321 break; 322 323 default: 324 panic("I don't know what kind of resource you want!"); 325 } 326 327 resource->r_bst = bst; 328 error = bus_space_alloc(bst, start, __type_max(bus_addr_t), 329 size, align, 0, 0, &resource->start, &resource->r_bsh); 330 if (error) 331 return error; 332 333 resource->size = size; 334 return 0; 335 } 336 337 /* 338 * XXX Mega-kludgerific! pci_get_bus_and_slot and pci_get_class are 339 * defined only for their single purposes in i915drm, in 340 * i915_get_bridge_dev and intel_detect_pch. We can't define them more 341 * generally without adapting pci_find_device (and pci_enumerate_bus 342 * internally) to pass a cookie through. 343 */ 344 345 static inline int /* XXX inline? */ 346 pci_kludgey_match_bus0_dev0_func0(const struct pci_attach_args *pa) 347 { 348 349 if (pa->pa_bus != 0) 350 return 0; 351 if (pa->pa_device != 0) 352 return 0; 353 if (pa->pa_function != 0) 354 return 0; 355 356 return 1; 357 } 358 359 static inline struct pci_dev * 360 pci_get_bus_and_slot(int bus, int slot) 361 { 362 struct pci_attach_args pa; 363 364 KASSERT(bus == 0); 365 KASSERT(slot == PCI_DEVFN(0, 0)); 366 367 if (!pci_find_device(&pa, &pci_kludgey_match_bus0_dev0_func0)) 368 return NULL; 369 370 struct pci_dev *const pdev = kmem_zalloc(sizeof(*pdev), KM_SLEEP); 371 linux_pci_dev_init(pdev, NULL, &pa, NBPCI_KLUDGE_GET_MUMBLE); 372 373 return pdev; 374 } 375 376 static inline int /* XXX inline? */ 377 pci_kludgey_match_isa_bridge(const struct pci_attach_args *pa) 378 { 379 380 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_BRIDGE) 381 return 0; 382 if (PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_BRIDGE_ISA) 383 return 0; 384 385 return 1; 386 } 387 388 static inline void 389 pci_dev_put(struct pci_dev *pdev) 390 { 391 392 if (pdev == NULL) 393 return; 394 395 KASSERT(ISSET(pdev->pd_kludges, NBPCI_KLUDGE_GET_MUMBLE)); 396 kmem_free(pdev, sizeof(*pdev)); 397 } 398 399 static inline struct pci_dev * 400 pci_get_class(uint32_t class_subclass_shifted __unused, struct pci_dev *from) 401 { 402 struct pci_attach_args pa; 403 404 KASSERT(class_subclass_shifted == (PCI_CLASS_BRIDGE_ISA << 8)); 405 406 if (from != NULL) { 407 pci_dev_put(from); 408 return NULL; 409 } 410 411 if (!pci_find_device(&pa, &pci_kludgey_match_isa_bridge)) 412 return NULL; 413 414 struct pci_dev *const pdev = kmem_zalloc(sizeof(*pdev), KM_SLEEP); 415 linux_pci_dev_init(pdev, NULL, &pa, NBPCI_KLUDGE_GET_MUMBLE); 416 417 return pdev; 418 } 419 420 #define __pci_rom_iomem 421 422 static inline void 423 pci_unmap_rom(struct pci_dev *pdev, void __pci_rom_iomem *vaddr __unused) 424 { 425 426 KASSERT(ISSET(pdev->pd_kludges, NBPCI_KLUDGE_MAP_ROM)); 427 KASSERT(vaddr == pdev->pd_rom_vaddr); 428 bus_space_unmap(pdev->pd_rom_bst, pdev->pd_rom_bsh, pdev->pd_rom_size); 429 pdev->pd_kludges &= ~NBPCI_KLUDGE_MAP_ROM; 430 pdev->pd_rom_vaddr = NULL; 431 } 432 433 static inline void __pci_rom_iomem * 434 pci_map_rom(struct pci_dev *pdev, size_t *sizep) 435 { 436 bus_space_handle_t bsh; 437 bus_size_t size; 438 439 KASSERT(!ISSET(pdev->pd_kludges, NBPCI_KLUDGE_MAP_ROM)); 440 441 if (pci_mapreg_map(&pdev->pd_pa, PCI_MAPREG_ROM, PCI_MAPREG_TYPE_ROM, 442 (BUS_SPACE_MAP_PREFETCHABLE | BUS_SPACE_MAP_LINEAR), 443 &pdev->pd_rom_bst, &pdev->pd_rom_bsh, NULL, &pdev->pd_rom_size) 444 != 0) 445 return NULL; 446 pdev->pd_kludges |= NBPCI_KLUDGE_MAP_ROM; 447 448 /* XXX This type is obviously wrong in general... */ 449 if (pci_find_rom(&pdev->pd_pa, pdev->pd_rom_bst, pdev->pd_rom_bsh, 450 PCI_ROM_CODE_TYPE_X86, &bsh, &size)) { 451 pci_unmap_rom(pdev, NULL); 452 return NULL; 453 } 454 455 KASSERT(size <= SIZE_T_MAX); 456 *sizep = size; 457 pdev->pd_rom_vaddr = bus_space_vaddr(pdev->pd_rom_bst, bsh); 458 return pdev->pd_rom_vaddr; 459 } 460 461 static inline bus_addr_t 462 pci_resource_start(struct pci_dev *pdev, unsigned i) 463 { 464 465 KASSERT(i < PCI_NUM_RESOURCES); 466 return pdev->pd_resources[i].addr; 467 } 468 469 static inline bus_size_t 470 pci_resource_len(struct pci_dev *pdev, unsigned i) 471 { 472 473 KASSERT(i < PCI_NUM_RESOURCES); 474 return pdev->pd_resources[i].size; 475 } 476 477 static inline bus_addr_t 478 pci_resource_end(struct pci_dev *pdev, unsigned i) 479 { 480 481 return pci_resource_start(pdev, i) + (pci_resource_len(pdev, i) - 1); 482 } 483 484 static inline int 485 pci_resource_flags(struct pci_dev *pdev, unsigned i) 486 { 487 488 KASSERT(i < PCI_NUM_RESOURCES); 489 return pdev->pd_resources[i].flags; 490 } 491 492 static inline void __pci_iomem * 493 pci_iomap(struct pci_dev *pdev, unsigned i, bus_size_t size) 494 { 495 int error; 496 497 KASSERT(i < PCI_NUM_RESOURCES); 498 KASSERT(pdev->pd_resources[i].kva == NULL); 499 500 if (PCI_MAPREG_TYPE(pdev->pd_resources[i].type) != PCI_MAPREG_TYPE_MEM) 501 return NULL; 502 if (pdev->pd_resources[i].size < size) 503 return NULL; 504 error = bus_space_map(pdev->pd_pa.pa_memt, pdev->pd_resources[i].addr, 505 size, BUS_SPACE_MAP_LINEAR | pdev->pd_resources[i].flags, 506 &pdev->pd_resources[i].bsh); 507 if (error) { 508 /* Horrible hack: try asking the fake AGP device. */ 509 if (!agp_i810_borrow(pdev->pd_resources[i].addr, size, 510 &pdev->pd_resources[i].bsh)) 511 return NULL; 512 } 513 pdev->pd_resources[i].bst = pdev->pd_pa.pa_memt; 514 pdev->pd_resources[i].kva = bus_space_vaddr(pdev->pd_resources[i].bst, 515 pdev->pd_resources[i].bsh); 516 517 return pdev->pd_resources[i].kva; 518 } 519 520 static inline void 521 pci_iounmap(struct pci_dev *pdev, void __pci_iomem *kva) 522 { 523 unsigned i; 524 525 CTASSERT(__arraycount(pdev->pd_resources) == PCI_NUM_RESOURCES); 526 for (i = 0; i < PCI_NUM_RESOURCES; i++) { 527 if (pdev->pd_resources[i].kva == kva) 528 break; 529 } 530 KASSERT(i < PCI_NUM_RESOURCES); 531 532 pdev->pd_resources[i].kva = NULL; 533 bus_space_unmap(pdev->pd_resources[i].bst, pdev->pd_resources[i].bsh, 534 pdev->pd_resources[i].size); 535 } 536 537 static inline void 538 pci_save_state(struct pci_dev *pdev) 539 { 540 541 KASSERT(pdev->pd_saved_state == NULL); 542 pdev->pd_saved_state = kmem_alloc(sizeof(*pdev->pd_saved_state), 543 KM_SLEEP); 544 pci_conf_capture(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, 545 pdev->pd_saved_state); 546 } 547 548 static inline void 549 pci_restore_state(struct pci_dev *pdev) 550 { 551 552 KASSERT(pdev->pd_saved_state != NULL); 553 pci_conf_restore(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, 554 pdev->pd_saved_state); 555 kmem_free(pdev->pd_saved_state, sizeof(*pdev->pd_saved_state)); 556 pdev->pd_saved_state = NULL; 557 } 558 559 static inline bool 560 pci_is_pcie(struct pci_dev *pdev) 561 { 562 563 return (pci_find_capability(pdev, PCI_CAP_PCIEXPRESS) != 0); 564 } 565 566 static inline bool 567 pci_dma_supported(struct pci_dev *pdev, uintmax_t mask) 568 { 569 570 /* XXX Cop-out. */ 571 if (mask > DMA_BIT_MASK(32)) 572 return pci_dma64_available(&pdev->pd_pa); 573 else 574 return true; 575 } 576 577 #endif /* _LINUX_PCI_H_ */ 578