1 /* $NetBSD: pci.h,v 1.51 2021/12/19 12:13:16 riastradh Exp $ */ 2 3 /*- 4 * Copyright (c) 2013 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Taylor R. Campbell. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #ifndef _LINUX_PCI_H_ 33 #define _LINUX_PCI_H_ 34 35 #ifdef _KERNEL_OPT 36 #if defined(i386) || defined(amd64) || defined(__aarch64__) 37 #include "acpica.h" 38 #else /* !(i386 || amd64) */ 39 #define NACPICA 0 40 #endif /* i386 || amd64 */ 41 #endif 42 43 #include <sys/types.h> 44 #include <sys/param.h> 45 #include <sys/bus.h> 46 #include <sys/cdefs.h> 47 #include <sys/kmem.h> 48 #include <sys/systm.h> 49 50 #include <machine/limits.h> 51 52 #include <dev/pci/pcidevs.h> 53 #include <dev/pci/pcireg.h> 54 #include <dev/pci/pcivar.h> 55 #include <dev/pci/agpvar.h> 56 57 #include <linux/device.h> 58 #include <linux/dma-mapping.h> 59 #include <linux/errno.h> 60 #include <linux/io.h> 61 #include <linux/interrupt.h> 62 #include <linux/ioport.h> 63 #include <linux/kernel.h> 64 65 struct acpi_devnode; 66 struct pci_driver; 67 68 struct pci_bus { 69 /* NetBSD private members */ 70 pci_chipset_tag_t pb_pc; 71 device_t pb_dev; 72 73 /* Linux API */ 74 u_int number; 75 }; 76 77 struct pci_device_id { 78 uint32_t vendor; 79 uint32_t device; 80 uint32_t subvendor; 81 uint32_t subdevice; 82 uint32_t class; 83 uint32_t class_mask; 84 unsigned long driver_data; 85 }; 86 87 #define PCI_DEVICE(VENDOR, DEVICE) \ 88 .vendor = (VENDOR), \ 89 .device = (DEVICE) 90 91 #define PCI_ANY_ID (~0) 92 93 #define PCI_BASE_CLASS_DISPLAY PCI_CLASS_DISPLAY 94 95 #define PCI_CLASS_DISPLAY_VGA \ 96 ((PCI_CLASS_DISPLAY << 8) | PCI_SUBCLASS_DISPLAY_VGA) 97 #define PCI_CLASS_BRIDGE_ISA \ 98 ((PCI_CLASS_BRIDGE << 8) | PCI_SUBCLASS_BRIDGE_ISA) 99 CTASSERT(PCI_CLASS_BRIDGE_ISA == 0x0601); 100 101 /* XXX This is getting silly... */ 102 #define PCI_VENDOR_ID_APPLE PCI_VENDOR_APPLE 103 #define PCI_VENDOR_ID_ASUSTEK PCI_VENDOR_ASUSTEK 104 #define PCI_VENDOR_ID_ATI PCI_VENDOR_ATI 105 #define PCI_VENDOR_ID_DELL PCI_VENDOR_DELL 106 #define PCI_VENDOR_ID_IBM PCI_VENDOR_IBM 107 #define PCI_VENDOR_ID_HP PCI_VENDOR_HP 108 #define PCI_VENDOR_ID_INTEL PCI_VENDOR_INTEL 109 #define PCI_VENDOR_ID_NVIDIA PCI_VENDOR_NVIDIA 110 #define PCI_VENDOR_ID_SI PCI_VENDOR_SIS 111 #define PCI_VENDOR_ID_SONY PCI_VENDOR_SONY 112 #define PCI_VENDOR_ID_VIA PCI_VENDOR_VIATECH 113 114 #define PCI_SUBVENDOR_ID_REDHAT_QUMRANET 0x1af4 115 116 #define PCI_DEVICE_ID_ATI_RADEON_QY PCI_PRODUCT_ATI_RADEON_RV100_QY 117 118 #define PCI_SUBDEVICE_ID_QEMU 0x1100 119 120 #define PCI_DEVFN(DEV, FN) \ 121 (__SHIFTIN((DEV), __BITS(3, 7)) | __SHIFTIN((FN), __BITS(0, 2))) 122 #define PCI_SLOT(DEVFN) ((int)__SHIFTOUT((DEVFN), __BITS(3, 7))) 123 #define PCI_FUNC(DEVFN) ((int)__SHIFTOUT((DEVFN), __BITS(0, 2))) 124 125 #define PCI_DEVID(BUS, DEVFN) \ 126 (__SHIFTIN((BUS), __BITS(15, 8)) | __SHIFTIN((DEVFN), __BITS(7, 0))) 127 #define PCI_BUS_NUM(DEVID) ((int)__SHIFTOUT((DEVID), __BITS(15,8))) 128 129 #define PCI_NUM_RESOURCES ((PCI_MAPREG_END - PCI_MAPREG_START) / 4) 130 #define DEVICE_COUNT_RESOURCE PCI_NUM_RESOURCES 131 132 #define PCI_CAP_ID_AGP PCI_CAP_AGP 133 134 typedef int pci_power_t; 135 136 #define PCI_D0 0 137 #define PCI_D1 1 138 #define PCI_D2 2 139 #define PCI_D3hot 3 140 #define PCI_D3cold 4 141 142 #define __pci_iomem 143 144 struct pci_dev { 145 struct pci_attach_args pd_pa; 146 int pd_kludges; /* Gotta lose 'em... */ 147 #define NBPCI_KLUDGE_GET_MUMBLE 0x01 148 #define NBPCI_KLUDGE_MAP_ROM 0x02 149 bus_space_tag_t pd_rom_bst; 150 bus_space_handle_t pd_rom_bsh; 151 bus_size_t pd_rom_size; 152 bus_space_handle_t pd_rom_found_bsh; 153 bus_size_t pd_rom_found_size; 154 void *pd_rom_vaddr; 155 device_t pd_dev; 156 void *pd_drvdata; 157 struct { 158 pcireg_t type; 159 bus_addr_t addr; 160 bus_size_t size; 161 int flags; 162 bus_space_tag_t bst; 163 bus_space_handle_t bsh; 164 void __pci_iomem *kva; 165 bool mapped; 166 } pd_resources[PCI_NUM_RESOURCES]; 167 struct pci_conf_state *pd_saved_state; 168 struct acpi_devnode *pd_ad; 169 pci_intr_handle_t *pd_intr_handles; 170 unsigned pd_enablecnt; 171 172 /* Linx API only below */ 173 struct pci_bus *bus; 174 uint32_t devfn; 175 uint16_t vendor; 176 uint16_t device; 177 uint16_t subsystem_vendor; 178 uint16_t subsystem_device; 179 uint8_t revision; 180 uint32_t class; 181 bool msi_enabled; 182 bool no_64bit_msi; 183 }; 184 185 enum pci_bus_speed { 186 PCI_SPEED_UNKNOWN, 187 PCIE_SPEED_2_5GT, 188 PCIE_SPEED_5_0GT, 189 PCIE_SPEED_8_0GT, 190 PCIE_SPEED_16_0GT, 191 }; 192 193 #define PCIBIOS_MIN_MEM 0x100000 /* XXX bogus x86 kludge bollocks */ 194 195 #define __pci_rom_iomem 196 197 /* Namespace. */ 198 #define pci_bus_alloc_resource linux_pci_bus_alloc_resource 199 #define pci_bus_read_config_byte linux_pci_bus_read_config_byte 200 #define pci_bus_read_config_dword linux_pci_bus_read_config_dword 201 #define pci_bus_read_config_word linux_pci_bus_read_config_word 202 #define pci_bus_write_config_byte linux_pci_bus_write_config_byte 203 #define pci_bus_write_config_dword linux_pci_bus_write_config_dword 204 #define pci_bus_write_config_word linux_pci_bus_write_config_word 205 #define pci_clear_master linux_pci_clear_master 206 #define pci_dev_dev linux_pci_dev_dev 207 #define pci_dev_present linux_pci_dev_present 208 #define pci_dev_put linux_pci_dev_put 209 #define pci_disable_msi linux_pci_disable_msi 210 #define pci_disable_rom linux_pci_disable_rom 211 #define pci_dma_supported linux_pci_dma_supported 212 #define pci_domain_nr linux_pci_domain_nr 213 #define pci_enable_msi linux_pci_enable_msi 214 #define pci_enable_rom linux_pci_enable_rom 215 #define pci_find_capability linux_pci_find_capability 216 #define pci_get_class linux_pci_get_class 217 #define pci_get_domain_bus_and_slot linux_pci_get_domain_bus_and_slot 218 #define pci_get_drvdata linux_pci_get_drvdata 219 #define pci_iomap linux_pci_iomap 220 #define pci_iounmap linux_pci_iounmap 221 #define pci_is_pcie linux_pci_is_pcie 222 #define pci_is_root_bus linux_pci_is_root_bus 223 #define pci_is_thunderbolt_attached linux_pci_is_thunderbolt_attached 224 #define pci_map_rom linux_pci_map_rom 225 #define pci_name linux_pci_name 226 #define pci_platform_rom linux_pci_platform_rom 227 #define pci_read_config_byte linux_pci_read_config_byte 228 #define pci_read_config_dword linux_pci_read_config_dword 229 #define pci_read_config_word linux_pci_read_config_word 230 #define pci_resource_end linux_pci_resource_end 231 #define pci_resource_flags linux_pci_resource_flags 232 #define pci_resource_len linux_pci_resource_len 233 #define pci_resource_start linux_pci_resource_start 234 #define pci_restore_state linux_pci_restore_state 235 #define pci_save_state linux_pci_save_state 236 #define pci_set_drvdata linux_pci_set_drvdata 237 #define pci_set_master linux_pci_set_master 238 #define pci_unmap_rom linux_pci_unmap_rom 239 #define pci_write_config_byte linux_pci_write_config_byte 240 #define pci_write_config_dword linux_pci_write_config_dword 241 #define pci_write_config_word linux_pci_write_config_word 242 #define pcibios_align_resource linux_pcibios_align_resource 243 244 /* NetBSD local additions. */ 245 void linux_pci_dev_init(struct pci_dev *, device_t, device_t, 246 const struct pci_attach_args *, int); 247 void linux_pci_dev_destroy(struct pci_dev *); 248 249 /* NetBSD no-renames because use requires review. */ 250 int linux_pci_enable_device(struct pci_dev *); 251 void linux_pci_disable_device(struct pci_dev *); 252 253 bool pci_is_root_bus(struct pci_bus *); 254 int pci_domain_nr(struct pci_bus *); 255 256 device_t pci_dev_dev(struct pci_dev *); 257 void pci_set_drvdata(struct pci_dev *, void *); 258 void * pci_get_drvdata(struct pci_dev *); 259 const char * pci_name(struct pci_dev *); 260 261 int pci_find_capability(struct pci_dev *, int); 262 bool pci_is_pcie(struct pci_dev *); 263 bool pci_dma_supported(struct pci_dev *, uintmax_t); 264 bool pci_is_thunderbolt_attached(struct pci_dev *); 265 266 int pci_read_config_dword(struct pci_dev *, int, uint32_t *); 267 int pci_read_config_word(struct pci_dev *, int, uint16_t *); 268 int pci_read_config_byte(struct pci_dev *, int, uint8_t *); 269 int pci_write_config_dword(struct pci_dev *, int, uint32_t); 270 int pci_write_config_word(struct pci_dev *, int, uint16_t); 271 int pci_write_config_byte(struct pci_dev *, int, uint8_t); 272 273 int pci_bus_read_config_dword(struct pci_bus *, unsigned, int, 274 uint32_t *); 275 int pci_bus_read_config_word(struct pci_bus *, unsigned, int, 276 uint16_t *); 277 int pci_bus_read_config_byte(struct pci_bus *, unsigned, int, 278 uint8_t *); 279 int pci_bus_write_config_dword(struct pci_bus *, unsigned, int, 280 uint32_t); 281 int pci_bus_write_config_word(struct pci_bus *, unsigned, int, 282 uint16_t); 283 int pci_bus_write_config_byte(struct pci_bus *, unsigned, int, 284 uint8_t); 285 286 int pci_enable_msi(struct pci_dev *); 287 void pci_disable_msi(struct pci_dev *); 288 void pci_set_master(struct pci_dev *); 289 void pci_clear_master(struct pci_dev *); 290 291 bus_addr_t pcibios_align_resource(void *, const struct resource *, 292 bus_addr_t, bus_size_t); 293 int pci_bus_alloc_resource(struct pci_bus *, struct resource *, 294 bus_size_t, bus_size_t, bus_addr_t, int, 295 bus_addr_t (*)(void *, const struct resource *, bus_addr_t, 296 bus_size_t), struct pci_dev *); 297 298 /* XXX Kludges only -- do not use without checking the implementation! */ 299 struct pci_dev *pci_get_domain_bus_and_slot(int, int, int); 300 struct pci_dev *pci_get_class(uint32_t, struct pci_dev *); /* i915 kludge */ 301 int pci_dev_present(const struct pci_device_id *); 302 void pci_dev_put(struct pci_dev *); 303 304 void __pci_rom_iomem * 305 pci_map_rom(struct pci_dev *, size_t *); 306 void __pci_rom_iomem * 307 pci_platform_rom(struct pci_dev *, size_t *); 308 void pci_unmap_rom(struct pci_dev *, void __pci_rom_iomem *); 309 int pci_enable_rom(struct pci_dev *); 310 void pci_disable_rom(struct pci_dev *); 311 312 bus_addr_t pci_resource_start(struct pci_dev *, unsigned); 313 bus_size_t pci_resource_len(struct pci_dev *, unsigned); 314 bus_addr_t pci_resource_end(struct pci_dev *, unsigned); 315 int pci_resource_flags(struct pci_dev *, unsigned); 316 317 void __pci_iomem * 318 pci_iomap(struct pci_dev *, unsigned, bus_size_t); 319 void pci_iounmap(struct pci_dev *, void __pci_iomem *); 320 321 void pci_save_state(struct pci_dev *); 322 void pci_restore_state(struct pci_dev *); 323 324 static inline bool 325 dev_is_pci(struct device *dev) 326 { 327 struct device *parent = device_parent(dev); 328 329 return parent && device_is_a(parent, "pci"); 330 } 331 332 #endif /* _LINUX_PCI_H_ */ 333