1 /* $NetBSD: virtgpu_display.c,v 1.2 2018/08/27 04:58:37 riastradh Exp $ */ 2 3 /* 4 * Copyright (C) 2015 Red Hat, Inc. 5 * All Rights Reserved. 6 * 7 * Authors: 8 * Dave Airlie 9 * Alon Levy 10 * 11 * Permission is hereby granted, free of charge, to any person obtaining a 12 * copy of this software and associated documentation files (the "Software"), 13 * to deal in the Software without restriction, including without limitation 14 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 15 * and/or sell copies of the Software, and to permit persons to whom the 16 * Software is furnished to do so, subject to the following conditions: 17 * 18 * The above copyright notice and this permission notice shall be included in 19 * all copies or substantial portions of the Software. 20 * 21 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 22 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 23 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 24 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 25 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 26 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 27 * OTHER DEALINGS IN THE SOFTWARE. 28 */ 29 30 #include <sys/cdefs.h> 31 __KERNEL_RCSID(0, "$NetBSD: virtgpu_display.c,v 1.2 2018/08/27 04:58:37 riastradh Exp $"); 32 33 #include "virtgpu_drv.h" 34 #include <drm/drm_crtc_helper.h> 35 #include <drm/drm_atomic_helper.h> 36 37 #define XRES_MIN 320 38 #define YRES_MIN 200 39 40 #define XRES_DEF 1024 41 #define YRES_DEF 768 42 43 #define XRES_MAX 8192 44 #define YRES_MAX 8192 45 46 static void virtio_gpu_crtc_gamma_set(struct drm_crtc *crtc, 47 u16 *red, u16 *green, u16 *blue, 48 uint32_t start, uint32_t size) 49 { 50 /* TODO */ 51 } 52 53 static void 54 virtio_gpu_hide_cursor(struct virtio_gpu_device *vgdev, 55 struct virtio_gpu_output *output) 56 { 57 output->cursor.hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_UPDATE_CURSOR); 58 output->cursor.resource_id = 0; 59 virtio_gpu_cursor_ping(vgdev, output); 60 } 61 62 static int virtio_gpu_crtc_cursor_set(struct drm_crtc *crtc, 63 struct drm_file *file_priv, 64 uint32_t handle, 65 uint32_t width, 66 uint32_t height, 67 int32_t hot_x, int32_t hot_y) 68 { 69 struct virtio_gpu_device *vgdev = crtc->dev->dev_private; 70 struct virtio_gpu_output *output = 71 container_of(crtc, struct virtio_gpu_output, crtc); 72 struct drm_gem_object *gobj = NULL; 73 struct virtio_gpu_object *qobj = NULL; 74 struct virtio_gpu_fence *fence = NULL; 75 int ret = 0; 76 77 if (handle == 0) { 78 virtio_gpu_hide_cursor(vgdev, output); 79 return 0; 80 } 81 82 /* lookup the cursor */ 83 gobj = drm_gem_object_lookup(crtc->dev, file_priv, handle); 84 if (gobj == NULL) 85 return -ENOENT; 86 87 qobj = gem_to_virtio_gpu_obj(gobj); 88 89 if (!qobj->hw_res_handle) { 90 ret = -EINVAL; 91 goto out; 92 } 93 94 virtio_gpu_cmd_transfer_to_host_2d(vgdev, qobj->hw_res_handle, 0, 95 cpu_to_le32(64), 96 cpu_to_le32(64), 97 0, 0, &fence); 98 ret = virtio_gpu_object_reserve(qobj, false); 99 if (!ret) { 100 reservation_object_add_excl_fence(qobj->tbo.resv, 101 &fence->f); 102 fence_put(&fence->f); 103 virtio_gpu_object_unreserve(qobj); 104 virtio_gpu_object_wait(qobj, false); 105 } 106 107 output->cursor.hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_UPDATE_CURSOR); 108 output->cursor.resource_id = cpu_to_le32(qobj->hw_res_handle); 109 output->cursor.hot_x = cpu_to_le32(hot_x); 110 output->cursor.hot_y = cpu_to_le32(hot_y); 111 virtio_gpu_cursor_ping(vgdev, output); 112 ret = 0; 113 114 out: 115 drm_gem_object_unreference_unlocked(gobj); 116 return ret; 117 } 118 119 static int virtio_gpu_crtc_cursor_move(struct drm_crtc *crtc, 120 int x, int y) 121 { 122 struct virtio_gpu_device *vgdev = crtc->dev->dev_private; 123 struct virtio_gpu_output *output = 124 container_of(crtc, struct virtio_gpu_output, crtc); 125 126 output->cursor.hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_MOVE_CURSOR); 127 output->cursor.pos.x = cpu_to_le32(x); 128 output->cursor.pos.y = cpu_to_le32(y); 129 virtio_gpu_cursor_ping(vgdev, output); 130 return 0; 131 } 132 133 static int virtio_gpu_page_flip(struct drm_crtc *crtc, 134 struct drm_framebuffer *fb, 135 struct drm_pending_vblank_event *event, 136 uint32_t flags) 137 { 138 struct virtio_gpu_device *vgdev = crtc->dev->dev_private; 139 struct virtio_gpu_output *output = 140 container_of(crtc, struct virtio_gpu_output, crtc); 141 struct drm_plane *plane = crtc->primary; 142 struct virtio_gpu_framebuffer *vgfb; 143 struct virtio_gpu_object *bo; 144 unsigned long irqflags; 145 uint32_t handle; 146 147 plane->fb = fb; 148 vgfb = to_virtio_gpu_framebuffer(plane->fb); 149 bo = gem_to_virtio_gpu_obj(vgfb->obj); 150 handle = bo->hw_res_handle; 151 152 DRM_DEBUG("handle 0x%x%s, crtc %dx%d\n", handle, 153 bo->dumb ? ", dumb" : "", 154 crtc->mode.hdisplay, crtc->mode.vdisplay); 155 if (bo->dumb) { 156 virtio_gpu_cmd_transfer_to_host_2d 157 (vgdev, handle, 0, 158 cpu_to_le32(crtc->mode.hdisplay), 159 cpu_to_le32(crtc->mode.vdisplay), 160 0, 0, NULL); 161 } 162 virtio_gpu_cmd_set_scanout(vgdev, output->index, handle, 163 crtc->mode.hdisplay, 164 crtc->mode.vdisplay, 0, 0); 165 virtio_gpu_cmd_resource_flush(vgdev, handle, 0, 0, 166 crtc->mode.hdisplay, 167 crtc->mode.vdisplay); 168 169 if (event) { 170 spin_lock_irqsave(&crtc->dev->event_lock, irqflags); 171 drm_send_vblank_event(crtc->dev, -1, event); 172 spin_unlock_irqrestore(&crtc->dev->event_lock, irqflags); 173 } 174 175 return 0; 176 } 177 178 static const struct drm_crtc_funcs virtio_gpu_crtc_funcs = { 179 .cursor_set2 = virtio_gpu_crtc_cursor_set, 180 .cursor_move = virtio_gpu_crtc_cursor_move, 181 .gamma_set = virtio_gpu_crtc_gamma_set, 182 .set_config = drm_atomic_helper_set_config, 183 .destroy = drm_crtc_cleanup, 184 185 .page_flip = virtio_gpu_page_flip, 186 .reset = drm_atomic_helper_crtc_reset, 187 .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state, 188 .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state, 189 }; 190 191 static void virtio_gpu_user_framebuffer_destroy(struct drm_framebuffer *fb) 192 { 193 struct virtio_gpu_framebuffer *virtio_gpu_fb 194 = to_virtio_gpu_framebuffer(fb); 195 196 if (virtio_gpu_fb->obj) 197 drm_gem_object_unreference_unlocked(virtio_gpu_fb->obj); 198 drm_framebuffer_cleanup(fb); 199 kfree(virtio_gpu_fb); 200 } 201 202 static int 203 virtio_gpu_framebuffer_surface_dirty(struct drm_framebuffer *fb, 204 struct drm_file *file_priv, 205 unsigned flags, unsigned color, 206 struct drm_clip_rect *clips, 207 unsigned num_clips) 208 { 209 struct virtio_gpu_framebuffer *virtio_gpu_fb 210 = to_virtio_gpu_framebuffer(fb); 211 212 return virtio_gpu_surface_dirty(virtio_gpu_fb, clips, num_clips); 213 } 214 215 static const struct drm_framebuffer_funcs virtio_gpu_fb_funcs = { 216 .destroy = virtio_gpu_user_framebuffer_destroy, 217 .dirty = virtio_gpu_framebuffer_surface_dirty, 218 }; 219 220 int 221 virtio_gpu_framebuffer_init(struct drm_device *dev, 222 struct virtio_gpu_framebuffer *vgfb, 223 struct drm_mode_fb_cmd2 *mode_cmd, 224 struct drm_gem_object *obj) 225 { 226 int ret; 227 struct virtio_gpu_object *bo; 228 vgfb->obj = obj; 229 230 bo = gem_to_virtio_gpu_obj(obj); 231 232 ret = drm_framebuffer_init(dev, &vgfb->base, &virtio_gpu_fb_funcs); 233 if (ret) { 234 vgfb->obj = NULL; 235 return ret; 236 } 237 drm_helper_mode_fill_fb_struct(&vgfb->base, mode_cmd); 238 239 spin_lock_init(&vgfb->dirty_lock); 240 vgfb->x1 = vgfb->y1 = INT_MAX; 241 vgfb->x2 = vgfb->y2 = 0; 242 return 0; 243 } 244 245 static bool virtio_gpu_crtc_mode_fixup(struct drm_crtc *crtc, 246 const struct drm_display_mode *mode, 247 struct drm_display_mode *adjusted_mode) 248 { 249 return true; 250 } 251 252 static void virtio_gpu_crtc_mode_set_nofb(struct drm_crtc *crtc) 253 { 254 struct drm_device *dev = crtc->dev; 255 struct virtio_gpu_device *vgdev = dev->dev_private; 256 struct virtio_gpu_output *output = drm_crtc_to_virtio_gpu_output(crtc); 257 258 virtio_gpu_cmd_set_scanout(vgdev, output->index, 0, 259 crtc->mode.hdisplay, 260 crtc->mode.vdisplay, 0, 0); 261 } 262 263 static void virtio_gpu_crtc_enable(struct drm_crtc *crtc) 264 { 265 } 266 267 static void virtio_gpu_crtc_disable(struct drm_crtc *crtc) 268 { 269 struct drm_device *dev = crtc->dev; 270 struct virtio_gpu_device *vgdev = dev->dev_private; 271 struct virtio_gpu_output *output = drm_crtc_to_virtio_gpu_output(crtc); 272 273 virtio_gpu_cmd_set_scanout(vgdev, output->index, 0, 0, 0, 0, 0); 274 } 275 276 static int virtio_gpu_crtc_atomic_check(struct drm_crtc *crtc, 277 struct drm_crtc_state *state) 278 { 279 return 0; 280 } 281 282 static const struct drm_crtc_helper_funcs virtio_gpu_crtc_helper_funcs = { 283 .enable = virtio_gpu_crtc_enable, 284 .disable = virtio_gpu_crtc_disable, 285 .mode_fixup = virtio_gpu_crtc_mode_fixup, 286 .mode_set_nofb = virtio_gpu_crtc_mode_set_nofb, 287 .atomic_check = virtio_gpu_crtc_atomic_check, 288 }; 289 290 static bool virtio_gpu_enc_mode_fixup(struct drm_encoder *encoder, 291 const struct drm_display_mode *mode, 292 struct drm_display_mode *adjusted_mode) 293 { 294 return true; 295 } 296 297 static void virtio_gpu_enc_mode_set(struct drm_encoder *encoder, 298 struct drm_display_mode *mode, 299 struct drm_display_mode *adjusted_mode) 300 { 301 } 302 303 static void virtio_gpu_enc_enable(struct drm_encoder *encoder) 304 { 305 } 306 307 static void virtio_gpu_enc_disable(struct drm_encoder *encoder) 308 { 309 } 310 311 static int virtio_gpu_conn_get_modes(struct drm_connector *connector) 312 { 313 struct virtio_gpu_output *output = 314 drm_connector_to_virtio_gpu_output(connector); 315 struct drm_display_mode *mode = NULL; 316 int count, width, height; 317 318 width = le32_to_cpu(output->info.r.width); 319 height = le32_to_cpu(output->info.r.height); 320 count = drm_add_modes_noedid(connector, XRES_MAX, YRES_MAX); 321 322 if (width == 0 || height == 0) { 323 width = XRES_DEF; 324 height = YRES_DEF; 325 drm_set_preferred_mode(connector, XRES_DEF, YRES_DEF); 326 } else { 327 DRM_DEBUG("add mode: %dx%d\n", width, height); 328 mode = drm_cvt_mode(connector->dev, width, height, 60, 329 false, false, false); 330 mode->type |= DRM_MODE_TYPE_PREFERRED; 331 drm_mode_probed_add(connector, mode); 332 count++; 333 } 334 335 return count; 336 } 337 338 static int virtio_gpu_conn_mode_valid(struct drm_connector *connector, 339 struct drm_display_mode *mode) 340 { 341 struct virtio_gpu_output *output = 342 drm_connector_to_virtio_gpu_output(connector); 343 int width, height; 344 345 width = le32_to_cpu(output->info.r.width); 346 height = le32_to_cpu(output->info.r.height); 347 348 if (!(mode->type & DRM_MODE_TYPE_PREFERRED)) 349 return MODE_OK; 350 if (mode->hdisplay == XRES_DEF && mode->vdisplay == YRES_DEF) 351 return MODE_OK; 352 if (mode->hdisplay <= width && mode->hdisplay >= width - 16 && 353 mode->vdisplay <= height && mode->vdisplay >= height - 16) 354 return MODE_OK; 355 356 DRM_DEBUG("del mode: %dx%d\n", mode->hdisplay, mode->vdisplay); 357 return MODE_BAD; 358 } 359 360 static struct drm_encoder* 361 virtio_gpu_best_encoder(struct drm_connector *connector) 362 { 363 struct virtio_gpu_output *virtio_gpu_output = 364 drm_connector_to_virtio_gpu_output(connector); 365 366 return &virtio_gpu_output->enc; 367 } 368 369 static const struct drm_encoder_helper_funcs virtio_gpu_enc_helper_funcs = { 370 .mode_fixup = virtio_gpu_enc_mode_fixup, 371 .mode_set = virtio_gpu_enc_mode_set, 372 .enable = virtio_gpu_enc_enable, 373 .disable = virtio_gpu_enc_disable, 374 }; 375 376 static const struct drm_connector_helper_funcs virtio_gpu_conn_helper_funcs = { 377 .get_modes = virtio_gpu_conn_get_modes, 378 .mode_valid = virtio_gpu_conn_mode_valid, 379 .best_encoder = virtio_gpu_best_encoder, 380 }; 381 382 static void virtio_gpu_conn_save(struct drm_connector *connector) 383 { 384 DRM_DEBUG("\n"); 385 } 386 387 static void virtio_gpu_conn_restore(struct drm_connector *connector) 388 { 389 DRM_DEBUG("\n"); 390 } 391 392 static enum drm_connector_status virtio_gpu_conn_detect( 393 struct drm_connector *connector, 394 bool force) 395 { 396 struct virtio_gpu_output *output = 397 drm_connector_to_virtio_gpu_output(connector); 398 399 if (output->info.enabled) 400 return connector_status_connected; 401 else 402 return connector_status_disconnected; 403 } 404 405 static void virtio_gpu_conn_destroy(struct drm_connector *connector) 406 { 407 struct virtio_gpu_output *virtio_gpu_output = 408 drm_connector_to_virtio_gpu_output(connector); 409 410 drm_connector_unregister(connector); 411 drm_connector_cleanup(connector); 412 kfree(virtio_gpu_output); 413 } 414 415 static const struct drm_connector_funcs virtio_gpu_connector_funcs = { 416 .dpms = drm_atomic_helper_connector_dpms, 417 .save = virtio_gpu_conn_save, 418 .restore = virtio_gpu_conn_restore, 419 .detect = virtio_gpu_conn_detect, 420 .fill_modes = drm_helper_probe_single_connector_modes_nomerge, 421 .destroy = virtio_gpu_conn_destroy, 422 .reset = drm_atomic_helper_connector_reset, 423 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, 424 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 425 }; 426 427 static const struct drm_encoder_funcs virtio_gpu_enc_funcs = { 428 .destroy = drm_encoder_cleanup, 429 }; 430 431 static int vgdev_output_init(struct virtio_gpu_device *vgdev, int index) 432 { 433 struct drm_device *dev = vgdev->ddev; 434 struct virtio_gpu_output *output = vgdev->outputs + index; 435 struct drm_connector *connector = &output->conn; 436 struct drm_encoder *encoder = &output->enc; 437 struct drm_crtc *crtc = &output->crtc; 438 struct drm_plane *plane; 439 440 output->index = index; 441 if (index == 0) { 442 output->info.enabled = cpu_to_le32(true); 443 output->info.r.width = cpu_to_le32(XRES_DEF); 444 output->info.r.height = cpu_to_le32(YRES_DEF); 445 } 446 447 plane = virtio_gpu_plane_init(vgdev, index); 448 if (IS_ERR(plane)) 449 return PTR_ERR(plane); 450 drm_crtc_init_with_planes(dev, crtc, plane, NULL, 451 &virtio_gpu_crtc_funcs); 452 drm_mode_crtc_set_gamma_size(crtc, 256); 453 drm_crtc_helper_add(crtc, &virtio_gpu_crtc_helper_funcs); 454 plane->crtc = crtc; 455 456 drm_connector_init(dev, connector, &virtio_gpu_connector_funcs, 457 DRM_MODE_CONNECTOR_VIRTUAL); 458 drm_connector_helper_add(connector, &virtio_gpu_conn_helper_funcs); 459 460 drm_encoder_init(dev, encoder, &virtio_gpu_enc_funcs, 461 DRM_MODE_ENCODER_VIRTUAL); 462 drm_encoder_helper_add(encoder, &virtio_gpu_enc_helper_funcs); 463 encoder->possible_crtcs = 1 << index; 464 465 drm_mode_connector_attach_encoder(connector, encoder); 466 drm_connector_register(connector); 467 return 0; 468 } 469 470 static struct drm_framebuffer * 471 virtio_gpu_user_framebuffer_create(struct drm_device *dev, 472 struct drm_file *file_priv, 473 struct drm_mode_fb_cmd2 *mode_cmd) 474 { 475 struct drm_gem_object *obj = NULL; 476 struct virtio_gpu_framebuffer *virtio_gpu_fb; 477 int ret; 478 479 /* lookup object associated with res handle */ 480 obj = drm_gem_object_lookup(dev, file_priv, mode_cmd->handles[0]); 481 if (!obj) 482 return ERR_PTR(-EINVAL); 483 484 virtio_gpu_fb = kzalloc(sizeof(*virtio_gpu_fb), GFP_KERNEL); 485 if (virtio_gpu_fb == NULL) 486 return ERR_PTR(-ENOMEM); 487 488 ret = virtio_gpu_framebuffer_init(dev, virtio_gpu_fb, mode_cmd, obj); 489 if (ret) { 490 kfree(virtio_gpu_fb); 491 if (obj) 492 drm_gem_object_unreference_unlocked(obj); 493 return NULL; 494 } 495 496 return &virtio_gpu_fb->base; 497 } 498 499 static const struct drm_mode_config_funcs virtio_gpu_mode_funcs = { 500 .fb_create = virtio_gpu_user_framebuffer_create, 501 .atomic_check = drm_atomic_helper_check, 502 .atomic_commit = drm_atomic_helper_commit, 503 }; 504 505 int virtio_gpu_modeset_init(struct virtio_gpu_device *vgdev) 506 { 507 int i; 508 509 drm_mode_config_init(vgdev->ddev); 510 vgdev->ddev->mode_config.funcs = (void *)&virtio_gpu_mode_funcs; 511 512 /* modes will be validated against the framebuffer size */ 513 vgdev->ddev->mode_config.min_width = XRES_MIN; 514 vgdev->ddev->mode_config.min_height = YRES_MIN; 515 vgdev->ddev->mode_config.max_width = XRES_MAX; 516 vgdev->ddev->mode_config.max_height = YRES_MAX; 517 518 for (i = 0 ; i < vgdev->num_scanouts; ++i) 519 vgdev_output_init(vgdev, i); 520 521 drm_mode_config_reset(vgdev->ddev); 522 return 0; 523 } 524 525 void virtio_gpu_modeset_fini(struct virtio_gpu_device *vgdev) 526 { 527 virtio_gpu_fbdev_fini(vgdev); 528 drm_mode_config_cleanup(vgdev->ddev); 529 } 530