1 /* via_dmablit.c -- PCI DMA BitBlt support for the VIA Unichrome/Pro 2 * 3 * Copyright (C) 2005 Thomas Hellstrom, All Rights Reserved. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sub license, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the 13 * next paragraph) shall be included in all copies or substantial portions 14 * of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 22 * USE OR OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: 25 * Thomas Hellstrom. 26 * Partially based on code obtained from Digeo Inc. 27 */ 28 29 30 /* 31 * Unmaps the DMA mappings. 32 * FIXME: Is this a NoOp on x86? Also 33 * FIXME: What happens if this one is called and a pending blit has previously done 34 * the same DMA mappings? 35 */ 36 37 #include <drm/drmP.h> 38 #include <drm/via_drm.h> 39 #include "via_drv.h" 40 #include "via_dmablit.h" 41 42 #include <linux/pagemap.h> 43 #include <linux/slab.h> 44 #include <linux/timer.h> 45 46 #define VIA_PGDN(x) (((unsigned long)(x)) & PAGE_MASK) 47 #define VIA_PGOFF(x) (((unsigned long)(x)) & ~PAGE_MASK) 48 #define VIA_PFN(x) ((unsigned long)(x) >> PAGE_SHIFT) 49 50 typedef struct _drm_via_descriptor { 51 uint32_t mem_addr; 52 uint32_t dev_addr; 53 uint32_t size; 54 uint32_t next; 55 } drm_via_descriptor_t; 56 57 58 /* 59 * Unmap a DMA mapping. 60 */ 61 62 63 64 static void 65 via_unmap_blit_from_device(struct drm_device *dev, struct pci_dev *pdev, 66 drm_via_sg_info_t *vsg) 67 { 68 #ifdef __NetBSD__ 69 bus_dmamap_unload(dev->dmat, vsg->dmamap); 70 #else 71 int num_desc = vsg->num_desc; 72 unsigned cur_descriptor_page = num_desc / vsg->descriptors_per_page; 73 unsigned descriptor_this_page = num_desc % vsg->descriptors_per_page; 74 drm_via_descriptor_t *desc_ptr = vsg->desc_pages[cur_descriptor_page] + 75 descriptor_this_page; 76 dma_addr_t next = vsg->chain_start; 77 78 while (num_desc--) { 79 if (descriptor_this_page-- == 0) { 80 cur_descriptor_page--; 81 descriptor_this_page = vsg->descriptors_per_page - 1; 82 desc_ptr = vsg->desc_pages[cur_descriptor_page] + 83 descriptor_this_page; 84 } 85 dma_unmap_single(&pdev->dev, next, sizeof(*desc_ptr), DMA_TO_DEVICE); 86 dma_unmap_page(&pdev->dev, desc_ptr->mem_addr, desc_ptr->size, vsg->direction); 87 next = (dma_addr_t) desc_ptr->next; 88 desc_ptr--; 89 } 90 #endif 91 } 92 93 /* 94 * If mode = 0, count how many descriptors are needed. 95 * If mode = 1, Map the DMA pages for the device, put together and map also the descriptors. 96 * Descriptors are run in reverse order by the hardware because we are not allowed to update the 97 * 'next' field without syncing calls when the descriptor is already mapped. 98 */ 99 100 static void 101 via_map_blit_for_device(struct pci_dev *pdev, 102 const drm_via_dmablit_t *xfer, 103 drm_via_sg_info_t *vsg, 104 int mode) 105 { 106 unsigned cur_descriptor_page = 0; 107 unsigned num_descriptors_this_page = 0; 108 unsigned char *mem_addr = xfer->mem_addr; 109 unsigned char *cur_mem; 110 #ifndef __NetBSD__ 111 unsigned char *first_addr = (unsigned char *)VIA_PGDN(mem_addr); 112 #endif 113 uint32_t fb_addr = xfer->fb_addr; 114 uint32_t cur_fb; 115 unsigned long line_len; 116 unsigned remaining_len; 117 int num_desc = 0; 118 int cur_line; 119 dma_addr_t next = 0 | VIA_DMA_DPR_EC; 120 drm_via_descriptor_t *desc_ptr = NULL; 121 122 if (mode == 1) 123 desc_ptr = vsg->desc_pages[cur_descriptor_page]; 124 125 for (cur_line = 0; cur_line < xfer->num_lines; ++cur_line) { 126 127 line_len = xfer->line_length; 128 cur_fb = fb_addr; 129 cur_mem = mem_addr; 130 131 while (line_len > 0) { 132 133 remaining_len = min(PAGE_SIZE-VIA_PGOFF(cur_mem), line_len); 134 line_len -= remaining_len; 135 136 if (mode == 1) { 137 #ifdef __NetBSD__ 138 const vaddr_t cur_va = (vaddr_t)cur_mem; 139 const bus_dma_segment_t *const seg = 140 &vsg->dmamap->dm_segs[atop(cur_va)]; 141 desc_ptr->mem_addr = 142 seg->ds_addr + trunc_page(cur_va); 143 #else 144 desc_ptr->mem_addr = 145 dma_map_page(&pdev->dev, 146 vsg->pages[VIA_PFN(cur_mem) - 147 VIA_PFN(first_addr)], 148 VIA_PGOFF(cur_mem), remaining_len, 149 vsg->direction); 150 #endif 151 desc_ptr->dev_addr = cur_fb; 152 153 desc_ptr->size = remaining_len; 154 desc_ptr->next = (uint32_t) next; 155 #ifdef __NetBSD__ 156 next = vsg->desc_dmamap 157 ->dm_segs[cur_descriptor_page].ds_addr 158 + num_descriptors_this_page; 159 #else 160 next = dma_map_single(&pdev->dev, desc_ptr, sizeof(*desc_ptr), 161 DMA_TO_DEVICE); 162 #endif 163 desc_ptr++; 164 if (++num_descriptors_this_page >= vsg->descriptors_per_page) { 165 num_descriptors_this_page = 0; 166 desc_ptr = vsg->desc_pages[++cur_descriptor_page]; 167 } 168 } 169 170 num_desc++; 171 cur_mem += remaining_len; 172 cur_fb += remaining_len; 173 } 174 175 mem_addr += xfer->mem_stride; 176 fb_addr += xfer->fb_stride; 177 } 178 179 if (mode == 1) { 180 vsg->chain_start = next; 181 vsg->state = dr_via_device_mapped; 182 } 183 vsg->num_desc = num_desc; 184 } 185 186 /* 187 * Function that frees up all resources for a blit. It is usable even if the 188 * blit info has only been partially built as long as the status enum is consistent 189 * with the actual status of the used resources. 190 */ 191 192 193 static void 194 via_free_sg_info(struct drm_device *dev, struct pci_dev *pdev, 195 drm_via_sg_info_t *vsg) 196 { 197 #ifndef __NetBSD__ 198 struct page *page; 199 int i; 200 #endif 201 202 switch (vsg->state) { 203 case dr_via_device_mapped: 204 via_unmap_blit_from_device(dev, pdev, vsg); 205 case dr_via_desc_pages_alloc: 206 #ifdef __NetBSD__ 207 bus_dmamap_unload(dev->dmat, vsg->desc_dmamap); 208 bus_dmamap_destroy(dev->dmat, vsg->desc_dmamap); 209 bus_dmamem_unmap(dev->dmat, vsg->desc_kva, 210 vsg->num_desc_pages << PAGE_SHIFT); 211 bus_dmamem_free(dev->dmat, vsg->desc_segs, vsg->num_desc_segs); 212 kfree(vsg->desc_segs); 213 #else 214 for (i = 0; i < vsg->num_desc_pages; ++i) { 215 if (vsg->desc_pages[i] != NULL) 216 free_page((unsigned long)vsg->desc_pages[i]); 217 } 218 #endif 219 kfree(vsg->desc_pages); 220 case dr_via_pages_locked: 221 #ifdef __NetBSD__ 222 /* Make sure any completed transfer is synced. */ 223 bus_dmamap_sync(dev->dmat, vsg->dmamap, 0, 224 vsg->num_pages << PAGE_SHIFT, 225 (vsg->direction == DMA_FROM_DEVICE? 226 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE)); 227 #else 228 for (i = 0; i < vsg->num_pages; ++i) { 229 if (NULL != (page = vsg->pages[i])) { 230 if (!PageReserved(page) && (DMA_FROM_DEVICE == vsg->direction)) 231 SetPageDirty(page); 232 page_cache_release(page); 233 } 234 } 235 #endif 236 case dr_via_pages_alloc: 237 #ifdef __NetBSD__ 238 bus_dmamap_destroy(dev->dmat, vsg->dmamap); 239 #else 240 vfree(vsg->pages); 241 #endif 242 default: 243 vsg->state = dr_via_sg_init; 244 } 245 vsg->free_on_sequence = 0; 246 } 247 248 /* 249 * Fire a blit engine. 250 */ 251 252 static void 253 via_fire_dmablit(struct drm_device *dev, drm_via_sg_info_t *vsg, int engine) 254 { 255 drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private; 256 257 VIA_WRITE(VIA_PCI_DMA_MAR0 + engine*0x10, 0); 258 VIA_WRITE(VIA_PCI_DMA_DAR0 + engine*0x10, 0); 259 VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_DD | VIA_DMA_CSR_TD | 260 VIA_DMA_CSR_DE); 261 VIA_WRITE(VIA_PCI_DMA_MR0 + engine*0x04, VIA_DMA_MR_CM | VIA_DMA_MR_TDIE); 262 VIA_WRITE(VIA_PCI_DMA_BCR0 + engine*0x10, 0); 263 VIA_WRITE(VIA_PCI_DMA_DPR0 + engine*0x10, vsg->chain_start); 264 wmb(); 265 VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_DE | VIA_DMA_CSR_TS); 266 VIA_READ(VIA_PCI_DMA_CSR0 + engine*0x04); 267 } 268 269 /* 270 * Obtain a page pointer array and lock all pages into system memory. A segmentation violation will 271 * occur here if the calling user does not have access to the submitted address. 272 */ 273 274 static int 275 via_lock_all_dma_pages(struct drm_device *dev, drm_via_sg_info_t *vsg, 276 drm_via_dmablit_t *xfer) 277 { 278 int ret; 279 #ifdef __NetBSD__ 280 const bus_size_t nbytes = roundup2(xfer->num_lines * xfer->mem_stride, 281 PAGE_SIZE); 282 const bus_size_t npages = nbytes >> PAGE_SHIFT; 283 struct iovec iov = { 284 .iov_base = xfer->mem_addr, 285 .iov_len = nbytes, 286 }; 287 struct uio uio = { 288 .uio_iov = &iov, 289 .uio_iovcnt = 1, 290 .uio_offset = 0, 291 .uio_resid = nbytes, 292 .uio_rw = xfer->to_fb ? UIO_WRITE : UIO_READ, 293 .uio_vmspace = curproc->p_vmspace, 294 }; 295 296 /* 297 * XXX Lock out anyone else from doing this? Add a 298 * dr_via_pages_loading state? Just rely on the giant lock? 299 */ 300 /* XXX errno NetBSD->Linux */ 301 ret = -bus_dmamap_create(dev->dmat, nbytes, npages, nbytes, PAGE_SIZE, 302 BUS_DMA_WAITOK, &vsg->dmamap); 303 if (ret) { 304 DRM_ERROR("bus_dmamap_create failed: %d\n", ret); 305 return ret; 306 } 307 ret = -bus_dmamap_load_uio(dev->dmat, vsg->dmamap, &uio, 308 BUS_DMA_WAITOK | (xfer->to_fb? BUS_DMA_WRITE : BUS_DMA_READ)); 309 if (ret) { 310 DRM_ERROR("bus_dmamap_load failed: %d\n", ret); 311 bus_dmamap_destroy(dev->dmat, vsg->dmamap); 312 return ret; 313 } 314 vsg->num_pages = npages; 315 #else 316 unsigned long first_pfn = VIA_PFN(xfer->mem_addr); 317 vsg->num_pages = VIA_PFN(xfer->mem_addr + (xfer->num_lines * xfer->mem_stride - 1)) - 318 first_pfn + 1; 319 320 vsg->pages = vzalloc(sizeof(struct page *) * vsg->num_pages); 321 if (NULL == vsg->pages) 322 return -ENOMEM; 323 down_read(¤t->mm->mmap_sem); 324 ret = get_user_pages(current, current->mm, 325 (unsigned long)xfer->mem_addr, 326 vsg->num_pages, 327 (vsg->direction == DMA_FROM_DEVICE), 328 0, vsg->pages, NULL); 329 330 up_read(¤t->mm->mmap_sem); 331 if (ret != vsg->num_pages) { 332 if (ret < 0) 333 return ret; 334 vsg->state = dr_via_pages_locked; 335 return -EINVAL; 336 } 337 #endif 338 vsg->state = dr_via_pages_locked; 339 DRM_DEBUG("DMA pages locked\n"); 340 return 0; 341 } 342 343 /* 344 * Allocate DMA capable memory for the blit descriptor chain, and an array that keeps track of the 345 * pages we allocate. We don't want to use kmalloc for the descriptor chain because it may be 346 * quite large for some blits, and pages don't need to be contingous. 347 */ 348 349 static int 350 via_alloc_desc_pages(struct drm_device *dev, drm_via_sg_info_t *vsg) 351 { 352 int i; 353 #ifdef __NetBSD__ 354 int ret; 355 #endif 356 357 vsg->descriptors_per_page = PAGE_SIZE / sizeof(drm_via_descriptor_t); 358 vsg->num_desc_pages = (vsg->num_desc + vsg->descriptors_per_page - 1) / 359 vsg->descriptors_per_page; 360 361 if (NULL == (vsg->desc_pages = kcalloc(vsg->num_desc_pages, sizeof(void *), GFP_KERNEL))) 362 return -ENOMEM; 363 364 #ifdef __NetBSD__ 365 vsg->desc_segs = kcalloc(vsg->num_desc_pages, sizeof(*vsg->desc_segs), 366 GFP_KERNEL); 367 if (vsg->desc_segs == NULL) { 368 kfree(vsg->desc_pages); 369 return -ENOMEM; 370 } 371 /* XXX errno NetBSD->Linux */ 372 ret = -bus_dmamem_alloc(dev->dmat, vsg->num_desc_pages << PAGE_SHIFT, 373 PAGE_SIZE, 0, vsg->desc_segs, vsg->num_pages, &vsg->num_desc_segs, 374 BUS_DMA_WAITOK); 375 if (ret) { 376 kfree(vsg->desc_segs); 377 kfree(vsg->desc_pages); 378 return -ENOMEM; 379 } 380 /* XXX No nice way to scatter/gather map bus_dmamem. */ 381 /* XXX errno NetBSD->Linux */ 382 ret = -bus_dmamem_map(dev->dmat, vsg->desc_segs, vsg->num_desc_segs, 383 vsg->num_desc_pages << PAGE_SHIFT, &vsg->desc_kva, BUS_DMA_WAITOK); 384 if (ret) { 385 bus_dmamem_free(dev->dmat, vsg->desc_segs, vsg->num_desc_segs); 386 kfree(vsg->desc_segs); 387 kfree(vsg->desc_pages); 388 return -ENOMEM; 389 } 390 /* XXX errno NetBSD->Linux */ 391 ret = -bus_dmamap_create(dev->dmat, vsg->num_desc_pages << PAGE_SHIFT, 392 vsg->num_desc_pages, PAGE_SIZE, 0, BUS_DMA_WAITOK, 393 &vsg->desc_dmamap); 394 if (ret) { 395 bus_dmamem_unmap(dev->dmat, vsg->desc_kva, 396 vsg->num_desc_pages << PAGE_SHIFT); 397 bus_dmamem_free(dev->dmat, vsg->desc_segs, vsg->num_desc_segs); 398 kfree(vsg->desc_segs); 399 kfree(vsg->desc_pages); 400 return -ENOMEM; 401 } 402 ret = -bus_dmamap_load(dev->dmat, vsg->desc_dmamap, vsg->desc_kva, 403 vsg->num_desc_pages << PAGE_SHIFT, NULL, BUS_DMA_WAITOK); 404 if (ret) { 405 bus_dmamap_destroy(dev->dmat, vsg->desc_dmamap); 406 bus_dmamem_unmap(dev->dmat, vsg->desc_kva, 407 vsg->num_desc_pages << PAGE_SHIFT); 408 bus_dmamem_free(dev->dmat, vsg->desc_segs, vsg->num_desc_segs); 409 kfree(vsg->desc_segs); 410 kfree(vsg->desc_pages); 411 return -ENOMEM; 412 } 413 for (i = 0; i < vsg->num_desc_pages; i++) 414 vsg->desc_pages[i] = (void *) 415 ((char *)vsg->desc_kva + (i * PAGE_SIZE)); 416 vsg->state = dr_via_desc_pages_alloc; 417 #else 418 vsg->state = dr_via_desc_pages_alloc; 419 for (i = 0; i < vsg->num_desc_pages; ++i) { 420 if (NULL == (vsg->desc_pages[i] = 421 (drm_via_descriptor_t *) __get_free_page(GFP_KERNEL))) 422 return -ENOMEM; 423 } 424 #endif 425 DRM_DEBUG("Allocated %d pages for %d descriptors.\n", vsg->num_desc_pages, 426 vsg->num_desc); 427 return 0; 428 } 429 430 static void 431 via_abort_dmablit(struct drm_device *dev, int engine) 432 { 433 drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private; 434 435 VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_TA); 436 } 437 438 static void 439 via_dmablit_engine_off(struct drm_device *dev, int engine) 440 { 441 drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private; 442 443 VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_TD | VIA_DMA_CSR_DD); 444 } 445 446 447 448 /* 449 * The dmablit part of the IRQ handler. Trying to do only reasonably fast things here. 450 * The rest, like unmapping and freeing memory for done blits is done in a separate workqueue 451 * task. Basically the task of the interrupt handler is to submit a new blit to the engine, while 452 * the workqueue task takes care of processing associated with the old blit. 453 */ 454 455 void 456 via_dmablit_handler(struct drm_device *dev, int engine, int from_irq) 457 { 458 drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private; 459 drm_via_blitq_t *blitq = dev_priv->blit_queues + engine; 460 int cur; 461 int done_transfer; 462 unsigned long irqsave = 0; 463 uint32_t status = 0; 464 465 DRM_DEBUG("DMA blit handler called. engine = %d, from_irq = %d, blitq = 0x%lx\n", 466 engine, from_irq, (unsigned long) blitq); 467 468 if (from_irq) 469 spin_lock(&blitq->blit_lock); 470 else 471 spin_lock_irqsave(&blitq->blit_lock, irqsave); 472 473 done_transfer = blitq->is_active && 474 ((status = VIA_READ(VIA_PCI_DMA_CSR0 + engine*0x04)) & VIA_DMA_CSR_TD); 475 done_transfer = done_transfer || (blitq->aborting && !(status & VIA_DMA_CSR_DE)); 476 477 cur = blitq->cur; 478 if (done_transfer) { 479 480 blitq->blits[cur]->aborted = blitq->aborting; 481 blitq->done_blit_handle++; 482 #ifdef __NetBSD__ 483 DRM_SPIN_WAKEUP_ALL(&blitq->blit_queue[cur], 484 &blitq->blit_lock); 485 #else 486 wake_up(blitq->blit_queue + cur); 487 #endif 488 489 cur++; 490 if (cur >= VIA_NUM_BLIT_SLOTS) 491 cur = 0; 492 blitq->cur = cur; 493 494 /* 495 * Clear transfer done flag. 496 */ 497 498 VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_TD); 499 500 blitq->is_active = 0; 501 blitq->aborting = 0; 502 schedule_work(&blitq->wq); 503 504 } else if (blitq->is_active && time_after_eq(jiffies, blitq->end)) { 505 506 /* 507 * Abort transfer after one second. 508 */ 509 510 via_abort_dmablit(dev, engine); 511 blitq->aborting = 1; 512 blitq->end = jiffies + DRM_HZ; 513 } 514 515 if (!blitq->is_active) { 516 if (blitq->num_outstanding) { 517 via_fire_dmablit(dev, blitq->blits[cur], engine); 518 blitq->is_active = 1; 519 blitq->cur = cur; 520 blitq->num_outstanding--; 521 blitq->end = jiffies + DRM_HZ; 522 if (!timer_pending(&blitq->poll_timer)) 523 mod_timer(&blitq->poll_timer, jiffies + 1); 524 } else { 525 if (timer_pending(&blitq->poll_timer)) 526 del_timer(&blitq->poll_timer); 527 via_dmablit_engine_off(dev, engine); 528 } 529 } 530 531 if (from_irq) 532 spin_unlock(&blitq->blit_lock); 533 else 534 spin_unlock_irqrestore(&blitq->blit_lock, irqsave); 535 } 536 537 538 539 /* 540 * Check whether this blit is still active, performing necessary locking. 541 */ 542 543 static int 544 #ifdef __NetBSD__ 545 via_dmablit_active(drm_via_blitq_t *blitq, int engine, uint32_t handle, drm_waitqueue_t **queue) 546 #else 547 via_dmablit_active(drm_via_blitq_t *blitq, int engine, uint32_t handle, wait_queue_head_t **queue) 548 #endif 549 { 550 #ifndef __NetBSD__ 551 unsigned long irqsave; 552 #endif 553 uint32_t slot; 554 int active; 555 556 #ifndef __NetBSD__ 557 spin_lock_irqsave(&blitq->blit_lock, irqsave); 558 #endif 559 560 /* 561 * Allow for handle wraparounds. 562 */ 563 564 active = ((blitq->done_blit_handle - handle) > (1 << 23)) && 565 ((blitq->cur_blit_handle - handle) <= (1 << 23)); 566 567 if (queue && active) { 568 slot = handle - blitq->done_blit_handle + blitq->cur - 1; 569 if (slot >= VIA_NUM_BLIT_SLOTS) 570 slot -= VIA_NUM_BLIT_SLOTS; 571 *queue = blitq->blit_queue + slot; 572 } 573 574 #ifndef __NetBSD__ 575 spin_unlock_irqrestore(&blitq->blit_lock, irqsave); 576 #endif 577 578 return active; 579 } 580 581 /* 582 * Sync. Wait for at least three seconds for the blit to be performed. 583 */ 584 585 static int 586 via_dmablit_sync(struct drm_device *dev, uint32_t handle, int engine) 587 { 588 589 drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private; 590 drm_via_blitq_t *blitq = dev_priv->blit_queues + engine; 591 #ifdef __NetBSD__ 592 drm_waitqueue_t *queue; 593 #else 594 wait_queue_head_t *queue; 595 #endif 596 int ret = 0; 597 598 #ifdef __NetBSD__ 599 spin_lock(&blitq->blit_lock); 600 if (via_dmablit_active(blitq, engine, handle, &queue)) { 601 DRM_SPIN_WAIT_ON(ret, queue, &blitq->blit_lock, 3*DRM_HZ, 602 !via_dmablit_active(blitq, engine, handle, NULL)); 603 } 604 spin_unlock(&blitq->blit_lock); 605 #else 606 if (via_dmablit_active(blitq, engine, handle, &queue)) { 607 DRM_WAIT_ON(ret, *queue, 3 * HZ, 608 !via_dmablit_active(blitq, engine, handle, NULL)); 609 } 610 #endif 611 DRM_DEBUG("DMA blit sync handle 0x%x engine %d returned %d\n", 612 handle, engine, ret); 613 614 return ret; 615 } 616 617 618 /* 619 * A timer that regularly polls the blit engine in cases where we don't have interrupts: 620 * a) Broken hardware (typically those that don't have any video capture facility). 621 * b) Blit abort. The hardware doesn't send an interrupt when a blit is aborted. 622 * The timer and hardware IRQ's can and do work in parallel. If the hardware has 623 * irqs, it will shorten the latency somewhat. 624 */ 625 626 627 628 static void 629 via_dmablit_timer(unsigned long data) 630 { 631 drm_via_blitq_t *blitq = (drm_via_blitq_t *) data; 632 struct drm_device *dev = blitq->dev; 633 int engine = (int) 634 (blitq - ((drm_via_private_t *)dev->dev_private)->blit_queues); 635 636 DRM_DEBUG("Polling timer called for engine %d, jiffies %lu\n", engine, 637 (unsigned long) jiffies); 638 639 via_dmablit_handler(dev, engine, 0); 640 641 if (!timer_pending(&blitq->poll_timer)) { 642 mod_timer(&blitq->poll_timer, jiffies + 1); 643 644 /* 645 * Rerun handler to delete timer if engines are off, and 646 * to shorten abort latency. This is a little nasty. 647 */ 648 649 via_dmablit_handler(dev, engine, 0); 650 651 } 652 } 653 654 655 656 657 /* 658 * Workqueue task that frees data and mappings associated with a blit. 659 * Also wakes up waiting processes. Each of these tasks handles one 660 * blit engine only and may not be called on each interrupt. 661 */ 662 663 664 static void 665 via_dmablit_workqueue(struct work_struct *work) 666 { 667 drm_via_blitq_t *blitq = container_of(work, drm_via_blitq_t, wq); 668 struct drm_device *dev = blitq->dev; 669 unsigned long irqsave; 670 drm_via_sg_info_t *cur_sg; 671 int cur_released; 672 673 674 DRM_DEBUG("Workqueue task called for blit engine %ld\n", (unsigned long) 675 (blitq - ((drm_via_private_t *)dev->dev_private)->blit_queues)); 676 677 spin_lock_irqsave(&blitq->blit_lock, irqsave); 678 679 while (blitq->serviced != blitq->cur) { 680 681 cur_released = blitq->serviced++; 682 683 DRM_DEBUG("Releasing blit slot %d\n", cur_released); 684 685 if (blitq->serviced >= VIA_NUM_BLIT_SLOTS) 686 blitq->serviced = 0; 687 688 cur_sg = blitq->blits[cur_released]; 689 blitq->num_free++; 690 691 #ifdef __NetBSD__ 692 DRM_SPIN_WAKEUP_ONE(&blitq->busy_queue, &blitq->blit_lock); 693 #endif 694 695 spin_unlock_irqrestore(&blitq->blit_lock, irqsave); 696 697 #ifndef __NetBSD__ 698 wake_up(&blitq->busy_queue); 699 #endif 700 701 #ifdef __NetBSD__ 702 /* Transfer completed. Sync it. */ 703 bus_dmamap_sync(dev->dmat, cur_sg->dmamap, 0, 704 cur_sg->num_pages << PAGE_SHIFT, 705 (cur_sg->direction == DMA_FROM_DEVICE 706 ? BUS_DMASYNC_POSTREAD 707 : BUS_DMASYNC_POSTWRITE)); 708 #endif 709 via_free_sg_info(dev, dev->pdev, cur_sg); 710 kfree(cur_sg); 711 712 spin_lock_irqsave(&blitq->blit_lock, irqsave); 713 } 714 715 spin_unlock_irqrestore(&blitq->blit_lock, irqsave); 716 } 717 718 719 /* 720 * Init all blit engines. Currently we use two, but some hardware have 4. 721 */ 722 723 724 void 725 via_init_dmablit(struct drm_device *dev) 726 { 727 int i, j; 728 drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private; 729 drm_via_blitq_t *blitq; 730 731 pci_set_master(dev->pdev); 732 733 for (i = 0; i < VIA_NUM_BLIT_ENGINES; ++i) { 734 blitq = dev_priv->blit_queues + i; 735 blitq->dev = dev; 736 blitq->cur_blit_handle = 0; 737 blitq->done_blit_handle = 0; 738 blitq->head = 0; 739 blitq->cur = 0; 740 blitq->serviced = 0; 741 blitq->num_free = VIA_NUM_BLIT_SLOTS - 1; 742 blitq->num_outstanding = 0; 743 blitq->is_active = 0; 744 blitq->aborting = 0; 745 spin_lock_init(&blitq->blit_lock); 746 #ifdef __NetBSD__ 747 for (j = 0; j < VIA_NUM_BLIT_SLOTS; ++j) 748 DRM_INIT_WAITQUEUE(blitq->blit_queue + j, "viablt"); 749 DRM_INIT_WAITQUEUE(&blitq->busy_queue, "viabusy"); 750 #else 751 for (j = 0; j < VIA_NUM_BLIT_SLOTS; ++j) 752 init_waitqueue_head(blitq->blit_queue + j); 753 init_waitqueue_head(&blitq->busy_queue); 754 #endif 755 INIT_WORK(&blitq->wq, via_dmablit_workqueue); 756 setup_timer(&blitq->poll_timer, via_dmablit_timer, 757 (unsigned long)blitq); 758 } 759 } 760 761 /* 762 * Build all info and do all mappings required for a blit. 763 */ 764 765 766 static int 767 via_build_sg_info(struct drm_device *dev, drm_via_sg_info_t *vsg, drm_via_dmablit_t *xfer) 768 { 769 int draw = xfer->to_fb; 770 int ret = 0; 771 772 vsg->direction = (draw) ? DMA_TO_DEVICE : DMA_FROM_DEVICE; 773 774 vsg->state = dr_via_sg_init; 775 776 if (xfer->num_lines <= 0 || xfer->line_length <= 0) { 777 DRM_ERROR("Zero size bitblt.\n"); 778 return -EINVAL; 779 } 780 781 /* 782 * Below check is a driver limitation, not a hardware one. We 783 * don't want to lock unused pages, and don't want to incoporate the 784 * extra logic of avoiding them. Make sure there are no. 785 * (Not a big limitation anyway.) 786 */ 787 788 if ((xfer->mem_stride - xfer->line_length) > 2*PAGE_SIZE) { 789 DRM_ERROR("Too large system memory stride. Stride: %d, " 790 "Length: %d\n", xfer->mem_stride, xfer->line_length); 791 return -EINVAL; 792 } 793 794 if ((xfer->mem_stride == xfer->line_length) && 795 (xfer->fb_stride == xfer->line_length)) { 796 xfer->mem_stride *= xfer->num_lines; 797 xfer->line_length = xfer->mem_stride; 798 xfer->fb_stride = xfer->mem_stride; 799 xfer->num_lines = 1; 800 } 801 802 /* 803 * Don't lock an arbitrary large number of pages, since that causes a 804 * DOS security hole. 805 */ 806 807 if (xfer->num_lines > 2048 || (xfer->num_lines*xfer->mem_stride > (2048*2048*4))) { 808 DRM_ERROR("Too large PCI DMA bitblt.\n"); 809 return -EINVAL; 810 } 811 812 /* 813 * we allow a negative fb stride to allow flipping of images in 814 * transfer. 815 */ 816 817 if (xfer->mem_stride < xfer->line_length || 818 abs(xfer->fb_stride) < xfer->line_length) { 819 DRM_ERROR("Invalid frame-buffer / memory stride.\n"); 820 return -EINVAL; 821 } 822 823 /* 824 * A hardware bug seems to be worked around if system memory addresses start on 825 * 16 byte boundaries. This seems a bit restrictive however. VIA is contacted 826 * about this. Meanwhile, impose the following restrictions: 827 */ 828 829 #ifdef VIA_BUGFREE 830 if ((((unsigned long)xfer->mem_addr & 3) != ((unsigned long)xfer->fb_addr & 3)) || 831 ((xfer->num_lines > 1) && ((xfer->mem_stride & 3) != (xfer->fb_stride & 3)))) { 832 DRM_ERROR("Invalid DRM bitblt alignment.\n"); 833 return -EINVAL; 834 } 835 #else 836 if ((((unsigned long)xfer->mem_addr & 15) || 837 ((unsigned long)xfer->fb_addr & 3)) || 838 ((xfer->num_lines > 1) && 839 ((xfer->mem_stride & 15) || (xfer->fb_stride & 3)))) { 840 DRM_ERROR("Invalid DRM bitblt alignment.\n"); 841 return -EINVAL; 842 } 843 #endif 844 845 if (0 != (ret = via_lock_all_dma_pages(dev, vsg, xfer))) { 846 DRM_ERROR("Could not lock DMA pages.\n"); 847 via_free_sg_info(dev, dev->pdev, vsg); 848 return ret; 849 } 850 851 via_map_blit_for_device(dev->pdev, xfer, vsg, 0); 852 if (0 != (ret = via_alloc_desc_pages(dev, vsg))) { 853 DRM_ERROR("Could not allocate DMA descriptor pages.\n"); 854 via_free_sg_info(dev, dev->pdev, vsg); 855 return ret; 856 } 857 via_map_blit_for_device(dev->pdev, xfer, vsg, 1); 858 859 return 0; 860 } 861 862 863 /* 864 * Reserve one free slot in the blit queue. Will wait for one second for one 865 * to become available. Otherwise -EBUSY is returned. 866 */ 867 868 static int 869 via_dmablit_grab_slot(drm_via_blitq_t *blitq, int engine) 870 { 871 int ret = 0; 872 unsigned long irqsave; 873 874 DRM_DEBUG("Num free is %d\n", blitq->num_free); 875 spin_lock_irqsave(&blitq->blit_lock, irqsave); 876 while (blitq->num_free == 0) { 877 #ifdef __NetBSD__ 878 DRM_SPIN_WAIT_ON(ret, &blitq->busy_queue, &blitq->blit_lock, 879 DRM_HZ, 880 blitq->num_free > 0); 881 /* Map -EINTR to -EAGAIN. */ 882 if (ret == -EINTR) 883 ret = -EAGAIN; 884 /* Bail on failure. */ 885 if (ret) { 886 spin_unlock_irqrestore(&blitq->blit_lock, irqsave); 887 return ret; 888 } 889 #else 890 spin_unlock_irqrestore(&blitq->blit_lock, irqsave); 891 892 DRM_WAIT_ON(ret, blitq->busy_queue, HZ, blitq->num_free > 0); 893 if (ret) 894 return (-EINTR == ret) ? -EAGAIN : ret; 895 896 spin_lock_irqsave(&blitq->blit_lock, irqsave); 897 #endif 898 } 899 900 blitq->num_free--; 901 spin_unlock_irqrestore(&blitq->blit_lock, irqsave); 902 903 return 0; 904 } 905 906 /* 907 * Hand back a free slot if we changed our mind. 908 */ 909 910 static void 911 via_dmablit_release_slot(drm_via_blitq_t *blitq) 912 { 913 unsigned long irqsave; 914 915 spin_lock_irqsave(&blitq->blit_lock, irqsave); 916 blitq->num_free++; 917 #ifdef __NetBSD__ 918 DRM_SPIN_WAKEUP_ONE(&blitq->busy_queue, &blitq->blit_lock); 919 #endif 920 spin_unlock_irqrestore(&blitq->blit_lock, irqsave); 921 #ifndef __NetBSD__ 922 wake_up(&blitq->busy_queue); 923 #endif 924 } 925 926 /* 927 * Grab a free slot. Build blit info and queue a blit. 928 */ 929 930 931 static int 932 via_dmablit(struct drm_device *dev, drm_via_dmablit_t *xfer) 933 { 934 drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private; 935 drm_via_sg_info_t *vsg; 936 drm_via_blitq_t *blitq; 937 int ret; 938 int engine; 939 unsigned long irqsave; 940 941 if (dev_priv == NULL) { 942 DRM_ERROR("Called without initialization.\n"); 943 return -EINVAL; 944 } 945 946 engine = (xfer->to_fb) ? 0 : 1; 947 blitq = dev_priv->blit_queues + engine; 948 if (0 != (ret = via_dmablit_grab_slot(blitq, engine))) 949 return ret; 950 if (NULL == (vsg = kmalloc(sizeof(*vsg), GFP_KERNEL))) { 951 via_dmablit_release_slot(blitq); 952 return -ENOMEM; 953 } 954 if (0 != (ret = via_build_sg_info(dev, vsg, xfer))) { 955 via_dmablit_release_slot(blitq); 956 kfree(vsg); 957 return ret; 958 } 959 #ifdef __NetBSD__ 960 /* Prepare to begin a DMA transfer. */ 961 bus_dmamap_sync(dev->dmat, vsg->dmamap, 0, 962 vsg->num_pages << PAGE_SHIFT, 963 (vsg->direction == DMA_FROM_DEVICE 964 ? BUS_DMASYNC_PREREAD 965 : BUS_DMASYNC_PREWRITE)); 966 #endif 967 spin_lock_irqsave(&blitq->blit_lock, irqsave); 968 969 blitq->blits[blitq->head++] = vsg; 970 if (blitq->head >= VIA_NUM_BLIT_SLOTS) 971 blitq->head = 0; 972 blitq->num_outstanding++; 973 xfer->sync.sync_handle = ++blitq->cur_blit_handle; 974 975 spin_unlock_irqrestore(&blitq->blit_lock, irqsave); 976 xfer->sync.engine = engine; 977 978 via_dmablit_handler(dev, engine, 0); 979 980 return 0; 981 } 982 983 /* 984 * Sync on a previously submitted blit. Note that the X server use signals extensively, and 985 * that there is a very big probability that this IOCTL will be interrupted by a signal. In that 986 * case it returns with -EAGAIN for the signal to be delivered. 987 * The caller should then reissue the IOCTL. This is similar to what is being done for drmGetLock(). 988 */ 989 990 int 991 via_dma_blit_sync(struct drm_device *dev, void *data, struct drm_file *file_priv) 992 { 993 drm_via_blitsync_t *sync = data; 994 int err; 995 996 if (sync->engine >= VIA_NUM_BLIT_ENGINES) 997 return -EINVAL; 998 999 err = via_dmablit_sync(dev, sync->sync_handle, sync->engine); 1000 1001 if (-EINTR == err) 1002 err = -EAGAIN; 1003 1004 return err; 1005 } 1006 1007 1008 /* 1009 * Queue a blit and hand back a handle to be used for sync. This IOCTL may be interrupted by a signal 1010 * while waiting for a free slot in the blit queue. In that case it returns with -EAGAIN and should 1011 * be reissued. See the above IOCTL code. 1012 */ 1013 1014 int 1015 via_dma_blit(struct drm_device *dev, void *data, struct drm_file *file_priv) 1016 { 1017 drm_via_dmablit_t *xfer = data; 1018 int err; 1019 1020 err = via_dmablit(dev, xfer); 1021 1022 return err; 1023 } 1024