1 /* $NetBSD: radeon_dp_mst.c,v 1.3 2018/08/27 07:49:04 riastradh Exp $ */ 2 3 4 #include <sys/cdefs.h> 5 __KERNEL_RCSID(0, "$NetBSD: radeon_dp_mst.c,v 1.3 2018/08/27 07:49:04 riastradh Exp $"); 6 7 #include <drm/drmP.h> 8 #include <drm/drm_dp_mst_helper.h> 9 #include <drm/drm_fb_helper.h> 10 11 #include "radeon.h" 12 #include "atom.h" 13 #include "ni_reg.h" 14 15 static struct radeon_encoder *radeon_dp_create_fake_mst_encoder(struct radeon_connector *connector); 16 17 static int radeon_atom_set_enc_offset(int id) 18 { 19 static const int offsets[] = { EVERGREEN_CRTC0_REGISTER_OFFSET, 20 EVERGREEN_CRTC1_REGISTER_OFFSET, 21 EVERGREEN_CRTC2_REGISTER_OFFSET, 22 EVERGREEN_CRTC3_REGISTER_OFFSET, 23 EVERGREEN_CRTC4_REGISTER_OFFSET, 24 EVERGREEN_CRTC5_REGISTER_OFFSET, 25 0x13830 - 0x7030 }; 26 27 return offsets[id]; 28 } 29 30 static int radeon_dp_mst_set_be_cntl(struct radeon_encoder *primary, 31 struct radeon_encoder_mst *mst_enc, 32 enum radeon_hpd_id hpd, bool enable) 33 { 34 struct drm_device *dev = primary->base.dev; 35 struct radeon_device *rdev = dev->dev_private; 36 uint32_t reg; 37 int retries = 0; 38 uint32_t temp; 39 40 reg = RREG32(NI_DIG_BE_CNTL + primary->offset); 41 42 /* set MST mode */ 43 reg &= ~NI_DIG_FE_DIG_MODE(7); 44 reg |= NI_DIG_FE_DIG_MODE(NI_DIG_MODE_DP_MST); 45 46 if (enable) 47 reg |= NI_DIG_FE_SOURCE_SELECT(1 << mst_enc->fe); 48 else 49 reg &= ~NI_DIG_FE_SOURCE_SELECT(1 << mst_enc->fe); 50 51 reg |= NI_DIG_HPD_SELECT(hpd); 52 DRM_DEBUG_KMS("writing 0x%08x 0x%08x\n", NI_DIG_BE_CNTL + primary->offset, reg); 53 WREG32(NI_DIG_BE_CNTL + primary->offset, reg); 54 55 if (enable) { 56 uint32_t offset = radeon_atom_set_enc_offset(mst_enc->fe); 57 58 do { 59 temp = RREG32(NI_DIG_FE_CNTL + offset); 60 } while ((temp & NI_DIG_SYMCLK_FE_ON) && retries++ < 10000); 61 if (retries == 10000) 62 DRM_ERROR("timed out waiting for FE %d %d\n", primary->offset, mst_enc->fe); 63 } 64 return 0; 65 } 66 67 static int radeon_dp_mst_set_stream_attrib(struct radeon_encoder *primary, 68 int stream_number, 69 int fe, 70 int slots) 71 { 72 struct drm_device *dev = primary->base.dev; 73 struct radeon_device *rdev = dev->dev_private; 74 u32 temp, val; 75 int retries = 0; 76 int satreg, satidx; 77 78 satreg = stream_number >> 1; 79 satidx = stream_number & 1; 80 81 temp = RREG32(NI_DP_MSE_SAT0 + satreg + primary->offset); 82 83 val = NI_DP_MSE_SAT_SLOT_COUNT0(slots) | NI_DP_MSE_SAT_SRC0(fe); 84 85 val <<= (16 * satidx); 86 87 temp &= ~(0xffff << (16 * satidx)); 88 89 temp |= val; 90 91 DRM_DEBUG_KMS("writing 0x%08x 0x%08x\n", NI_DP_MSE_SAT0 + satreg + primary->offset, temp); 92 WREG32(NI_DP_MSE_SAT0 + satreg + primary->offset, temp); 93 94 WREG32(NI_DP_MSE_SAT_UPDATE + primary->offset, 1); 95 96 do { 97 temp = RREG32(NI_DP_MSE_SAT_UPDATE + primary->offset); 98 } while ((temp & 0x1) && retries++ < 10000); 99 100 if (retries == 10000) 101 DRM_ERROR("timed out waitin for SAT update %d\n", primary->offset); 102 103 /* MTP 16 ? */ 104 return 0; 105 } 106 107 static int radeon_dp_mst_update_stream_attribs(struct radeon_connector *mst_conn, 108 struct radeon_encoder *primary) 109 { 110 struct drm_device *dev = mst_conn->base.dev; 111 struct stream_attribs new_attribs[6]; 112 int i; 113 int idx = 0; 114 struct radeon_connector *radeon_connector; 115 struct drm_connector *connector; 116 117 memset(new_attribs, 0, sizeof(new_attribs)); 118 list_for_each_entry(connector, &dev->mode_config.connector_list, head) { 119 struct radeon_encoder *subenc; 120 struct radeon_encoder_mst *mst_enc; 121 122 radeon_connector = to_radeon_connector(connector); 123 if (!radeon_connector->is_mst_connector) 124 continue; 125 126 if (radeon_connector->mst_port != mst_conn) 127 continue; 128 129 subenc = radeon_connector->mst_encoder; 130 mst_enc = subenc->enc_priv; 131 132 if (!mst_enc->enc_active) 133 continue; 134 135 new_attribs[idx].fe = mst_enc->fe; 136 new_attribs[idx].slots = drm_dp_mst_get_vcpi_slots(&mst_conn->mst_mgr, mst_enc->port); 137 idx++; 138 } 139 140 for (i = 0; i < idx; i++) { 141 if (new_attribs[i].fe != mst_conn->cur_stream_attribs[i].fe || 142 new_attribs[i].slots != mst_conn->cur_stream_attribs[i].slots) { 143 radeon_dp_mst_set_stream_attrib(primary, i, new_attribs[i].fe, new_attribs[i].slots); 144 mst_conn->cur_stream_attribs[i].fe = new_attribs[i].fe; 145 mst_conn->cur_stream_attribs[i].slots = new_attribs[i].slots; 146 } 147 } 148 149 for (i = idx; i < mst_conn->enabled_attribs; i++) { 150 radeon_dp_mst_set_stream_attrib(primary, i, 0, 0); 151 mst_conn->cur_stream_attribs[i].fe = 0; 152 mst_conn->cur_stream_attribs[i].slots = 0; 153 } 154 mst_conn->enabled_attribs = idx; 155 return 0; 156 } 157 158 static int radeon_dp_mst_set_vcp_size(struct radeon_encoder *mst, uint32_t x, uint32_t y) 159 { 160 struct drm_device *dev = mst->base.dev; 161 struct radeon_device *rdev = dev->dev_private; 162 struct radeon_encoder_mst *mst_enc = mst->enc_priv; 163 uint32_t val, temp; 164 uint32_t offset = radeon_atom_set_enc_offset(mst_enc->fe); 165 int retries = 0; 166 167 val = NI_DP_MSE_RATE_X(x) | NI_DP_MSE_RATE_Y(y); 168 169 WREG32(NI_DP_MSE_RATE_CNTL + offset, val); 170 171 do { 172 temp = RREG32(NI_DP_MSE_RATE_UPDATE + offset); 173 } while ((temp & 0x1) && (retries++ < 10000)); 174 175 if (retries >= 10000) 176 DRM_ERROR("timed out wait for rate cntl %d\n", mst_enc->fe); 177 return 0; 178 } 179 180 static int radeon_dp_mst_get_ddc_modes(struct drm_connector *connector) 181 { 182 struct radeon_connector *radeon_connector = to_radeon_connector(connector); 183 struct radeon_connector *master = radeon_connector->mst_port; 184 struct edid *edid; 185 int ret = 0; 186 187 edid = drm_dp_mst_get_edid(connector, &master->mst_mgr, radeon_connector->port); 188 radeon_connector->edid = edid; 189 DRM_DEBUG_KMS("edid retrieved %p\n", edid); 190 if (radeon_connector->edid) { 191 drm_mode_connector_update_edid_property(&radeon_connector->base, radeon_connector->edid); 192 ret = drm_add_edid_modes(&radeon_connector->base, radeon_connector->edid); 193 drm_edid_to_eld(&radeon_connector->base, radeon_connector->edid); 194 return ret; 195 } 196 drm_mode_connector_update_edid_property(&radeon_connector->base, NULL); 197 198 return ret; 199 } 200 201 static int radeon_dp_mst_get_modes(struct drm_connector *connector) 202 { 203 return radeon_dp_mst_get_ddc_modes(connector); 204 } 205 206 static enum drm_mode_status 207 radeon_dp_mst_mode_valid(struct drm_connector *connector, 208 struct drm_display_mode *mode) 209 { 210 /* TODO - validate mode against available PBN for link */ 211 if (mode->clock < 10000) 212 return MODE_CLOCK_LOW; 213 214 if (mode->flags & DRM_MODE_FLAG_DBLCLK) 215 return MODE_H_ILLEGAL; 216 217 return MODE_OK; 218 } 219 220 struct drm_encoder *radeon_mst_best_encoder(struct drm_connector *connector) 221 { 222 struct radeon_connector *radeon_connector = to_radeon_connector(connector); 223 224 return &radeon_connector->mst_encoder->base; 225 } 226 227 static const struct drm_connector_helper_funcs radeon_dp_mst_connector_helper_funcs = { 228 .get_modes = radeon_dp_mst_get_modes, 229 .mode_valid = radeon_dp_mst_mode_valid, 230 .best_encoder = radeon_mst_best_encoder, 231 }; 232 233 static enum drm_connector_status 234 radeon_dp_mst_detect(struct drm_connector *connector, bool force) 235 { 236 struct radeon_connector *radeon_connector = to_radeon_connector(connector); 237 struct radeon_connector *master = radeon_connector->mst_port; 238 239 return drm_dp_mst_detect_port(connector, &master->mst_mgr, radeon_connector->port); 240 } 241 242 static void 243 radeon_dp_mst_connector_destroy(struct drm_connector *connector) 244 { 245 struct radeon_connector *radeon_connector = to_radeon_connector(connector); 246 struct radeon_encoder *radeon_encoder = radeon_connector->mst_encoder; 247 248 drm_encoder_cleanup(&radeon_encoder->base); 249 kfree(radeon_encoder); 250 drm_connector_cleanup(connector); 251 kfree(radeon_connector); 252 } 253 254 static int radeon_connector_dpms(struct drm_connector *connector, int mode) 255 { 256 DRM_DEBUG_KMS("\n"); 257 return 0; 258 } 259 260 static const struct drm_connector_funcs radeon_dp_mst_connector_funcs = { 261 .dpms = radeon_connector_dpms, 262 .detect = radeon_dp_mst_detect, 263 .fill_modes = drm_helper_probe_single_connector_modes, 264 .destroy = radeon_dp_mst_connector_destroy, 265 }; 266 267 static struct drm_connector *radeon_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, 268 struct drm_dp_mst_port *port, 269 const char *pathprop) 270 { 271 struct radeon_connector *master = container_of(mgr, struct radeon_connector, mst_mgr); 272 struct drm_device *dev = master->base.dev; 273 struct radeon_connector *radeon_connector; 274 struct drm_connector *connector; 275 276 radeon_connector = kzalloc(sizeof(*radeon_connector), GFP_KERNEL); 277 if (!radeon_connector) 278 return NULL; 279 280 radeon_connector->is_mst_connector = true; 281 connector = &radeon_connector->base; 282 radeon_connector->port = port; 283 radeon_connector->mst_port = master; 284 DRM_DEBUG_KMS("\n"); 285 286 drm_connector_init(dev, connector, &radeon_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort); 287 drm_connector_helper_add(connector, &radeon_dp_mst_connector_helper_funcs); 288 radeon_connector->mst_encoder = radeon_dp_create_fake_mst_encoder(master); 289 290 drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0); 291 drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0); 292 drm_mode_connector_set_path_property(connector, pathprop); 293 294 return connector; 295 } 296 297 static void radeon_dp_register_mst_connector(struct drm_connector *connector) 298 { 299 struct drm_device *dev = connector->dev; 300 struct radeon_device *rdev = dev->dev_private; 301 302 drm_modeset_lock_all(dev); 303 radeon_fb_add_connector(rdev, connector); 304 drm_modeset_unlock_all(dev); 305 306 drm_connector_register(connector); 307 } 308 309 static void radeon_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr, 310 struct drm_connector *connector) 311 { 312 struct radeon_connector *master = container_of(mgr, struct radeon_connector, mst_mgr); 313 struct drm_device *dev = master->base.dev; 314 struct radeon_device *rdev = dev->dev_private; 315 316 drm_connector_unregister(connector); 317 /* need to nuke the connector */ 318 drm_modeset_lock_all(dev); 319 /* dpms off */ 320 radeon_fb_remove_connector(rdev, connector); 321 322 drm_connector_cleanup(connector); 323 drm_modeset_unlock_all(dev); 324 325 kfree(connector); 326 DRM_DEBUG_KMS("\n"); 327 } 328 329 static void radeon_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr) 330 { 331 struct radeon_connector *master = container_of(mgr, struct radeon_connector, mst_mgr); 332 struct drm_device *dev = master->base.dev; 333 334 drm_kms_helper_hotplug_event(dev); 335 } 336 337 struct drm_dp_mst_topology_cbs mst_cbs = { 338 .add_connector = radeon_dp_add_mst_connector, 339 .register_connector = radeon_dp_register_mst_connector, 340 .destroy_connector = radeon_dp_destroy_mst_connector, 341 .hotplug = radeon_dp_mst_hotplug, 342 }; 343 344 struct radeon_connector *radeon_mst_find_connector(struct drm_encoder *encoder) 345 { 346 struct drm_device *dev = encoder->dev; 347 struct drm_connector *connector; 348 349 list_for_each_entry(connector, &dev->mode_config.connector_list, head) { 350 struct radeon_connector *radeon_connector = to_radeon_connector(connector); 351 if (!connector->encoder) 352 continue; 353 if (!radeon_connector->is_mst_connector) 354 continue; 355 356 DRM_DEBUG_KMS("checking %p vs %p\n", connector->encoder, encoder); 357 if (connector->encoder == encoder) 358 return radeon_connector; 359 } 360 return NULL; 361 } 362 363 void radeon_dp_mst_prepare_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) 364 { 365 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); 366 struct drm_device *dev = crtc->dev; 367 struct radeon_device *rdev = dev->dev_private; 368 struct radeon_encoder *radeon_encoder = to_radeon_encoder(radeon_crtc->encoder); 369 struct radeon_encoder_mst *mst_enc = radeon_encoder->enc_priv; 370 struct radeon_connector *radeon_connector = radeon_mst_find_connector(&radeon_encoder->base); 371 int dp_clock; 372 struct radeon_connector_atom_dig *dig_connector = mst_enc->connector->con_priv; 373 374 if (radeon_connector) { 375 radeon_connector->pixelclock_for_modeset = mode->clock; 376 if (radeon_connector->base.display_info.bpc) 377 radeon_crtc->bpc = radeon_connector->base.display_info.bpc; 378 else 379 radeon_crtc->bpc = 8; 380 } 381 382 DRM_DEBUG_KMS("dp_clock %p %d\n", dig_connector, dig_connector->dp_clock); 383 dp_clock = dig_connector->dp_clock; 384 radeon_crtc->ss_enabled = 385 radeon_atombios_get_asic_ss_info(rdev, &radeon_crtc->ss, 386 ASIC_INTERNAL_SS_ON_DP, 387 dp_clock); 388 } 389 390 static void 391 radeon_mst_encoder_dpms(struct drm_encoder *encoder, int mode) 392 { 393 struct drm_device *dev = encoder->dev; 394 struct radeon_device *rdev = dev->dev_private; 395 struct radeon_encoder *radeon_encoder, *primary; 396 struct radeon_encoder_mst *mst_enc; 397 struct radeon_encoder_atom_dig *dig_enc; 398 struct radeon_connector *radeon_connector; 399 struct drm_crtc *crtc; 400 struct radeon_crtc *radeon_crtc; 401 int ret __unused, slots; 402 403 if (!ASIC_IS_DCE5(rdev)) { 404 DRM_ERROR("got mst dpms on non-DCE5\n"); 405 return; 406 } 407 408 radeon_connector = radeon_mst_find_connector(encoder); 409 if (!radeon_connector) 410 return; 411 412 radeon_encoder = to_radeon_encoder(encoder); 413 414 mst_enc = radeon_encoder->enc_priv; 415 416 primary = mst_enc->primary; 417 418 dig_enc = primary->enc_priv; 419 420 crtc = encoder->crtc; 421 DRM_DEBUG_KMS("got connector %d\n", dig_enc->active_mst_links); 422 423 switch (mode) { 424 case DRM_MODE_DPMS_ON: 425 dig_enc->active_mst_links++; 426 427 radeon_crtc = to_radeon_crtc(crtc); 428 429 if (dig_enc->active_mst_links == 1) { 430 mst_enc->fe = dig_enc->dig_encoder; 431 mst_enc->fe_from_be = true; 432 atombios_set_mst_encoder_crtc_source(encoder, mst_enc->fe); 433 434 atombios_dig_encoder_setup(&primary->base, ATOM_ENCODER_CMD_SETUP, 0); 435 atombios_dig_transmitter_setup2(&primary->base, ATOM_TRANSMITTER_ACTION_ENABLE, 436 0, 0, dig_enc->dig_encoder); 437 438 if (radeon_dp_needs_link_train(mst_enc->connector) || 439 dig_enc->active_mst_links == 1) { 440 radeon_dp_link_train(&primary->base, &mst_enc->connector->base); 441 } 442 443 } else { 444 mst_enc->fe = radeon_atom_pick_dig_encoder(encoder, radeon_crtc->crtc_id); 445 if (mst_enc->fe == -1) 446 DRM_ERROR("failed to get frontend for dig encoder\n"); 447 mst_enc->fe_from_be = false; 448 atombios_set_mst_encoder_crtc_source(encoder, mst_enc->fe); 449 } 450 451 DRM_DEBUG_KMS("dig encoder is %d %d %d\n", dig_enc->dig_encoder, 452 dig_enc->linkb, radeon_crtc->crtc_id); 453 454 ret = drm_dp_mst_allocate_vcpi(&radeon_connector->mst_port->mst_mgr, 455 radeon_connector->port, 456 mst_enc->pbn, &slots); 457 ret = drm_dp_update_payload_part1(&radeon_connector->mst_port->mst_mgr); 458 459 radeon_dp_mst_set_be_cntl(primary, mst_enc, 460 radeon_connector->mst_port->hpd.hpd, true); 461 462 mst_enc->enc_active = true; 463 radeon_dp_mst_update_stream_attribs(radeon_connector->mst_port, primary); 464 radeon_dp_mst_set_vcp_size(radeon_encoder, slots, 0); 465 466 atombios_dig_encoder_setup2(&primary->base, ATOM_ENCODER_CMD_DP_VIDEO_ON, 0, 467 mst_enc->fe); 468 ret = drm_dp_check_act_status(&radeon_connector->mst_port->mst_mgr); 469 470 ret = drm_dp_update_payload_part2(&radeon_connector->mst_port->mst_mgr); 471 472 break; 473 case DRM_MODE_DPMS_STANDBY: 474 case DRM_MODE_DPMS_SUSPEND: 475 case DRM_MODE_DPMS_OFF: 476 DRM_ERROR("DPMS OFF %d\n", dig_enc->active_mst_links); 477 478 if (!mst_enc->enc_active) 479 return; 480 481 drm_dp_mst_reset_vcpi_slots(&radeon_connector->mst_port->mst_mgr, mst_enc->port); 482 ret = drm_dp_update_payload_part1(&radeon_connector->mst_port->mst_mgr); 483 484 drm_dp_check_act_status(&radeon_connector->mst_port->mst_mgr); 485 /* and this can also fail */ 486 drm_dp_update_payload_part2(&radeon_connector->mst_port->mst_mgr); 487 488 drm_dp_mst_deallocate_vcpi(&radeon_connector->mst_port->mst_mgr, mst_enc->port); 489 490 mst_enc->enc_active = false; 491 radeon_dp_mst_update_stream_attribs(radeon_connector->mst_port, primary); 492 493 radeon_dp_mst_set_be_cntl(primary, mst_enc, 494 radeon_connector->mst_port->hpd.hpd, false); 495 atombios_dig_encoder_setup2(&primary->base, ATOM_ENCODER_CMD_DP_VIDEO_OFF, 0, 496 mst_enc->fe); 497 498 if (!mst_enc->fe_from_be) 499 radeon_atom_release_dig_encoder(rdev, mst_enc->fe); 500 501 mst_enc->fe_from_be = false; 502 dig_enc->active_mst_links--; 503 if (dig_enc->active_mst_links == 0) { 504 /* drop link */ 505 } 506 507 break; 508 } 509 510 } 511 512 static bool radeon_mst_mode_fixup(struct drm_encoder *encoder, 513 const struct drm_display_mode *mode, 514 struct drm_display_mode *adjusted_mode) 515 { 516 struct radeon_encoder_mst *mst_enc; 517 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 518 int bpp = 24; 519 520 mst_enc = radeon_encoder->enc_priv; 521 522 mst_enc->pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp); 523 524 mst_enc->primary->active_device = mst_enc->primary->devices & mst_enc->connector->devices; 525 DRM_DEBUG_KMS("setting active device to %08x from %08x %08x for encoder %d\n", 526 mst_enc->primary->active_device, mst_enc->primary->devices, 527 mst_enc->connector->devices, mst_enc->primary->base.encoder_type); 528 529 530 drm_mode_set_crtcinfo(adjusted_mode, 0); 531 { 532 struct radeon_connector_atom_dig *dig_connector; 533 dig_connector = mst_enc->connector->con_priv; 534 dig_connector->dp_lane_count = drm_dp_max_lane_count(dig_connector->dpcd); 535 dig_connector->dp_clock = drm_dp_max_link_rate(dig_connector->dpcd); 536 DRM_DEBUG_KMS("dig clock %p %d %d\n", dig_connector, 537 dig_connector->dp_lane_count, dig_connector->dp_clock); 538 } 539 return true; 540 } 541 542 static void radeon_mst_encoder_prepare(struct drm_encoder *encoder) 543 { 544 struct radeon_connector *radeon_connector; 545 struct radeon_encoder *radeon_encoder, *primary; 546 struct radeon_encoder_mst *mst_enc; 547 struct radeon_encoder_atom_dig *dig_enc; 548 549 radeon_connector = radeon_mst_find_connector(encoder); 550 if (!radeon_connector) { 551 DRM_DEBUG_KMS("failed to find connector %p\n", encoder); 552 return; 553 } 554 radeon_encoder = to_radeon_encoder(encoder); 555 556 radeon_mst_encoder_dpms(encoder, DRM_MODE_DPMS_OFF); 557 558 mst_enc = radeon_encoder->enc_priv; 559 560 primary = mst_enc->primary; 561 562 dig_enc = primary->enc_priv; 563 564 mst_enc->port = radeon_connector->port; 565 566 if (dig_enc->dig_encoder == -1) { 567 dig_enc->dig_encoder = radeon_atom_pick_dig_encoder(&primary->base, -1); 568 primary->offset = radeon_atom_set_enc_offset(dig_enc->dig_encoder); 569 atombios_set_mst_encoder_crtc_source(encoder, dig_enc->dig_encoder); 570 571 572 } 573 DRM_DEBUG_KMS("%d %d\n", dig_enc->dig_encoder, primary->offset); 574 } 575 576 static void 577 radeon_mst_encoder_mode_set(struct drm_encoder *encoder, 578 struct drm_display_mode *mode, 579 struct drm_display_mode *adjusted_mode) 580 { 581 DRM_DEBUG_KMS("\n"); 582 } 583 584 static void radeon_mst_encoder_commit(struct drm_encoder *encoder) 585 { 586 radeon_mst_encoder_dpms(encoder, DRM_MODE_DPMS_ON); 587 DRM_DEBUG_KMS("\n"); 588 } 589 590 static const struct drm_encoder_helper_funcs radeon_mst_helper_funcs = { 591 .dpms = radeon_mst_encoder_dpms, 592 .mode_fixup = radeon_mst_mode_fixup, 593 .prepare = radeon_mst_encoder_prepare, 594 .mode_set = radeon_mst_encoder_mode_set, 595 .commit = radeon_mst_encoder_commit, 596 }; 597 598 void radeon_dp_mst_encoder_destroy(struct drm_encoder *encoder) 599 { 600 drm_encoder_cleanup(encoder); 601 kfree(encoder); 602 } 603 604 static const struct drm_encoder_funcs radeon_dp_mst_enc_funcs = { 605 .destroy = radeon_dp_mst_encoder_destroy, 606 }; 607 608 static struct radeon_encoder * 609 radeon_dp_create_fake_mst_encoder(struct radeon_connector *connector) 610 { 611 struct drm_device *dev = connector->base.dev; 612 struct radeon_device *rdev = dev->dev_private; 613 struct radeon_encoder *radeon_encoder; 614 struct radeon_encoder_mst *mst_enc; 615 struct drm_encoder *encoder; 616 const struct drm_connector_helper_funcs *connector_funcs = connector->base.helper_private; 617 struct drm_encoder *enc_master = connector_funcs->best_encoder(&connector->base); 618 619 DRM_DEBUG_KMS("enc master is %p\n", enc_master); 620 radeon_encoder = kzalloc(sizeof(*radeon_encoder), GFP_KERNEL); 621 if (!radeon_encoder) 622 return NULL; 623 624 radeon_encoder->enc_priv = kzalloc(sizeof(*mst_enc), GFP_KERNEL); 625 if (!radeon_encoder->enc_priv) { 626 kfree(radeon_encoder); 627 return NULL; 628 } 629 encoder = &radeon_encoder->base; 630 switch (rdev->num_crtc) { 631 case 1: 632 encoder->possible_crtcs = 0x1; 633 break; 634 case 2: 635 default: 636 encoder->possible_crtcs = 0x3; 637 break; 638 case 4: 639 encoder->possible_crtcs = 0xf; 640 break; 641 case 6: 642 encoder->possible_crtcs = 0x3f; 643 break; 644 } 645 646 drm_encoder_init(dev, &radeon_encoder->base, &radeon_dp_mst_enc_funcs, 647 DRM_MODE_ENCODER_DPMST); 648 drm_encoder_helper_add(encoder, &radeon_mst_helper_funcs); 649 650 mst_enc = radeon_encoder->enc_priv; 651 mst_enc->connector = connector; 652 mst_enc->primary = to_radeon_encoder(enc_master); 653 radeon_encoder->is_mst_encoder = true; 654 return radeon_encoder; 655 } 656 657 int 658 radeon_dp_mst_init(struct radeon_connector *radeon_connector) 659 { 660 struct drm_device *dev = radeon_connector->base.dev; 661 662 if (!radeon_connector->ddc_bus->has_aux) 663 return 0; 664 665 radeon_connector->mst_mgr.cbs = &mst_cbs; 666 return drm_dp_mst_topology_mgr_init(&radeon_connector->mst_mgr, dev->dev, 667 &radeon_connector->ddc_bus->aux, 16, 6, 668 radeon_connector->base.base.id); 669 } 670 671 int 672 radeon_dp_mst_probe(struct radeon_connector *radeon_connector) 673 { 674 struct radeon_connector_atom_dig *dig_connector = radeon_connector->con_priv; 675 struct drm_device *dev = radeon_connector->base.dev; 676 struct radeon_device *rdev = dev->dev_private; 677 int ret; 678 u8 msg[1]; 679 680 if (!radeon_mst) 681 return 0; 682 683 if (!ASIC_IS_DCE5(rdev)) 684 return 0; 685 686 if (dig_connector->dpcd[DP_DPCD_REV] < 0x12) 687 return 0; 688 689 ret = drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, DP_MSTM_CAP, msg, 690 1); 691 if (ret) { 692 if (msg[0] & DP_MST_CAP) { 693 DRM_DEBUG_KMS("Sink is MST capable\n"); 694 dig_connector->is_mst = true; 695 } else { 696 DRM_DEBUG_KMS("Sink is not MST capable\n"); 697 dig_connector->is_mst = false; 698 } 699 700 } 701 drm_dp_mst_topology_mgr_set_mst(&radeon_connector->mst_mgr, 702 dig_connector->is_mst); 703 return dig_connector->is_mst; 704 } 705 706 int 707 radeon_dp_mst_check_status(struct radeon_connector *radeon_connector) 708 { 709 struct radeon_connector_atom_dig *dig_connector = radeon_connector->con_priv; 710 int retry; 711 712 if (dig_connector->is_mst) { 713 u8 esi[16] = { 0 }; 714 int dret; 715 int ret = 0; 716 bool handled; 717 718 dret = drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, 719 DP_SINK_COUNT_ESI, esi, 8); 720 go_again: 721 if (dret == 8) { 722 DRM_DEBUG_KMS("got esi %02x %02x %02x\n", esi[0], esi[1], esi[2]); 723 ret = drm_dp_mst_hpd_irq(&radeon_connector->mst_mgr, esi, &handled); 724 725 if (handled) { 726 for (retry = 0; retry < 3; retry++) { 727 int wret; 728 wret = drm_dp_dpcd_write(&radeon_connector->ddc_bus->aux, 729 DP_SINK_COUNT_ESI + 1, &esi[1], 3); 730 if (wret == 3) 731 break; 732 } 733 734 dret = drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, 735 DP_SINK_COUNT_ESI, esi, 8); 736 if (dret == 8) { 737 DRM_DEBUG_KMS("got esi2 %02x %02x %02x\n", esi[0], esi[1], esi[2]); 738 goto go_again; 739 } 740 } else 741 ret = 0; 742 743 return ret; 744 } else { 745 DRM_DEBUG_KMS("failed to get ESI - device may have failed %d\n", ret); 746 dig_connector->is_mst = false; 747 drm_dp_mst_topology_mgr_set_mst(&radeon_connector->mst_mgr, 748 dig_connector->is_mst); 749 /* send a hotplug event */ 750 } 751 } 752 return -EINVAL; 753 } 754 755 #if defined(CONFIG_DEBUG_FS) 756 757 static int radeon_debugfs_mst_info(struct seq_file *m, void *data) 758 { 759 struct drm_info_node *node = (struct drm_info_node *)m->private; 760 struct drm_device *dev = node->minor->dev; 761 struct drm_connector *connector; 762 struct radeon_connector *radeon_connector; 763 struct radeon_connector_atom_dig *dig_connector; 764 int i; 765 766 drm_modeset_lock_all(dev); 767 list_for_each_entry(connector, &dev->mode_config.connector_list, head) { 768 if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort) 769 continue; 770 771 radeon_connector = to_radeon_connector(connector); 772 dig_connector = radeon_connector->con_priv; 773 if (radeon_connector->is_mst_connector) 774 continue; 775 if (!dig_connector->is_mst) 776 continue; 777 drm_dp_mst_dump_topology(m, &radeon_connector->mst_mgr); 778 779 for (i = 0; i < radeon_connector->enabled_attribs; i++) 780 seq_printf(m, "attrib %d: %d %d\n", i, 781 radeon_connector->cur_stream_attribs[i].fe, 782 radeon_connector->cur_stream_attribs[i].slots); 783 } 784 drm_modeset_unlock_all(dev); 785 return 0; 786 } 787 788 static struct drm_info_list radeon_debugfs_mst_list[] = { 789 {"radeon_mst_info", &radeon_debugfs_mst_info, 0, NULL}, 790 }; 791 #endif 792 793 int radeon_mst_debugfs_init(struct radeon_device *rdev) 794 { 795 #if defined(CONFIG_DEBUG_FS) 796 return radeon_debugfs_add_files(rdev, radeon_debugfs_mst_list, 1); 797 #endif 798 return 0; 799 } 800