1 /* $NetBSD: radeon_audio.c,v 1.2 2018/08/27 04:58:36 riastradh Exp $ */ 2 3 /* 4 * Copyright 2014 Advanced Micro Devices, Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: Slava Grigorev <slava.grigorev@amd.com> 25 */ 26 27 #include <sys/cdefs.h> 28 __KERNEL_RCSID(0, "$NetBSD: radeon_audio.c,v 1.2 2018/08/27 04:58:36 riastradh Exp $"); 29 30 #include <linux/gcd.h> 31 #include <drm/drmP.h> 32 #include <drm/drm_crtc.h> 33 #include "radeon.h" 34 #include "atom.h" 35 #include "radeon_audio.h" 36 37 void r600_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin, 38 u8 enable_mask); 39 void dce4_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin, 40 u8 enable_mask); 41 void dce6_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin, 42 u8 enable_mask); 43 u32 dce6_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg); 44 void dce6_endpoint_wreg(struct radeon_device *rdev, 45 u32 offset, u32 reg, u32 v); 46 void dce3_2_afmt_write_sad_regs(struct drm_encoder *encoder, 47 struct cea_sad *sads, int sad_count); 48 void evergreen_hdmi_write_sad_regs(struct drm_encoder *encoder, 49 struct cea_sad *sads, int sad_count); 50 void dce6_afmt_write_sad_regs(struct drm_encoder *encoder, 51 struct cea_sad *sads, int sad_count); 52 void dce3_2_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder, 53 u8 *sadb, int sad_count); 54 void dce3_2_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder, 55 u8 *sadb, int sad_count); 56 void dce4_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder, 57 u8 *sadb, int sad_count); 58 void dce4_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder, 59 u8 *sadb, int sad_count); 60 void dce6_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder, 61 u8 *sadb, int sad_count); 62 void dce6_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder, 63 u8 *sadb, int sad_count); 64 void dce4_afmt_write_latency_fields(struct drm_encoder *encoder, 65 struct drm_connector *connector, struct drm_display_mode *mode); 66 void dce6_afmt_write_latency_fields(struct drm_encoder *encoder, 67 struct drm_connector *connector, struct drm_display_mode *mode); 68 struct r600_audio_pin* r600_audio_get_pin(struct radeon_device *rdev); 69 struct r600_audio_pin* dce6_audio_get_pin(struct radeon_device *rdev); 70 void dce6_afmt_select_pin(struct drm_encoder *encoder); 71 void r600_hdmi_audio_set_dto(struct radeon_device *rdev, 72 struct radeon_crtc *crtc, unsigned int clock); 73 void dce3_2_audio_set_dto(struct radeon_device *rdev, 74 struct radeon_crtc *crtc, unsigned int clock); 75 void dce4_hdmi_audio_set_dto(struct radeon_device *rdev, 76 struct radeon_crtc *crtc, unsigned int clock); 77 void dce4_dp_audio_set_dto(struct radeon_device *rdev, 78 struct radeon_crtc *crtc, unsigned int clock); 79 void dce6_hdmi_audio_set_dto(struct radeon_device *rdev, 80 struct radeon_crtc *crtc, unsigned int clock); 81 void dce6_dp_audio_set_dto(struct radeon_device *rdev, 82 struct radeon_crtc *crtc, unsigned int clock); 83 void r600_set_avi_packet(struct radeon_device *rdev, u32 offset, 84 unsigned char *buffer, size_t size); 85 void evergreen_set_avi_packet(struct radeon_device *rdev, u32 offset, 86 unsigned char *buffer, size_t size); 87 void r600_hdmi_update_acr(struct drm_encoder *encoder, long offset, 88 const struct radeon_hdmi_acr *acr); 89 void dce3_2_hdmi_update_acr(struct drm_encoder *encoder, long offset, 90 const struct radeon_hdmi_acr *acr); 91 void evergreen_hdmi_update_acr(struct drm_encoder *encoder, long offset, 92 const struct radeon_hdmi_acr *acr); 93 void r600_set_vbi_packet(struct drm_encoder *encoder, u32 offset); 94 void dce4_set_vbi_packet(struct drm_encoder *encoder, u32 offset); 95 void dce4_hdmi_set_color_depth(struct drm_encoder *encoder, 96 u32 offset, int bpc); 97 void r600_set_audio_packet(struct drm_encoder *encoder, u32 offset); 98 void dce3_2_set_audio_packet(struct drm_encoder *encoder, u32 offset); 99 void dce4_set_audio_packet(struct drm_encoder *encoder, u32 offset); 100 void r600_set_mute(struct drm_encoder *encoder, u32 offset, bool mute); 101 void dce3_2_set_mute(struct drm_encoder *encoder, u32 offset, bool mute); 102 void dce4_set_mute(struct drm_encoder *encoder, u32 offset, bool mute); 103 static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder, 104 struct drm_display_mode *mode); 105 static void radeon_audio_dp_mode_set(struct drm_encoder *encoder, 106 struct drm_display_mode *mode); 107 void r600_hdmi_enable(struct drm_encoder *encoder, bool enable); 108 void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable); 109 void evergreen_dp_enable(struct drm_encoder *encoder, bool enable); 110 111 static const u32 pin_offsets[7] = 112 { 113 (0x5e00 - 0x5e00), 114 (0x5e18 - 0x5e00), 115 (0x5e30 - 0x5e00), 116 (0x5e48 - 0x5e00), 117 (0x5e60 - 0x5e00), 118 (0x5e78 - 0x5e00), 119 (0x5e90 - 0x5e00), 120 }; 121 122 static u32 radeon_audio_rreg(struct radeon_device *rdev, u32 offset, u32 reg) 123 { 124 return RREG32(reg); 125 } 126 127 static void radeon_audio_wreg(struct radeon_device *rdev, u32 offset, 128 u32 reg, u32 v) 129 { 130 WREG32(reg, v); 131 } 132 133 static struct radeon_audio_basic_funcs r600_funcs = { 134 .endpoint_rreg = radeon_audio_rreg, 135 .endpoint_wreg = radeon_audio_wreg, 136 .enable = r600_audio_enable, 137 }; 138 139 static struct radeon_audio_basic_funcs dce32_funcs = { 140 .endpoint_rreg = radeon_audio_rreg, 141 .endpoint_wreg = radeon_audio_wreg, 142 .enable = r600_audio_enable, 143 }; 144 145 static struct radeon_audio_basic_funcs dce4_funcs = { 146 .endpoint_rreg = radeon_audio_rreg, 147 .endpoint_wreg = radeon_audio_wreg, 148 .enable = dce4_audio_enable, 149 }; 150 151 static struct radeon_audio_basic_funcs dce6_funcs = { 152 .endpoint_rreg = dce6_endpoint_rreg, 153 .endpoint_wreg = dce6_endpoint_wreg, 154 .enable = dce6_audio_enable, 155 }; 156 157 static struct radeon_audio_funcs r600_hdmi_funcs = { 158 .get_pin = r600_audio_get_pin, 159 .set_dto = r600_hdmi_audio_set_dto, 160 .update_acr = r600_hdmi_update_acr, 161 .set_vbi_packet = r600_set_vbi_packet, 162 .set_avi_packet = r600_set_avi_packet, 163 .set_audio_packet = r600_set_audio_packet, 164 .set_mute = r600_set_mute, 165 .mode_set = radeon_audio_hdmi_mode_set, 166 .dpms = r600_hdmi_enable, 167 }; 168 169 static struct radeon_audio_funcs dce32_hdmi_funcs = { 170 .get_pin = r600_audio_get_pin, 171 .write_sad_regs = dce3_2_afmt_write_sad_regs, 172 .write_speaker_allocation = dce3_2_afmt_hdmi_write_speaker_allocation, 173 .set_dto = dce3_2_audio_set_dto, 174 .update_acr = dce3_2_hdmi_update_acr, 175 .set_vbi_packet = r600_set_vbi_packet, 176 .set_avi_packet = r600_set_avi_packet, 177 .set_audio_packet = dce3_2_set_audio_packet, 178 .set_mute = dce3_2_set_mute, 179 .mode_set = radeon_audio_hdmi_mode_set, 180 .dpms = r600_hdmi_enable, 181 }; 182 183 static struct radeon_audio_funcs dce32_dp_funcs = { 184 .get_pin = r600_audio_get_pin, 185 .write_sad_regs = dce3_2_afmt_write_sad_regs, 186 .write_speaker_allocation = dce3_2_afmt_dp_write_speaker_allocation, 187 .set_dto = dce3_2_audio_set_dto, 188 .set_avi_packet = r600_set_avi_packet, 189 .set_audio_packet = dce3_2_set_audio_packet, 190 }; 191 192 static struct radeon_audio_funcs dce4_hdmi_funcs = { 193 .get_pin = r600_audio_get_pin, 194 .write_sad_regs = evergreen_hdmi_write_sad_regs, 195 .write_speaker_allocation = dce4_afmt_hdmi_write_speaker_allocation, 196 .write_latency_fields = dce4_afmt_write_latency_fields, 197 .set_dto = dce4_hdmi_audio_set_dto, 198 .update_acr = evergreen_hdmi_update_acr, 199 .set_vbi_packet = dce4_set_vbi_packet, 200 .set_color_depth = dce4_hdmi_set_color_depth, 201 .set_avi_packet = evergreen_set_avi_packet, 202 .set_audio_packet = dce4_set_audio_packet, 203 .set_mute = dce4_set_mute, 204 .mode_set = radeon_audio_hdmi_mode_set, 205 .dpms = evergreen_hdmi_enable, 206 }; 207 208 static struct radeon_audio_funcs dce4_dp_funcs = { 209 .get_pin = r600_audio_get_pin, 210 .write_sad_regs = evergreen_hdmi_write_sad_regs, 211 .write_speaker_allocation = dce4_afmt_dp_write_speaker_allocation, 212 .write_latency_fields = dce4_afmt_write_latency_fields, 213 .set_dto = dce4_dp_audio_set_dto, 214 .set_avi_packet = evergreen_set_avi_packet, 215 .set_audio_packet = dce4_set_audio_packet, 216 .mode_set = radeon_audio_dp_mode_set, 217 .dpms = evergreen_dp_enable, 218 }; 219 220 static struct radeon_audio_funcs dce6_hdmi_funcs = { 221 .select_pin = dce6_afmt_select_pin, 222 .get_pin = dce6_audio_get_pin, 223 .write_sad_regs = dce6_afmt_write_sad_regs, 224 .write_speaker_allocation = dce6_afmt_hdmi_write_speaker_allocation, 225 .write_latency_fields = dce6_afmt_write_latency_fields, 226 .set_dto = dce6_hdmi_audio_set_dto, 227 .update_acr = evergreen_hdmi_update_acr, 228 .set_vbi_packet = dce4_set_vbi_packet, 229 .set_color_depth = dce4_hdmi_set_color_depth, 230 .set_avi_packet = evergreen_set_avi_packet, 231 .set_audio_packet = dce4_set_audio_packet, 232 .set_mute = dce4_set_mute, 233 .mode_set = radeon_audio_hdmi_mode_set, 234 .dpms = evergreen_hdmi_enable, 235 }; 236 237 static struct radeon_audio_funcs dce6_dp_funcs = { 238 .select_pin = dce6_afmt_select_pin, 239 .get_pin = dce6_audio_get_pin, 240 .write_sad_regs = dce6_afmt_write_sad_regs, 241 .write_speaker_allocation = dce6_afmt_dp_write_speaker_allocation, 242 .write_latency_fields = dce6_afmt_write_latency_fields, 243 .set_dto = dce6_dp_audio_set_dto, 244 .set_avi_packet = evergreen_set_avi_packet, 245 .set_audio_packet = dce4_set_audio_packet, 246 .mode_set = radeon_audio_dp_mode_set, 247 .dpms = evergreen_dp_enable, 248 }; 249 250 static void radeon_audio_enable(struct radeon_device *rdev, 251 struct r600_audio_pin *pin, u8 enable_mask) 252 { 253 struct drm_encoder *encoder; 254 struct radeon_encoder *radeon_encoder; 255 struct radeon_encoder_atom_dig *dig; 256 int pin_count = 0; 257 258 if (!pin) 259 return; 260 261 if (rdev->mode_info.mode_config_initialized) { 262 list_for_each_entry(encoder, &rdev->ddev->mode_config.encoder_list, head) { 263 if (radeon_encoder_is_digital(encoder)) { 264 radeon_encoder = to_radeon_encoder(encoder); 265 dig = radeon_encoder->enc_priv; 266 if (dig->pin == pin) 267 pin_count++; 268 } 269 } 270 271 if ((pin_count > 1) && (enable_mask == 0)) 272 return; 273 } 274 275 if (rdev->audio.funcs->enable) 276 rdev->audio.funcs->enable(rdev, pin, enable_mask); 277 } 278 279 static void radeon_audio_interface_init(struct radeon_device *rdev) 280 { 281 if (ASIC_IS_DCE6(rdev)) { 282 rdev->audio.funcs = &dce6_funcs; 283 rdev->audio.hdmi_funcs = &dce6_hdmi_funcs; 284 rdev->audio.dp_funcs = &dce6_dp_funcs; 285 } else if (ASIC_IS_DCE4(rdev)) { 286 rdev->audio.funcs = &dce4_funcs; 287 rdev->audio.hdmi_funcs = &dce4_hdmi_funcs; 288 rdev->audio.dp_funcs = &dce4_dp_funcs; 289 } else if (ASIC_IS_DCE32(rdev)) { 290 rdev->audio.funcs = &dce32_funcs; 291 rdev->audio.hdmi_funcs = &dce32_hdmi_funcs; 292 rdev->audio.dp_funcs = &dce32_dp_funcs; 293 } else { 294 rdev->audio.funcs = &r600_funcs; 295 rdev->audio.hdmi_funcs = &r600_hdmi_funcs; 296 rdev->audio.dp_funcs = 0; 297 } 298 } 299 300 static int radeon_audio_chipset_supported(struct radeon_device *rdev) 301 { 302 return ASIC_IS_DCE2(rdev) && !ASIC_IS_NODCE(rdev); 303 } 304 305 int radeon_audio_init(struct radeon_device *rdev) 306 { 307 int i; 308 309 if (!radeon_audio || !radeon_audio_chipset_supported(rdev)) 310 return 0; 311 312 rdev->audio.enabled = true; 313 314 if (ASIC_IS_DCE83(rdev)) /* KB: 2 streams, 3 endpoints */ 315 rdev->audio.num_pins = 3; 316 else if (ASIC_IS_DCE81(rdev)) /* KV: 4 streams, 7 endpoints */ 317 rdev->audio.num_pins = 7; 318 else if (ASIC_IS_DCE8(rdev)) /* BN/HW: 6 streams, 7 endpoints */ 319 rdev->audio.num_pins = 7; 320 else if (ASIC_IS_DCE64(rdev)) /* OL: 2 streams, 2 endpoints */ 321 rdev->audio.num_pins = 2; 322 else if (ASIC_IS_DCE61(rdev)) /* TN: 4 streams, 6 endpoints */ 323 rdev->audio.num_pins = 6; 324 else if (ASIC_IS_DCE6(rdev)) /* SI: 6 streams, 6 endpoints */ 325 rdev->audio.num_pins = 6; 326 else 327 rdev->audio.num_pins = 1; 328 329 for (i = 0; i < rdev->audio.num_pins; i++) { 330 rdev->audio.pin[i].channels = -1; 331 rdev->audio.pin[i].rate = -1; 332 rdev->audio.pin[i].bits_per_sample = -1; 333 rdev->audio.pin[i].status_bits = 0; 334 rdev->audio.pin[i].category_code = 0; 335 rdev->audio.pin[i].connected = false; 336 rdev->audio.pin[i].offset = pin_offsets[i]; 337 rdev->audio.pin[i].id = i; 338 } 339 340 radeon_audio_interface_init(rdev); 341 342 /* disable audio. it will be set up later */ 343 for (i = 0; i < rdev->audio.num_pins; i++) 344 radeon_audio_enable(rdev, &rdev->audio.pin[i], 0); 345 346 return 0; 347 } 348 349 u32 radeon_audio_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg) 350 { 351 if (rdev->audio.funcs->endpoint_rreg) 352 return rdev->audio.funcs->endpoint_rreg(rdev, offset, reg); 353 354 return 0; 355 } 356 357 void radeon_audio_endpoint_wreg(struct radeon_device *rdev, u32 offset, 358 u32 reg, u32 v) 359 { 360 if (rdev->audio.funcs->endpoint_wreg) 361 rdev->audio.funcs->endpoint_wreg(rdev, offset, reg, v); 362 } 363 364 static void radeon_audio_write_sad_regs(struct drm_encoder *encoder) 365 { 366 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); 367 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 368 struct cea_sad *sads; 369 int sad_count; 370 371 if (!connector) 372 return; 373 374 sad_count = drm_edid_to_sad(radeon_connector_edid(connector), &sads); 375 if (sad_count <= 0) { 376 DRM_ERROR("Couldn't read SADs: %d\n", sad_count); 377 return; 378 } 379 BUG_ON(!sads); 380 381 if (radeon_encoder->audio && radeon_encoder->audio->write_sad_regs) 382 radeon_encoder->audio->write_sad_regs(encoder, sads, sad_count); 383 384 kfree(sads); 385 } 386 387 static void radeon_audio_write_speaker_allocation(struct drm_encoder *encoder) 388 { 389 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); 390 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 391 u8 *sadb = NULL; 392 int sad_count; 393 394 if (!connector) 395 return; 396 397 sad_count = drm_edid_to_speaker_allocation(radeon_connector_edid(connector), 398 &sadb); 399 if (sad_count < 0) { 400 DRM_DEBUG("Couldn't read Speaker Allocation Data Block: %d\n", 401 sad_count); 402 sad_count = 0; 403 } 404 405 if (radeon_encoder->audio && radeon_encoder->audio->write_speaker_allocation) 406 radeon_encoder->audio->write_speaker_allocation(encoder, sadb, sad_count); 407 408 kfree(sadb); 409 } 410 411 static void radeon_audio_write_latency_fields(struct drm_encoder *encoder, 412 struct drm_display_mode *mode) 413 { 414 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); 415 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 416 417 if (!connector) 418 return; 419 420 if (radeon_encoder->audio && radeon_encoder->audio->write_latency_fields) 421 radeon_encoder->audio->write_latency_fields(encoder, connector, mode); 422 } 423 424 struct r600_audio_pin* radeon_audio_get_pin(struct drm_encoder *encoder) 425 { 426 struct radeon_device *rdev = encoder->dev->dev_private; 427 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 428 429 if (radeon_encoder->audio && radeon_encoder->audio->get_pin) 430 return radeon_encoder->audio->get_pin(rdev); 431 432 return NULL; 433 } 434 435 static void radeon_audio_select_pin(struct drm_encoder *encoder) 436 { 437 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 438 439 if (radeon_encoder->audio && radeon_encoder->audio->select_pin) 440 radeon_encoder->audio->select_pin(encoder); 441 } 442 443 void radeon_audio_detect(struct drm_connector *connector, 444 struct drm_encoder *encoder, 445 enum drm_connector_status status) 446 { 447 struct drm_device *dev = connector->dev; 448 struct radeon_device *rdev = dev->dev_private; 449 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 450 struct radeon_encoder_atom_dig *dig; 451 452 if (!radeon_audio_chipset_supported(rdev)) 453 return; 454 455 if (!radeon_encoder_is_digital(encoder)) 456 return; 457 458 dig = radeon_encoder->enc_priv; 459 460 if (status == connector_status_connected) { 461 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) { 462 struct radeon_connector *radeon_connector = to_radeon_connector(connector); 463 464 if (radeon_dp_getsinktype(radeon_connector) == 465 CONNECTOR_OBJECT_ID_DISPLAYPORT) 466 radeon_encoder->audio = rdev->audio.dp_funcs; 467 else 468 radeon_encoder->audio = rdev->audio.hdmi_funcs; 469 } else { 470 radeon_encoder->audio = rdev->audio.hdmi_funcs; 471 } 472 473 if (drm_detect_monitor_audio(radeon_connector_edid(connector))) { 474 if (!dig->pin) 475 dig->pin = radeon_audio_get_pin(encoder); 476 radeon_audio_enable(rdev, dig->pin, 0xf); 477 } else { 478 radeon_audio_enable(rdev, dig->pin, 0); 479 dig->pin = NULL; 480 } 481 } else { 482 radeon_audio_enable(rdev, dig->pin, 0); 483 dig->pin = NULL; 484 } 485 } 486 487 void radeon_audio_fini(struct radeon_device *rdev) 488 { 489 int i; 490 491 if (!rdev->audio.enabled) 492 return; 493 494 for (i = 0; i < rdev->audio.num_pins; i++) 495 radeon_audio_enable(rdev, &rdev->audio.pin[i], 0); 496 497 rdev->audio.enabled = false; 498 } 499 500 static void radeon_audio_set_dto(struct drm_encoder *encoder, unsigned int clock) 501 { 502 struct radeon_device *rdev = encoder->dev->dev_private; 503 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 504 struct radeon_crtc *crtc = to_radeon_crtc(encoder->crtc); 505 506 if (radeon_encoder->audio && radeon_encoder->audio->set_dto) 507 radeon_encoder->audio->set_dto(rdev, crtc, clock); 508 } 509 510 static int radeon_audio_set_avi_packet(struct drm_encoder *encoder, 511 struct drm_display_mode *mode) 512 { 513 struct radeon_device *rdev = encoder->dev->dev_private; 514 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 515 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 516 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); 517 u8 buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_AVI_INFOFRAME_SIZE]; 518 struct hdmi_avi_infoframe frame; 519 int err; 520 521 if (!connector) 522 return -EINVAL; 523 524 err = drm_hdmi_avi_infoframe_from_display_mode(&frame, mode); 525 if (err < 0) { 526 DRM_ERROR("failed to setup AVI infoframe: %d\n", err); 527 return err; 528 } 529 530 if (radeon_encoder->output_csc != RADEON_OUTPUT_CSC_BYPASS) { 531 if (drm_rgb_quant_range_selectable(radeon_connector_edid(connector))) { 532 if (radeon_encoder->output_csc == RADEON_OUTPUT_CSC_TVRGB) 533 frame.quantization_range = HDMI_QUANTIZATION_RANGE_LIMITED; 534 else 535 frame.quantization_range = HDMI_QUANTIZATION_RANGE_FULL; 536 } else { 537 frame.quantization_range = HDMI_QUANTIZATION_RANGE_DEFAULT; 538 } 539 } 540 541 err = hdmi_avi_infoframe_pack(&frame, buffer, sizeof(buffer)); 542 if (err < 0) { 543 DRM_ERROR("failed to pack AVI infoframe: %d\n", err); 544 return err; 545 } 546 547 if (dig && dig->afmt && radeon_encoder->audio && 548 radeon_encoder->audio->set_avi_packet) 549 radeon_encoder->audio->set_avi_packet(rdev, dig->afmt->offset, 550 buffer, sizeof(buffer)); 551 552 return 0; 553 } 554 555 /* 556 * calculate CTS and N values if they are not found in the table 557 */ 558 static void radeon_audio_calc_cts(unsigned int clock, int *CTS, int *N, int freq) 559 { 560 int n, cts; 561 unsigned long div, mul; 562 563 /* Safe, but overly large values */ 564 n = 128 * freq; 565 cts = clock * 1000; 566 567 /* Smallest valid fraction */ 568 div = gcd(n, cts); 569 570 n /= div; 571 cts /= div; 572 573 /* 574 * The optimal N is 128*freq/1000. Calculate the closest larger 575 * value that doesn't truncate any bits. 576 */ 577 mul = ((128*freq/1000) + (n-1))/n; 578 579 n *= mul; 580 cts *= mul; 581 582 /* Check that we are in spec (not always possible) */ 583 if (n < (128*freq/1500)) 584 printk(KERN_WARNING "Calculated ACR N value is too small. You may experience audio problems.\n"); 585 if (n > (128*freq/300)) 586 printk(KERN_WARNING "Calculated ACR N value is too large. You may experience audio problems.\n"); 587 588 *N = n; 589 *CTS = cts; 590 591 DRM_DEBUG("Calculated ACR timing N=%d CTS=%d for frequency %d\n", 592 *N, *CTS, freq); 593 } 594 595 static const struct radeon_hdmi_acr* radeon_audio_acr(unsigned int clock) 596 { 597 static struct radeon_hdmi_acr res; 598 u8 i; 599 600 static const struct radeon_hdmi_acr hdmi_predefined_acr[] = { 601 /* 32kHz 44.1kHz 48kHz */ 602 /* Clock N CTS N CTS N CTS */ 603 { 25175, 4096, 25175, 28224, 125875, 6144, 25175 }, /* 25,20/1.001 MHz */ 604 { 25200, 4096, 25200, 6272, 28000, 6144, 25200 }, /* 25.20 MHz */ 605 { 27000, 4096, 27000, 6272, 30000, 6144, 27000 }, /* 27.00 MHz */ 606 { 27027, 4096, 27027, 6272, 30030, 6144, 27027 }, /* 27.00*1.001 MHz */ 607 { 54000, 4096, 54000, 6272, 60000, 6144, 54000 }, /* 54.00 MHz */ 608 { 54054, 4096, 54054, 6272, 60060, 6144, 54054 }, /* 54.00*1.001 MHz */ 609 { 74176, 4096, 74176, 5733, 75335, 6144, 74176 }, /* 74.25/1.001 MHz */ 610 { 74250, 4096, 74250, 6272, 82500, 6144, 74250 }, /* 74.25 MHz */ 611 { 148352, 4096, 148352, 5733, 150670, 6144, 148352 }, /* 148.50/1.001 MHz */ 612 { 148500, 4096, 148500, 6272, 165000, 6144, 148500 }, /* 148.50 MHz */ 613 }; 614 615 /* Precalculated values for common clocks */ 616 for (i = 0; i < ARRAY_SIZE(hdmi_predefined_acr); i++) 617 if (hdmi_predefined_acr[i].clock == clock) 618 return &hdmi_predefined_acr[i]; 619 620 /* And odd clocks get manually calculated */ 621 radeon_audio_calc_cts(clock, &res.cts_32khz, &res.n_32khz, 32000); 622 radeon_audio_calc_cts(clock, &res.cts_44_1khz, &res.n_44_1khz, 44100); 623 radeon_audio_calc_cts(clock, &res.cts_48khz, &res.n_48khz, 48000); 624 625 return &res; 626 } 627 628 /* 629 * update the N and CTS parameters for a given pixel clock rate 630 */ 631 static void radeon_audio_update_acr(struct drm_encoder *encoder, unsigned int clock) 632 { 633 const struct radeon_hdmi_acr *acr = radeon_audio_acr(clock); 634 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 635 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 636 637 if (!dig || !dig->afmt) 638 return; 639 640 if (radeon_encoder->audio && radeon_encoder->audio->update_acr) 641 radeon_encoder->audio->update_acr(encoder, dig->afmt->offset, acr); 642 } 643 644 static void radeon_audio_set_vbi_packet(struct drm_encoder *encoder) 645 { 646 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 647 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 648 649 if (!dig || !dig->afmt) 650 return; 651 652 if (radeon_encoder->audio && radeon_encoder->audio->set_vbi_packet) 653 radeon_encoder->audio->set_vbi_packet(encoder, dig->afmt->offset); 654 } 655 656 static void radeon_hdmi_set_color_depth(struct drm_encoder *encoder) 657 { 658 int bpc = 8; 659 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 660 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 661 662 if (!dig || !dig->afmt) 663 return; 664 665 if (encoder->crtc) { 666 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); 667 bpc = radeon_crtc->bpc; 668 } 669 670 if (radeon_encoder->audio && radeon_encoder->audio->set_color_depth) 671 radeon_encoder->audio->set_color_depth(encoder, dig->afmt->offset, bpc); 672 } 673 674 static void radeon_audio_set_audio_packet(struct drm_encoder *encoder) 675 { 676 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 677 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 678 679 if (!dig || !dig->afmt) 680 return; 681 682 if (radeon_encoder->audio && radeon_encoder->audio->set_audio_packet) 683 radeon_encoder->audio->set_audio_packet(encoder, dig->afmt->offset); 684 } 685 686 static void radeon_audio_set_mute(struct drm_encoder *encoder, bool mute) 687 { 688 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 689 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 690 691 if (!dig || !dig->afmt) 692 return; 693 694 if (radeon_encoder->audio && radeon_encoder->audio->set_mute) 695 radeon_encoder->audio->set_mute(encoder, dig->afmt->offset, mute); 696 } 697 698 /* 699 * update the info frames with the data from the current display mode 700 */ 701 static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder, 702 struct drm_display_mode *mode) 703 { 704 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 705 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 706 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); 707 708 if (!dig || !dig->afmt) 709 return; 710 711 if (!connector) 712 return; 713 714 if (drm_detect_monitor_audio(radeon_connector_edid(connector))) { 715 radeon_audio_set_mute(encoder, true); 716 717 radeon_audio_write_speaker_allocation(encoder); 718 radeon_audio_write_sad_regs(encoder); 719 radeon_audio_write_latency_fields(encoder, mode); 720 radeon_audio_set_dto(encoder, mode->clock); 721 radeon_audio_set_vbi_packet(encoder); 722 radeon_hdmi_set_color_depth(encoder); 723 radeon_audio_update_acr(encoder, mode->clock); 724 radeon_audio_set_audio_packet(encoder); 725 radeon_audio_select_pin(encoder); 726 727 if (radeon_audio_set_avi_packet(encoder, mode) < 0) 728 return; 729 730 radeon_audio_set_mute(encoder, false); 731 } else { 732 radeon_hdmi_set_color_depth(encoder); 733 734 if (radeon_audio_set_avi_packet(encoder, mode) < 0) 735 return; 736 } 737 } 738 739 static void radeon_audio_dp_mode_set(struct drm_encoder *encoder, 740 struct drm_display_mode *mode) 741 { 742 struct drm_device *dev = encoder->dev; 743 struct radeon_device *rdev = dev->dev_private; 744 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 745 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 746 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); 747 748 if (!dig || !dig->afmt) 749 return; 750 751 if (!connector) 752 return; 753 754 if (drm_detect_monitor_audio(radeon_connector_edid(connector))) { 755 radeon_audio_write_speaker_allocation(encoder); 756 radeon_audio_write_sad_regs(encoder); 757 radeon_audio_write_latency_fields(encoder, mode); 758 radeon_audio_set_dto(encoder, rdev->clock.vco_freq * 10); 759 radeon_audio_set_audio_packet(encoder); 760 radeon_audio_select_pin(encoder); 761 762 if (radeon_audio_set_avi_packet(encoder, mode) < 0) 763 return; 764 } 765 } 766 767 void radeon_audio_mode_set(struct drm_encoder *encoder, 768 struct drm_display_mode *mode) 769 { 770 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 771 772 if (radeon_encoder->audio && radeon_encoder->audio->mode_set) 773 radeon_encoder->audio->mode_set(encoder, mode); 774 } 775 776 void radeon_audio_dpms(struct drm_encoder *encoder, int mode) 777 { 778 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 779 780 if (radeon_encoder->audio && radeon_encoder->audio->dpms) 781 radeon_encoder->audio->dpms(encoder, mode == DRM_MODE_DPMS_ON); 782 } 783 784 unsigned int radeon_audio_decode_dfs_div(unsigned int div) 785 { 786 if (div >= 8 && div < 64) 787 return (div - 8) * 25 + 200; 788 else if (div >= 64 && div < 96) 789 return (div - 64) * 50 + 1600; 790 else if (div >= 96 && div < 128) 791 return (div - 96) * 100 + 3200; 792 else 793 return 0; 794 } 795