xref: /netbsd-src/sys/external/bsd/drm2/dist/drm/radeon/r100_track.h (revision 9fd8799cb5ceb66c69f2eb1a6d26a1d587ba1f1e)
1 /*	$NetBSD: r100_track.h,v 1.2 2018/08/27 04:58:36 riastradh Exp $	*/
2 
3 
4 #define R100_TRACK_MAX_TEXTURE 3
5 #define R200_TRACK_MAX_TEXTURE 6
6 #define R300_TRACK_MAX_TEXTURE 16
7 
8 #define R100_MAX_CB 1
9 #define R300_MAX_CB 4
10 
11 /*
12  * CS functions
13  */
14 struct r100_cs_track_cb {
15 	struct radeon_bo	*robj;
16 	unsigned		pitch;
17 	unsigned		cpp;
18 	unsigned		offset;
19 };
20 
21 struct r100_cs_track_array {
22 	struct radeon_bo	*robj;
23 	unsigned		esize;
24 };
25 
26 struct r100_cs_cube_info {
27 	struct radeon_bo	*robj;
28 	unsigned		offset;
29 	unsigned		width;
30 	unsigned		height;
31 };
32 
33 #define R100_TRACK_COMP_NONE   0
34 #define R100_TRACK_COMP_DXT1   1
35 #define R100_TRACK_COMP_DXT35  2
36 
37 struct r100_cs_track_texture {
38 	struct radeon_bo	*robj;
39 	struct r100_cs_cube_info cube_info[5]; /* info for 5 non-primary faces */
40 	unsigned		pitch;
41 	unsigned		width;
42 	unsigned		height;
43 	unsigned		num_levels;
44 	unsigned		cpp;
45 	unsigned		tex_coord_type;
46 	unsigned		txdepth;
47 	unsigned		width_11;
48 	unsigned		height_11;
49 	bool			use_pitch;
50 	bool			enabled;
51 	bool                    lookup_disable;
52 	bool			roundup_w;
53 	bool			roundup_h;
54 	unsigned                compress_format;
55 };
56 
57 struct r100_cs_track {
58 	unsigned			num_cb;
59 	unsigned                        num_texture;
60 	unsigned			maxy;
61 	unsigned			vtx_size;
62 	unsigned			vap_vf_cntl;
63 	unsigned			vap_alt_nverts;
64 	unsigned			immd_dwords;
65 	unsigned			num_arrays;
66 	unsigned			max_indx;
67 	unsigned			color_channel_mask;
68 	struct r100_cs_track_array	arrays[16];
69 	struct r100_cs_track_cb 	cb[R300_MAX_CB];
70 	struct r100_cs_track_cb 	zb;
71 	struct r100_cs_track_cb 	aa;
72 	struct r100_cs_track_texture	textures[R300_TRACK_MAX_TEXTURE];
73 	bool				z_enabled;
74 	bool                            separate_cube;
75 	bool				zb_cb_clear;
76 	bool				blend_read_enable;
77 	bool				cb_dirty;
78 	bool				zb_dirty;
79 	bool				tex_dirty;
80 	bool				aa_dirty;
81 	bool				aaresolve;
82 };
83 
84 int r100_cs_track_check(struct radeon_device *rdev, struct r100_cs_track *track);
85 void r100_cs_track_clear(struct radeon_device *rdev, struct r100_cs_track *track);
86 
87 int r100_cs_packet_parse_vline(struct radeon_cs_parser *p);
88 
89 int r200_packet0_check(struct radeon_cs_parser *p,
90 		       struct radeon_cs_packet *pkt,
91 		       unsigned idx, unsigned reg);
92 
93 int r100_reloc_pitch_offset(struct radeon_cs_parser *p,
94 			    struct radeon_cs_packet *pkt,
95 			    unsigned idx,
96 			    unsigned reg);
97 int r100_packet3_load_vbpntr(struct radeon_cs_parser *p,
98 			     struct radeon_cs_packet *pkt,
99 			     int idx);
100