1 /* $NetBSD: nouveau_nv17_fence.c,v 1.2 2018/08/27 04:58:24 riastradh Exp $ */ 2 3 /* 4 * Copyright 2012 Red Hat Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: Ben Skeggs <bskeggs@redhat.com> 25 */ 26 27 #include <sys/cdefs.h> 28 __KERNEL_RCSID(0, "$NetBSD: nouveau_nv17_fence.c,v 1.2 2018/08/27 04:58:24 riastradh Exp $"); 29 30 #include <nvif/os.h> 31 #include <nvif/class.h> 32 33 #include "nouveau_drm.h" 34 #include "nouveau_dma.h" 35 #include "nv10_fence.h" 36 37 int 38 nv17_fence_sync(struct nouveau_fence *fence, 39 struct nouveau_channel *prev, struct nouveau_channel *chan) 40 { 41 struct nouveau_cli *cli = (void *)prev->user.client; 42 struct nv10_fence_priv *priv = chan->drm->fence; 43 struct nv10_fence_chan *fctx = chan->fence; 44 u32 value; 45 int ret; 46 47 if (!mutex_trylock(&cli->mutex)) 48 return -EBUSY; 49 50 spin_lock(&priv->lock); 51 value = priv->sequence; 52 priv->sequence += 2; 53 spin_unlock(&priv->lock); 54 55 ret = RING_SPACE(prev, 5); 56 if (!ret) { 57 BEGIN_NV04(prev, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 4); 58 OUT_RING (prev, fctx->sema.handle); 59 OUT_RING (prev, 0); 60 OUT_RING (prev, value + 0); 61 OUT_RING (prev, value + 1); 62 FIRE_RING (prev); 63 } 64 65 if (!ret && !(ret = RING_SPACE(chan, 5))) { 66 BEGIN_NV04(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 4); 67 OUT_RING (chan, fctx->sema.handle); 68 OUT_RING (chan, 0); 69 OUT_RING (chan, value + 1); 70 OUT_RING (chan, value + 2); 71 FIRE_RING (chan); 72 } 73 74 mutex_unlock(&cli->mutex); 75 return 0; 76 } 77 78 static int 79 nv17_fence_context_new(struct nouveau_channel *chan) 80 { 81 struct nv10_fence_priv *priv = chan->drm->fence; 82 struct nv10_fence_chan *fctx; 83 struct ttm_mem_reg *mem = &priv->bo->bo.mem; 84 u32 start = mem->start * PAGE_SIZE; 85 u32 limit = start + mem->size - 1; 86 int ret = 0; 87 88 fctx = chan->fence = kzalloc(sizeof(*fctx), GFP_KERNEL); 89 if (!fctx) 90 return -ENOMEM; 91 92 nouveau_fence_context_new(chan, &fctx->base); 93 fctx->base.emit = nv10_fence_emit; 94 fctx->base.read = nv10_fence_read; 95 fctx->base.sync = nv17_fence_sync; 96 97 ret = nvif_object_init(&chan->user, NvSema, NV_DMA_FROM_MEMORY, 98 &(struct nv_dma_v0) { 99 .target = NV_DMA_V0_TARGET_VRAM, 100 .access = NV_DMA_V0_ACCESS_RDWR, 101 .start = start, 102 .limit = limit, 103 }, sizeof(struct nv_dma_v0), 104 &fctx->sema); 105 if (ret) 106 nv10_fence_context_del(chan); 107 return ret; 108 } 109 110 void 111 nv17_fence_resume(struct nouveau_drm *drm) 112 { 113 struct nv10_fence_priv *priv = drm->fence; 114 115 nouveau_bo_wr32(priv->bo, 0, priv->sequence); 116 } 117 118 int 119 nv17_fence_create(struct nouveau_drm *drm) 120 { 121 struct nv10_fence_priv *priv; 122 int ret = 0; 123 124 priv = drm->fence = kzalloc(sizeof(*priv), GFP_KERNEL); 125 if (!priv) 126 return -ENOMEM; 127 128 priv->base.dtor = nv10_fence_destroy; 129 priv->base.resume = nv17_fence_resume; 130 priv->base.context_new = nv17_fence_context_new; 131 priv->base.context_del = nv10_fence_context_del; 132 priv->base.contexts = 31; 133 priv->base.context_base = fence_context_alloc(priv->base.contexts); 134 spin_lock_init(&priv->lock); 135 136 ret = nouveau_bo_new(drm->dev, 4096, 0x1000, TTM_PL_FLAG_VRAM, 137 0, 0x0000, NULL, NULL, &priv->bo); 138 if (!ret) { 139 ret = nouveau_bo_pin(priv->bo, TTM_PL_FLAG_VRAM, false); 140 if (!ret) { 141 ret = nouveau_bo_map(priv->bo); 142 if (ret) 143 nouveau_bo_unpin(priv->bo); 144 } 145 if (ret) 146 nouveau_bo_ref(NULL, &priv->bo); 147 } 148 149 if (ret) { 150 nv10_fence_destroy(drm); 151 return ret; 152 } 153 154 nouveau_bo_wr32(priv->bo, 0x000, 0x00000000); 155 return ret; 156 } 157