xref: /netbsd-src/sys/external/bsd/drm2/dist/drm/mga/mga_irq.c (revision 41ec02673d281bbb3d38e6c78504ce6e30c228c1)
1*41ec0267Sriastradh /*	$NetBSD: mga_irq.c,v 1.3 2021/12/18 23:45:32 riastradh Exp $	*/
2efa246c0Sriastradh 
3fcd0cb28Sriastradh /* mga_irq.c -- IRQ handling for radeon -*- linux-c -*-
4fcd0cb28Sriastradh  */
5fcd0cb28Sriastradh /*
6fcd0cb28Sriastradh  * Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
7fcd0cb28Sriastradh  *
8fcd0cb28Sriastradh  * The Weather Channel (TM) funded Tungsten Graphics to develop the
9fcd0cb28Sriastradh  * initial release of the Radeon 8500 driver under the XFree86 license.
10fcd0cb28Sriastradh  * This notice must be preserved.
11fcd0cb28Sriastradh  *
12fcd0cb28Sriastradh  * Permission is hereby granted, free of charge, to any person obtaining a
13fcd0cb28Sriastradh  * copy of this software and associated documentation files (the "Software"),
14fcd0cb28Sriastradh  * to deal in the Software without restriction, including without limitation
15fcd0cb28Sriastradh  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
16fcd0cb28Sriastradh  * and/or sell copies of the Software, and to permit persons to whom the
17fcd0cb28Sriastradh  * Software is furnished to do so, subject to the following conditions:
18fcd0cb28Sriastradh  *
19fcd0cb28Sriastradh  * The above copyright notice and this permission notice (including the next
20fcd0cb28Sriastradh  * paragraph) shall be included in all copies or substantial portions of the
21fcd0cb28Sriastradh  * Software.
22fcd0cb28Sriastradh  *
23fcd0cb28Sriastradh  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24fcd0cb28Sriastradh  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25fcd0cb28Sriastradh  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
26fcd0cb28Sriastradh  * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
27fcd0cb28Sriastradh  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
28fcd0cb28Sriastradh  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
29fcd0cb28Sriastradh  * DEALINGS IN THE SOFTWARE.
30fcd0cb28Sriastradh  *
31fcd0cb28Sriastradh  * Authors:
32fcd0cb28Sriastradh  *    Keith Whitwell <keith@tungstengraphics.com>
33fcd0cb28Sriastradh  *    Eric Anholt <anholt@FreeBSD.org>
34fcd0cb28Sriastradh  */
35fcd0cb28Sriastradh 
36efa246c0Sriastradh #include <sys/cdefs.h>
37*41ec0267Sriastradh __KERNEL_RCSID(0, "$NetBSD: mga_irq.c,v 1.3 2021/12/18 23:45:32 riastradh Exp $");
38efa246c0Sriastradh 
39fcd0cb28Sriastradh #include "mga_drv.h"
40fcd0cb28Sriastradh 
mga_get_vblank_counter(struct drm_device * dev,unsigned int pipe)41efa246c0Sriastradh u32 mga_get_vblank_counter(struct drm_device *dev, unsigned int pipe)
42fcd0cb28Sriastradh {
43fcd0cb28Sriastradh 	const drm_mga_private_t *const dev_priv =
44fcd0cb28Sriastradh 		(drm_mga_private_t *) dev->dev_private;
45fcd0cb28Sriastradh 
46efa246c0Sriastradh 	if (pipe != 0)
47fcd0cb28Sriastradh 		return 0;
48fcd0cb28Sriastradh 
49fcd0cb28Sriastradh 	return atomic_read(&dev_priv->vbl_received);
50fcd0cb28Sriastradh }
51fcd0cb28Sriastradh 
52fcd0cb28Sriastradh 
mga_driver_irq_handler(int irq,void * arg)539d20d926Sriastradh irqreturn_t mga_driver_irq_handler(int irq, void *arg)
54fcd0cb28Sriastradh {
55fcd0cb28Sriastradh 	struct drm_device *dev = (struct drm_device *) arg;
56fcd0cb28Sriastradh 	drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
57fcd0cb28Sriastradh 	int status;
58fcd0cb28Sriastradh 	int handled = 0;
59fcd0cb28Sriastradh 
60fcd0cb28Sriastradh 	status = MGA_READ(MGA_STATUS);
61fcd0cb28Sriastradh 
62fcd0cb28Sriastradh 	/* VBLANK interrupt */
63fcd0cb28Sriastradh 	if (status & MGA_VLINEPEN) {
64fcd0cb28Sriastradh 		MGA_WRITE(MGA_ICLEAR, MGA_VLINEICLR);
65fcd0cb28Sriastradh 		atomic_inc(&dev_priv->vbl_received);
66fcd0cb28Sriastradh 		drm_handle_vblank(dev, 0);
67fcd0cb28Sriastradh 		handled = 1;
68fcd0cb28Sriastradh 	}
69fcd0cb28Sriastradh 
70fcd0cb28Sriastradh 	/* SOFTRAP interrupt */
71fcd0cb28Sriastradh 	if (status & MGA_SOFTRAPEN) {
72fcd0cb28Sriastradh 		const u32 prim_start = MGA_READ(MGA_PRIMADDRESS);
73fcd0cb28Sriastradh 		const u32 prim_end = MGA_READ(MGA_PRIMEND);
74fcd0cb28Sriastradh 
75fcd0cb28Sriastradh 
76fcd0cb28Sriastradh 		MGA_WRITE(MGA_ICLEAR, MGA_SOFTRAPICLR);
77fcd0cb28Sriastradh 
78fcd0cb28Sriastradh 		/* In addition to clearing the interrupt-pending bit, we
79fcd0cb28Sriastradh 		 * have to write to MGA_PRIMEND to re-start the DMA operation.
80fcd0cb28Sriastradh 		 */
81fcd0cb28Sriastradh 		if ((prim_start & ~0x03) != (prim_end & ~0x03))
82fcd0cb28Sriastradh 			MGA_WRITE(MGA_PRIMEND, prim_end);
83fcd0cb28Sriastradh 
84fcd0cb28Sriastradh 		atomic_inc(&dev_priv->last_fence_retired);
859d20d926Sriastradh 		wake_up(&dev_priv->fence_queue);
86fcd0cb28Sriastradh 		handled = 1;
87fcd0cb28Sriastradh 	}
88fcd0cb28Sriastradh 
89fcd0cb28Sriastradh 	if (handled)
90fcd0cb28Sriastradh 		return IRQ_HANDLED;
91fcd0cb28Sriastradh 	return IRQ_NONE;
92fcd0cb28Sriastradh }
93fcd0cb28Sriastradh 
mga_enable_vblank(struct drm_device * dev,unsigned int pipe)94efa246c0Sriastradh int mga_enable_vblank(struct drm_device *dev, unsigned int pipe)
95fcd0cb28Sriastradh {
96fcd0cb28Sriastradh 	drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
97fcd0cb28Sriastradh 
98efa246c0Sriastradh 	if (pipe != 0) {
99efa246c0Sriastradh 		DRM_ERROR("tried to enable vblank on non-existent crtc %u\n",
100efa246c0Sriastradh 			  pipe);
101fcd0cb28Sriastradh 		return 0;
102fcd0cb28Sriastradh 	}
103fcd0cb28Sriastradh 
104fcd0cb28Sriastradh 	MGA_WRITE(MGA_IEN, MGA_VLINEIEN | MGA_SOFTRAPEN);
105fcd0cb28Sriastradh 	return 0;
106fcd0cb28Sriastradh }
107fcd0cb28Sriastradh 
108fcd0cb28Sriastradh 
mga_disable_vblank(struct drm_device * dev,unsigned int pipe)109efa246c0Sriastradh void mga_disable_vblank(struct drm_device *dev, unsigned int pipe)
110fcd0cb28Sriastradh {
111efa246c0Sriastradh 	if (pipe != 0) {
112efa246c0Sriastradh 		DRM_ERROR("tried to disable vblank on non-existent crtc %u\n",
113efa246c0Sriastradh 			  pipe);
114fcd0cb28Sriastradh 	}
115fcd0cb28Sriastradh 
116fcd0cb28Sriastradh 	/* Do *NOT* disable the vertical refresh interrupt.  MGA doesn't have
117fcd0cb28Sriastradh 	 * a nice hardware counter that tracks the number of refreshes when
118fcd0cb28Sriastradh 	 * the interrupt is disabled, and the kernel doesn't know the refresh
119fcd0cb28Sriastradh 	 * rate to calculate an estimate.
120fcd0cb28Sriastradh 	 */
121fcd0cb28Sriastradh 	/* MGA_WRITE(MGA_IEN, MGA_VLINEIEN | MGA_SOFTRAPEN); */
122fcd0cb28Sriastradh }
123fcd0cb28Sriastradh 
mga_driver_fence_wait(struct drm_device * dev,unsigned int * sequence)124*41ec0267Sriastradh void mga_driver_fence_wait(struct drm_device *dev, unsigned int *sequence)
125fcd0cb28Sriastradh {
126fcd0cb28Sriastradh 	drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
127fcd0cb28Sriastradh 	unsigned int cur_fence;
128fcd0cb28Sriastradh 
129fcd0cb28Sriastradh 	/* Assume that the user has missed the current sequence number
130fcd0cb28Sriastradh 	 * by about a day rather than she wants to wait for years
131fcd0cb28Sriastradh 	 * using fences.
132fcd0cb28Sriastradh 	 */
133*41ec0267Sriastradh 	wait_event_timeout(dev_priv->fence_queue,
134fcd0cb28Sriastradh 		    (((cur_fence = atomic_read(&dev_priv->last_fence_retired))
135*41ec0267Sriastradh 		      - *sequence) <= (1 << 23)),
136*41ec0267Sriastradh 		    msecs_to_jiffies(3000));
137fcd0cb28Sriastradh 
138fcd0cb28Sriastradh 	*sequence = cur_fence;
139fcd0cb28Sriastradh }
140fcd0cb28Sriastradh 
mga_driver_irq_preinstall(struct drm_device * dev)141fcd0cb28Sriastradh void mga_driver_irq_preinstall(struct drm_device *dev)
142fcd0cb28Sriastradh {
143fcd0cb28Sriastradh 	drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
144fcd0cb28Sriastradh 
145fcd0cb28Sriastradh 	/* Disable *all* interrupts */
146fcd0cb28Sriastradh 	MGA_WRITE(MGA_IEN, 0);
147fcd0cb28Sriastradh 	/* Clear bits if they're already high */
148fcd0cb28Sriastradh 	MGA_WRITE(MGA_ICLEAR, ~0);
149fcd0cb28Sriastradh }
150fcd0cb28Sriastradh 
mga_driver_irq_postinstall(struct drm_device * dev)151fcd0cb28Sriastradh int mga_driver_irq_postinstall(struct drm_device *dev)
152fcd0cb28Sriastradh {
153fcd0cb28Sriastradh 	drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
154fcd0cb28Sriastradh 
1559d20d926Sriastradh 	init_waitqueue_head(&dev_priv->fence_queue);
156fcd0cb28Sriastradh 
157fcd0cb28Sriastradh 	/* Turn on soft trap interrupt.  Vertical blank interrupts are enabled
158fcd0cb28Sriastradh 	 * in mga_enable_vblank.
159fcd0cb28Sriastradh 	 */
160fcd0cb28Sriastradh 	MGA_WRITE(MGA_IEN, MGA_SOFTRAPEN);
161fcd0cb28Sriastradh 	return 0;
162fcd0cb28Sriastradh }
163fcd0cb28Sriastradh 
mga_driver_irq_uninstall(struct drm_device * dev)164fcd0cb28Sriastradh void mga_driver_irq_uninstall(struct drm_device *dev)
165fcd0cb28Sriastradh {
166fcd0cb28Sriastradh 	drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
167fcd0cb28Sriastradh 	if (!dev_priv)
168fcd0cb28Sriastradh 		return;
169fcd0cb28Sriastradh 
170fcd0cb28Sriastradh 	/* Disable *all* interrupts */
171fcd0cb28Sriastradh 	MGA_WRITE(MGA_IEN, 0);
172fcd0cb28Sriastradh 
1739d20d926Sriastradh 	dev->irq_enabled = false;
174fcd0cb28Sriastradh }
175