1 /* $NetBSD: drm_dp_helper.c,v 1.12 2020/02/14 14:34:57 maya Exp $ */ 2 3 /* 4 * Copyright © 2009 Keith Packard 5 * 6 * Permission to use, copy, modify, distribute, and sell this software and its 7 * documentation for any purpose is hereby granted without fee, provided that 8 * the above copyright notice appear in all copies and that both that copyright 9 * notice and this permission notice appear in supporting documentation, and 10 * that the name of the copyright holders not be used in advertising or 11 * publicity pertaining to distribution of the software without specific, 12 * written prior permission. The copyright holders make no representations 13 * about the suitability of this software for any purpose. It is provided "as 14 * is" without express or implied warranty. 15 * 16 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, 17 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO 18 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR 19 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, 20 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 21 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE 22 * OF THIS SOFTWARE. 23 */ 24 25 #include <sys/cdefs.h> 26 __KERNEL_RCSID(0, "$NetBSD: drm_dp_helper.c,v 1.12 2020/02/14 14:34:57 maya Exp $"); 27 28 #include <linux/kernel.h> 29 #include <linux/module.h> 30 #include <linux/delay.h> 31 #include <linux/init.h> 32 #include <linux/errno.h> 33 #include <linux/sched.h> 34 #include <linux/i2c.h> 35 #include <drm/drm_dp_helper.h> 36 #include <drm/drmP.h> 37 38 #include <linux/nbsd-namespace.h> 39 40 /** 41 * DOC: dp helpers 42 * 43 * These functions contain some common logic and helpers at various abstraction 44 * levels to deal with Display Port sink devices and related things like DP aux 45 * channel transfers, EDID reading over DP aux channels, decoding certain DPCD 46 * blocks, ... 47 */ 48 49 /* Helpers for DP link training */ 50 static u8 dp_link_status(const u8 link_status[DP_LINK_STATUS_SIZE], int r) 51 { 52 return link_status[r - DP_LANE0_1_STATUS]; 53 } 54 55 static u8 dp_get_lane_status(const u8 link_status[DP_LINK_STATUS_SIZE], 56 int lane) 57 { 58 int i = DP_LANE0_1_STATUS + (lane >> 1); 59 int s = (lane & 1) * 4; 60 u8 l = dp_link_status(link_status, i); 61 return (l >> s) & 0xf; 62 } 63 64 bool drm_dp_channel_eq_ok(const u8 link_status[DP_LINK_STATUS_SIZE], 65 int lane_count) 66 { 67 u8 lane_align; 68 u8 lane_status; 69 int lane; 70 71 lane_align = dp_link_status(link_status, 72 DP_LANE_ALIGN_STATUS_UPDATED); 73 if ((lane_align & DP_INTERLANE_ALIGN_DONE) == 0) 74 return false; 75 for (lane = 0; lane < lane_count; lane++) { 76 lane_status = dp_get_lane_status(link_status, lane); 77 if ((lane_status & DP_CHANNEL_EQ_BITS) != DP_CHANNEL_EQ_BITS) 78 return false; 79 } 80 return true; 81 } 82 EXPORT_SYMBOL(drm_dp_channel_eq_ok); 83 84 bool drm_dp_clock_recovery_ok(const u8 link_status[DP_LINK_STATUS_SIZE], 85 int lane_count) 86 { 87 int lane; 88 u8 lane_status; 89 90 for (lane = 0; lane < lane_count; lane++) { 91 lane_status = dp_get_lane_status(link_status, lane); 92 if ((lane_status & DP_LANE_CR_DONE) == 0) 93 return false; 94 } 95 return true; 96 } 97 EXPORT_SYMBOL(drm_dp_clock_recovery_ok); 98 99 u8 drm_dp_get_adjust_request_voltage(const u8 link_status[DP_LINK_STATUS_SIZE], 100 int lane) 101 { 102 int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1); 103 int s = ((lane & 1) ? 104 DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT : 105 DP_ADJUST_VOLTAGE_SWING_LANE0_SHIFT); 106 u8 l = dp_link_status(link_status, i); 107 108 return ((l >> s) & 0x3) << DP_TRAIN_VOLTAGE_SWING_SHIFT; 109 } 110 EXPORT_SYMBOL(drm_dp_get_adjust_request_voltage); 111 112 u8 drm_dp_get_adjust_request_pre_emphasis(const u8 link_status[DP_LINK_STATUS_SIZE], 113 int lane) 114 { 115 int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1); 116 int s = ((lane & 1) ? 117 DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT : 118 DP_ADJUST_PRE_EMPHASIS_LANE0_SHIFT); 119 u8 l = dp_link_status(link_status, i); 120 121 return ((l >> s) & 0x3) << DP_TRAIN_PRE_EMPHASIS_SHIFT; 122 } 123 EXPORT_SYMBOL(drm_dp_get_adjust_request_pre_emphasis); 124 125 void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) { 126 if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0) 127 udelay(100); 128 else 129 mdelay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] * 4); 130 } 131 EXPORT_SYMBOL(drm_dp_link_train_clock_recovery_delay); 132 133 void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) { 134 if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0) 135 udelay(400); 136 else 137 mdelay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] * 4); 138 } 139 EXPORT_SYMBOL(drm_dp_link_train_channel_eq_delay); 140 141 u8 drm_dp_link_rate_to_bw_code(int link_rate) 142 { 143 switch (link_rate) { 144 case 162000: 145 default: 146 return DP_LINK_BW_1_62; 147 case 270000: 148 return DP_LINK_BW_2_7; 149 case 540000: 150 return DP_LINK_BW_5_4; 151 } 152 } 153 EXPORT_SYMBOL(drm_dp_link_rate_to_bw_code); 154 155 int drm_dp_bw_code_to_link_rate(u8 link_bw) 156 { 157 switch (link_bw) { 158 case DP_LINK_BW_1_62: 159 default: 160 return 162000; 161 case DP_LINK_BW_2_7: 162 return 270000; 163 case DP_LINK_BW_5_4: 164 return 540000; 165 } 166 } 167 EXPORT_SYMBOL(drm_dp_bw_code_to_link_rate); 168 169 #define AUX_RETRY_INTERVAL 500 /* us */ 170 171 /** 172 * DOC: dp helpers 173 * 174 * The DisplayPort AUX channel is an abstraction to allow generic, driver- 175 * independent access to AUX functionality. Drivers can take advantage of 176 * this by filling in the fields of the drm_dp_aux structure. 177 * 178 * Transactions are described using a hardware-independent drm_dp_aux_msg 179 * structure, which is passed into a driver's .transfer() implementation. 180 * Both native and I2C-over-AUX transactions are supported. 181 */ 182 183 static int drm_dp_dpcd_access(struct drm_dp_aux *aux, u8 request, 184 unsigned int offset, void *buffer, size_t size) 185 { 186 struct drm_dp_aux_msg msg; 187 unsigned int retry; 188 int err = 0; 189 190 memset(&msg, 0, sizeof(msg)); 191 msg.address = offset; 192 msg.request = request; 193 msg.buffer = buffer; 194 msg.size = size; 195 196 mutex_lock(&aux->hw_mutex); 197 198 /* 199 * The specification doesn't give any recommendation on how often to 200 * retry native transactions. We used to retry 7 times like for 201 * aux i2c transactions but real world devices this wasn't 202 * sufficient, bump to 32 which makes Dell 4k monitors happier. 203 */ 204 for (retry = 0; retry < 32; retry++) { 205 206 err = aux->transfer(aux, &msg); 207 if (err < 0) { 208 if (err == -EBUSY) 209 continue; 210 211 goto unlock; 212 } 213 214 215 switch (msg.reply & DP_AUX_NATIVE_REPLY_MASK) { 216 case DP_AUX_NATIVE_REPLY_ACK: 217 if (err < size) 218 err = -EPROTO; 219 goto unlock; 220 221 case DP_AUX_NATIVE_REPLY_NACK: 222 err = -EIO; 223 goto unlock; 224 225 case DP_AUX_NATIVE_REPLY_DEFER: 226 usleep_range(AUX_RETRY_INTERVAL, AUX_RETRY_INTERVAL + 100); 227 break; 228 } 229 } 230 231 DRM_DEBUG_KMS("too many retries, giving up\n"); 232 err = -EIO; 233 234 unlock: 235 mutex_unlock(&aux->hw_mutex); 236 return err; 237 } 238 239 /** 240 * drm_dp_dpcd_read() - read a series of bytes from the DPCD 241 * @aux: DisplayPort AUX channel 242 * @offset: address of the (first) register to read 243 * @buffer: buffer to store the register values 244 * @size: number of bytes in @buffer 245 * 246 * Returns the number of bytes transferred on success, or a negative error 247 * code on failure. -EIO is returned if the request was NAKed by the sink or 248 * if the retry count was exceeded. If not all bytes were transferred, this 249 * function returns -EPROTO. Errors from the underlying AUX channel transfer 250 * function, with the exception of -EBUSY (which causes the transaction to 251 * be retried), are propagated to the caller. 252 */ 253 ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset, 254 void *buffer, size_t size) 255 { 256 return drm_dp_dpcd_access(aux, DP_AUX_NATIVE_READ, offset, buffer, 257 size); 258 } 259 EXPORT_SYMBOL(drm_dp_dpcd_read); 260 261 /** 262 * drm_dp_dpcd_write() - write a series of bytes to the DPCD 263 * @aux: DisplayPort AUX channel 264 * @offset: address of the (first) register to write 265 * @buffer: buffer containing the values to write 266 * @size: number of bytes in @buffer 267 * 268 * Returns the number of bytes transferred on success, or a negative error 269 * code on failure. -EIO is returned if the request was NAKed by the sink or 270 * if the retry count was exceeded. If not all bytes were transferred, this 271 * function returns -EPROTO. Errors from the underlying AUX channel transfer 272 * function, with the exception of -EBUSY (which causes the transaction to 273 * be retried), are propagated to the caller. 274 */ 275 ssize_t drm_dp_dpcd_write(struct drm_dp_aux *aux, unsigned int offset, 276 void *buffer, size_t size) 277 { 278 return drm_dp_dpcd_access(aux, DP_AUX_NATIVE_WRITE, offset, buffer, 279 size); 280 } 281 EXPORT_SYMBOL(drm_dp_dpcd_write); 282 283 /** 284 * drm_dp_dpcd_read_link_status() - read DPCD link status (bytes 0x202-0x207) 285 * @aux: DisplayPort AUX channel 286 * @status: buffer to store the link status in (must be at least 6 bytes) 287 * 288 * Returns the number of bytes transferred on success or a negative error 289 * code on failure. 290 */ 291 int drm_dp_dpcd_read_link_status(struct drm_dp_aux *aux, 292 u8 status[DP_LINK_STATUS_SIZE]) 293 { 294 return drm_dp_dpcd_read(aux, DP_LANE0_1_STATUS, status, 295 DP_LINK_STATUS_SIZE); 296 } 297 EXPORT_SYMBOL(drm_dp_dpcd_read_link_status); 298 299 /** 300 * drm_dp_link_probe() - probe a DisplayPort link for capabilities 301 * @aux: DisplayPort AUX channel 302 * @link: pointer to structure in which to return link capabilities 303 * 304 * The structure filled in by this function can usually be passed directly 305 * into drm_dp_link_power_up() and drm_dp_link_configure() to power up and 306 * configure the link based on the link's capabilities. 307 * 308 * Returns 0 on success or a negative error code on failure. 309 */ 310 int drm_dp_link_probe(struct drm_dp_aux *aux, struct drm_dp_link *link) 311 { 312 u8 values[3]; 313 int err; 314 315 memset(link, 0, sizeof(*link)); 316 317 err = drm_dp_dpcd_read(aux, DP_DPCD_REV, values, sizeof(values)); 318 if (err < 0) 319 return err; 320 321 link->revision = values[0]; 322 link->rate = drm_dp_bw_code_to_link_rate(values[1]); 323 link->num_lanes = values[2] & DP_MAX_LANE_COUNT_MASK; 324 325 if (values[2] & DP_ENHANCED_FRAME_CAP) 326 link->capabilities |= DP_LINK_CAP_ENHANCED_FRAMING; 327 328 return 0; 329 } 330 EXPORT_SYMBOL(drm_dp_link_probe); 331 332 /** 333 * drm_dp_link_power_up() - power up a DisplayPort link 334 * @aux: DisplayPort AUX channel 335 * @link: pointer to a structure containing the link configuration 336 * 337 * Returns 0 on success or a negative error code on failure. 338 */ 339 int drm_dp_link_power_up(struct drm_dp_aux *aux, struct drm_dp_link *link) 340 { 341 u8 value; 342 int err; 343 344 /* DP_SET_POWER register is only available on DPCD v1.1 and later */ 345 if (link->revision < 0x11) 346 return 0; 347 348 err = drm_dp_dpcd_readb(aux, DP_SET_POWER, &value); 349 if (err < 0) 350 return err; 351 352 value &= ~DP_SET_POWER_MASK; 353 value |= DP_SET_POWER_D0; 354 355 err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value); 356 if (err < 0) 357 return err; 358 359 /* 360 * According to the DP 1.1 specification, a "Sink Device must exit the 361 * power saving state within 1 ms" (Section 2.5.3.1, Table 5-52, "Sink 362 * Control Field" (register 0x600). 363 */ 364 usleep_range(1000, 2000); 365 366 return 0; 367 } 368 EXPORT_SYMBOL(drm_dp_link_power_up); 369 370 /** 371 * drm_dp_link_power_down() - power down a DisplayPort link 372 * @aux: DisplayPort AUX channel 373 * @link: pointer to a structure containing the link configuration 374 * 375 * Returns 0 on success or a negative error code on failure. 376 */ 377 int drm_dp_link_power_down(struct drm_dp_aux *aux, struct drm_dp_link *link) 378 { 379 u8 value; 380 int err; 381 382 /* DP_SET_POWER register is only available on DPCD v1.1 and later */ 383 if (link->revision < 0x11) 384 return 0; 385 386 err = drm_dp_dpcd_readb(aux, DP_SET_POWER, &value); 387 if (err < 0) 388 return err; 389 390 value &= ~DP_SET_POWER_MASK; 391 value |= DP_SET_POWER_D3; 392 393 err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value); 394 if (err < 0) 395 return err; 396 397 return 0; 398 } 399 EXPORT_SYMBOL(drm_dp_link_power_down); 400 401 /** 402 * drm_dp_link_configure() - configure a DisplayPort link 403 * @aux: DisplayPort AUX channel 404 * @link: pointer to a structure containing the link configuration 405 * 406 * Returns 0 on success or a negative error code on failure. 407 */ 408 int drm_dp_link_configure(struct drm_dp_aux *aux, struct drm_dp_link *link) 409 { 410 u8 values[2]; 411 int err; 412 413 values[0] = drm_dp_link_rate_to_bw_code(link->rate); 414 values[1] = link->num_lanes; 415 416 if (link->capabilities & DP_LINK_CAP_ENHANCED_FRAMING) 417 values[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN; 418 419 err = drm_dp_dpcd_write(aux, DP_LINK_BW_SET, values, sizeof(values)); 420 if (err < 0) 421 return err; 422 423 return 0; 424 } 425 EXPORT_SYMBOL(drm_dp_link_configure); 426 427 /* 428 * I2C-over-AUX implementation 429 */ 430 431 static u32 drm_dp_i2c_functionality(struct i2c_adapter *adapter) 432 { 433 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | 434 I2C_FUNC_SMBUS_READ_BLOCK_DATA | 435 I2C_FUNC_SMBUS_BLOCK_PROC_CALL | 436 I2C_FUNC_10BIT_ADDR; 437 } 438 439 static void drm_dp_i2c_msg_write_status_update(struct drm_dp_aux_msg *msg) 440 { 441 /* 442 * In case of i2c defer or short i2c ack reply to a write, 443 * we need to switch to WRITE_STATUS_UPDATE to drain the 444 * rest of the message 445 */ 446 if ((msg->request & ~DP_AUX_I2C_MOT) == DP_AUX_I2C_WRITE) { 447 msg->request &= DP_AUX_I2C_MOT; 448 msg->request |= DP_AUX_I2C_WRITE_STATUS_UPDATE; 449 } 450 } 451 452 #define AUX_PRECHARGE_LEN 10 /* 10 to 16 */ 453 #define AUX_SYNC_LEN (16 + 4) /* preamble + AUX_SYNC_END */ 454 #define AUX_STOP_LEN 4 455 #define AUX_CMD_LEN 4 456 #define AUX_ADDRESS_LEN 20 457 #define AUX_REPLY_PAD_LEN 4 458 #define AUX_LENGTH_LEN 8 459 460 /* 461 * Calculate the duration of the AUX request/reply in usec. Gives the 462 * "best" case estimate, ie. successful while as short as possible. 463 */ 464 static int drm_dp_aux_req_duration(const struct drm_dp_aux_msg *msg) 465 { 466 int len = AUX_PRECHARGE_LEN + AUX_SYNC_LEN + AUX_STOP_LEN + 467 AUX_CMD_LEN + AUX_ADDRESS_LEN + AUX_LENGTH_LEN; 468 469 if ((msg->request & DP_AUX_I2C_READ) == 0) 470 len += msg->size * 8; 471 472 return len; 473 } 474 475 static int drm_dp_aux_reply_duration(const struct drm_dp_aux_msg *msg) 476 { 477 int len = AUX_PRECHARGE_LEN + AUX_SYNC_LEN + AUX_STOP_LEN + 478 AUX_CMD_LEN + AUX_REPLY_PAD_LEN; 479 480 /* 481 * For read we expect what was asked. For writes there will 482 * be 0 or 1 data bytes. Assume 0 for the "best" case. 483 */ 484 if (msg->request & DP_AUX_I2C_READ) 485 len += msg->size * 8; 486 487 return len; 488 } 489 490 #define I2C_START_LEN 1 491 #define I2C_STOP_LEN 1 492 #define I2C_ADDR_LEN 9 /* ADDRESS + R/W + ACK/NACK */ 493 #define I2C_DATA_LEN 9 /* DATA + ACK/NACK */ 494 495 /* 496 * Calculate the length of the i2c transfer in usec, assuming 497 * the i2c bus speed is as specified. Gives the the "worst" 498 * case estimate, ie. successful while as long as possible. 499 * Doesn't account the the "MOT" bit, and instead assumes each 500 * message includes a START, ADDRESS and STOP. Neither does it 501 * account for additional random variables such as clock stretching. 502 */ 503 static int drm_dp_i2c_msg_duration(const struct drm_dp_aux_msg *msg, 504 int i2c_speed_khz) 505 { 506 /* AUX bitrate is 1MHz, i2c bitrate as specified */ 507 return DIV_ROUND_UP((I2C_START_LEN + I2C_ADDR_LEN + 508 msg->size * I2C_DATA_LEN + 509 I2C_STOP_LEN) * 1000, i2c_speed_khz); 510 } 511 512 /* 513 * Deterine how many retries should be attempted to successfully transfer 514 * the specified message, based on the estimated durations of the 515 * i2c and AUX transfers. 516 */ 517 static int drm_dp_i2c_retry_count(const struct drm_dp_aux_msg *msg, 518 int i2c_speed_khz) 519 { 520 int aux_time_us = drm_dp_aux_req_duration(msg) + 521 drm_dp_aux_reply_duration(msg); 522 int i2c_time_us = drm_dp_i2c_msg_duration(msg, i2c_speed_khz); 523 524 return DIV_ROUND_UP(i2c_time_us, aux_time_us + AUX_RETRY_INTERVAL); 525 } 526 527 /* 528 * FIXME currently assumes 10 kHz as some real world devices seem 529 * to require it. We should query/set the speed via DPCD if supported. 530 */ 531 static int dp_aux_i2c_speed_khz __read_mostly = 10; 532 module_param_unsafe(dp_aux_i2c_speed_khz, int, 0644); 533 MODULE_PARM_DESC(dp_aux_i2c_speed_khz, 534 "Assumed speed of the i2c bus in kHz, (1-400, default 10)"); 535 536 /* 537 * Transfer a single I2C-over-AUX message and handle various error conditions, 538 * retrying the transaction as appropriate. It is assumed that the 539 * aux->transfer function does not modify anything in the msg other than the 540 * reply field. 541 * 542 * Returns bytes transferred on success, or a negative error code on failure. 543 */ 544 static int drm_dp_i2c_do_msg(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg) 545 { 546 unsigned int retry, defer_i2c; 547 int ret; 548 /* 549 * DP1.2 sections 2.7.7.1.5.6.1 and 2.7.7.1.6.6.1: A DP Source device 550 * is required to retry at least seven times upon receiving AUX_DEFER 551 * before giving up the AUX transaction. 552 * 553 * We also try to account for the i2c bus speed. 554 */ 555 int max_retries = max(7, drm_dp_i2c_retry_count(msg, dp_aux_i2c_speed_khz)); 556 557 for (retry = 0, defer_i2c = 0; retry < (max_retries + defer_i2c); retry++) { 558 ret = aux->transfer(aux, msg); 559 if (ret < 0) { 560 if (ret == -EBUSY) 561 continue; 562 563 DRM_DEBUG_KMS("transaction failed: %d\n", ret); 564 return ret; 565 } 566 567 568 switch (msg->reply & DP_AUX_NATIVE_REPLY_MASK) { 569 case DP_AUX_NATIVE_REPLY_ACK: 570 /* 571 * For I2C-over-AUX transactions this isn't enough, we 572 * need to check for the I2C ACK reply. 573 */ 574 break; 575 576 case DP_AUX_NATIVE_REPLY_NACK: 577 DRM_DEBUG_KMS("native nack (result=%d, size=%zu)\n", ret, msg->size); 578 return -EREMOTEIO; 579 580 case DP_AUX_NATIVE_REPLY_DEFER: 581 DRM_DEBUG_KMS("native defer\n"); 582 /* 583 * We could check for I2C bit rate capabilities and if 584 * available adjust this interval. We could also be 585 * more careful with DP-to-legacy adapters where a 586 * long legacy cable may force very low I2C bit rates. 587 * 588 * For now just defer for long enough to hopefully be 589 * safe for all use-cases. 590 */ 591 usleep_range(AUX_RETRY_INTERVAL, AUX_RETRY_INTERVAL + 100); 592 continue; 593 594 default: 595 DRM_ERROR("invalid native reply %#04x\n", msg->reply); 596 return -EREMOTEIO; 597 } 598 599 switch (msg->reply & DP_AUX_I2C_REPLY_MASK) { 600 case DP_AUX_I2C_REPLY_ACK: 601 /* 602 * Both native ACK and I2C ACK replies received. We 603 * can assume the transfer was successful. 604 */ 605 if (ret != msg->size) 606 drm_dp_i2c_msg_write_status_update(msg); 607 return ret; 608 609 case DP_AUX_I2C_REPLY_NACK: 610 DRM_DEBUG_KMS("I2C nack (result=%d, size=%zu\n", ret, msg->size); 611 aux->i2c_nack_count++; 612 return -EREMOTEIO; 613 614 case DP_AUX_I2C_REPLY_DEFER: 615 DRM_DEBUG_KMS("I2C defer\n"); 616 /* DP Compliance Test 4.2.2.5 Requirement: 617 * Must have at least 7 retries for I2C defers on the 618 * transaction to pass this test 619 */ 620 aux->i2c_defer_count++; 621 if (defer_i2c < 7) 622 defer_i2c++; 623 usleep_range(AUX_RETRY_INTERVAL, AUX_RETRY_INTERVAL + 100); 624 drm_dp_i2c_msg_write_status_update(msg); 625 626 continue; 627 628 default: 629 DRM_ERROR("invalid I2C reply %#04x\n", msg->reply); 630 return -EREMOTEIO; 631 } 632 } 633 634 DRM_DEBUG_KMS("too many retries, giving up\n"); 635 return -EREMOTEIO; 636 } 637 638 static void drm_dp_i2c_msg_set_request(struct drm_dp_aux_msg *msg, 639 const struct i2c_msg *i2c_msg) 640 { 641 msg->request = (i2c_msg->flags & I2C_M_RD) ? 642 DP_AUX_I2C_READ : DP_AUX_I2C_WRITE; 643 msg->request |= DP_AUX_I2C_MOT; 644 } 645 646 /* 647 * Keep retrying drm_dp_i2c_do_msg until all data has been transferred. 648 * 649 * Returns an error code on failure, or a recommended transfer size on success. 650 */ 651 static int drm_dp_i2c_drain_msg(struct drm_dp_aux *aux, struct drm_dp_aux_msg *orig_msg) 652 { 653 int err, ret = orig_msg->size; 654 struct drm_dp_aux_msg msg = *orig_msg; 655 656 while (msg.size > 0) { 657 err = drm_dp_i2c_do_msg(aux, &msg); 658 if (err <= 0) 659 return err == 0 ? -EPROTO : err; 660 661 if (err < msg.size && err < ret) { 662 DRM_DEBUG_KMS("Partial I2C reply: requested %zu bytes got %d bytes\n", 663 msg.size, err); 664 ret = err; 665 } 666 667 msg.size -= err; 668 msg.buffer += err; 669 } 670 671 return ret; 672 } 673 674 /* 675 * Bizlink designed DP->DVI-D Dual Link adapters require the I2C over AUX 676 * packets to be as large as possible. If not, the I2C transactions never 677 * succeed. Hence the default is maximum. 678 */ 679 static int dp_aux_i2c_transfer_size __read_mostly = DP_AUX_MAX_PAYLOAD_BYTES; 680 module_param_unsafe(dp_aux_i2c_transfer_size, int, 0644); 681 MODULE_PARM_DESC(dp_aux_i2c_transfer_size, 682 "Number of bytes to transfer in a single I2C over DP AUX CH message, (1-16, default 16)"); 683 684 static int drm_dp_i2c_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs, 685 int num) 686 { 687 struct drm_dp_aux *aux = adapter->algo_data; 688 unsigned int i, j; 689 unsigned transfer_size; 690 struct drm_dp_aux_msg msg; 691 int err = 0; 692 693 dp_aux_i2c_transfer_size = clamp(dp_aux_i2c_transfer_size, 1, DP_AUX_MAX_PAYLOAD_BYTES); 694 695 memset(&msg, 0, sizeof(msg)); 696 697 mutex_lock(&aux->hw_mutex); 698 699 for (i = 0; i < num; i++) { 700 msg.address = msgs[i].addr; 701 drm_dp_i2c_msg_set_request(&msg, &msgs[i]); 702 /* Send a bare address packet to start the transaction. 703 * Zero sized messages specify an address only (bare 704 * address) transaction. 705 */ 706 msg.buffer = NULL; 707 msg.size = 0; 708 err = drm_dp_i2c_do_msg(aux, &msg); 709 710 /* 711 * Reset msg.request in case in case it got 712 * changed into a WRITE_STATUS_UPDATE. 713 */ 714 drm_dp_i2c_msg_set_request(&msg, &msgs[i]); 715 716 if (err < 0) 717 break; 718 /* We want each transaction to be as large as possible, but 719 * we'll go to smaller sizes if the hardware gives us a 720 * short reply. 721 */ 722 transfer_size = dp_aux_i2c_transfer_size; 723 for (j = 0; j < msgs[i].len; j += msg.size) { 724 msg.buffer = msgs[i].buf + j; 725 msg.size = min(transfer_size, msgs[i].len - j); 726 727 err = drm_dp_i2c_drain_msg(aux, &msg); 728 729 /* 730 * Reset msg.request in case in case it got 731 * changed into a WRITE_STATUS_UPDATE. 732 */ 733 drm_dp_i2c_msg_set_request(&msg, &msgs[i]); 734 735 if (err < 0) 736 break; 737 transfer_size = err; 738 } 739 if (err < 0) 740 break; 741 } 742 if (err >= 0) 743 err = num; 744 /* Send a bare address packet to close out the transaction. 745 * Zero sized messages specify an address only (bare 746 * address) transaction. 747 */ 748 msg.request &= ~DP_AUX_I2C_MOT; 749 msg.buffer = NULL; 750 msg.size = 0; 751 (void)drm_dp_i2c_do_msg(aux, &msg); 752 753 mutex_unlock(&aux->hw_mutex); 754 755 return err; 756 } 757 758 static const struct i2c_algorithm drm_dp_i2c_algo = { 759 .functionality = drm_dp_i2c_functionality, 760 .master_xfer = drm_dp_i2c_xfer, 761 }; 762 763 /** 764 * drm_dp_aux_register() - initialise and register aux channel 765 * @aux: DisplayPort AUX channel 766 * 767 * Returns 0 on success or a negative error code on failure. 768 */ 769 int drm_dp_aux_register(struct drm_dp_aux *aux) 770 { 771 mutex_init(&aux->hw_mutex); 772 773 aux->ddc.algo = &drm_dp_i2c_algo; 774 aux->ddc.algo_data = aux; 775 aux->ddc.retries = 3; 776 777 aux->ddc.class = I2C_CLASS_DDC; 778 aux->ddc.owner = THIS_MODULE; 779 aux->ddc.dev.parent = aux->dev; 780 #ifndef __NetBSD__ 781 aux->ddc.dev.of_node = aux->dev->of_node; 782 #endif 783 784 strlcpy(aux->ddc.name, aux->name ? aux->name : dev_name(aux->dev), 785 sizeof(aux->ddc.name)); 786 787 return i2c_add_adapter(&aux->ddc); 788 } 789 EXPORT_SYMBOL(drm_dp_aux_register); 790 791 /** 792 * drm_dp_aux_unregister() - unregister an AUX adapter 793 * @aux: DisplayPort AUX channel 794 */ 795 void drm_dp_aux_unregister(struct drm_dp_aux *aux) 796 { 797 i2c_del_adapter(&aux->ddc); 798 mutex_destroy(&aux->hw_mutex); 799 } 800 EXPORT_SYMBOL(drm_dp_aux_unregister); 801