xref: /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/atom.h (revision 2b73d18af7a98bc9907041875c671f63165f1d3e)
1*2b73d18aSriastradh /*	$NetBSD: atom.h,v 1.4 2021/12/19 12:21:29 riastradh Exp $	*/
2efa246c0Sriastradh 
3efa246c0Sriastradh /*
4efa246c0Sriastradh  * Copyright 2008 Advanced Micro Devices, Inc.
5efa246c0Sriastradh  *
6efa246c0Sriastradh  * Permission is hereby granted, free of charge, to any person obtaining a
7efa246c0Sriastradh  * copy of this software and associated documentation files (the "Software"),
8efa246c0Sriastradh  * to deal in the Software without restriction, including without limitation
9efa246c0Sriastradh  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10efa246c0Sriastradh  * and/or sell copies of the Software, and to permit persons to whom the
11efa246c0Sriastradh  * Software is furnished to do so, subject to the following conditions:
12efa246c0Sriastradh  *
13efa246c0Sriastradh  * The above copyright notice and this permission notice shall be included in
14efa246c0Sriastradh  * all copies or substantial portions of the Software.
15efa246c0Sriastradh  *
16efa246c0Sriastradh  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17efa246c0Sriastradh  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18efa246c0Sriastradh  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19efa246c0Sriastradh  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20efa246c0Sriastradh  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21efa246c0Sriastradh  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22efa246c0Sriastradh  * OTHER DEALINGS IN THE SOFTWARE.
23efa246c0Sriastradh  *
24efa246c0Sriastradh  * Author: Stanislaw Skowronek
25efa246c0Sriastradh  */
26efa246c0Sriastradh 
27efa246c0Sriastradh #ifndef ATOM_H
28efa246c0Sriastradh #define ATOM_H
29efa246c0Sriastradh 
30efa246c0Sriastradh #include <linux/types.h>
31*2b73d18aSriastradh #include <linux/mutex.h>
3241ec0267Sriastradh 
3341ec0267Sriastradh struct drm_device;
34efa246c0Sriastradh 
35efa246c0Sriastradh #define ATOM_BIOS_MAGIC		0xAA55
36efa246c0Sriastradh #define ATOM_ATI_MAGIC_PTR	0x30
37efa246c0Sriastradh #define ATOM_ATI_MAGIC		" 761295520"
38efa246c0Sriastradh #define ATOM_ROM_TABLE_PTR	0x48
3941ec0267Sriastradh #define ATOM_ROM_PART_NUMBER_PTR	0x6E
40efa246c0Sriastradh 
41efa246c0Sriastradh #define ATOM_ROM_MAGIC		"ATOM"
42efa246c0Sriastradh #define ATOM_ROM_MAGIC_PTR	4
43efa246c0Sriastradh 
44efa246c0Sriastradh #define ATOM_ROM_MSG_PTR	0x10
45efa246c0Sriastradh #define ATOM_ROM_CMD_PTR	0x1E
46efa246c0Sriastradh #define ATOM_ROM_DATA_PTR	0x20
47efa246c0Sriastradh 
48efa246c0Sriastradh #define ATOM_CMD_INIT		0
49efa246c0Sriastradh #define ATOM_CMD_SETSCLK	0x0A
50efa246c0Sriastradh #define ATOM_CMD_SETMCLK	0x0B
51efa246c0Sriastradh #define ATOM_CMD_SETPCLK	0x0C
52efa246c0Sriastradh #define ATOM_CMD_SPDFANCNTL	0x39
53efa246c0Sriastradh 
54efa246c0Sriastradh #define ATOM_DATA_FWI_PTR	0xC
55efa246c0Sriastradh #define ATOM_DATA_IIO_PTR	0x32
56efa246c0Sriastradh 
57efa246c0Sriastradh #define ATOM_FWI_DEFSCLK_PTR	8
58efa246c0Sriastradh #define ATOM_FWI_DEFMCLK_PTR	0xC
59efa246c0Sriastradh #define ATOM_FWI_MAXSCLK_PTR	0x24
60efa246c0Sriastradh #define ATOM_FWI_MAXMCLK_PTR	0x28
61efa246c0Sriastradh 
62efa246c0Sriastradh #define ATOM_CT_SIZE_PTR	0
63efa246c0Sriastradh #define ATOM_CT_WS_PTR		4
64efa246c0Sriastradh #define ATOM_CT_PS_PTR		5
65efa246c0Sriastradh #define ATOM_CT_PS_MASK		0x7F
66efa246c0Sriastradh #define ATOM_CT_CODE_PTR	6
67efa246c0Sriastradh 
68efa246c0Sriastradh #define ATOM_OP_CNT		127
69efa246c0Sriastradh #define ATOM_OP_EOT		91
70efa246c0Sriastradh 
71efa246c0Sriastradh #define ATOM_CASE_MAGIC		0x63
72efa246c0Sriastradh #define ATOM_CASE_END		0x5A5A
73efa246c0Sriastradh 
74efa246c0Sriastradh #define ATOM_ARG_REG		0
75efa246c0Sriastradh #define ATOM_ARG_PS		1
76efa246c0Sriastradh #define ATOM_ARG_WS		2
77efa246c0Sriastradh #define ATOM_ARG_FB		3
78efa246c0Sriastradh #define ATOM_ARG_ID		4
79efa246c0Sriastradh #define ATOM_ARG_IMM		5
80efa246c0Sriastradh #define ATOM_ARG_PLL		6
81efa246c0Sriastradh #define ATOM_ARG_MC		7
82efa246c0Sriastradh 
83efa246c0Sriastradh #define ATOM_SRC_DWORD		0
84efa246c0Sriastradh #define ATOM_SRC_WORD0		1
85efa246c0Sriastradh #define ATOM_SRC_WORD8		2
86efa246c0Sriastradh #define ATOM_SRC_WORD16		3
87efa246c0Sriastradh #define ATOM_SRC_BYTE0		4
88efa246c0Sriastradh #define ATOM_SRC_BYTE8		5
89efa246c0Sriastradh #define ATOM_SRC_BYTE16		6
90efa246c0Sriastradh #define ATOM_SRC_BYTE24		7
91efa246c0Sriastradh 
92efa246c0Sriastradh #define ATOM_WS_QUOTIENT	0x40
93efa246c0Sriastradh #define ATOM_WS_REMAINDER	0x41
94efa246c0Sriastradh #define ATOM_WS_DATAPTR		0x42
95efa246c0Sriastradh #define ATOM_WS_SHIFT		0x43
96efa246c0Sriastradh #define ATOM_WS_OR_MASK		0x44
97efa246c0Sriastradh #define ATOM_WS_AND_MASK	0x45
98efa246c0Sriastradh #define ATOM_WS_FB_WINDOW	0x46
99efa246c0Sriastradh #define ATOM_WS_ATTRIBUTES	0x47
100efa246c0Sriastradh #define ATOM_WS_REGPTR		0x48
101efa246c0Sriastradh 
102efa246c0Sriastradh #define ATOM_IIO_NOP		0
103efa246c0Sriastradh #define ATOM_IIO_START		1
104efa246c0Sriastradh #define ATOM_IIO_READ		2
105efa246c0Sriastradh #define ATOM_IIO_WRITE		3
106efa246c0Sriastradh #define ATOM_IIO_CLEAR		4
107efa246c0Sriastradh #define ATOM_IIO_SET		5
108efa246c0Sriastradh #define ATOM_IIO_MOVE_INDEX	6
109efa246c0Sriastradh #define ATOM_IIO_MOVE_ATTR	7
110efa246c0Sriastradh #define ATOM_IIO_MOVE_DATA	8
111efa246c0Sriastradh #define ATOM_IIO_END		9
112efa246c0Sriastradh 
113efa246c0Sriastradh #define ATOM_IO_MM		0
114efa246c0Sriastradh #define ATOM_IO_PCI		1
115efa246c0Sriastradh #define ATOM_IO_SYSIO		2
116efa246c0Sriastradh #define ATOM_IO_IIO		0x80
117efa246c0Sriastradh 
118efa246c0Sriastradh struct card_info {
119efa246c0Sriastradh 	struct drm_device *dev;
120efa246c0Sriastradh 	void (* reg_write)(struct card_info *, uint32_t, uint32_t);   /*  filled by driver */
121efa246c0Sriastradh 	uint32_t (* reg_read)(struct card_info *, uint32_t);          /*  filled by driver */
122efa246c0Sriastradh 	void (* ioreg_write)(struct card_info *, uint32_t, uint32_t);   /*  filled by driver */
123efa246c0Sriastradh 	uint32_t (* ioreg_read)(struct card_info *, uint32_t);          /*  filled by driver */
124efa246c0Sriastradh 	void (* mc_write)(struct card_info *, uint32_t, uint32_t);   /*  filled by driver */
125efa246c0Sriastradh 	uint32_t (* mc_read)(struct card_info *, uint32_t);          /*  filled by driver */
126efa246c0Sriastradh 	void (* pll_write)(struct card_info *, uint32_t, uint32_t);   /*  filled by driver */
127efa246c0Sriastradh 	uint32_t (* pll_read)(struct card_info *, uint32_t);          /*  filled by driver */
128efa246c0Sriastradh };
129efa246c0Sriastradh 
130efa246c0Sriastradh struct atom_context {
131efa246c0Sriastradh 	struct card_info *card;
132efa246c0Sriastradh 	struct mutex mutex;
133efa246c0Sriastradh 	void *bios;
134efa246c0Sriastradh 	uint32_t cmd_table, data_table;
135efa246c0Sriastradh 	uint16_t *iio;
136efa246c0Sriastradh 
137efa246c0Sriastradh 	uint16_t data_block;
138efa246c0Sriastradh 	uint32_t fb_base;
139efa246c0Sriastradh 	uint32_t divmul[2];
140efa246c0Sriastradh 	uint16_t io_attr;
141efa246c0Sriastradh 	uint16_t reg_block;
142efa246c0Sriastradh 	uint8_t shift;
143efa246c0Sriastradh 	int cs_equal, cs_above;
144efa246c0Sriastradh 	int io_mode;
145efa246c0Sriastradh 	uint32_t *scratch;
146efa246c0Sriastradh 	int scratch_size_bytes;
14741ec0267Sriastradh 	char vbios_version[20];
148efa246c0Sriastradh };
149efa246c0Sriastradh 
150efa246c0Sriastradh extern int amdgpu_atom_debug;
151efa246c0Sriastradh 
152efa246c0Sriastradh struct atom_context *amdgpu_atom_parse(struct card_info *, void *);
153efa246c0Sriastradh int amdgpu_atom_execute_table(struct atom_context *, int, uint32_t *);
154efa246c0Sriastradh int amdgpu_atom_asic_init(struct atom_context *);
155efa246c0Sriastradh void amdgpu_atom_destroy(struct atom_context *);
156efa246c0Sriastradh bool amdgpu_atom_parse_data_header(struct atom_context *ctx, int index, uint16_t *size,
157efa246c0Sriastradh 			    uint8_t *frev, uint8_t *crev, uint16_t *data_start);
158efa246c0Sriastradh bool amdgpu_atom_parse_cmd_header(struct atom_context *ctx, int index,
159efa246c0Sriastradh 			   uint8_t *frev, uint8_t *crev);
160efa246c0Sriastradh #include "atom-types.h"
161efa246c0Sriastradh #include "atombios.h"
162efa246c0Sriastradh #include "ObjectID.h"
163efa246c0Sriastradh 
164efa246c0Sriastradh #endif
165