1*41ec0267Sriastradh /* $NetBSD: amdgpu_sync.h,v 1.2 2021/12/18 23:44:58 riastradh Exp $ */ 24e390cabSriastradh 34e390cabSriastradh /* 44e390cabSriastradh * Copyright 2016 Advanced Micro Devices, Inc. 54e390cabSriastradh * 64e390cabSriastradh * Permission is hereby granted, free of charge, to any person obtaining a 74e390cabSriastradh * copy of this software and associated documentation files (the "Software"), 84e390cabSriastradh * to deal in the Software without restriction, including without limitation 94e390cabSriastradh * the rights to use, copy, modify, merge, publish, distribute, sublicense, 104e390cabSriastradh * and/or sell copies of the Software, and to permit persons to whom the 114e390cabSriastradh * Software is furnished to do so, subject to the following conditions: 124e390cabSriastradh * 134e390cabSriastradh * The above copyright notice and this permission notice shall be included in 144e390cabSriastradh * all copies or substantial portions of the Software. 154e390cabSriastradh * 164e390cabSriastradh * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 174e390cabSriastradh * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 184e390cabSriastradh * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 194e390cabSriastradh * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 204e390cabSriastradh * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 214e390cabSriastradh * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 224e390cabSriastradh * OTHER DEALINGS IN THE SOFTWARE. 234e390cabSriastradh * 244e390cabSriastradh * Authors: Christian König 254e390cabSriastradh */ 264e390cabSriastradh #ifndef __AMDGPU_SYNC_H__ 274e390cabSriastradh #define __AMDGPU_SYNC_H__ 284e390cabSriastradh 294e390cabSriastradh #include <linux/hashtable.h> 304e390cabSriastradh 314e390cabSriastradh struct dma_fence; 324e390cabSriastradh struct dma_resv; 334e390cabSriastradh struct amdgpu_device; 344e390cabSriastradh struct amdgpu_ring; 354e390cabSriastradh 364e390cabSriastradh /* 374e390cabSriastradh * Container for fences used to sync command submissions. 384e390cabSriastradh */ 394e390cabSriastradh struct amdgpu_sync { 404e390cabSriastradh DECLARE_HASHTABLE(fences, 4); 414e390cabSriastradh struct dma_fence *last_vm_update; 424e390cabSriastradh }; 434e390cabSriastradh 444e390cabSriastradh void amdgpu_sync_create(struct amdgpu_sync *sync); 454e390cabSriastradh int amdgpu_sync_fence(struct amdgpu_sync *sync, struct dma_fence *f, 464e390cabSriastradh bool explicit); 474e390cabSriastradh int amdgpu_sync_vm_fence(struct amdgpu_sync *sync, struct dma_fence *fence); 484e390cabSriastradh int amdgpu_sync_resv(struct amdgpu_device *adev, 494e390cabSriastradh struct amdgpu_sync *sync, 504e390cabSriastradh struct dma_resv *resv, 514e390cabSriastradh void *owner, 524e390cabSriastradh bool explicit_sync); 534e390cabSriastradh struct dma_fence *amdgpu_sync_peek_fence(struct amdgpu_sync *sync, 544e390cabSriastradh struct amdgpu_ring *ring); 554e390cabSriastradh struct dma_fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync, 564e390cabSriastradh bool *explicit); 574e390cabSriastradh int amdgpu_sync_clone(struct amdgpu_sync *source, struct amdgpu_sync *clone); 584e390cabSriastradh int amdgpu_sync_wait(struct amdgpu_sync *sync, bool intr); 594e390cabSriastradh void amdgpu_sync_free(struct amdgpu_sync *sync); 604e390cabSriastradh int amdgpu_sync_init(void); 614e390cabSriastradh void amdgpu_sync_fini(void); 624e390cabSriastradh 634e390cabSriastradh #endif 64