xref: /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_gds.h (revision 181254a7b1bdde6873432bffef2d2decc4b5c22f)
1 /*	$NetBSD: amdgpu_gds.h,v 1.2 2018/08/27 04:58:19 riastradh Exp $	*/
2 
3 /*
4  * Copyright 2014 Advanced Micro Devices, Inc.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22  * OTHER DEALINGS IN THE SOFTWARE.
23  *
24  */
25 
26 #ifndef __AMDGPU_GDS_H__
27 #define __AMDGPU_GDS_H__
28 
29 /* Because TTM request that alloacted buffer should be PAGE_SIZE aligned,
30  * we should report GDS/GWS/OA size as PAGE_SIZE aligned
31  * */
32 #define AMDGPU_GDS_SHIFT	2
33 #define AMDGPU_GWS_SHIFT	PAGE_SHIFT
34 #define AMDGPU_OA_SHIFT		PAGE_SHIFT
35 
36 #define AMDGPU_PL_GDS		TTM_PL_PRIV0
37 #define AMDGPU_PL_GWS		TTM_PL_PRIV1
38 #define AMDGPU_PL_OA		TTM_PL_PRIV2
39 
40 #define AMDGPU_PL_FLAG_GDS		TTM_PL_FLAG_PRIV0
41 #define AMDGPU_PL_FLAG_GWS		TTM_PL_FLAG_PRIV1
42 #define AMDGPU_PL_FLAG_OA		TTM_PL_FLAG_PRIV2
43 
44 struct amdgpu_ring;
45 struct amdgpu_bo;
46 
47 struct amdgpu_gds_asic_info {
48 	uint32_t 	total_size;
49 	uint32_t	gfx_partition_size;
50 	uint32_t	cs_partition_size;
51 };
52 
53 struct amdgpu_gds {
54 	struct amdgpu_gds_asic_info	mem;
55 	struct amdgpu_gds_asic_info	gws;
56 	struct amdgpu_gds_asic_info	oa;
57 	/* At present, GDS, GWS and OA resources for gfx (graphics)
58 	 * is always pre-allocated and available for graphics operation.
59 	 * Such resource is shared between all gfx clients.
60 	 * TODO: move this operation to user space
61 	 * */
62 	struct amdgpu_bo*		gds_gfx_bo;
63 	struct amdgpu_bo*		gws_gfx_bo;
64 	struct amdgpu_bo*		oa_gfx_bo;
65 };
66 
67 struct amdgpu_gds_reg_offset {
68 	uint32_t	mem_base;
69 	uint32_t	mem_size;
70 	uint32_t	gws;
71 	uint32_t	oa;
72 };
73 
74 #endif /* __AMDGPU_GDS_H__ */
75