xref: /netbsd-src/sys/external/bsd/drm2/amdgpu/amdgpufb.c (revision a53f11173ae5a0eb82547dc88b62c4e22a581dd4)
1*a53f1117Sriastradh /*	$NetBSD: amdgpufb.c,v 1.5 2022/07/18 23:34:02 riastradh Exp $	*/
210f82c92Sriastradh 
310f82c92Sriastradh /*-
410f82c92Sriastradh  * Copyright (c) 2018 The NetBSD Foundation, Inc.
510f82c92Sriastradh  * All rights reserved.
610f82c92Sriastradh  *
710f82c92Sriastradh  * This code is derived from software contributed to The NetBSD Foundation
810f82c92Sriastradh  * by Taylor R. Campbell.
910f82c92Sriastradh  *
1010f82c92Sriastradh  * Redistribution and use in source and binary forms, with or without
1110f82c92Sriastradh  * modification, are permitted provided that the following conditions
1210f82c92Sriastradh  * are met:
1310f82c92Sriastradh  * 1. Redistributions of source code must retain the above copyright
1410f82c92Sriastradh  *    notice, this list of conditions and the following disclaimer.
1510f82c92Sriastradh  * 2. Redistributions in binary form must reproduce the above copyright
1610f82c92Sriastradh  *    notice, this list of conditions and the following disclaimer in the
1710f82c92Sriastradh  *    documentation and/or other materials provided with the distribution.
1810f82c92Sriastradh  *
1910f82c92Sriastradh  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
2010f82c92Sriastradh  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
2110f82c92Sriastradh  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
2210f82c92Sriastradh  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
2310f82c92Sriastradh  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
2410f82c92Sriastradh  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
2510f82c92Sriastradh  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
2610f82c92Sriastradh  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
2710f82c92Sriastradh  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
2810f82c92Sriastradh  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
2910f82c92Sriastradh  * POSSIBILITY OF SUCH DAMAGE.
3010f82c92Sriastradh  */
3110f82c92Sriastradh 
3210f82c92Sriastradh #include <sys/cdefs.h>
33*a53f1117Sriastradh __KERNEL_RCSID(0, "$NetBSD: amdgpufb.c,v 1.5 2022/07/18 23:34:02 riastradh Exp $");
3410f82c92Sriastradh 
3510f82c92Sriastradh #include <sys/types.h>
3610f82c92Sriastradh #include <sys/bus.h>
3710f82c92Sriastradh #include <sys/device.h>
3810f82c92Sriastradh #include <sys/errno.h>
3910f82c92Sriastradh 
4010f82c92Sriastradh #include <drm/drmfb.h>
4110f82c92Sriastradh #include <drm/drmfb_pci.h>
4210f82c92Sriastradh 
4310f82c92Sriastradh #include "amdgpu.h"
4410f82c92Sriastradh #include "amdgpu_task.h"
4510f82c92Sriastradh #include "amdgpufb.h"
4610f82c92Sriastradh 
4710f82c92Sriastradh static int	amdgpufb_match(device_t, cfdata_t, void *);
4810f82c92Sriastradh static void	amdgpufb_attach(device_t, device_t, void *);
4910f82c92Sriastradh static int	amdgpufb_detach(device_t, int);
5010f82c92Sriastradh 
5110f82c92Sriastradh static void	amdgpufb_attach_task(struct amdgpu_task *);
5210f82c92Sriastradh 
5310f82c92Sriastradh static bool	amdgpufb_shutdown(device_t, int);
5410f82c92Sriastradh static paddr_t	amdgpufb_drmfb_mmapfb(struct drmfb_softc *, off_t, int);
5510f82c92Sriastradh 
5610f82c92Sriastradh struct amdgpufb_softc {
5710f82c92Sriastradh 	struct drmfb_softc		sc_drmfb; /* XXX Must be first.  */
5810f82c92Sriastradh 	device_t			sc_dev;
5910f82c92Sriastradh 	struct amdgpufb_attach_args	sc_afa;
6010f82c92Sriastradh 	struct amdgpu_task		sc_attach_task;
6110f82c92Sriastradh 	bool				sc_attached:1;
6210f82c92Sriastradh };
6310f82c92Sriastradh 
6410f82c92Sriastradh static const struct drmfb_params amdgpufb_drmfb_params = {
6510f82c92Sriastradh 	.dp_mmapfb = amdgpufb_drmfb_mmapfb,
6610f82c92Sriastradh 	.dp_mmap = drmfb_pci_mmap,
6710f82c92Sriastradh 	.dp_ioctl = drmfb_pci_ioctl,
6810f82c92Sriastradh 	.dp_is_vga_console = drmfb_pci_is_vga_console,
6910f82c92Sriastradh };
7010f82c92Sriastradh 
7110f82c92Sriastradh CFATTACH_DECL_NEW(amdgpufb, sizeof(struct amdgpufb_softc),
7210f82c92Sriastradh     amdgpufb_match, amdgpufb_attach, amdgpufb_detach, NULL);
7310f82c92Sriastradh 
7410f82c92Sriastradh static int
amdgpufb_match(device_t parent,cfdata_t match,void * aux)7510f82c92Sriastradh amdgpufb_match(device_t parent, cfdata_t match, void *aux)
7610f82c92Sriastradh {
7710f82c92Sriastradh 
7810f82c92Sriastradh 	return 1;
7910f82c92Sriastradh }
8010f82c92Sriastradh 
8110f82c92Sriastradh static void
amdgpufb_attach(device_t parent,device_t self,void * aux)8210f82c92Sriastradh amdgpufb_attach(device_t parent, device_t self, void *aux)
8310f82c92Sriastradh {
8410f82c92Sriastradh 	struct amdgpufb_softc *const sc = device_private(self);
8510f82c92Sriastradh 	const struct amdgpufb_attach_args *const afa = aux;
8610f82c92Sriastradh 
8710f82c92Sriastradh 	sc->sc_dev = self;
8810f82c92Sriastradh 	sc->sc_afa = *afa;
8910f82c92Sriastradh 	sc->sc_attached = false;
9010f82c92Sriastradh 
9110f82c92Sriastradh 	aprint_naive("\n");
9210f82c92Sriastradh 	aprint_normal("\n");
9310f82c92Sriastradh 
9410f82c92Sriastradh 	amdgpu_task_init(&sc->sc_attach_task, &amdgpufb_attach_task);
95*a53f1117Sriastradh 	amdgpu_task_schedule(parent, &sc->sc_attach_task);
96b083d5b0Sriastradh 	config_pending_incr(self);
9710f82c92Sriastradh }
9810f82c92Sriastradh 
9910f82c92Sriastradh static int
amdgpufb_detach(device_t self,int flags)10010f82c92Sriastradh amdgpufb_detach(device_t self, int flags)
10110f82c92Sriastradh {
10210f82c92Sriastradh 	struct amdgpufb_softc *const sc = device_private(self);
10310f82c92Sriastradh 	int error;
10410f82c92Sriastradh 
10510f82c92Sriastradh 	if (sc->sc_attached) {
10610f82c92Sriastradh 		pmf_device_deregister(self);
10710f82c92Sriastradh 		error = drmfb_detach(&sc->sc_drmfb, flags);
10810f82c92Sriastradh 		if (error) {
10910f82c92Sriastradh 			/* XXX Ugh.  */
11010f82c92Sriastradh 			(void)pmf_device_register1(self, NULL, NULL,
11110f82c92Sriastradh 			    &amdgpufb_shutdown);
11210f82c92Sriastradh 			return error;
11310f82c92Sriastradh 		}
11410f82c92Sriastradh 		sc->sc_attached = false;
11510f82c92Sriastradh 	}
11610f82c92Sriastradh 
11710f82c92Sriastradh 	return 0;
11810f82c92Sriastradh }
11910f82c92Sriastradh 
12010f82c92Sriastradh static void
amdgpufb_attach_task(struct amdgpu_task * task)12110f82c92Sriastradh amdgpufb_attach_task(struct amdgpu_task *task)
12210f82c92Sriastradh {
12310f82c92Sriastradh 	struct amdgpufb_softc *const sc = container_of(task,
12410f82c92Sriastradh 	    struct amdgpufb_softc, sc_attach_task);
12510f82c92Sriastradh 	const struct amdgpufb_attach_args *const afa = &sc->sc_afa;
12610f82c92Sriastradh 	const struct drmfb_attach_args da = {
12710f82c92Sriastradh 		.da_dev = sc->sc_dev,
12810f82c92Sriastradh 		.da_fb_helper = afa->afa_fb_helper,
12910f82c92Sriastradh 		.da_fb_sizes = &afa->afa_fb_sizes,
13010f82c92Sriastradh 		.da_fb_vaddr = __UNVOLATILE(afa->afa_fb_ptr),
13110f82c92Sriastradh 		.da_fb_linebytes = afa->afa_fb_linebytes,
13210f82c92Sriastradh 		.da_params = &amdgpufb_drmfb_params,
13310f82c92Sriastradh 	};
13410f82c92Sriastradh 	int error;
13510f82c92Sriastradh 
13610f82c92Sriastradh 	error = drmfb_attach(&sc->sc_drmfb, &da);
13710f82c92Sriastradh 	if (error) {
13810f82c92Sriastradh 		aprint_error_dev(sc->sc_dev, "failed to attach drmfb: %d\n",
13910f82c92Sriastradh 		    error);
140b083d5b0Sriastradh 		goto out;
14110f82c92Sriastradh 	}
14210f82c92Sriastradh 
14310f82c92Sriastradh 	if (!pmf_device_register1(sc->sc_dev, NULL, NULL, &amdgpufb_shutdown))
14410f82c92Sriastradh 		aprint_error_dev(sc->sc_dev,
14510f82c92Sriastradh 		    "failed to register shutdown handler\n");
14610f82c92Sriastradh 
14710f82c92Sriastradh 	sc->sc_attached = true;
148b083d5b0Sriastradh out:
149b083d5b0Sriastradh 	config_pending_decr(sc->sc_dev);
15010f82c92Sriastradh }
15110f82c92Sriastradh 
15210f82c92Sriastradh static bool
amdgpufb_shutdown(device_t self,int flags)15310f82c92Sriastradh amdgpufb_shutdown(device_t self, int flags)
15410f82c92Sriastradh {
15510f82c92Sriastradh 	struct amdgpufb_softc *const sc = device_private(self);
15610f82c92Sriastradh 
15710f82c92Sriastradh 	return drmfb_shutdown(&sc->sc_drmfb, flags);
15810f82c92Sriastradh }
15910f82c92Sriastradh 
16010f82c92Sriastradh static paddr_t
amdgpufb_drmfb_mmapfb(struct drmfb_softc * drmfb,off_t offset,int prot)16110f82c92Sriastradh amdgpufb_drmfb_mmapfb(struct drmfb_softc *drmfb, off_t offset, int prot)
16210f82c92Sriastradh {
16310f82c92Sriastradh 	struct amdgpufb_softc *const sc = container_of(drmfb,
16410f82c92Sriastradh 	    struct amdgpufb_softc, sc_drmfb);
16510f82c92Sriastradh 	struct drm_fb_helper *const helper = sc->sc_afa.afa_fb_helper;
16610f82c92Sriastradh 	struct drm_framebuffer *const fb = helper->fb;
1672b73d18aSriastradh 	struct drm_gem_object *const gobj = fb->obj[0];
16810f82c92Sriastradh 	struct amdgpu_bo *const rbo = gem_to_amdgpu_bo(gobj);
16910f82c92Sriastradh 	const unsigned num_pages __diagused = rbo->tbo.num_pages;
17010f82c92Sriastradh 	int flags = 0;
17110f82c92Sriastradh 
17210f82c92Sriastradh 	KASSERT(0 <= offset);
17310f82c92Sriastradh 	KASSERT(offset < ((uintmax_t)num_pages << PAGE_SHIFT));
17410f82c92Sriastradh 	KASSERT(rbo->tbo.mem.bus.is_iomem);
17510f82c92Sriastradh 
17610f82c92Sriastradh 	if (ISSET(rbo->tbo.mem.placement, TTM_PL_FLAG_WC))
17710f82c92Sriastradh 		flags |= BUS_SPACE_MAP_PREFETCHABLE;
17810f82c92Sriastradh 
17910f82c92Sriastradh 	return bus_space_mmap(rbo->tbo.bdev->memt, rbo->tbo.mem.bus.base,
18010f82c92Sriastradh 	    rbo->tbo.mem.bus.offset + offset, prot, flags);
18110f82c92Sriastradh }
182