1 /* $NetBSD: if_ie_vme.c,v 1.35 2022/07/12 02:10:16 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1995 Charles D. Cranor 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 /* 29 * Converted to SUN ie driver by Charles D. Cranor, 30 * October 1994, January 1995. 31 */ 32 33 /* 34 * The i82586 is a very painful chip, found in sun3's, sun-4/100's 35 * sun-4/200's, and VME based suns. The byte order is all wrong for a 36 * SUN, making life difficult. Programming this chip is mostly the same, 37 * but certain details differ from system to system. This driver is 38 * written so that different "ie" interfaces can be controlled by the same 39 * driver. 40 */ 41 42 /* 43 * programming notes: 44 * 45 * the ie chip operates in a 24 bit address space. 46 * 47 * most ie interfaces appear to be divided into two parts: 48 * - generic 586 stuff 49 * - board specific 50 * 51 * generic: 52 * the generic stuff of the ie chip is all done with data structures 53 * that live in the chip's memory address space. the chip expects 54 * its main data structure (the sys conf ptr -- SCP) to be at a fixed 55 * address in its 24 bit space: 0xfffff4 56 * 57 * the SCP points to another structure called the ISCP. 58 * the ISCP points to another structure called the SCB. 59 * the SCB has a status field, a linked list of "commands", and 60 * a linked list of "receive buffers". these are data structures that 61 * live in memory, not registers. 62 * 63 * board: 64 * to get the chip to do anything, you first put a command in the 65 * command data structure list. then you have to signal "attention" 66 * to the chip to get it to look at the command. how you 67 * signal attention depends on what board you have... on PC's 68 * there is an i/o port number to do this, on sun's there is a 69 * register bit you toggle. 70 * 71 * to get data from the chip you program it to interrupt... 72 * 73 * 74 * sun issues: 75 * 76 * there are 3 kinds of sun "ie" interfaces: 77 * 1 - a VME/multibus card 78 * 2 - an on-board interface (sun3's, sun-4/100's, and sun-4/200's) 79 * 3 - another VME board called the 3E 80 * 81 * the VME boards lives in vme16 space. only 16 and 8 bit accesses 82 * are allowed, so functions that copy data must be aware of this. 83 * 84 * the chip is an intel chip. this means that the byte order 85 * on all the "short"s in the chip's data structures is wrong. 86 * so, constants described in the intel docs are swapped for the sun. 87 * that means that any buffer pointers you give the chip must be 88 * swapped to intel format. yuck. 89 * 90 * VME/multibus interface: 91 * for the multibus interface the board ignores the top 4 bits 92 * of the chip address. the multibus interface has its own 93 * MMU like page map (without protections or valid bits, etc). 94 * there are 256 pages of physical memory on the board (each page 95 * is 1024 bytes). There are 1024 slots in the page map. so, 96 * a 1024 byte page takes up 10 bits of address for the offset, 97 * and if there are 1024 slots in the page that is another 10 bits 98 * of the address. That makes a 20 bit address, and as stated 99 * earlier the board ignores the top 4 bits, so that accounts 100 * for all 24 bits of address. 101 * 102 * Note that the last entry of the page map maps the top of the 103 * 24 bit address space and that the SCP is supposed to be at 104 * 0xfffff4 (taking into account alignment). so, 105 * for multibus, that entry in the page map has to be used for the SCP. 106 * 107 * The page map effects BOTH how the ie chip sees the 108 * memory, and how the host sees it. 109 * 110 * The page map is part of the "register" area of the board 111 * 112 * The page map to control where ram appears in the address space. 113 * We choose to have RAM start at 0 in the 24 bit address space. 114 * 115 * to get the physical address of the board's RAM you must take the 116 * top 12 bits of the physical address of the register address and 117 * or in the 4 bits from the status word as bits 17-20 (remember that 118 * the board ignores the chip's top 4 address lines). For example: 119 * if the register is @ 0xffe88000, then the top 12 bits are 0xffe00000. 120 * to get the 4 bits from the status word just do status & IEVME_HADDR. 121 * suppose the value is "4". Then just shift it left 16 bits to get 122 * it into bits 17-20 (e.g. 0x40000). Then or it to get the 123 * address of RAM (in our example: 0xffe40000). see the attach routine! 124 * 125 * 126 * on-board interface: 127 * 128 * on the onboard ie interface the 24 bit address space is hardwired 129 * to be 0xff000000 -> 0xffffffff of KVA. this means that sc_iobase 130 * will be 0xff000000. sc_maddr will be where ever we allocate RAM 131 * in KVA. note that since the SCP is at a fixed address it means 132 * that we have to allocate a fixed KVA for the SCP. 133 * <fill in useful info later> 134 * 135 * 136 * VME3E interface: 137 * 138 * <fill in useful info later> 139 * 140 */ 141 142 #include <sys/cdefs.h> 143 __KERNEL_RCSID(0, "$NetBSD: if_ie_vme.c,v 1.35 2022/07/12 02:10:16 thorpej Exp $"); 144 145 #include <sys/param.h> 146 #include <sys/systm.h> 147 #include <sys/errno.h> 148 #include <sys/device.h> 149 #include <sys/protosw.h> 150 #include <sys/socket.h> 151 152 #include <net/if.h> 153 #include <net/if_types.h> 154 #include <net/if_dl.h> 155 #include <net/if_media.h> 156 #include <net/if_ether.h> 157 158 #include <sys/bus.h> 159 #include <sys/intr.h> 160 #include <dev/vme/vmevar.h> 161 162 #include <dev/ic/i82586reg.h> 163 #include <dev/ic/i82586var.h> 164 165 #include "locators.h" 166 167 /* 168 * VME/multibus definitions 169 */ 170 #define IEVME_PAGESIZE 1024 /* bytes */ 171 #define IEVME_PAGSHIFT 10 /* bits */ 172 #define IEVME_NPAGES 256 /* number of pages on chip */ 173 #define IEVME_MAPSZ 1024 /* number of entries in the map */ 174 175 /* 176 * PTE for the page map 177 */ 178 #define IEVME_SBORDR 0x8000 /* sun byte order */ 179 #define IEVME_IBORDR 0x0000 /* intel byte order */ 180 181 #define IEVME_P2MEM 0x2000 /* memory is on P2 */ 182 #define IEVME_OBMEM 0x0000 /* memory is on board */ 183 184 #define IEVME_PGMASK 0x0fff /* gives the physical page frame number */ 185 186 struct ievme { 187 uint16_t pgmap[IEVME_MAPSZ]; 188 uint16_t xxx[32]; /* prom */ 189 uint16_t status; /* see below for bits */ 190 uint16_t xxx2; /* filler */ 191 uint16_t pectrl; /* parity control (see below) */ 192 uint16_t peaddr; /* low 16 bits of address */ 193 }; 194 195 /* 196 * status bits 197 */ 198 #define IEVME_RESET 0x8000 /* reset board */ 199 #define IEVME_ONAIR 0x4000 /* go out of loopback 'on-air' */ 200 #define IEVME_ATTEN 0x2000 /* attention */ 201 #define IEVME_IENAB 0x1000 /* interrupt enable */ 202 #define IEVME_PEINT 0x0800 /* parity error interrupt enable */ 203 #define IEVME_PERR 0x0200 /* parity error flag */ 204 #define IEVME_INT 0x0100 /* interrupt flag */ 205 #define IEVME_P2EN 0x0020 /* enable p2 bus */ 206 #define IEVME_256K 0x0010 /* 256kb rams */ 207 #define IEVME_HADDR 0x000f /* mask for bits 17-20 of address */ 208 209 /* 210 * parity control 211 */ 212 #define IEVME_PARACK 0x0100 /* parity error ack */ 213 #define IEVME_PARSRC 0x0080 /* parity error source */ 214 #define IEVME_PAREND 0x0040 /* which end of the data got the error */ 215 #define IEVME_PARADR 0x000f /* mask to get bits 17-20 of parity address */ 216 217 /* Supported media */ 218 static int media[] = { 219 IFM_ETHER | IFM_10_2, 220 }; 221 #define NMEDIA __arraycount(media) 222 223 /* 224 * the 3E board not supported (yet?) 225 */ 226 227 228 static void ie_vmereset(struct ie_softc *, int); 229 static void ie_vmeattend(struct ie_softc *, int); 230 static void ie_vmerun(struct ie_softc *); 231 static int ie_vmeintr(struct ie_softc *, int); 232 233 int ie_vme_match(device_t, cfdata_t, void *); 234 void ie_vme_attach(device_t, device_t, void *); 235 236 struct ie_vme_softc { 237 struct ie_softc ie; 238 bus_space_tag_t ievt; 239 bus_space_handle_t ievh; 240 }; 241 242 CFATTACH_DECL_NEW(ie_vme, sizeof(struct ie_vme_softc), 243 ie_vme_match, ie_vme_attach, NULL, NULL); 244 245 #define read_iev(sc, reg) \ 246 bus_space_read_2(sc->ievt, sc->ievh, offsetof(struct ievme, reg)) 247 #define write_iev(sc, reg, val) \ 248 bus_space_write_2(sc->ievt, sc->ievh, offsetof(struct ievme, reg), val) 249 250 /* 251 * MULTIBUS/VME support routines 252 */ 253 void 254 ie_vmereset(struct ie_softc *sc, int what) 255 { 256 struct ie_vme_softc *vsc = (struct ie_vme_softc *)sc; 257 258 write_iev(vsc, status, IEVME_RESET); 259 delay(100); /* XXX could be shorter? */ 260 write_iev(vsc, status, 0); 261 } 262 263 void 264 ie_vmeattend(struct ie_softc *sc, int why) 265 { 266 struct ie_vme_softc *vsc = (struct ie_vme_softc *)sc; 267 268 /* Flag! */ 269 write_iev(vsc, status, read_iev(vsc, status) | IEVME_ATTEN); 270 /* Down. */ 271 write_iev(vsc, status, read_iev(vsc, status) & ~IEVME_ATTEN); 272 } 273 274 void 275 ie_vmerun(struct ie_softc *sc) 276 { 277 struct ie_vme_softc *vsc = (struct ie_vme_softc *)sc; 278 279 write_iev(vsc, status, read_iev(vsc, status) 280 | IEVME_ONAIR | IEVME_IENAB | IEVME_PEINT); 281 } 282 283 int 284 ie_vmeintr(struct ie_softc *sc, int where) 285 { 286 struct ie_vme_softc *vsc = (struct ie_vme_softc *)sc; 287 288 if (where != INTR_ENTER) 289 return 0; 290 291 /* 292 * check for parity error 293 */ 294 if (read_iev(vsc, status) & IEVME_PERR) { 295 aprint_error_dev(sc->sc_dev, 296 "parity error (ctrl 0x%x @ 0x%02x%04x)\n", 297 read_iev(vsc, pectrl), 298 read_iev(vsc, pectrl) & IEVME_HADDR, 299 read_iev(vsc, peaddr)); 300 write_iev(vsc, pectrl, read_iev(vsc, pectrl) | IEVME_PARACK); 301 } 302 return 0; 303 } 304 305 void ie_memcopyin(struct ie_softc *, void *, int, size_t); 306 void ie_memcopyout(struct ie_softc *, const void *, int, size_t); 307 308 /* 309 * Copy board memory to kernel. 310 */ 311 void 312 ie_memcopyin(struct ie_softc *sc, void *p, int offset, size_t size) 313 { 314 size_t help; 315 316 if ((offset & 1) && ((u_long)p & 1) && size > 0) { 317 *(uint8_t *)p = bus_space_read_1(sc->bt, sc->bh, offset); 318 offset++; 319 p = (uint8_t *)p + 1; 320 size--; 321 } 322 323 if ((offset & 1) || ((u_long)p & 1)) { 324 bus_space_read_region_1(sc->bt, sc->bh, offset, p, size); 325 return; 326 } 327 328 help = size / 2; 329 bus_space_read_region_2(sc->bt, sc->bh, offset, p, help); 330 if (2 * help == size) 331 return; 332 333 offset += 2 * help; 334 p = (uint16_t *)p + help; 335 *(uint8_t *)p = bus_space_read_1(sc->bt, sc->bh, offset); 336 } 337 338 /* 339 * Copy from kernel space to board memory. 340 */ 341 void 342 ie_memcopyout(struct ie_softc *sc, const void *p, int offset, size_t size) 343 { 344 size_t help; 345 346 if ((offset & 1) && ((u_long)p & 1) && size > 0) { 347 bus_space_write_1(sc->bt, sc->bh, offset, *(const uint8_t *)p); 348 offset++; 349 p = (const uint8_t *)p + 1; 350 size--; 351 } 352 353 if ((offset & 1) || ((u_long)p & 1)) { 354 bus_space_write_region_1(sc->bt, sc->bh, offset, p, size); 355 return; 356 } 357 358 help = size / 2; 359 bus_space_write_region_2(sc->bt, sc->bh, offset, p, help); 360 if (2 * help == size) 361 return; 362 363 offset += 2 * help; 364 p = (const uint16_t *)p + help; 365 bus_space_write_1(sc->bt, sc->bh, offset, *(const uint8_t *)p); 366 } 367 368 /* read a 16-bit value at BH offset */ 369 uint16_t ie_vme_read16(struct ie_softc *, int offset); 370 /* write a 16-bit value at BH offset */ 371 void ie_vme_write16(struct ie_softc *, int offset, uint16_t value); 372 void ie_vme_write24(struct ie_softc *, int offset, int addr); 373 374 uint16_t 375 ie_vme_read16(struct ie_softc *sc, int offset) 376 { 377 uint16_t v; 378 379 v = bus_space_read_2(sc->bt, sc->bh, offset); 380 return (((v&0xff)<<8) | ((v>>8)&0xff)); 381 } 382 383 void 384 ie_vme_write16(struct ie_softc *sc, int offset, uint16_t v) 385 { 386 int v0 = ((((v)&0xff)<<8) | (((v)>>8)&0xff)); 387 bus_space_write_2(sc->bt, sc->bh, offset, v0); 388 } 389 390 void 391 ie_vme_write24(struct ie_softc *sc, int offset, int addr) 392 { 393 u_char *f = (u_char *)&addr; 394 uint16_t v0, v1; 395 u_char *t; 396 397 t = (u_char *)&v0; 398 t[0] = f[3]; t[1] = f[2]; 399 bus_space_write_2(sc->bt, sc->bh, offset, v0); 400 401 t = (u_char *)&v1; 402 t[0] = f[1]; t[1] = 0; 403 bus_space_write_2(sc->bt, sc->bh, offset+2, v1); 404 } 405 406 int 407 ie_vme_match(device_t parent, cfdata_t cf, void *aux) 408 { 409 struct vme_attach_args *va = aux; 410 vme_chipset_tag_t ct = va->va_vct; 411 vme_am_t mod; 412 int error; 413 414 if (va->numcfranges < 2) { 415 printf("ie_vme_match: need 2 ranges\n"); 416 return 0; 417 } 418 if ((va->r[1].offset & 0xff0fffff) || 419 ((va->r[0].offset & 0xfff00000) 420 != (va->r[1].offset & 0xfff00000))) { 421 printf("ie_vme_match: base address mismatch\n"); 422 return 0; 423 } 424 if (va->r[0].size != VMECF_LEN_DEFAULT && 425 va->r[0].size != sizeof(struct ievme)) { 426 printf("ie_vme_match: bad csr size\n"); 427 return 0; 428 } 429 if (va->r[1].size == VMECF_LEN_DEFAULT) { 430 printf("ie_vme_match: must specify memory size\n"); 431 return 0; 432 } 433 434 mod = 0x3d; /* VME_AM_A24|VME_AM_MBO|VME_AM_SUPER|VME_AM_DATA */ 435 436 if (va->r[0].am != VMECF_AM_DEFAULT && 437 va->r[0].am != mod) 438 return 0; 439 440 if (vme_space_alloc(va->va_vct, va->r[0].offset, 441 sizeof(struct ievme), mod)) 442 return 0; 443 if (vme_space_alloc(va->va_vct, va->r[1].offset, va->r[1].size, mod)) { 444 vme_space_free(va->va_vct, va->r[0].offset, 445 sizeof(struct ievme), mod); 446 return 0; 447 } 448 error = vme_probe(ct, va->r[0].offset, 2, mod, VME_D16, 0, 0); 449 vme_space_free(va->va_vct, va->r[0].offset, sizeof(struct ievme), mod); 450 vme_space_free(va->va_vct, va->r[1].offset, va->r[1].size, mod); 451 452 return (error == 0); 453 } 454 455 void 456 ie_vme_attach(device_t parent, device_t self, void *aux) 457 { 458 uint8_t myaddr[ETHER_ADDR_LEN]; 459 struct ie_vme_softc *vsc = device_private(self); 460 struct vme_attach_args *va = aux; 461 vme_chipset_tag_t ct = va->va_vct; 462 struct ie_softc *sc; 463 vme_intr_handle_t ih; 464 vme_addr_t rampaddr; 465 vme_size_t memsize; 466 vme_mapresc_t resc; 467 int lcv; 468 prop_data_t eaddrprop; 469 vme_am_t mod; 470 471 /* 472 * *note*: We don't detect the difference between a VME3E and a 473 * multibus/vme card. If you want to use a 3E you'll have to fix this. 474 */ 475 mod = 0x3d; /* VME_AM_A24|VME_AM_MBO|VME_AM_SUPER|VME_AM_DATA */ 476 if (vme_space_alloc(va->va_vct, va->r[0].offset, 477 sizeof(struct ievme), mod) || 478 vme_space_alloc(va->va_vct, va->r[1].offset, 479 va->r[1].size, mod)) 480 panic("if_ie: vme alloc"); 481 482 sc = &vsc->ie; 483 sc->sc_dev = self; 484 485 sc->hwreset = ie_vmereset; 486 sc->hwinit = ie_vmerun; 487 sc->chan_attn = ie_vmeattend; 488 sc->intrhook = ie_vmeintr; 489 sc->memcopyout = ie_memcopyout; 490 sc->memcopyin = ie_memcopyin; 491 492 sc->ie_bus_barrier = NULL; 493 sc->ie_bus_read16 = ie_vme_read16; 494 sc->ie_bus_write16 = ie_vme_write16; 495 sc->ie_bus_write24 = ie_vme_write24; 496 497 memsize = va->r[1].size; 498 499 if (vme_space_map(ct, va->r[0].offset, sizeof(struct ievme), mod, 500 VME_D16 | VME_D8, 0, &vsc->ievt, &vsc->ievh, &resc) != 0) 501 panic("if_ie: vme map csr"); 502 503 rampaddr = va->r[1].offset; 504 505 /* 4 more */ 506 rampaddr = rampaddr | ((read_iev(vsc, status) & IEVME_HADDR) << 16); 507 if (vme_space_map(ct, rampaddr, memsize, mod, VME_D16 | VME_D8, 0, 508 &sc->bt, &sc->bh, &resc) != 0) 509 panic("if_ie: vme map mem"); 510 511 write_iev(vsc, pectrl, read_iev(vsc, pectrl) | IEVME_PARACK); 512 513 /* 514 * Set up mappings, direct map except for last page 515 * which is mapped at zero and at high address (for scp) 516 */ 517 for (lcv = 0; lcv < IEVME_MAPSZ - 1; lcv++) 518 write_iev(vsc, pgmap[lcv], IEVME_SBORDR | IEVME_OBMEM | lcv); 519 write_iev(vsc, pgmap[IEVME_MAPSZ - 1], IEVME_SBORDR | IEVME_OBMEM | 0); 520 521 /* Clear all ram */ 522 bus_space_set_region_2(sc->bt, sc->bh, 0, 0, memsize/2); 523 524 /* 525 * We use the first page to set up SCP, ICSP and SCB data 526 * structures. The remaining pages become the buffer area 527 * (managed in i82586.c). 528 * SCP is in double-mapped page, so the 586 can see it at 529 * the mandatory magic address (IE_SCP_ADDR). 530 */ 531 sc->scp = (IE_SCP_ADDR & (IEVME_PAGESIZE - 1)); 532 533 /* iscp at location zero */ 534 sc->iscp = 0; 535 536 /* scb follows iscp */ 537 sc->scb = IE_ISCP_SZ; 538 539 ie_vme_write16(sc, IE_ISCP_SCB((long)sc->iscp), sc->scb); 540 ie_vme_write16(sc, IE_ISCP_BASE((u_long)sc->iscp), 0); 541 ie_vme_write24(sc, IE_SCP_ISCP((u_long)sc->scp), 0); 542 543 if (i82586_proberam(sc) == 0) { 544 printf(": memory probe failed\n"); 545 return; 546 } 547 548 /* Rest of first page is unused; rest of ram for buffers. */ 549 sc->buf_area = IEVME_PAGESIZE; 550 sc->buf_area_sz = memsize - IEVME_PAGESIZE; 551 552 sc->do_xmitnopchain = 0; 553 554 printf("\n%s:", device_xname(self)); 555 556 eaddrprop = prop_dictionary_get(device_properties(self), "mac-address"); 557 if (eaddrprop != NULL && prop_data_size(eaddrprop) == ETHER_ADDR_LEN) 558 memcpy(myaddr, prop_data_value(eaddrprop), 559 ETHER_ADDR_LEN); 560 561 i82586_attach(sc, "multibus/vme", myaddr, media, NMEDIA, media[0]); 562 563 vme_intr_map(ct, va->ilevel, va->ivector, &ih); 564 vme_intr_establish(ct, ih, IPL_NET, i82586_intr, sc); 565 } 566