1 /* $NetBSD: uhcivar.h,v 1.54 2018/04/09 16:21:11 jakllsch Exp $ */ 2 3 /* 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart@augustsson.net) at 9 * Carlstedt Research & Technology. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #ifndef _UHCIVAR_H_ 34 #define _UHCIVAR_H_ 35 36 #include <sys/pool.h> 37 38 /* 39 * To avoid having 1024 TDs for each isochronous transfer we introduce 40 * a virtual frame list. Every UHCI_VFRAMELIST_COUNT entries in the real 41 * frame list points to a non-active TD. These, in turn, form the 42 * starts of the virtual frame list. This also has the advantage that it 43 * simplifies linking in/out of TDs/QHs in the schedule. 44 * Furthermore, initially each of the inactive TDs point to an inactive 45 * QH that forms the start of the interrupt traffic for that slot. 46 * Each of these QHs point to the same QH that is the start of control 47 * traffic. This QH points at another QH which is the start of the 48 * bulk traffic. 49 * 50 * UHCI_VFRAMELIST_COUNT should be a power of 2 and <= UHCI_FRAMELIST_COUNT. 51 */ 52 #define UHCI_VFRAMELIST_COUNT 128 53 54 typedef struct uhci_soft_qh uhci_soft_qh_t; 55 typedef struct uhci_soft_td uhci_soft_td_t; 56 57 typedef union { 58 struct uhci_soft_qh *sqh; 59 struct uhci_soft_td *std; 60 } uhci_soft_td_qh_t; 61 62 struct uhci_xfer { 63 struct usbd_xfer ux_xfer; 64 struct usb_task ux_aborttask; 65 enum { 66 UX_NONE, UX_CTRL, UX_BULK, UX_INTR, UX_ISOC 67 } ux_type; 68 /* ctrl/bulk/intr */ 69 struct { 70 uhci_soft_td_t **ux_stds; 71 size_t ux_nstd; 72 }; 73 union { 74 /* ctrl */ 75 struct { 76 uhci_soft_td_t *ux_setup; 77 uhci_soft_td_t *ux_data; 78 uhci_soft_td_t *ux_stat; 79 }; 80 /* bulk/intr/isoc */ 81 struct { 82 uhci_soft_td_t *ux_stdstart; 83 uhci_soft_td_t *ux_stdend; 84 }; 85 }; 86 87 TAILQ_ENTRY(uhci_xfer) ux_list; 88 int ux_curframe; 89 bool ux_isdone; /* used only when DIAGNOSTIC is defined */ 90 }; 91 92 #define UHCI_BUS2SC(bus) ((bus)->ub_hcpriv) 93 #define UHCI_PIPE2SC(pipe) UHCI_BUS2SC((pipe)->up_dev->ud_bus) 94 #define UHCI_XFER2SC(xfer) UHCI_BUS2SC((xfer)->ux_bus) 95 #define UHCI_UPIPE2SC(d) UHCI_BUS2SC((d)->pipe.up_dev->ud_bus) 96 97 #define UHCI_XFER2UXFER(xfer) ((struct uhci_xfer *)(xfer)) 98 #define UHCI_PIPE2UPIPE(pipe) ((struct uhci_pipe *)(pipe)) 99 100 /* 101 * Extra information that we need for a TD. 102 */ 103 struct uhci_soft_td { 104 uhci_td_t td; /* The real TD, must be first */ 105 uhci_soft_td_qh_t link; /* soft version of the td_link field */ 106 uhci_physaddr_t physaddr; /* TD's physical address. */ 107 usb_dma_t dma; /* TD's DMA infos */ 108 int offs; /* TD's offset in usb_dma_t */ 109 }; 110 /* 111 * Make the size such that it is a multiple of UHCI_TD_ALIGN. This way 112 * we can pack a number of soft TD together and have the real TD well 113 * aligned. 114 * NOTE: Minimum size is 32 bytes. 115 */ 116 #define UHCI_STD_SIZE ((sizeof(struct uhci_soft_td) + UHCI_TD_ALIGN - 1) / UHCI_TD_ALIGN * UHCI_TD_ALIGN) 117 #define UHCI_STD_CHUNK 128 /*(PAGE_SIZE / UHCI_TD_SIZE)*/ 118 119 /* 120 * Extra information that we need for a QH. 121 */ 122 struct uhci_soft_qh { 123 uhci_qh_t qh; /* The real QH, must be first */ 124 uhci_soft_qh_t *hlink; /* soft version of qh_hlink */ 125 uhci_soft_td_t *elink; /* soft version of qh_elink */ 126 uhci_physaddr_t physaddr; /* QH's physical address. */ 127 int pos; /* Timeslot position */ 128 usb_dma_t dma; /* QH's DMA infos */ 129 int offs; /* QH's offset in usb_dma_t */ 130 }; 131 /* See comment about UHCI_STD_SIZE. */ 132 #define UHCI_SQH_SIZE ((sizeof(struct uhci_soft_qh) + UHCI_QH_ALIGN - 1) / UHCI_QH_ALIGN * UHCI_QH_ALIGN) 133 #define UHCI_SQH_CHUNK 128 /*(PAGE_SIZE / UHCI_QH_SIZE)*/ 134 135 /* 136 * Information about an entry in the virtual frame list. 137 */ 138 struct uhci_vframe { 139 uhci_soft_td_t *htd; /* pointer to dummy TD */ 140 uhci_soft_td_t *etd; /* pointer to last TD */ 141 uhci_soft_qh_t *hqh; /* pointer to dummy QH */ 142 uhci_soft_qh_t *eqh; /* pointer to last QH */ 143 u_int bandwidth; /* max bandwidth used by this frame */ 144 }; 145 146 typedef struct uhci_softc { 147 device_t sc_dev; 148 struct usbd_bus sc_bus; 149 bus_space_tag_t iot; 150 bus_space_handle_t ioh; 151 bus_size_t sc_size; 152 153 kmutex_t sc_lock; 154 kmutex_t sc_intr_lock; 155 kcondvar_t sc_softwake_cv; 156 157 uhci_physaddr_t *sc_pframes; 158 usb_dma_t sc_dma; 159 struct uhci_vframe sc_vframes[UHCI_VFRAMELIST_COUNT]; 160 161 uhci_soft_qh_t *sc_lctl_start; /* dummy QH for low speed control */ 162 uhci_soft_qh_t *sc_lctl_end; /* last control QH */ 163 uhci_soft_qh_t *sc_hctl_start; /* dummy QH for high speed control */ 164 uhci_soft_qh_t *sc_hctl_end; /* last control QH */ 165 uhci_soft_qh_t *sc_bulk_start; /* dummy QH for bulk */ 166 uhci_soft_qh_t *sc_bulk_end; /* last bulk transfer */ 167 uhci_soft_qh_t *sc_last_qh; /* dummy QH at the end */ 168 uint32_t sc_loops; /* number of QHs that wants looping */ 169 170 uhci_soft_td_t *sc_freetds; /* TD free list */ 171 uhci_soft_qh_t *sc_freeqhs; /* QH free list */ 172 173 pool_cache_t sc_xferpool; /* free xfer pool */ 174 175 uint8_t sc_saved_sof; 176 uint16_t sc_saved_frnum; 177 178 char sc_softwake; 179 180 char sc_isreset; 181 char sc_suspend; 182 char sc_dying; 183 184 TAILQ_HEAD(, uhci_xfer) sc_intrhead; 185 186 /* Info for the root hub interrupt "pipe". */ 187 int sc_ival; /* time between root hub intrs */ 188 struct usbd_xfer *sc_intr_xfer; /* root hub interrupt transfer */ 189 struct callout sc_poll_handle; 190 191 device_t sc_child; /* /dev/usb# device */ 192 } uhci_softc_t; 193 194 int uhci_init(uhci_softc_t *); 195 int uhci_intr(void *); 196 int uhci_detach(uhci_softc_t *, int); 197 void uhci_childdet(device_t, device_t); 198 int uhci_activate(device_t, enum devact); 199 bool uhci_resume(device_t, const pmf_qual_t *); 200 bool uhci_suspend(device_t, const pmf_qual_t *); 201 202 #endif /* _UHCIVAR_H_ */ 203