xref: /netbsd-src/sys/dev/usb/uhci.c (revision f3b496ec9be495acbb17756f05d342b6b7b495e9)
1 /*	$NetBSD: uhci.c,v 1.200 2006/09/24 03:54:00 jmcneill Exp $	*/
2 /*	$FreeBSD: src/sys/dev/usb/uhci.c,v 1.33 1999/11/17 22:33:41 n_hibma Exp $	*/
3 
4 /*
5  * Copyright (c) 1998, 2004 The NetBSD Foundation, Inc.
6  * All rights reserved.
7  *
8  * This code is derived from software contributed to The NetBSD Foundation
9  * by Lennart Augustsson (lennart@augustsson.net) at
10  * Carlstedt Research & Technology.
11  *
12  * Redistribution and use in source and binary forms, with or without
13  * modification, are permitted provided that the following conditions
14  * are met:
15  * 1. Redistributions of source code must retain the above copyright
16  *    notice, this list of conditions and the following disclaimer.
17  * 2. Redistributions in binary form must reproduce the above copyright
18  *    notice, this list of conditions and the following disclaimer in the
19  *    documentation and/or other materials provided with the distribution.
20  * 3. All advertising materials mentioning features or use of this software
21  *    must display the following acknowledgement:
22  *        This product includes software developed by the NetBSD
23  *        Foundation, Inc. and its contributors.
24  * 4. Neither the name of The NetBSD Foundation nor the names of its
25  *    contributors may be used to endorse or promote products derived
26  *    from this software without specific prior written permission.
27  *
28  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
29  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
30  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
31  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
32  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
33  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
34  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
35  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
36  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
37  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38  * POSSIBILITY OF SUCH DAMAGE.
39  */
40 
41 /*
42  * USB Universal Host Controller driver.
43  * Handles e.g. PIIX3 and PIIX4.
44  *
45  * UHCI spec: http://developer.intel.com/design/USB/UHCI11D.htm
46  * USB spec: http://www.usb.org/developers/docs/usbspec.zip
47  * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf
48  *             ftp://download.intel.com/design/intarch/datashts/29056201.pdf
49  */
50 
51 #include <sys/cdefs.h>
52 __KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.200 2006/09/24 03:54:00 jmcneill Exp $");
53 
54 #include <sys/param.h>
55 #include <sys/systm.h>
56 #include <sys/kernel.h>
57 #include <sys/malloc.h>
58 #if defined(__NetBSD__) || defined(__OpenBSD__)
59 #include <sys/device.h>
60 #include <sys/select.h>
61 #include <sys/extent.h>
62 #include <uvm/uvm_extern.h>
63 #elif defined(__FreeBSD__)
64 #include <sys/module.h>
65 #include <sys/bus.h>
66 #include <machine/bus_pio.h>
67 #if defined(DIAGNOSTIC) && defined(__i386__)
68 #include <machine/cpu.h>
69 #endif
70 #endif
71 #include <sys/proc.h>
72 #include <sys/queue.h>
73 
74 #include <machine/bus.h>
75 #include <machine/endian.h>
76 
77 #include <dev/usb/usb.h>
78 #include <dev/usb/usbdi.h>
79 #include <dev/usb/usbdivar.h>
80 #include <dev/usb/usb_mem.h>
81 #include <dev/usb/usb_quirks.h>
82 
83 #include <dev/usb/uhcireg.h>
84 #include <dev/usb/uhcivar.h>
85 
86 /* Use bandwidth reclamation for control transfers. Some devices choke on it. */
87 /*#define UHCI_CTL_LOOP */
88 
89 #if defined(__FreeBSD__)
90 #include <machine/clock.h>
91 
92 #define delay(d)		DELAY(d)
93 #endif
94 
95 #if defined(__OpenBSD__)
96 struct cfdriver uhci_cd = {
97 	NULL, "uhci", DV_DULL
98 };
99 #endif
100 
101 #ifdef UHCI_DEBUG
102 uhci_softc_t *thesc;
103 #define DPRINTF(x)	if (uhcidebug) printf x
104 #define DPRINTFN(n,x)	if (uhcidebug>(n)) printf x
105 int uhcidebug = 0;
106 int uhcinoloop = 0;
107 #ifndef __NetBSD__
108 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
109 #endif
110 #else
111 #define DPRINTF(x)
112 #define DPRINTFN(n,x)
113 #endif
114 
115 /*
116  * The UHCI controller is little endian, so on big endian machines
117  * the data stored in memory needs to be swapped.
118  */
119 #if defined(__FreeBSD__) || defined(__OpenBSD__)
120 #if BYTE_ORDER == BIG_ENDIAN
121 #define htole32(x) (bswap32(x))
122 #define le32toh(x) (bswap32(x))
123 #else
124 #define htole32(x) (x)
125 #define le32toh(x) (x)
126 #endif
127 #endif
128 
129 struct uhci_pipe {
130 	struct usbd_pipe pipe;
131 	int nexttoggle;
132 
133 	u_char aborting;
134 	usbd_xfer_handle abortstart, abortend;
135 
136 	/* Info needed for different pipe kinds. */
137 	union {
138 		/* Control pipe */
139 		struct {
140 			uhci_soft_qh_t *sqh;
141 			usb_dma_t reqdma;
142 			uhci_soft_td_t *setup, *stat;
143 			u_int length;
144 		} ctl;
145 		/* Interrupt pipe */
146 		struct {
147 			int npoll;
148 			int isread;
149 			uhci_soft_qh_t **qhs;
150 		} intr;
151 		/* Bulk pipe */
152 		struct {
153 			uhci_soft_qh_t *sqh;
154 			u_int length;
155 			int isread;
156 		} bulk;
157 		/* Iso pipe */
158 		struct iso {
159 			uhci_soft_td_t **stds;
160 			int next, inuse;
161 		} iso;
162 	} u;
163 };
164 
165 Static void		uhci_globalreset(uhci_softc_t *);
166 Static usbd_status	uhci_portreset(uhci_softc_t*, int);
167 Static void		uhci_reset(uhci_softc_t *);
168 Static void		uhci_shutdown(void *v);
169 Static void		uhci_power(int, void *);
170 Static usbd_status	uhci_run(uhci_softc_t *, int run);
171 Static uhci_soft_td_t  *uhci_alloc_std(uhci_softc_t *);
172 Static void		uhci_free_std(uhci_softc_t *, uhci_soft_td_t *);
173 Static uhci_soft_qh_t  *uhci_alloc_sqh(uhci_softc_t *);
174 Static void		uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *);
175 #if 0
176 Static void		uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *,
177 					 uhci_intr_info_t *);
178 Static void		uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *);
179 #endif
180 
181 Static void		uhci_free_std_chain(uhci_softc_t *,
182 					    uhci_soft_td_t *, uhci_soft_td_t *);
183 Static usbd_status	uhci_alloc_std_chain(struct uhci_pipe *,
184 			    uhci_softc_t *, int, int, u_int16_t, usb_dma_t *,
185 			    uhci_soft_td_t **, uhci_soft_td_t **);
186 Static void		uhci_poll_hub(void *);
187 Static void		uhci_waitintr(uhci_softc_t *, usbd_xfer_handle);
188 Static void		uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *);
189 Static void		uhci_idone(uhci_intr_info_t *);
190 
191 Static void		uhci_abort_xfer(usbd_xfer_handle, usbd_status status);
192 
193 Static void		uhci_timeout(void *);
194 Static void		uhci_timeout_task(void *);
195 Static void		uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
196 Static void		uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
197 Static void		uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *);
198 Static void		uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
199 Static void		uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
200 Static void		uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *);
201 Static int		uhci_str(usb_string_descriptor_t *, int, const char *);
202 Static void		uhci_add_loop(uhci_softc_t *sc);
203 Static void		uhci_rem_loop(uhci_softc_t *sc);
204 
205 Static usbd_status	uhci_setup_isoc(usbd_pipe_handle pipe);
206 Static void		uhci_device_isoc_enter(usbd_xfer_handle);
207 
208 Static usbd_status	uhci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
209 Static void		uhci_freem(struct usbd_bus *, usb_dma_t *);
210 
211 Static usbd_xfer_handle	uhci_allocx(struct usbd_bus *);
212 Static void		uhci_freex(struct usbd_bus *, usbd_xfer_handle);
213 
214 Static usbd_status	uhci_device_ctrl_transfer(usbd_xfer_handle);
215 Static usbd_status	uhci_device_ctrl_start(usbd_xfer_handle);
216 Static void		uhci_device_ctrl_abort(usbd_xfer_handle);
217 Static void		uhci_device_ctrl_close(usbd_pipe_handle);
218 Static void		uhci_device_ctrl_done(usbd_xfer_handle);
219 
220 Static usbd_status	uhci_device_intr_transfer(usbd_xfer_handle);
221 Static usbd_status	uhci_device_intr_start(usbd_xfer_handle);
222 Static void		uhci_device_intr_abort(usbd_xfer_handle);
223 Static void		uhci_device_intr_close(usbd_pipe_handle);
224 Static void		uhci_device_intr_done(usbd_xfer_handle);
225 
226 Static usbd_status	uhci_device_bulk_transfer(usbd_xfer_handle);
227 Static usbd_status	uhci_device_bulk_start(usbd_xfer_handle);
228 Static void		uhci_device_bulk_abort(usbd_xfer_handle);
229 Static void		uhci_device_bulk_close(usbd_pipe_handle);
230 Static void		uhci_device_bulk_done(usbd_xfer_handle);
231 
232 Static usbd_status	uhci_device_isoc_transfer(usbd_xfer_handle);
233 Static usbd_status	uhci_device_isoc_start(usbd_xfer_handle);
234 Static void		uhci_device_isoc_abort(usbd_xfer_handle);
235 Static void		uhci_device_isoc_close(usbd_pipe_handle);
236 Static void		uhci_device_isoc_done(usbd_xfer_handle);
237 
238 Static usbd_status	uhci_root_ctrl_transfer(usbd_xfer_handle);
239 Static usbd_status	uhci_root_ctrl_start(usbd_xfer_handle);
240 Static void		uhci_root_ctrl_abort(usbd_xfer_handle);
241 Static void		uhci_root_ctrl_close(usbd_pipe_handle);
242 Static void		uhci_root_ctrl_done(usbd_xfer_handle);
243 
244 Static usbd_status	uhci_root_intr_transfer(usbd_xfer_handle);
245 Static usbd_status	uhci_root_intr_start(usbd_xfer_handle);
246 Static void		uhci_root_intr_abort(usbd_xfer_handle);
247 Static void		uhci_root_intr_close(usbd_pipe_handle);
248 Static void		uhci_root_intr_done(usbd_xfer_handle);
249 
250 Static usbd_status	uhci_open(usbd_pipe_handle);
251 Static void		uhci_poll(struct usbd_bus *);
252 Static void		uhci_softintr(void *);
253 
254 Static usbd_status	uhci_device_request(usbd_xfer_handle xfer);
255 
256 Static void		uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *);
257 Static void		uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *);
258 Static usbd_status	uhci_device_setintr(uhci_softc_t *sc,
259 			    struct uhci_pipe *pipe, int ival);
260 
261 Static void		uhci_device_clear_toggle(usbd_pipe_handle pipe);
262 Static void		uhci_noop(usbd_pipe_handle pipe);
263 
264 Static inline uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *,
265 						    uhci_soft_qh_t *);
266 
267 #ifdef UHCI_DEBUG
268 Static void		uhci_dump_all(uhci_softc_t *);
269 Static void		uhci_dumpregs(uhci_softc_t *);
270 Static void		uhci_dump_qhs(uhci_soft_qh_t *);
271 Static void		uhci_dump_qh(uhci_soft_qh_t *);
272 Static void		uhci_dump_tds(uhci_soft_td_t *);
273 Static void		uhci_dump_td(uhci_soft_td_t *);
274 Static void		uhci_dump_ii(uhci_intr_info_t *ii);
275 void			uhci_dump(void);
276 #endif
277 
278 #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
279 			BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
280 #define UWRITE1(sc, r, x) \
281  do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \
282  } while (/*CONSTCOND*/0)
283 #define UWRITE2(sc, r, x) \
284  do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \
285  } while (/*CONSTCOND*/0)
286 #define UWRITE4(sc, r, x) \
287  do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \
288  } while (/*CONSTCOND*/0)
289 static __inline uint8_t
290 UREAD1(uhci_softc_t *sc, bus_size_t r)
291 {
292 
293 	UBARR(sc);
294 	return bus_space_read_1(sc->iot, sc->ioh, r);
295 }
296 
297 static __inline uint16_t
298 UREAD2(uhci_softc_t *sc, bus_size_t r)
299 {
300 
301 	UBARR(sc);
302 	return bus_space_read_2(sc->iot, sc->ioh, r);
303 }
304 
305 static __inline uint32_t
306 UREAD4(uhci_softc_t *sc, bus_size_t r)
307 {
308 
309 	UBARR(sc);
310 	return bus_space_read_4(sc->iot, sc->ioh, r);
311 }
312 
313 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd)
314 #define UHCISTS(sc) UREAD2(sc, UHCI_STS)
315 
316 #define UHCI_RESET_TIMEOUT 100	/* ms, reset timeout */
317 
318 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK)
319 
320 #define UHCI_INTR_ENDPT 1
321 
322 struct usbd_bus_methods uhci_bus_methods = {
323 	uhci_open,
324 	uhci_softintr,
325 	uhci_poll,
326 	uhci_allocm,
327 	uhci_freem,
328 	uhci_allocx,
329 	uhci_freex,
330 };
331 
332 struct usbd_pipe_methods uhci_root_ctrl_methods = {
333 	uhci_root_ctrl_transfer,
334 	uhci_root_ctrl_start,
335 	uhci_root_ctrl_abort,
336 	uhci_root_ctrl_close,
337 	uhci_noop,
338 	uhci_root_ctrl_done,
339 };
340 
341 struct usbd_pipe_methods uhci_root_intr_methods = {
342 	uhci_root_intr_transfer,
343 	uhci_root_intr_start,
344 	uhci_root_intr_abort,
345 	uhci_root_intr_close,
346 	uhci_noop,
347 	uhci_root_intr_done,
348 };
349 
350 struct usbd_pipe_methods uhci_device_ctrl_methods = {
351 	uhci_device_ctrl_transfer,
352 	uhci_device_ctrl_start,
353 	uhci_device_ctrl_abort,
354 	uhci_device_ctrl_close,
355 	uhci_noop,
356 	uhci_device_ctrl_done,
357 };
358 
359 struct usbd_pipe_methods uhci_device_intr_methods = {
360 	uhci_device_intr_transfer,
361 	uhci_device_intr_start,
362 	uhci_device_intr_abort,
363 	uhci_device_intr_close,
364 	uhci_device_clear_toggle,
365 	uhci_device_intr_done,
366 };
367 
368 struct usbd_pipe_methods uhci_device_bulk_methods = {
369 	uhci_device_bulk_transfer,
370 	uhci_device_bulk_start,
371 	uhci_device_bulk_abort,
372 	uhci_device_bulk_close,
373 	uhci_device_clear_toggle,
374 	uhci_device_bulk_done,
375 };
376 
377 struct usbd_pipe_methods uhci_device_isoc_methods = {
378 	uhci_device_isoc_transfer,
379 	uhci_device_isoc_start,
380 	uhci_device_isoc_abort,
381 	uhci_device_isoc_close,
382 	uhci_noop,
383 	uhci_device_isoc_done,
384 };
385 
386 #define uhci_add_intr_info(sc, ii) \
387 	LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list)
388 #define uhci_del_intr_info(ii) \
389 	do { \
390 		LIST_REMOVE((ii), list); \
391 		(ii)->list.le_prev = NULL; \
392 	} while (0)
393 #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL)
394 
395 Static inline uhci_soft_qh_t *
396 uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh)
397 {
398 	DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh));
399 
400 	for (; pqh->hlink != sqh; pqh = pqh->hlink) {
401 #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG)
402 		if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) {
403 			printf("uhci_find_prev_qh: QH not found\n");
404 			return (NULL);
405 		}
406 #endif
407 	}
408 	return (pqh);
409 }
410 
411 void
412 uhci_globalreset(uhci_softc_t *sc)
413 {
414 	UHCICMD(sc, UHCI_CMD_GRESET);	/* global reset */
415 	usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */
416 	UHCICMD(sc, 0);			/* do nothing */
417 }
418 
419 usbd_status
420 uhci_init(uhci_softc_t *sc)
421 {
422 	usbd_status err;
423 	int i, j;
424 	uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh;
425 	uhci_soft_td_t *std;
426 
427 	DPRINTFN(1,("uhci_init: start\n"));
428 
429 #ifdef UHCI_DEBUG
430 	thesc = sc;
431 
432 	if (uhcidebug > 2)
433 		uhci_dumpregs(sc);
434 #endif
435 
436 	UWRITE2(sc, UHCI_INTR, 0);		/* disable interrupts */
437 	uhci_globalreset(sc);			/* reset the controller */
438 	uhci_reset(sc);
439 
440 #ifdef __NetBSD__
441 	usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag,
442 	    USB_MEM_RESERVE);
443 #endif
444 
445 	/* Allocate and initialize real frame array. */
446 	err = usb_allocmem(&sc->sc_bus,
447 		  UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
448 		  UHCI_FRAMELIST_ALIGN, &sc->sc_dma);
449 	if (err)
450 		return (err);
451 	sc->sc_pframes = KERNADDR(&sc->sc_dma, 0);
452 	UWRITE2(sc, UHCI_FRNUM, 0);		/* set frame number to 0 */
453 	UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/
454 
455 	/*
456 	 * Allocate a TD, inactive, that hangs from the last QH.
457 	 * This is to avoid a bug in the PIIX that makes it run berserk
458 	 * otherwise.
459 	 */
460 	std = uhci_alloc_std(sc);
461 	if (std == NULL)
462 		return (USBD_NOMEM);
463 	std->link.std = NULL;
464 	std->td.td_link = htole32(UHCI_PTR_T);
465 	std->td.td_status = htole32(0); /* inactive */
466 	std->td.td_token = htole32(0);
467 	std->td.td_buffer = htole32(0);
468 
469 	/* Allocate the dummy QH marking the end and used for looping the QHs.*/
470 	lsqh = uhci_alloc_sqh(sc);
471 	if (lsqh == NULL)
472 		return (USBD_NOMEM);
473 	lsqh->hlink = NULL;
474 	lsqh->qh.qh_hlink = htole32(UHCI_PTR_T);	/* end of QH chain */
475 	lsqh->elink = std;
476 	lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD);
477 	sc->sc_last_qh = lsqh;
478 
479 	/* Allocate the dummy QH where bulk traffic will be queued. */
480 	bsqh = uhci_alloc_sqh(sc);
481 	if (bsqh == NULL)
482 		return (USBD_NOMEM);
483 	bsqh->hlink = lsqh;
484 	bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH);
485 	bsqh->elink = NULL;
486 	bsqh->qh.qh_elink = htole32(UHCI_PTR_T);
487 	sc->sc_bulk_start = sc->sc_bulk_end = bsqh;
488 
489 	/* Allocate dummy QH where high speed control traffic will be queued. */
490 	chsqh = uhci_alloc_sqh(sc);
491 	if (chsqh == NULL)
492 		return (USBD_NOMEM);
493 	chsqh->hlink = bsqh;
494 	chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH);
495 	chsqh->elink = NULL;
496 	chsqh->qh.qh_elink = htole32(UHCI_PTR_T);
497 	sc->sc_hctl_start = sc->sc_hctl_end = chsqh;
498 
499 	/* Allocate dummy QH where control traffic will be queued. */
500 	clsqh = uhci_alloc_sqh(sc);
501 	if (clsqh == NULL)
502 		return (USBD_NOMEM);
503 	clsqh->hlink = bsqh;
504 	clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH);
505 	clsqh->elink = NULL;
506 	clsqh->qh.qh_elink = htole32(UHCI_PTR_T);
507 	sc->sc_lctl_start = sc->sc_lctl_end = clsqh;
508 
509 	/*
510 	 * Make all (virtual) frame list pointers point to the interrupt
511 	 * queue heads and the interrupt queue heads at the control
512 	 * queue head and point the physical frame list to the virtual.
513 	 */
514 	for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
515 		std = uhci_alloc_std(sc);
516 		sqh = uhci_alloc_sqh(sc);
517 		if (std == NULL || sqh == NULL)
518 			return (USBD_NOMEM);
519 		std->link.sqh = sqh;
520 		std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH);
521 		std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
522 		std->td.td_token = htole32(0);
523 		std->td.td_buffer = htole32(0);
524 		sqh->hlink = clsqh;
525 		sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH);
526 		sqh->elink = NULL;
527 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
528 		sc->sc_vframes[i].htd = std;
529 		sc->sc_vframes[i].etd = std;
530 		sc->sc_vframes[i].hqh = sqh;
531 		sc->sc_vframes[i].eqh = sqh;
532 		for (j = i;
533 		     j < UHCI_FRAMELIST_COUNT;
534 		     j += UHCI_VFRAMELIST_COUNT)
535 			sc->sc_pframes[j] = htole32(std->physaddr);
536 	}
537 
538 	LIST_INIT(&sc->sc_intrhead);
539 
540 	SIMPLEQ_INIT(&sc->sc_free_xfers);
541 
542 	usb_callout_init(sc->sc_poll_handle);
543 
544 	/* Set up the bus struct. */
545 	sc->sc_bus.methods = &uhci_bus_methods;
546 	sc->sc_bus.pipe_size = sizeof(struct uhci_pipe);
547 
548 #if defined(__NetBSD__) || defined(__OpenBSD__)
549 	sc->sc_suspend = PWR_RESUME;
550 	sc->sc_powerhook = powerhook_establish(USBDEVNAME(sc->sc_bus.bdev),
551 	    uhci_power, sc);
552 	sc->sc_shutdownhook = shutdownhook_establish(uhci_shutdown, sc);
553 #endif
554 
555 	UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */
556 
557 	DPRINTFN(1,("uhci_init: enabling\n"));
558 	UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
559 		UHCI_INTR_IOCE | UHCI_INTR_SPIE);	/* enable interrupts */
560 
561 	return (uhci_run(sc, 1));		/* and here we go... */
562 }
563 
564 #if defined(__NetBSD__) || defined(__OpenBSD__)
565 int
566 uhci_activate(device_ptr_t self, enum devact act)
567 {
568 	struct uhci_softc *sc = (struct uhci_softc *)self;
569 	int rv = 0;
570 
571 	switch (act) {
572 	case DVACT_ACTIVATE:
573 		return (EOPNOTSUPP);
574 
575 	case DVACT_DEACTIVATE:
576 		if (sc->sc_child != NULL)
577 			rv = config_deactivate(sc->sc_child);
578 		break;
579 	}
580 	return (rv);
581 }
582 
583 int
584 uhci_detach(struct uhci_softc *sc, int flags)
585 {
586 	usbd_xfer_handle xfer;
587 	int rv = 0;
588 
589 	if (sc->sc_child != NULL)
590 		rv = config_detach(sc->sc_child, flags);
591 
592 	if (rv != 0)
593 		return (rv);
594 
595 #if defined(__NetBSD__) || defined(__OpenBSD__)
596 	powerhook_disestablish(sc->sc_powerhook);
597 	shutdownhook_disestablish(sc->sc_shutdownhook);
598 #endif
599 
600 	/* Free all xfers associated with this HC. */
601 	for (;;) {
602 		xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
603 		if (xfer == NULL)
604 			break;
605 		SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
606 		free(xfer, M_USB);
607 	}
608 
609 	/* XXX free other data structures XXX */
610 
611 	return (rv);
612 }
613 #endif
614 
615 usbd_status
616 uhci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
617 {
618 	struct uhci_softc *sc = (struct uhci_softc *)bus;
619 	usbd_status status;
620 	u_int32_t n;
621 
622 	/*
623 	 * XXX
624 	 * Since we are allocating a buffer we can assume that we will
625 	 * need TDs for it.  Since we don't want to allocate those from
626 	 * an interrupt context, we allocate them here and free them again.
627 	 * This is no guarantee that we'll get the TDs next time...
628 	 */
629 	n = size / 8;
630 	if (n > 16) {
631 		u_int32_t i;
632 		uhci_soft_td_t **stds;
633 		DPRINTF(("uhci_allocm: get %d TDs\n", n));
634 		stds = malloc(sizeof(uhci_soft_td_t *) * n, M_TEMP,
635 		    M_WAITOK|M_ZERO);
636 		for(i=0; i < n; i++)
637 			stds[i] = uhci_alloc_std(sc);
638 		for(i=0; i < n; i++)
639 			if (stds[i] != NULL)
640 				uhci_free_std(sc, stds[i]);
641 		free(stds, M_TEMP);
642 	}
643 
644 
645 	status = usb_allocmem(&sc->sc_bus, size, 0, dma);
646 #ifdef __NetBSD__
647 	if (status == USBD_NOMEM)
648 		status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size);
649 #endif
650 	return status;
651 }
652 
653 void
654 uhci_freem(struct usbd_bus *bus, usb_dma_t *dma)
655 {
656 #ifdef __NetBSD__
657 	if (dma->block->flags & USB_DMA_RESERVE) {
658 		usb_reserve_freem(&((struct uhci_softc *)bus)->sc_dma_reserve,
659 		    dma);
660 		return;
661 	}
662 #endif
663 	usb_freemem(&((struct uhci_softc *)bus)->sc_bus, dma);
664 }
665 
666 usbd_xfer_handle
667 uhci_allocx(struct usbd_bus *bus)
668 {
669 	struct uhci_softc *sc = (struct uhci_softc *)bus;
670 	usbd_xfer_handle xfer;
671 
672 	xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
673 	if (xfer != NULL) {
674 		SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
675 #ifdef DIAGNOSTIC
676 		if (xfer->busy_free != XFER_FREE) {
677 			printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer,
678 			       xfer->busy_free);
679 		}
680 #endif
681 	} else {
682 		xfer = malloc(sizeof(struct uhci_xfer), M_USB, M_NOWAIT);
683 	}
684 	if (xfer != NULL) {
685 		memset(xfer, 0, sizeof (struct uhci_xfer));
686 		UXFER(xfer)->iinfo.sc = sc;
687 #ifdef DIAGNOSTIC
688 		UXFER(xfer)->iinfo.isdone = 1;
689 		xfer->busy_free = XFER_BUSY;
690 #endif
691 	}
692 	return (xfer);
693 }
694 
695 void
696 uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
697 {
698 	struct uhci_softc *sc = (struct uhci_softc *)bus;
699 
700 #ifdef DIAGNOSTIC
701 	if (xfer->busy_free != XFER_BUSY) {
702 		printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer,
703 		       xfer->busy_free);
704 		return;
705 	}
706 	xfer->busy_free = XFER_FREE;
707 	if (!UXFER(xfer)->iinfo.isdone) {
708 		printf("uhci_freex: !isdone\n");
709 		return;
710 	}
711 #endif
712 	SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
713 }
714 
715 /*
716  * Shut down the controller when the system is going down.
717  */
718 void
719 uhci_shutdown(void *v)
720 {
721 	uhci_softc_t *sc = v;
722 	int s;
723 
724 	DPRINTF(("uhci_shutdown: stopping the HC\n"));
725 
726 	/*
727 	 * Use polling mode to prevent the interrupts shutting
728 	 * us down before we shut them down.
729 	 */
730 	s = splhardusb();
731 	sc->sc_bus.use_polling++;
732 	uhci_run(sc, 0); /* stop the controller */
733 	sc->sc_bus.use_polling--;
734 	splx(s);
735 }
736 
737 /*
738  * Handle suspend/resume.
739  *
740  * We need to switch to polling mode here, because this routine is
741  * called from an interrupt context.  This is all right since we
742  * are almost suspended anyway.
743  */
744 void
745 uhci_power(int why, void *v)
746 {
747 	uhci_softc_t *sc = v;
748 	int cmd;
749 	int s;
750 
751 	s = splhardusb();
752 	cmd = UREAD2(sc, UHCI_CMD);
753 
754 	DPRINTF(("uhci_power: sc=%p, why=%d (was %d), cmd=0x%x\n",
755 		 sc, why, sc->sc_suspend, cmd));
756 
757 	switch (why) {
758 	case PWR_SUSPEND:
759 	case PWR_STANDBY:
760 #ifdef UHCI_DEBUG
761 		if (uhcidebug > 2)
762 			uhci_dumpregs(sc);
763 #endif
764 		if (sc->sc_intr_xfer != NULL)
765 			usb_uncallout(sc->sc_poll_handle, uhci_poll_hub,
766 			    sc->sc_intr_xfer);
767 		sc->sc_bus.use_polling++;
768 		uhci_run(sc, 0); /* stop the controller */
769 
770 		/* save some state if BIOS doesn't */
771 		sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM);
772 		sc->sc_saved_sof = UREAD1(sc, UHCI_SOF);
773 
774 		UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */
775 
776 		UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter global suspend */
777 		usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
778 		sc->sc_suspend = why;
779 		sc->sc_bus.use_polling--;
780 		DPRINTF(("uhci_power: cmd=0x%x\n", UREAD2(sc, UHCI_CMD)));
781 		break;
782 	case PWR_RESUME:
783 #ifdef DIAGNOSTIC
784 		if (sc->sc_suspend == PWR_RESUME)
785 			printf("uhci_power: weird, resume without suspend.\n");
786 #endif
787 		sc->sc_bus.use_polling++;
788 		sc->sc_suspend = why;
789 		if (cmd & UHCI_CMD_RS)
790 			uhci_run(sc, 0); /* in case BIOS has started it */
791 
792 		/* restore saved state */
793 		UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0));
794 		UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum);
795 		UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof);
796 
797 		UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force global resume */
798 		usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
799 		UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */
800 		UHCICMD(sc, UHCI_CMD_MAXP);
801 		UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
802 			UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* re-enable intrs */
803 		uhci_run(sc, 1); /* and start traffic again */
804 		usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
805 		sc->sc_bus.use_polling--;
806 		if (sc->sc_intr_xfer != NULL)
807 			usb_callout(sc->sc_poll_handle, sc->sc_ival,
808 				    uhci_poll_hub, sc->sc_intr_xfer);
809 #ifdef UHCI_DEBUG
810 		if (uhcidebug > 2)
811 			uhci_dumpregs(sc);
812 #endif
813 		break;
814 	case PWR_SOFTSUSPEND:
815 	case PWR_SOFTSTANDBY:
816 	case PWR_SOFTRESUME:
817 		break;
818 	}
819 	splx(s);
820 }
821 
822 #ifdef UHCI_DEBUG
823 Static void
824 uhci_dumpregs(uhci_softc_t *sc)
825 {
826 	DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, "
827 		     "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n",
828 		     USBDEVNAME(sc->sc_bus.bdev),
829 		     UREAD2(sc, UHCI_CMD),
830 		     UREAD2(sc, UHCI_STS),
831 		     UREAD2(sc, UHCI_INTR),
832 		     UREAD2(sc, UHCI_FRNUM),
833 		     UREAD4(sc, UHCI_FLBASEADDR),
834 		     UREAD1(sc, UHCI_SOF),
835 		     UREAD2(sc, UHCI_PORTSC1),
836 		     UREAD2(sc, UHCI_PORTSC2)));
837 }
838 
839 void
840 uhci_dump_td(uhci_soft_td_t *p)
841 {
842 	char sbuf[128], sbuf2[128];
843 
844 	DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx "
845 		     "token=0x%08lx buffer=0x%08lx\n",
846 		     p, (long)p->physaddr,
847 		     (long)le32toh(p->td.td_link),
848 		     (long)le32toh(p->td.td_status),
849 		     (long)le32toh(p->td.td_token),
850 		     (long)le32toh(p->td.td_buffer)));
851 
852 	bitmask_snprintf((u_int32_t)le32toh(p->td.td_link), "\20\1T\2Q\3VF",
853 			 sbuf, sizeof(sbuf));
854 	bitmask_snprintf((u_int32_t)le32toh(p->td.td_status),
855 			 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27"
856 			 "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD",
857 			 sbuf2, sizeof(sbuf2));
858 
859 	DPRINTFN(-1,("  %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d,"
860 		     "D=%d,maxlen=%d\n", sbuf, sbuf2,
861 		     UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)),
862 		     UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)),
863 		     UHCI_TD_GET_PID(le32toh(p->td.td_token)),
864 		     UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)),
865 		     UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)),
866 		     UHCI_TD_GET_DT(le32toh(p->td.td_token)),
867 		     UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token))));
868 }
869 
870 void
871 uhci_dump_qh(uhci_soft_qh_t *sqh)
872 {
873 	DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh,
874 	    (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink),
875 	    le32toh(sqh->qh.qh_elink)));
876 }
877 
878 
879 #if 1
880 void
881 uhci_dump(void)
882 {
883 	uhci_dump_all(thesc);
884 }
885 #endif
886 
887 void
888 uhci_dump_all(uhci_softc_t *sc)
889 {
890 	uhci_dumpregs(sc);
891 	printf("intrs=%d\n", sc->sc_bus.no_intrs);
892 	/*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/
893 	uhci_dump_qh(sc->sc_lctl_start);
894 }
895 
896 
897 void
898 uhci_dump_qhs(uhci_soft_qh_t *sqh)
899 {
900 	uhci_dump_qh(sqh);
901 
902 	/* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards
903 	 * Traverses sideways first, then down.
904 	 *
905 	 * QH1
906 	 * QH2
907 	 * No QH
908 	 * TD2.1
909 	 * TD2.2
910 	 * TD1.1
911 	 * etc.
912 	 *
913 	 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1.
914 	 */
915 
916 
917 	if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T))
918 		uhci_dump_qhs(sqh->hlink);
919 	else
920 		DPRINTF(("No QH\n"));
921 
922 	if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T))
923 		uhci_dump_tds(sqh->elink);
924 	else
925 		DPRINTF(("No TD\n"));
926 }
927 
928 void
929 uhci_dump_tds(uhci_soft_td_t *std)
930 {
931 	uhci_soft_td_t *td;
932 
933 	for(td = std; td != NULL; td = td->link.std) {
934 		uhci_dump_td(td);
935 
936 		/* Check whether the link pointer in this TD marks
937 		 * the link pointer as end of queue. This avoids
938 		 * printing the free list in case the queue/TD has
939 		 * already been moved there (seatbelt).
940 		 */
941 		if (le32toh(td->td.td_link) & UHCI_PTR_T ||
942 		    le32toh(td->td.td_link) == 0)
943 			break;
944 	}
945 }
946 
947 Static void
948 uhci_dump_ii(uhci_intr_info_t *ii)
949 {
950 	usbd_pipe_handle pipe;
951 	usb_endpoint_descriptor_t *ed;
952 	usbd_device_handle dev;
953 
954 #ifdef DIAGNOSTIC
955 #define DONE ii->isdone
956 #else
957 #define DONE 0
958 #endif
959         if (ii == NULL) {
960                 printf("ii NULL\n");
961                 return;
962         }
963         if (ii->xfer == NULL) {
964 		printf("ii %p: done=%d xfer=NULL\n",
965 		       ii, DONE);
966                 return;
967         }
968         pipe = ii->xfer->pipe;
969         if (pipe == NULL) {
970 		printf("ii %p: done=%d xfer=%p pipe=NULL\n",
971 		       ii, DONE, ii->xfer);
972                 return;
973 	}
974         if (pipe->endpoint == NULL) {
975 		printf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n",
976 		       ii, DONE, ii->xfer, pipe);
977                 return;
978 	}
979         if (pipe->device == NULL) {
980 		printf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n",
981 		       ii, DONE, ii->xfer, pipe);
982                 return;
983 	}
984         ed = pipe->endpoint->edesc;
985         dev = pipe->device;
986 	printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n",
987 	       ii, DONE, ii->xfer, dev,
988 	       UGETW(dev->ddesc.idVendor),
989 	       UGETW(dev->ddesc.idProduct),
990 	       dev->address, pipe,
991 	       ed->bEndpointAddress, ed->bmAttributes);
992 #undef DONE
993 }
994 
995 void uhci_dump_iis(struct uhci_softc *sc);
996 void
997 uhci_dump_iis(struct uhci_softc *sc)
998 {
999 	uhci_intr_info_t *ii;
1000 
1001 	printf("intr_info list:\n");
1002 	for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list))
1003 		uhci_dump_ii(ii);
1004 }
1005 
1006 void iidump(void);
1007 void iidump(void) { uhci_dump_iis(thesc); }
1008 
1009 #endif
1010 
1011 /*
1012  * This routine is executed periodically and simulates interrupts
1013  * from the root controller interrupt pipe for port status change.
1014  */
1015 void
1016 uhci_poll_hub(void *addr)
1017 {
1018 	usbd_xfer_handle xfer = addr;
1019 	usbd_pipe_handle pipe = xfer->pipe;
1020 	uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
1021 	int s;
1022 	u_char *p;
1023 
1024 	DPRINTFN(20, ("uhci_poll_hub\n"));
1025 
1026 	usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
1027 
1028 	p = KERNADDR(&xfer->dmabuf, 0);
1029 	p[0] = 0;
1030 	if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
1031 		p[0] |= 1<<1;
1032 	if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
1033 		p[0] |= 1<<2;
1034 	if (p[0] == 0)
1035 		/* No change, try again in a while */
1036 		return;
1037 
1038 	xfer->actlen = 1;
1039 	xfer->status = USBD_NORMAL_COMPLETION;
1040 	s = splusb();
1041 	xfer->device->bus->intr_context++;
1042 	usb_transfer_complete(xfer);
1043 	xfer->device->bus->intr_context--;
1044 	splx(s);
1045 }
1046 
1047 void
1048 uhci_root_intr_done(usbd_xfer_handle xfer)
1049 {
1050 }
1051 
1052 void
1053 uhci_root_ctrl_done(usbd_xfer_handle xfer)
1054 {
1055 }
1056 
1057 /*
1058  * Let the last QH loop back to the high speed control transfer QH.
1059  * This is what intel calls "bandwidth reclamation" and improves
1060  * USB performance a lot for some devices.
1061  * If we are already looping, just count it.
1062  */
1063 void
1064 uhci_add_loop(uhci_softc_t *sc) {
1065 #ifdef UHCI_DEBUG
1066 	if (uhcinoloop)
1067 		return;
1068 #endif
1069 	if (++sc->sc_loops == 1) {
1070 		DPRINTFN(5,("uhci_start_loop: add\n"));
1071 		/* Note, we don't loop back the soft pointer. */
1072 		sc->sc_last_qh->qh.qh_hlink =
1073 		    htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH);
1074 	}
1075 }
1076 
1077 void
1078 uhci_rem_loop(uhci_softc_t *sc) {
1079 #ifdef UHCI_DEBUG
1080 	if (uhcinoloop)
1081 		return;
1082 #endif
1083 	if (--sc->sc_loops == 0) {
1084 		DPRINTFN(5,("uhci_end_loop: remove\n"));
1085 		sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T);
1086 	}
1087 }
1088 
1089 /* Add high speed control QH, called at splusb(). */
1090 void
1091 uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1092 {
1093 	uhci_soft_qh_t *eqh;
1094 
1095 	SPLUSBCHECK;
1096 
1097 	DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh));
1098 	eqh = sc->sc_hctl_end;
1099 	sqh->hlink       = eqh->hlink;
1100 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
1101 	eqh->hlink       = sqh;
1102 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
1103 	sc->sc_hctl_end = sqh;
1104 #ifdef UHCI_CTL_LOOP
1105 	uhci_add_loop(sc);
1106 #endif
1107 }
1108 
1109 /* Remove high speed control QH, called at splusb(). */
1110 void
1111 uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1112 {
1113 	uhci_soft_qh_t *pqh;
1114 
1115 	SPLUSBCHECK;
1116 
1117 	DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh));
1118 #ifdef UHCI_CTL_LOOP
1119 	uhci_rem_loop(sc);
1120 #endif
1121 	/*
1122 	 * The T bit should be set in the elink of the QH so that the HC
1123 	 * doesn't follow the pointer.  This condition may fail if the
1124 	 * the transferred packet was short so that the QH still points
1125 	 * at the last used TD.
1126 	 * In this case we set the T bit and wait a little for the HC
1127 	 * to stop looking at the TD.
1128 	 */
1129 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
1130 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
1131 		delay(UHCI_QH_REMOVE_DELAY);
1132 	}
1133 
1134 	pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh);
1135 	pqh->hlink = sqh->hlink;
1136 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
1137 	delay(UHCI_QH_REMOVE_DELAY);
1138 	if (sc->sc_hctl_end == sqh)
1139 		sc->sc_hctl_end = pqh;
1140 }
1141 
1142 /* Add low speed control QH, called at splusb(). */
1143 void
1144 uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1145 {
1146 	uhci_soft_qh_t *eqh;
1147 
1148 	SPLUSBCHECK;
1149 
1150 	DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh));
1151 	eqh = sc->sc_lctl_end;
1152 	sqh->hlink = eqh->hlink;
1153 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
1154 	eqh->hlink = sqh;
1155 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
1156 	sc->sc_lctl_end = sqh;
1157 }
1158 
1159 /* Remove low speed control QH, called at splusb(). */
1160 void
1161 uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1162 {
1163 	uhci_soft_qh_t *pqh;
1164 
1165 	SPLUSBCHECK;
1166 
1167 	DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh));
1168 	/* See comment in uhci_remove_hs_ctrl() */
1169 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
1170 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
1171 		delay(UHCI_QH_REMOVE_DELAY);
1172 	}
1173 	pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh);
1174 	pqh->hlink = sqh->hlink;
1175 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
1176 	delay(UHCI_QH_REMOVE_DELAY);
1177 	if (sc->sc_lctl_end == sqh)
1178 		sc->sc_lctl_end = pqh;
1179 }
1180 
1181 /* Add bulk QH, called at splusb(). */
1182 void
1183 uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1184 {
1185 	uhci_soft_qh_t *eqh;
1186 
1187 	SPLUSBCHECK;
1188 
1189 	DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh));
1190 	eqh = sc->sc_bulk_end;
1191 	sqh->hlink = eqh->hlink;
1192 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
1193 	eqh->hlink = sqh;
1194 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
1195 	sc->sc_bulk_end = sqh;
1196 	uhci_add_loop(sc);
1197 }
1198 
1199 /* Remove bulk QH, called at splusb(). */
1200 void
1201 uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1202 {
1203 	uhci_soft_qh_t *pqh;
1204 
1205 	SPLUSBCHECK;
1206 
1207 	DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh));
1208 	uhci_rem_loop(sc);
1209 	/* See comment in uhci_remove_hs_ctrl() */
1210 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
1211 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
1212 		delay(UHCI_QH_REMOVE_DELAY);
1213 	}
1214 	pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh);
1215 	pqh->hlink       = sqh->hlink;
1216 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
1217 	delay(UHCI_QH_REMOVE_DELAY);
1218 	if (sc->sc_bulk_end == sqh)
1219 		sc->sc_bulk_end = pqh;
1220 }
1221 
1222 Static int uhci_intr1(uhci_softc_t *);
1223 
1224 int
1225 uhci_intr(void *arg)
1226 {
1227 	uhci_softc_t *sc = arg;
1228 
1229 	if (sc->sc_dying)
1230 		return (0);
1231 
1232 	if (sc->sc_bus.use_polling) {
1233 #ifdef DIAGNOSTIC
1234 		DPRINTFN(16, ("uhci_intr: ignored interrupt while polling\n"));
1235 #endif
1236 		return (0);
1237 	}
1238 
1239 	return (uhci_intr1(sc));
1240 }
1241 
1242 int
1243 uhci_intr1(uhci_softc_t *sc)
1244 {
1245 	int status;
1246 	int ack;
1247 
1248 #ifdef UHCI_DEBUG
1249 	if (uhcidebug > 15) {
1250 		DPRINTF(("%s: uhci_intr1\n", USBDEVNAME(sc->sc_bus.bdev)));
1251 		uhci_dumpregs(sc);
1252 	}
1253 #endif
1254 
1255 	status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS;
1256 	if (status == 0)	/* The interrupt was not for us. */
1257 		return (0);
1258 
1259 	if (sc->sc_suspend != PWR_RESUME) {
1260 		printf("%s: interrupt while not operating ignored\n",
1261 		       USBDEVNAME(sc->sc_bus.bdev));
1262 		UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */
1263 		return (0);
1264 	}
1265 
1266 	ack = 0;
1267 	if (status & UHCI_STS_USBINT)
1268 		ack |= UHCI_STS_USBINT;
1269 	if (status & UHCI_STS_USBEI)
1270 		ack |= UHCI_STS_USBEI;
1271 	if (status & UHCI_STS_RD) {
1272 		ack |= UHCI_STS_RD;
1273 #ifdef UHCI_DEBUG
1274 		printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
1275 #endif
1276 	}
1277 	if (status & UHCI_STS_HSE) {
1278 		ack |= UHCI_STS_HSE;
1279 		printf("%s: host system error\n", USBDEVNAME(sc->sc_bus.bdev));
1280 	}
1281 	if (status & UHCI_STS_HCPE) {
1282 		ack |= UHCI_STS_HCPE;
1283 		printf("%s: host controller process error\n",
1284 		       USBDEVNAME(sc->sc_bus.bdev));
1285 	}
1286 	if (status & UHCI_STS_HCH) {
1287 		/* no acknowledge needed */
1288 		if (!sc->sc_dying) {
1289 			printf("%s: host controller halted\n",
1290 			    USBDEVNAME(sc->sc_bus.bdev));
1291 #ifdef UHCI_DEBUG
1292 			uhci_dump_all(sc);
1293 #endif
1294 		}
1295 		sc->sc_dying = 1;
1296 	}
1297 
1298 	if (!ack)
1299 		return (0);	/* nothing to acknowledge */
1300 	UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */
1301 
1302 	sc->sc_bus.no_intrs++;
1303 	usb_schedsoftintr(&sc->sc_bus);
1304 
1305 	DPRINTFN(15, ("%s: uhci_intr: exit\n", USBDEVNAME(sc->sc_bus.bdev)));
1306 
1307 	return (1);
1308 }
1309 
1310 void
1311 uhci_softintr(void *v)
1312 {
1313 	uhci_softc_t *sc = v;
1314 	uhci_intr_info_t *ii, *nextii;
1315 
1316 	DPRINTFN(10,("%s: uhci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev),
1317 		     sc->sc_bus.intr_context));
1318 
1319 	sc->sc_bus.intr_context++;
1320 
1321 	/*
1322 	 * Interrupts on UHCI really suck.  When the host controller
1323 	 * interrupts because a transfer is completed there is no
1324 	 * way of knowing which transfer it was.  You can scan down
1325 	 * the TDs and QHs of the previous frame to limit the search,
1326 	 * but that assumes that the interrupt was not delayed by more
1327 	 * than 1 ms, which may not always be true (e.g. after debug
1328 	 * output on a slow console).
1329 	 * We scan all interrupt descriptors to see if any have
1330 	 * completed.
1331 	 */
1332 	for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = nextii) {
1333 		nextii = LIST_NEXT(ii, list);
1334 		uhci_check_intr(sc, ii);
1335 	}
1336 
1337 #ifdef USB_USE_SOFTINTR
1338 	if (sc->sc_softwake) {
1339 		sc->sc_softwake = 0;
1340 		wakeup(&sc->sc_softwake);
1341 	}
1342 #endif /* USB_USE_SOFTINTR */
1343 
1344 	sc->sc_bus.intr_context--;
1345 }
1346 
1347 /* Check for an interrupt. */
1348 void
1349 uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii)
1350 {
1351 	uhci_soft_td_t *std, *lstd;
1352 	u_int32_t status;
1353 
1354 	DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii));
1355 #ifdef DIAGNOSTIC
1356 	if (ii == NULL) {
1357 		printf("uhci_check_intr: no ii? %p\n", ii);
1358 		return;
1359 	}
1360 #endif
1361 	if (ii->xfer->status == USBD_CANCELLED ||
1362 	    ii->xfer->status == USBD_TIMEOUT) {
1363 		DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer));
1364 		return;
1365 	}
1366 
1367 	if (ii->stdstart == NULL)
1368 		return;
1369 	lstd = ii->stdend;
1370 #ifdef DIAGNOSTIC
1371 	if (lstd == NULL) {
1372 		printf("uhci_check_intr: std==0\n");
1373 		return;
1374 	}
1375 #endif
1376 	/*
1377 	 * If the last TD is still active we need to check whether there
1378 	 * is an error somewhere in the middle, or whether there was a
1379 	 * short packet (SPD and not ACTIVE).
1380 	 */
1381 	if (le32toh(lstd->td.td_status) & UHCI_TD_ACTIVE) {
1382 		DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii));
1383 		for (std = ii->stdstart; std != lstd; std = std->link.std) {
1384 			status = le32toh(std->td.td_status);
1385 			/* If there's an active TD the xfer isn't done. */
1386 			if (status & UHCI_TD_ACTIVE)
1387 				break;
1388 			/* Any kind of error makes the xfer done. */
1389 			if (status & UHCI_TD_STALLED)
1390 				goto done;
1391 			/* We want short packets, and it is short: it's done */
1392 			if ((status & UHCI_TD_SPD) &&
1393 			      UHCI_TD_GET_ACTLEN(status) <
1394 			      UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token)))
1395 				goto done;
1396 		}
1397 		DPRINTFN(12, ("uhci_check_intr: ii=%p std=%p still active\n",
1398 			      ii, ii->stdstart));
1399 		return;
1400 	}
1401  done:
1402 	DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii));
1403 	usb_uncallout(ii->xfer->timeout_handle, uhci_timeout, ii);
1404 	uhci_idone(ii);
1405 }
1406 
1407 /* Called at splusb() */
1408 void
1409 uhci_idone(uhci_intr_info_t *ii)
1410 {
1411 	usbd_xfer_handle xfer = ii->xfer;
1412 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
1413 	uhci_soft_td_t *std;
1414 	u_int32_t status = 0, nstatus;
1415 	int actlen;
1416 
1417 	DPRINTFN(12, ("uhci_idone: ii=%p\n", ii));
1418 #ifdef DIAGNOSTIC
1419 	{
1420 		int s = splhigh();
1421 		if (ii->isdone) {
1422 			splx(s);
1423 #ifdef UHCI_DEBUG
1424 			printf("uhci_idone: ii is done!\n   ");
1425 			uhci_dump_ii(ii);
1426 #else
1427 			printf("uhci_idone: ii=%p is done!\n", ii);
1428 #endif
1429 			return;
1430 		}
1431 		ii->isdone = 1;
1432 		splx(s);
1433 	}
1434 #endif
1435 
1436 	if (xfer->nframes != 0) {
1437 		/* Isoc transfer, do things differently. */
1438 		uhci_soft_td_t **stds = upipe->u.iso.stds;
1439 		int i, n, nframes, len;
1440 
1441 		DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii));
1442 
1443 		nframes = xfer->nframes;
1444 		actlen = 0;
1445 		n = UXFER(xfer)->curframe;
1446 		for (i = 0; i < nframes; i++) {
1447 			std = stds[n];
1448 #ifdef UHCI_DEBUG
1449 			if (uhcidebug > 5) {
1450 				DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i));
1451 				uhci_dump_td(std);
1452 			}
1453 #endif
1454 			if (++n >= UHCI_VFRAMELIST_COUNT)
1455 				n = 0;
1456 			status = le32toh(std->td.td_status);
1457 			len = UHCI_TD_GET_ACTLEN(status);
1458 			xfer->frlengths[i] = len;
1459 			actlen += len;
1460 		}
1461 		upipe->u.iso.inuse -= nframes;
1462 		xfer->actlen = actlen;
1463 		xfer->status = USBD_NORMAL_COMPLETION;
1464 		goto end;
1465 	}
1466 
1467 #ifdef UHCI_DEBUG
1468 	DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n",
1469 		      ii, xfer, upipe));
1470 	if (uhcidebug > 10)
1471 		uhci_dump_tds(ii->stdstart);
1472 #endif
1473 
1474 	/* The transfer is done, compute actual length and status. */
1475 	actlen = 0;
1476 	for (std = ii->stdstart; std != NULL; std = std->link.std) {
1477 		nstatus = le32toh(std->td.td_status);
1478 		if (nstatus & UHCI_TD_ACTIVE)
1479 			break;
1480 
1481 		status = nstatus;
1482 		if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) !=
1483 			UHCI_TD_PID_SETUP)
1484 			actlen += UHCI_TD_GET_ACTLEN(status);
1485 		else {
1486 			/*
1487 			 * UHCI will report CRCTO in addition to a STALL or NAK
1488 			 * for a SETUP transaction.  See section 3.2.2, "TD
1489 			 * CONTROL AND STATUS".
1490 			 */
1491 			if (status & (UHCI_TD_STALLED | UHCI_TD_NAK))
1492 				status &= ~UHCI_TD_CRCTO;
1493 		}
1494 	}
1495 	/* If there are left over TDs we need to update the toggle. */
1496 	if (std != NULL)
1497 		upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token));
1498 
1499 	status &= UHCI_TD_ERROR;
1500 	DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n",
1501 		      actlen, status));
1502 	xfer->actlen = actlen;
1503 	if (status != 0) {
1504 #ifdef UHCI_DEBUG
1505 		char sbuf[128];
1506 
1507 		bitmask_snprintf((u_int32_t)status,
1508 				 "\20\22BITSTUFF\23CRCTO\24NAK\25"
1509 				 "BABBLE\26DBUFFER\27STALLED\30ACTIVE",
1510 				 sbuf, sizeof(sbuf));
1511 
1512 		DPRINTFN((status == UHCI_TD_STALLED)*10,
1513 			 ("uhci_idone: error, addr=%d, endpt=0x%02x, "
1514 			  "status 0x%s\n",
1515 			  xfer->pipe->device->address,
1516 			  xfer->pipe->endpoint->edesc->bEndpointAddress,
1517 			  sbuf));
1518 #endif
1519 
1520 		if (status == UHCI_TD_STALLED)
1521 			xfer->status = USBD_STALLED;
1522 		else
1523 			xfer->status = USBD_IOERROR; /* more info XXX */
1524 	} else {
1525 		xfer->status = USBD_NORMAL_COMPLETION;
1526 	}
1527 
1528  end:
1529 	usb_transfer_complete(xfer);
1530 	DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii));
1531 }
1532 
1533 /*
1534  * Called when a request does not complete.
1535  */
1536 void
1537 uhci_timeout(void *addr)
1538 {
1539 	uhci_intr_info_t *ii = addr;
1540 	struct uhci_xfer *uxfer = UXFER(ii->xfer);
1541 	struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.pipe;
1542 	uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
1543 
1544 	DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer));
1545 
1546 	if (sc->sc_dying) {
1547 		uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT);
1548 		return;
1549 	}
1550 
1551 	/* Execute the abort in a process context. */
1552 	usb_init_task(&uxfer->abort_task, uhci_timeout_task, ii->xfer);
1553 	usb_add_task(uxfer->xfer.pipe->device, &uxfer->abort_task);
1554 }
1555 
1556 void
1557 uhci_timeout_task(void *addr)
1558 {
1559 	usbd_xfer_handle xfer = addr;
1560 	int s;
1561 
1562 	DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer));
1563 
1564 	s = splusb();
1565 	uhci_abort_xfer(xfer, USBD_TIMEOUT);
1566 	splx(s);
1567 }
1568 
1569 /*
1570  * Wait here until controller claims to have an interrupt.
1571  * Then call uhci_intr and return.  Use timeout to avoid waiting
1572  * too long.
1573  * Only used during boot when interrupts are not enabled yet.
1574  */
1575 void
1576 uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer)
1577 {
1578 	int timo = xfer->timeout;
1579 	uhci_intr_info_t *ii;
1580 
1581 	DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo));
1582 
1583 	xfer->status = USBD_IN_PROGRESS;
1584 	for (; timo >= 0; timo--) {
1585 		usb_delay_ms(&sc->sc_bus, 1);
1586 		DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS)));
1587 		if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) {
1588 			uhci_intr1(sc);
1589 			if (xfer->status != USBD_IN_PROGRESS)
1590 				return;
1591 		}
1592 	}
1593 
1594 	/* Timeout */
1595 	DPRINTF(("uhci_waitintr: timeout\n"));
1596 	for (ii = LIST_FIRST(&sc->sc_intrhead);
1597 	     ii != NULL && ii->xfer != xfer;
1598 	     ii = LIST_NEXT(ii, list))
1599 		;
1600 #ifdef DIAGNOSTIC
1601 	if (ii == NULL)
1602 		panic("uhci_waitintr: lost intr_info");
1603 #endif
1604 	uhci_idone(ii);
1605 }
1606 
1607 void
1608 uhci_poll(struct usbd_bus *bus)
1609 {
1610 	uhci_softc_t *sc = (uhci_softc_t *)bus;
1611 
1612 	if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT)
1613 		uhci_intr1(sc);
1614 }
1615 
1616 void
1617 uhci_reset(uhci_softc_t *sc)
1618 {
1619 	int n;
1620 
1621 	UHCICMD(sc, UHCI_CMD_HCRESET);
1622 	/* The reset bit goes low when the controller is done. */
1623 	for (n = 0; n < UHCI_RESET_TIMEOUT &&
1624 		    (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++)
1625 		usb_delay_ms(&sc->sc_bus, 1);
1626 	if (n >= UHCI_RESET_TIMEOUT)
1627 		printf("%s: controller did not reset\n",
1628 		       USBDEVNAME(sc->sc_bus.bdev));
1629 }
1630 
1631 usbd_status
1632 uhci_run(uhci_softc_t *sc, int run)
1633 {
1634 	int s, n, running;
1635 	u_int16_t cmd;
1636 
1637 	run = run != 0;
1638 	s = splhardusb();
1639 	DPRINTF(("uhci_run: setting run=%d\n", run));
1640 	cmd = UREAD2(sc, UHCI_CMD);
1641 	if (run)
1642 		cmd |= UHCI_CMD_RS;
1643 	else
1644 		cmd &= ~UHCI_CMD_RS;
1645 	UHCICMD(sc, cmd);
1646 	for(n = 0; n < 10; n++) {
1647 		running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH);
1648 		/* return when we've entered the state we want */
1649 		if (run == running) {
1650 			splx(s);
1651 			DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n",
1652 				 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS)));
1653 			return (USBD_NORMAL_COMPLETION);
1654 		}
1655 		usb_delay_ms(&sc->sc_bus, 1);
1656 	}
1657 	splx(s);
1658 	printf("%s: cannot %s\n", USBDEVNAME(sc->sc_bus.bdev),
1659 	       run ? "start" : "stop");
1660 	return (USBD_IOERROR);
1661 }
1662 
1663 /*
1664  * Memory management routines.
1665  *  uhci_alloc_std allocates TDs
1666  *  uhci_alloc_sqh allocates QHs
1667  * These two routines do their own free list management,
1668  * partly for speed, partly because allocating DMAable memory
1669  * has page size granularaity so much memory would be wasted if
1670  * only one TD/QH (32 bytes) was placed in each allocated chunk.
1671  */
1672 
1673 uhci_soft_td_t *
1674 uhci_alloc_std(uhci_softc_t *sc)
1675 {
1676 	uhci_soft_td_t *std;
1677 	usbd_status err;
1678 	int i, offs;
1679 	usb_dma_t dma;
1680 
1681 	if (sc->sc_freetds == NULL) {
1682 		DPRINTFN(2,("uhci_alloc_std: allocating chunk\n"));
1683 		err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK,
1684 			  UHCI_TD_ALIGN, &dma);
1685 		if (err)
1686 			return (0);
1687 		for(i = 0; i < UHCI_STD_CHUNK; i++) {
1688 			offs = i * UHCI_STD_SIZE;
1689 			std = KERNADDR(&dma, offs);
1690 			std->physaddr = DMAADDR(&dma, offs);
1691 			std->link.std = sc->sc_freetds;
1692 			sc->sc_freetds = std;
1693 		}
1694 	}
1695 	std = sc->sc_freetds;
1696 	sc->sc_freetds = std->link.std;
1697 	memset(&std->td, 0, sizeof(uhci_td_t));
1698 	return std;
1699 }
1700 
1701 void
1702 uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std)
1703 {
1704 #ifdef DIAGNOSTIC
1705 #define TD_IS_FREE 0x12345678
1706 	if (le32toh(std->td.td_token) == TD_IS_FREE) {
1707 		printf("uhci_free_std: freeing free TD %p\n", std);
1708 		return;
1709 	}
1710 	std->td.td_token = htole32(TD_IS_FREE);
1711 #endif
1712 	std->link.std = sc->sc_freetds;
1713 	sc->sc_freetds = std;
1714 }
1715 
1716 uhci_soft_qh_t *
1717 uhci_alloc_sqh(uhci_softc_t *sc)
1718 {
1719 	uhci_soft_qh_t *sqh;
1720 	usbd_status err;
1721 	int i, offs;
1722 	usb_dma_t dma;
1723 
1724 	if (sc->sc_freeqhs == NULL) {
1725 		DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n"));
1726 		err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK,
1727 			  UHCI_QH_ALIGN, &dma);
1728 		if (err)
1729 			return (0);
1730 		for(i = 0; i < UHCI_SQH_CHUNK; i++) {
1731 			offs = i * UHCI_SQH_SIZE;
1732 			sqh = KERNADDR(&dma, offs);
1733 			sqh->physaddr = DMAADDR(&dma, offs);
1734 			sqh->hlink = sc->sc_freeqhs;
1735 			sc->sc_freeqhs = sqh;
1736 		}
1737 	}
1738 	sqh = sc->sc_freeqhs;
1739 	sc->sc_freeqhs = sqh->hlink;
1740 	memset(&sqh->qh, 0, sizeof(uhci_qh_t));
1741 	return (sqh);
1742 }
1743 
1744 void
1745 uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1746 {
1747 	sqh->hlink = sc->sc_freeqhs;
1748 	sc->sc_freeqhs = sqh;
1749 }
1750 
1751 void
1752 uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std,
1753 		    uhci_soft_td_t *stdend)
1754 {
1755 	uhci_soft_td_t *p;
1756 
1757 	for (; std != stdend; std = p) {
1758 		p = std->link.std;
1759 		uhci_free_std(sc, std);
1760 	}
1761 }
1762 
1763 usbd_status
1764 uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len,
1765 		     int rd, u_int16_t flags, usb_dma_t *dma,
1766 		     uhci_soft_td_t **sp, uhci_soft_td_t **ep)
1767 {
1768 	uhci_soft_td_t *p, *lastp;
1769 	uhci_physaddr_t lastlink;
1770 	int i, ntd, l, tog, maxp;
1771 	u_int32_t status;
1772 	int addr = upipe->pipe.device->address;
1773 	int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
1774 
1775 	DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d speed=%d "
1776 		      "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len,
1777 		      upipe->pipe.device->speed, flags));
1778 	maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize);
1779 	if (maxp == 0) {
1780 		printf("uhci_alloc_std_chain: maxp=0\n");
1781 		return (USBD_INVAL);
1782 	}
1783 	ntd = (len + maxp - 1) / maxp;
1784 	if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0)
1785 		ntd++;
1786 	DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd));
1787 	if (ntd == 0) {
1788 		*sp = *ep = 0;
1789 		DPRINTFN(-1,("uhci_alloc_std_chain: ntd=0\n"));
1790 		return (USBD_NORMAL_COMPLETION);
1791 	}
1792 	tog = upipe->nexttoggle;
1793 	if (ntd % 2 == 0)
1794 		tog ^= 1;
1795 	upipe->nexttoggle = tog ^ 1;
1796 	lastp = NULL;
1797 	lastlink = UHCI_PTR_T;
1798 	ntd--;
1799 	status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE);
1800 	if (upipe->pipe.device->speed == USB_SPEED_LOW)
1801 		status |= UHCI_TD_LS;
1802 	if (flags & USBD_SHORT_XFER_OK)
1803 		status |= UHCI_TD_SPD;
1804 	for (i = ntd; i >= 0; i--) {
1805 		p = uhci_alloc_std(sc);
1806 		if (p == NULL) {
1807 			uhci_free_std_chain(sc, lastp, NULL);
1808 			return (USBD_NOMEM);
1809 		}
1810 		p->link.std = lastp;
1811 		p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD);
1812 		lastp = p;
1813 		lastlink = p->physaddr;
1814 		p->td.td_status = htole32(status);
1815 		if (i == ntd) {
1816 			/* last TD */
1817 			l = len % maxp;
1818 			if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER))
1819 				l = maxp;
1820 			*ep = p;
1821 		} else
1822 			l = maxp;
1823 		p->td.td_token =
1824 		    htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) :
1825 				 UHCI_TD_OUT(l, endpt, addr, tog));
1826 		p->td.td_buffer = htole32(DMAADDR(dma, i * maxp));
1827 		tog ^= 1;
1828 	}
1829 	*sp = lastp;
1830 	DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n",
1831 		      upipe->nexttoggle));
1832 	return (USBD_NORMAL_COMPLETION);
1833 }
1834 
1835 void
1836 uhci_device_clear_toggle(usbd_pipe_handle pipe)
1837 {
1838 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1839 	upipe->nexttoggle = 0;
1840 }
1841 
1842 void
1843 uhci_noop(usbd_pipe_handle pipe)
1844 {
1845 }
1846 
1847 usbd_status
1848 uhci_device_bulk_transfer(usbd_xfer_handle xfer)
1849 {
1850 	usbd_status err;
1851 
1852 	/* Insert last in queue. */
1853 	err = usb_insert_transfer(xfer);
1854 	if (err)
1855 		return (err);
1856 
1857 	/*
1858 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
1859 	 * so start it first.
1860 	 */
1861 	return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1862 }
1863 
1864 usbd_status
1865 uhci_device_bulk_start(usbd_xfer_handle xfer)
1866 {
1867 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
1868 	usbd_device_handle dev = upipe->pipe.device;
1869 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1870 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
1871 	uhci_soft_td_t *data, *dataend;
1872 	uhci_soft_qh_t *sqh;
1873 	usbd_status err;
1874 	int len, isread, endpt;
1875 	int s;
1876 
1877 	DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%d flags=%d ii=%p\n",
1878 		     xfer, xfer->length, xfer->flags, ii));
1879 
1880 	if (sc->sc_dying)
1881 		return (USBD_IOERROR);
1882 
1883 #ifdef DIAGNOSTIC
1884 	if (xfer->rqflags & URQ_REQUEST)
1885 		panic("uhci_device_bulk_transfer: a request");
1886 #endif
1887 
1888 	len = xfer->length;
1889 	endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
1890 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
1891 	sqh = upipe->u.bulk.sqh;
1892 
1893 	upipe->u.bulk.isread = isread;
1894 	upipe->u.bulk.length = len;
1895 
1896 	err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
1897 				   &xfer->dmabuf, &data, &dataend);
1898 	if (err)
1899 		return (err);
1900 	dataend->td.td_status |= htole32(UHCI_TD_IOC);
1901 
1902 #ifdef UHCI_DEBUG
1903 	if (uhcidebug > 8) {
1904 		DPRINTF(("uhci_device_bulk_transfer: data(1)\n"));
1905 		uhci_dump_tds(data);
1906 	}
1907 #endif
1908 
1909 	/* Set up interrupt info. */
1910 	ii->xfer = xfer;
1911 	ii->stdstart = data;
1912 	ii->stdend = dataend;
1913 #ifdef DIAGNOSTIC
1914 	if (!ii->isdone) {
1915 		printf("uhci_device_bulk_transfer: not done, ii=%p\n", ii);
1916 	}
1917 	ii->isdone = 0;
1918 #endif
1919 
1920 	sqh->elink = data;
1921 	sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
1922 
1923 	s = splusb();
1924 	uhci_add_bulk(sc, sqh);
1925 	uhci_add_intr_info(sc, ii);
1926 
1927 	if (xfer->timeout && !sc->sc_bus.use_polling) {
1928 		usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
1929 			    uhci_timeout, ii);
1930 	}
1931 	xfer->status = USBD_IN_PROGRESS;
1932 	splx(s);
1933 
1934 #ifdef UHCI_DEBUG
1935 	if (uhcidebug > 10) {
1936 		DPRINTF(("uhci_device_bulk_transfer: data(2)\n"));
1937 		uhci_dump_tds(data);
1938 	}
1939 #endif
1940 
1941 	if (sc->sc_bus.use_polling)
1942 		uhci_waitintr(sc, xfer);
1943 
1944 	return (USBD_IN_PROGRESS);
1945 }
1946 
1947 /* Abort a device bulk request. */
1948 void
1949 uhci_device_bulk_abort(usbd_xfer_handle xfer)
1950 {
1951 	DPRINTF(("uhci_device_bulk_abort:\n"));
1952 	uhci_abort_xfer(xfer, USBD_CANCELLED);
1953 }
1954 
1955 /*
1956  * Abort a device request.
1957  * If this routine is called at splusb() it guarantees that the request
1958  * will be removed from the hardware scheduling and that the callback
1959  * for it will be called with USBD_CANCELLED status.
1960  * It's impossible to guarantee that the requested transfer will not
1961  * have happened since the hardware runs concurrently.
1962  * If the transaction has already happened we rely on the ordinary
1963  * interrupt processing to process it.
1964  */
1965 void
1966 uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
1967 {
1968 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
1969 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
1970 	uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
1971 	uhci_soft_td_t *std;
1972 	int s;
1973 	int wake;
1974 
1975 	DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status));
1976 
1977 	if (sc->sc_dying) {
1978 		/* If we're dying, just do the software part. */
1979 		s = splusb();
1980 		xfer->status = status;	/* make software ignore it */
1981 		usb_uncallout(xfer->timeout_handle, uhci_timeout, xfer);
1982 		usb_transfer_complete(xfer);
1983 		splx(s);
1984 		return;
1985 	}
1986 
1987 	if (xfer->device->bus->intr_context || !curproc)
1988 		panic("uhci_abort_xfer: not in process context");
1989 
1990 	/*
1991 	 * If an abort is already in progress then just wait for it to
1992 	 * complete and return.
1993 	 */
1994 	if (xfer->hcflags & UXFER_ABORTING) {
1995 		DPRINTFN(2, ("uhci_abort_xfer: already aborting\n"));
1996 #ifdef DIAGNOSTIC
1997 		if (status == USBD_TIMEOUT)
1998 			printf("uhci_abort_xfer: TIMEOUT while aborting\n");
1999 #endif
2000 		/* Override the status which might be USBD_TIMEOUT. */
2001 		xfer->status = status;
2002 		DPRINTFN(2, ("uhci_abort_xfer: waiting for abort to finish\n"));
2003 		xfer->hcflags |= UXFER_ABORTWAIT;
2004 		while (xfer->hcflags & UXFER_ABORTING)
2005 			tsleep(&xfer->hcflags, PZERO, "uhciaw", 0);
2006 		return;
2007 	}
2008 	xfer->hcflags |= UXFER_ABORTING;
2009 
2010 	/*
2011 	 * Step 1: Make interrupt routine and hardware ignore xfer.
2012 	 */
2013 	s = splusb();
2014 	xfer->status = status;	/* make software ignore it */
2015 	usb_uncallout(xfer->timeout_handle, uhci_timeout, ii);
2016 	DPRINTFN(1,("uhci_abort_xfer: stop ii=%p\n", ii));
2017 	for (std = ii->stdstart; std != NULL; std = std->link.std)
2018 		std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
2019 	splx(s);
2020 
2021 	/*
2022 	 * Step 2: Wait until we know hardware has finished any possible
2023 	 * use of the xfer.  Also make sure the soft interrupt routine
2024 	 * has run.
2025 	 */
2026 	usb_delay_ms(upipe->pipe.device->bus, 2); /* Hardware finishes in 1ms */
2027 	s = splusb();
2028 #ifdef USB_USE_SOFTINTR
2029 	sc->sc_softwake = 1;
2030 #endif /* USB_USE_SOFTINTR */
2031 	usb_schedsoftintr(&sc->sc_bus);
2032 #ifdef USB_USE_SOFTINTR
2033 	DPRINTFN(1,("uhci_abort_xfer: tsleep\n"));
2034 	tsleep(&sc->sc_softwake, PZERO, "uhciab", 0);
2035 #endif /* USB_USE_SOFTINTR */
2036 	splx(s);
2037 
2038 	/*
2039 	 * Step 3: Execute callback.
2040 	 */
2041 	DPRINTFN(1,("uhci_abort_xfer: callback\n"));
2042 	s = splusb();
2043 #ifdef DIAGNOSTIC
2044 	ii->isdone = 1;
2045 #endif
2046 	wake = xfer->hcflags & UXFER_ABORTWAIT;
2047 	xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT);
2048 	usb_transfer_complete(xfer);
2049 	if (wake)
2050 		wakeup(&xfer->hcflags);
2051 	splx(s);
2052 }
2053 
2054 /* Close a device bulk pipe. */
2055 void
2056 uhci_device_bulk_close(usbd_pipe_handle pipe)
2057 {
2058 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2059 	usbd_device_handle dev = upipe->pipe.device;
2060 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2061 
2062 	uhci_free_sqh(sc, upipe->u.bulk.sqh);
2063 }
2064 
2065 usbd_status
2066 uhci_device_ctrl_transfer(usbd_xfer_handle xfer)
2067 {
2068 	usbd_status err;
2069 
2070 	/* Insert last in queue. */
2071 	err = usb_insert_transfer(xfer);
2072 	if (err)
2073 		return (err);
2074 
2075 	/*
2076 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
2077 	 * so start it first.
2078 	 */
2079 	return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2080 }
2081 
2082 usbd_status
2083 uhci_device_ctrl_start(usbd_xfer_handle xfer)
2084 {
2085 	uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
2086 	usbd_status err;
2087 
2088 	if (sc->sc_dying)
2089 		return (USBD_IOERROR);
2090 
2091 #ifdef DIAGNOSTIC
2092 	if (!(xfer->rqflags & URQ_REQUEST))
2093 		panic("uhci_device_ctrl_transfer: not a request");
2094 #endif
2095 
2096 	err = uhci_device_request(xfer);
2097 	if (err)
2098 		return (err);
2099 
2100 	if (sc->sc_bus.use_polling)
2101 		uhci_waitintr(sc, xfer);
2102 	return (USBD_IN_PROGRESS);
2103 }
2104 
2105 usbd_status
2106 uhci_device_intr_transfer(usbd_xfer_handle xfer)
2107 {
2108 	usbd_status err;
2109 
2110 	/* Insert last in queue. */
2111 	err = usb_insert_transfer(xfer);
2112 	if (err)
2113 		return (err);
2114 
2115 	/*
2116 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
2117 	 * so start it first.
2118 	 */
2119 	return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2120 }
2121 
2122 usbd_status
2123 uhci_device_intr_start(usbd_xfer_handle xfer)
2124 {
2125 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2126 	usbd_device_handle dev = upipe->pipe.device;
2127 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2128 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2129 	uhci_soft_td_t *data, *dataend;
2130 	uhci_soft_qh_t *sqh;
2131 	usbd_status err;
2132 	int isread, endpt;
2133 	int i, s;
2134 
2135 	if (sc->sc_dying)
2136 		return (USBD_IOERROR);
2137 
2138 	DPRINTFN(3,("uhci_device_intr_transfer: xfer=%p len=%d flags=%d\n",
2139 		    xfer, xfer->length, xfer->flags));
2140 
2141 #ifdef DIAGNOSTIC
2142 	if (xfer->rqflags & URQ_REQUEST)
2143 		panic("uhci_device_intr_transfer: a request");
2144 #endif
2145 
2146 	endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
2147 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2148 
2149 	upipe->u.intr.isread = isread;
2150 
2151 	err = uhci_alloc_std_chain(upipe, sc, xfer->length, isread,
2152 				   xfer->flags, &xfer->dmabuf, &data,
2153 				   &dataend);
2154 	if (err)
2155 		return (err);
2156 	dataend->td.td_status |= htole32(UHCI_TD_IOC);
2157 
2158 #ifdef UHCI_DEBUG
2159 	if (uhcidebug > 10) {
2160 		DPRINTF(("uhci_device_intr_transfer: data(1)\n"));
2161 		uhci_dump_tds(data);
2162 		uhci_dump_qh(upipe->u.intr.qhs[0]);
2163 	}
2164 #endif
2165 
2166 	s = splusb();
2167 	/* Set up interrupt info. */
2168 	ii->xfer = xfer;
2169 	ii->stdstart = data;
2170 	ii->stdend = dataend;
2171 #ifdef DIAGNOSTIC
2172 	if (!ii->isdone) {
2173 		printf("uhci_device_intr_transfer: not done, ii=%p\n", ii);
2174 	}
2175 	ii->isdone = 0;
2176 #endif
2177 
2178 	DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n",
2179 		     upipe->u.intr.qhs[0]));
2180 	for (i = 0; i < upipe->u.intr.npoll; i++) {
2181 		sqh = upipe->u.intr.qhs[i];
2182 		sqh->elink = data;
2183 		sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
2184 	}
2185 	uhci_add_intr_info(sc, ii);
2186 	xfer->status = USBD_IN_PROGRESS;
2187 	splx(s);
2188 
2189 #ifdef UHCI_DEBUG
2190 	if (uhcidebug > 10) {
2191 		DPRINTF(("uhci_device_intr_transfer: data(2)\n"));
2192 		uhci_dump_tds(data);
2193 		uhci_dump_qh(upipe->u.intr.qhs[0]);
2194 	}
2195 #endif
2196 
2197 	return (USBD_IN_PROGRESS);
2198 }
2199 
2200 /* Abort a device control request. */
2201 void
2202 uhci_device_ctrl_abort(usbd_xfer_handle xfer)
2203 {
2204 	DPRINTF(("uhci_device_ctrl_abort:\n"));
2205 	uhci_abort_xfer(xfer, USBD_CANCELLED);
2206 }
2207 
2208 /* Close a device control pipe. */
2209 void
2210 uhci_device_ctrl_close(usbd_pipe_handle pipe)
2211 {
2212 }
2213 
2214 /* Abort a device interrupt request. */
2215 void
2216 uhci_device_intr_abort(usbd_xfer_handle xfer)
2217 {
2218 	DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer));
2219 	if (xfer->pipe->intrxfer == xfer) {
2220 		DPRINTFN(1,("uhci_device_intr_abort: remove\n"));
2221 		xfer->pipe->intrxfer = NULL;
2222 	}
2223 	uhci_abort_xfer(xfer, USBD_CANCELLED);
2224 }
2225 
2226 /* Close a device interrupt pipe. */
2227 void
2228 uhci_device_intr_close(usbd_pipe_handle pipe)
2229 {
2230 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2231 	uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
2232 	int i, npoll;
2233 	int s;
2234 
2235 	/* Unlink descriptors from controller data structures. */
2236 	npoll = upipe->u.intr.npoll;
2237 	s = splusb();
2238 	for (i = 0; i < npoll; i++)
2239 		uhci_remove_intr(sc, upipe->u.intr.qhs[i]);
2240 	splx(s);
2241 
2242 	/*
2243 	 * We now have to wait for any activity on the physical
2244 	 * descriptors to stop.
2245 	 */
2246 	usb_delay_ms(&sc->sc_bus, 2);
2247 
2248 	for(i = 0; i < npoll; i++)
2249 		uhci_free_sqh(sc, upipe->u.intr.qhs[i]);
2250 	free(upipe->u.intr.qhs, M_USBHC);
2251 
2252 	/* XXX free other resources */
2253 }
2254 
2255 usbd_status
2256 uhci_device_request(usbd_xfer_handle xfer)
2257 {
2258 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2259 	usb_device_request_t *req = &xfer->request;
2260 	usbd_device_handle dev = upipe->pipe.device;
2261 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2262 	int addr = dev->address;
2263 	int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
2264 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2265 	uhci_soft_td_t *setup, *data, *stat, *next, *dataend;
2266 	uhci_soft_qh_t *sqh;
2267 	int len;
2268 	u_int32_t ls;
2269 	usbd_status err;
2270 	int isread;
2271 	int s;
2272 
2273 	DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, "
2274 		    "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
2275 		    req->bmRequestType, req->bRequest, UGETW(req->wValue),
2276 		    UGETW(req->wIndex), UGETW(req->wLength),
2277 		    addr, endpt));
2278 
2279 	ls = dev->speed == USB_SPEED_LOW ? UHCI_TD_LS : 0;
2280 	isread = req->bmRequestType & UT_READ;
2281 	len = UGETW(req->wLength);
2282 
2283 	setup = upipe->u.ctl.setup;
2284 	stat = upipe->u.ctl.stat;
2285 	sqh = upipe->u.ctl.sqh;
2286 
2287 	/* Set up data transaction */
2288 	if (len != 0) {
2289 		upipe->nexttoggle = 1;
2290 		err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
2291 					   &xfer->dmabuf, &data, &dataend);
2292 		if (err)
2293 			return (err);
2294 		next = data;
2295 		dataend->link.std = stat;
2296 		dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_VF | UHCI_PTR_TD);
2297 	} else {
2298 		next = stat;
2299 	}
2300 	upipe->u.ctl.length = len;
2301 
2302 	memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req);
2303 
2304 	setup->link.std = next;
2305 	setup->td.td_link = htole32(next->physaddr | UHCI_PTR_VF | UHCI_PTR_TD);
2306 	setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
2307 		UHCI_TD_ACTIVE);
2308 	setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr));
2309 	setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0));
2310 
2311 	stat->link.std = NULL;
2312 	stat->td.td_link = htole32(UHCI_PTR_T);
2313 	stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
2314 		UHCI_TD_ACTIVE | UHCI_TD_IOC);
2315 	stat->td.td_token =
2316 		htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) :
2317 		                 UHCI_TD_IN (0, endpt, addr, 1));
2318 	stat->td.td_buffer = htole32(0);
2319 
2320 #ifdef UHCI_DEBUG
2321 	if (uhcidebug > 10) {
2322 		DPRINTF(("uhci_device_request: before transfer\n"));
2323 		uhci_dump_tds(setup);
2324 	}
2325 #endif
2326 
2327 	/* Set up interrupt info. */
2328 	ii->xfer = xfer;
2329 	ii->stdstart = setup;
2330 	ii->stdend = stat;
2331 #ifdef DIAGNOSTIC
2332 	if (!ii->isdone) {
2333 		printf("uhci_device_request: not done, ii=%p\n", ii);
2334 	}
2335 	ii->isdone = 0;
2336 #endif
2337 
2338 	sqh->elink = setup;
2339 	sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD);
2340 
2341 	s = splusb();
2342 	if (dev->speed == USB_SPEED_LOW)
2343 		uhci_add_ls_ctrl(sc, sqh);
2344 	else
2345 		uhci_add_hs_ctrl(sc, sqh);
2346 	uhci_add_intr_info(sc, ii);
2347 #ifdef UHCI_DEBUG
2348 	if (uhcidebug > 12) {
2349 		uhci_soft_td_t *std;
2350 		uhci_soft_qh_t *xqh;
2351 		uhci_soft_qh_t *sxqh;
2352 		int maxqh = 0;
2353 		uhci_physaddr_t link;
2354 		DPRINTF(("uhci_enter_ctl_q: follow from [0]\n"));
2355 		for (std = sc->sc_vframes[0].htd, link = 0;
2356 		     (link & UHCI_PTR_QH) == 0;
2357 		     std = std->link.std) {
2358 			link = le32toh(std->td.td_link);
2359 			uhci_dump_td(std);
2360 		}
2361 		sxqh = (uhci_soft_qh_t *)std;
2362 		uhci_dump_qh(sxqh);
2363 		for (xqh = sxqh;
2364 		     xqh != NULL;
2365 		     xqh = (maxqh++ == 5 || xqh->hlink == sxqh ||
2366                             xqh->hlink == xqh ? NULL : xqh->hlink)) {
2367 			uhci_dump_qh(xqh);
2368 		}
2369 		DPRINTF(("Enqueued QH:\n"));
2370 		uhci_dump_qh(sqh);
2371 		uhci_dump_tds(sqh->elink);
2372 	}
2373 #endif
2374 	if (xfer->timeout && !sc->sc_bus.use_polling) {
2375 		usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
2376 			    uhci_timeout, ii);
2377 	}
2378 	xfer->status = USBD_IN_PROGRESS;
2379 	splx(s);
2380 
2381 	return (USBD_NORMAL_COMPLETION);
2382 }
2383 
2384 usbd_status
2385 uhci_device_isoc_transfer(usbd_xfer_handle xfer)
2386 {
2387 	usbd_status err;
2388 
2389 	DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer));
2390 
2391 	/* Put it on our queue, */
2392 	err = usb_insert_transfer(xfer);
2393 
2394 	/* bail out on error, */
2395 	if (err && err != USBD_IN_PROGRESS)
2396 		return (err);
2397 
2398 	/* XXX should check inuse here */
2399 
2400 	/* insert into schedule, */
2401 	uhci_device_isoc_enter(xfer);
2402 
2403 	/* and start if the pipe wasn't running */
2404 	if (!err)
2405 		uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
2406 
2407 	return (err);
2408 }
2409 
2410 void
2411 uhci_device_isoc_enter(usbd_xfer_handle xfer)
2412 {
2413 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2414 	usbd_device_handle dev = upipe->pipe.device;
2415 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2416 	struct iso *iso = &upipe->u.iso;
2417 	uhci_soft_td_t *std;
2418 	u_int32_t buf, len, status;
2419 	int s, i, next, nframes;
2420 
2421 	DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p "
2422 		    "nframes=%d\n",
2423 		    iso->inuse, iso->next, xfer, xfer->nframes));
2424 
2425 	if (sc->sc_dying)
2426 		return;
2427 
2428 	if (xfer->status == USBD_IN_PROGRESS) {
2429 		/* This request has already been entered into the frame list */
2430 		printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer);
2431 		/* XXX */
2432 	}
2433 
2434 #ifdef DIAGNOSTIC
2435 	if (iso->inuse >= UHCI_VFRAMELIST_COUNT)
2436 		printf("uhci_device_isoc_enter: overflow!\n");
2437 #endif
2438 
2439 	next = iso->next;
2440 	if (next == -1) {
2441 		/* Not in use yet, schedule it a few frames ahead. */
2442 		next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT;
2443 		DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next));
2444 	}
2445 
2446 	xfer->status = USBD_IN_PROGRESS;
2447 	UXFER(xfer)->curframe = next;
2448 
2449 	buf = DMAADDR(&xfer->dmabuf, 0);
2450 	status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) |
2451 				     UHCI_TD_ACTIVE |
2452 				     UHCI_TD_IOS);
2453 	nframes = xfer->nframes;
2454 	s = splusb();
2455 	for (i = 0; i < nframes; i++) {
2456 		std = iso->stds[next];
2457 		if (++next >= UHCI_VFRAMELIST_COUNT)
2458 			next = 0;
2459 		len = xfer->frlengths[i];
2460 		std->td.td_buffer = htole32(buf);
2461 		if (i == nframes - 1)
2462 			status |= UHCI_TD_IOC;
2463 		std->td.td_status = htole32(status);
2464 		std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK);
2465 		std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len));
2466 #ifdef UHCI_DEBUG
2467 		if (uhcidebug > 5) {
2468 			DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i));
2469 			uhci_dump_td(std);
2470 		}
2471 #endif
2472 		buf += len;
2473 	}
2474 	iso->next = next;
2475 	iso->inuse += xfer->nframes;
2476 
2477 	splx(s);
2478 }
2479 
2480 usbd_status
2481 uhci_device_isoc_start(usbd_xfer_handle xfer)
2482 {
2483 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2484 	uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
2485 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2486 	uhci_soft_td_t *end;
2487 	int s, i;
2488 
2489 	DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer));
2490 
2491 	if (sc->sc_dying)
2492 		return (USBD_IOERROR);
2493 
2494 #ifdef DIAGNOSTIC
2495 	if (xfer->status != USBD_IN_PROGRESS)
2496 		printf("uhci_device_isoc_start: not in progress %p\n", xfer);
2497 #endif
2498 
2499 	/* Find the last TD */
2500 	i = UXFER(xfer)->curframe + xfer->nframes;
2501 	if (i >= UHCI_VFRAMELIST_COUNT)
2502 		i -= UHCI_VFRAMELIST_COUNT;
2503 	end = upipe->u.iso.stds[i];
2504 
2505 #ifdef DIAGNOSTIC
2506 	if (end == NULL) {
2507 		printf("uhci_device_isoc_start: end == NULL\n");
2508 		return (USBD_INVAL);
2509 	}
2510 #endif
2511 
2512 	s = splusb();
2513 
2514 	/* Set up interrupt info. */
2515 	ii->xfer = xfer;
2516 	ii->stdstart = end;
2517 	ii->stdend = end;
2518 #ifdef DIAGNOSTIC
2519 	if (!ii->isdone)
2520 		printf("uhci_device_isoc_start: not done, ii=%p\n", ii);
2521 	ii->isdone = 0;
2522 #endif
2523 	uhci_add_intr_info(sc, ii);
2524 
2525 	splx(s);
2526 
2527 	return (USBD_IN_PROGRESS);
2528 }
2529 
2530 void
2531 uhci_device_isoc_abort(usbd_xfer_handle xfer)
2532 {
2533 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2534 	uhci_soft_td_t **stds = upipe->u.iso.stds;
2535 	uhci_soft_td_t *std;
2536 	int i, n, s, nframes, maxlen, len;
2537 
2538 	s = splusb();
2539 
2540 	/* Transfer is already done. */
2541 	if (xfer->status != USBD_NOT_STARTED &&
2542 	    xfer->status != USBD_IN_PROGRESS) {
2543 		splx(s);
2544 		return;
2545 	}
2546 
2547 	/* Give xfer the requested abort code. */
2548 	xfer->status = USBD_CANCELLED;
2549 
2550 	/* make hardware ignore it, */
2551 	nframes = xfer->nframes;
2552 	n = UXFER(xfer)->curframe;
2553 	maxlen = 0;
2554 	for (i = 0; i < nframes; i++) {
2555 		std = stds[n];
2556 		std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
2557 		len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token));
2558 		if (len > maxlen)
2559 			maxlen = len;
2560 		if (++n >= UHCI_VFRAMELIST_COUNT)
2561 			n = 0;
2562 	}
2563 
2564 	/* and wait until we are sure the hardware has finished. */
2565 	delay(maxlen);
2566 
2567 #ifdef DIAGNOSTIC
2568 	UXFER(xfer)->iinfo.isdone = 1;
2569 #endif
2570 	/* Run callback and remove from interrupt list. */
2571 	usb_transfer_complete(xfer);
2572 
2573 	splx(s);
2574 }
2575 
2576 void
2577 uhci_device_isoc_close(usbd_pipe_handle pipe)
2578 {
2579 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2580 	usbd_device_handle dev = upipe->pipe.device;
2581 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2582 	uhci_soft_td_t *std, *vstd;
2583 	struct iso *iso;
2584 	int i, s;
2585 
2586 	/*
2587 	 * Make sure all TDs are marked as inactive.
2588 	 * Wait for completion.
2589 	 * Unschedule.
2590 	 * Deallocate.
2591 	 */
2592 	iso = &upipe->u.iso;
2593 
2594 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++)
2595 		iso->stds[i]->td.td_status &= htole32(~UHCI_TD_ACTIVE);
2596 	usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */
2597 
2598 	s = splusb();
2599 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2600 		std = iso->stds[i];
2601 		for (vstd = sc->sc_vframes[i].htd;
2602 		     vstd != NULL && vstd->link.std != std;
2603 		     vstd = vstd->link.std)
2604 			;
2605 		if (vstd == NULL) {
2606 			/*panic*/
2607 			printf("uhci_device_isoc_close: %p not found\n", std);
2608 			splx(s);
2609 			return;
2610 		}
2611 		vstd->link = std->link;
2612 		vstd->td.td_link = std->td.td_link;
2613 		uhci_free_std(sc, std);
2614 	}
2615 	splx(s);
2616 
2617 	free(iso->stds, M_USBHC);
2618 }
2619 
2620 usbd_status
2621 uhci_setup_isoc(usbd_pipe_handle pipe)
2622 {
2623 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2624 	usbd_device_handle dev = upipe->pipe.device;
2625 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2626 	int addr = upipe->pipe.device->address;
2627 	int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
2628 	int rd = UE_GET_DIR(endpt) == UE_DIR_IN;
2629 	uhci_soft_td_t *std, *vstd;
2630 	u_int32_t token;
2631 	struct iso *iso;
2632 	int i, s;
2633 
2634 	iso = &upipe->u.iso;
2635 	iso->stds = malloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *),
2636 			   M_USBHC, M_WAITOK);
2637 
2638 	token = rd ? UHCI_TD_IN (0, endpt, addr, 0) :
2639 		     UHCI_TD_OUT(0, endpt, addr, 0);
2640 
2641 	/* Allocate the TDs and mark as inactive; */
2642 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2643 		std = uhci_alloc_std(sc);
2644 		if (std == 0)
2645 			goto bad;
2646 		std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
2647 		std->td.td_token = htole32(token);
2648 		iso->stds[i] = std;
2649 	}
2650 
2651 	/* Insert TDs into schedule. */
2652 	s = splusb();
2653 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2654 		std = iso->stds[i];
2655 		vstd = sc->sc_vframes[i].htd;
2656 		std->link = vstd->link;
2657 		std->td.td_link = vstd->td.td_link;
2658 		vstd->link.std = std;
2659 		vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD);
2660 	}
2661 	splx(s);
2662 
2663 	iso->next = -1;
2664 	iso->inuse = 0;
2665 
2666 	return (USBD_NORMAL_COMPLETION);
2667 
2668  bad:
2669 	while (--i >= 0)
2670 		uhci_free_std(sc, iso->stds[i]);
2671 	free(iso->stds, M_USBHC);
2672 	return (USBD_NOMEM);
2673 }
2674 
2675 void
2676 uhci_device_isoc_done(usbd_xfer_handle xfer)
2677 {
2678 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2679 
2680 	DPRINTFN(4, ("uhci_isoc_done: length=%d, busy_free=0x%08x\n",
2681 			xfer->actlen, xfer->busy_free));
2682 
2683 	if (ii->xfer != xfer)
2684 		/* Not on interrupt list, ignore it. */
2685 		return;
2686 
2687 	if (!uhci_active_intr_info(ii))
2688 		return;
2689 
2690 #ifdef DIAGNOSTIC
2691         if (ii->stdend == NULL) {
2692                 printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer);
2693 #ifdef UHCI_DEBUG
2694 		uhci_dump_ii(ii);
2695 #endif
2696 		return;
2697 	}
2698 #endif
2699 
2700 	/* Turn off the interrupt since it is active even if the TD is not. */
2701 	ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC);
2702 
2703 	uhci_del_intr_info(ii);	/* remove from active list */
2704 }
2705 
2706 void
2707 uhci_device_intr_done(usbd_xfer_handle xfer)
2708 {
2709 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2710 	uhci_softc_t *sc = ii->sc;
2711 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2712 	uhci_soft_qh_t *sqh;
2713 	int i, npoll;
2714 
2715 	DPRINTFN(5, ("uhci_device_intr_done: length=%d\n", xfer->actlen));
2716 
2717 	npoll = upipe->u.intr.npoll;
2718 	for(i = 0; i < npoll; i++) {
2719 		sqh = upipe->u.intr.qhs[i];
2720 		sqh->elink = NULL;
2721 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
2722 	}
2723 	uhci_free_std_chain(sc, ii->stdstart, NULL);
2724 
2725 	/* XXX Wasteful. */
2726 	if (xfer->pipe->repeat) {
2727 		uhci_soft_td_t *data, *dataend;
2728 
2729 		DPRINTFN(5,("uhci_device_intr_done: requeing\n"));
2730 
2731 		/* This alloc cannot fail since we freed the chain above. */
2732 		uhci_alloc_std_chain(upipe, sc, xfer->length, 1, xfer->flags,
2733 				     &xfer->dmabuf, &data, &dataend);
2734 		dataend->td.td_status |= htole32(UHCI_TD_IOC);
2735 
2736 #ifdef UHCI_DEBUG
2737 		if (uhcidebug > 10) {
2738 			DPRINTF(("uhci_device_intr_done: data(1)\n"));
2739 			uhci_dump_tds(data);
2740 			uhci_dump_qh(upipe->u.intr.qhs[0]);
2741 		}
2742 #endif
2743 
2744 		ii->stdstart = data;
2745 		ii->stdend = dataend;
2746 #ifdef DIAGNOSTIC
2747 		if (!ii->isdone) {
2748 			printf("uhci_device_intr_done: not done, ii=%p\n", ii);
2749 		}
2750 		ii->isdone = 0;
2751 #endif
2752 		for (i = 0; i < npoll; i++) {
2753 			sqh = upipe->u.intr.qhs[i];
2754 			sqh->elink = data;
2755 			sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
2756 		}
2757 		xfer->status = USBD_IN_PROGRESS;
2758 		/* The ii is already on the examined list, just leave it. */
2759 	} else {
2760 		DPRINTFN(5,("uhci_device_intr_done: removing\n"));
2761 		if (uhci_active_intr_info(ii))
2762 			uhci_del_intr_info(ii);
2763 	}
2764 }
2765 
2766 /* Deallocate request data structures */
2767 void
2768 uhci_device_ctrl_done(usbd_xfer_handle xfer)
2769 {
2770 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2771 	uhci_softc_t *sc = ii->sc;
2772 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2773 
2774 #ifdef DIAGNOSTIC
2775 	if (!(xfer->rqflags & URQ_REQUEST))
2776 		panic("uhci_device_ctrl_done: not a request");
2777 #endif
2778 
2779 	if (!uhci_active_intr_info(ii))
2780 		return;
2781 
2782 	uhci_del_intr_info(ii);	/* remove from active list */
2783 
2784 	if (upipe->pipe.device->speed == USB_SPEED_LOW)
2785 		uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh);
2786 	else
2787 		uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh);
2788 
2789 	if (upipe->u.ctl.length != 0)
2790 		uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend);
2791 
2792 	DPRINTFN(5, ("uhci_device_ctrl_done: length=%d\n", xfer->actlen));
2793 }
2794 
2795 /* Deallocate request data structures */
2796 void
2797 uhci_device_bulk_done(usbd_xfer_handle xfer)
2798 {
2799 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2800 	uhci_softc_t *sc = ii->sc;
2801 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2802 
2803 	DPRINTFN(5,("uhci_device_bulk_done: xfer=%p ii=%p sc=%p upipe=%p\n",
2804 		    xfer, ii, sc, upipe));
2805 
2806 	if (!uhci_active_intr_info(ii))
2807 		return;
2808 
2809 	uhci_del_intr_info(ii);	/* remove from active list */
2810 
2811 	uhci_remove_bulk(sc, upipe->u.bulk.sqh);
2812 
2813 	uhci_free_std_chain(sc, ii->stdstart, NULL);
2814 
2815 	DPRINTFN(5, ("uhci_device_bulk_done: length=%d\n", xfer->actlen));
2816 }
2817 
2818 /* Add interrupt QH, called with vflock. */
2819 void
2820 uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
2821 {
2822 	struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
2823 	uhci_soft_qh_t *eqh;
2824 
2825 	DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh));
2826 
2827 	eqh = vf->eqh;
2828 	sqh->hlink       = eqh->hlink;
2829 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
2830 	eqh->hlink       = sqh;
2831 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
2832 	vf->eqh = sqh;
2833 	vf->bandwidth++;
2834 }
2835 
2836 /* Remove interrupt QH. */
2837 void
2838 uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
2839 {
2840 	struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
2841 	uhci_soft_qh_t *pqh;
2842 
2843 	DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh));
2844 
2845 	/* See comment in uhci_remove_ctrl() */
2846 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
2847 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
2848 		delay(UHCI_QH_REMOVE_DELAY);
2849 	}
2850 
2851 	pqh = uhci_find_prev_qh(vf->hqh, sqh);
2852 	pqh->hlink       = sqh->hlink;
2853 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
2854 	delay(UHCI_QH_REMOVE_DELAY);
2855 	if (vf->eqh == sqh)
2856 		vf->eqh = pqh;
2857 	vf->bandwidth--;
2858 }
2859 
2860 usbd_status
2861 uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival)
2862 {
2863 	uhci_soft_qh_t *sqh;
2864 	int i, npoll, s;
2865 	u_int bestbw, bw, bestoffs, offs;
2866 
2867 	DPRINTFN(2, ("uhci_device_setintr: pipe=%p\n", upipe));
2868 	if (ival == 0) {
2869 		printf("uhci_device_setintr: 0 interval\n");
2870 		return (USBD_INVAL);
2871 	}
2872 
2873 	if (ival > UHCI_VFRAMELIST_COUNT)
2874 		ival = UHCI_VFRAMELIST_COUNT;
2875 	npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival;
2876 	DPRINTFN(2, ("uhci_device_setintr: ival=%d npoll=%d\n", ival, npoll));
2877 
2878 	upipe->u.intr.npoll = npoll;
2879 	upipe->u.intr.qhs =
2880 		malloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_WAITOK);
2881 
2882 	/*
2883 	 * Figure out which offset in the schedule that has most
2884 	 * bandwidth left over.
2885 	 */
2886 #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1))
2887 	for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) {
2888 		for (bw = i = 0; i < npoll; i++)
2889 			bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth;
2890 		if (bw < bestbw) {
2891 			bestbw = bw;
2892 			bestoffs = offs;
2893 		}
2894 	}
2895 	DPRINTFN(1, ("uhci_device_setintr: bw=%d offs=%d\n", bestbw, bestoffs));
2896 
2897 	for(i = 0; i < npoll; i++) {
2898 		upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc);
2899 		sqh->elink = NULL;
2900 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
2901 		sqh->pos = MOD(i * ival + bestoffs);
2902 	}
2903 #undef MOD
2904 
2905 	s = splusb();
2906 	/* Enter QHs into the controller data structures. */
2907 	for(i = 0; i < npoll; i++)
2908 		uhci_add_intr(sc, upipe->u.intr.qhs[i]);
2909 	splx(s);
2910 
2911 	DPRINTFN(5, ("uhci_device_setintr: returns %p\n", upipe));
2912 	return (USBD_NORMAL_COMPLETION);
2913 }
2914 
2915 /* Open a new pipe. */
2916 usbd_status
2917 uhci_open(usbd_pipe_handle pipe)
2918 {
2919 	uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
2920 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2921 	usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
2922 	usbd_status err;
2923 	int ival;
2924 
2925 	DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
2926 		     pipe, pipe->device->address,
2927 		     ed->bEndpointAddress, sc->sc_addr));
2928 
2929 	upipe->aborting = 0;
2930 	upipe->nexttoggle = 0;
2931 
2932 	if (pipe->device->address == sc->sc_addr) {
2933 		switch (ed->bEndpointAddress) {
2934 		case USB_CONTROL_ENDPOINT:
2935 			pipe->methods = &uhci_root_ctrl_methods;
2936 			break;
2937 		case UE_DIR_IN | UHCI_INTR_ENDPT:
2938 			pipe->methods = &uhci_root_intr_methods;
2939 			break;
2940 		default:
2941 			return (USBD_INVAL);
2942 		}
2943 	} else {
2944 		switch (ed->bmAttributes & UE_XFERTYPE) {
2945 		case UE_CONTROL:
2946 			pipe->methods = &uhci_device_ctrl_methods;
2947 			upipe->u.ctl.sqh = uhci_alloc_sqh(sc);
2948 			if (upipe->u.ctl.sqh == NULL)
2949 				goto bad;
2950 			upipe->u.ctl.setup = uhci_alloc_std(sc);
2951 			if (upipe->u.ctl.setup == NULL) {
2952 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
2953 				goto bad;
2954 			}
2955 			upipe->u.ctl.stat = uhci_alloc_std(sc);
2956 			if (upipe->u.ctl.stat == NULL) {
2957 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
2958 				uhci_free_std(sc, upipe->u.ctl.setup);
2959 				goto bad;
2960 			}
2961 			err = usb_allocmem(&sc->sc_bus,
2962 				  sizeof(usb_device_request_t),
2963 				  0, &upipe->u.ctl.reqdma);
2964 			if (err) {
2965 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
2966 				uhci_free_std(sc, upipe->u.ctl.setup);
2967 				uhci_free_std(sc, upipe->u.ctl.stat);
2968 				goto bad;
2969 			}
2970 			break;
2971 		case UE_INTERRUPT:
2972 			pipe->methods = &uhci_device_intr_methods;
2973 			ival = pipe->interval;
2974 			if (ival == USBD_DEFAULT_INTERVAL)
2975 				ival = ed->bInterval;
2976 			return (uhci_device_setintr(sc, upipe, ival));
2977 		case UE_ISOCHRONOUS:
2978 			pipe->methods = &uhci_device_isoc_methods;
2979 			return (uhci_setup_isoc(pipe));
2980 		case UE_BULK:
2981 			pipe->methods = &uhci_device_bulk_methods;
2982 			upipe->u.bulk.sqh = uhci_alloc_sqh(sc);
2983 			if (upipe->u.bulk.sqh == NULL)
2984 				goto bad;
2985 			break;
2986 		}
2987 	}
2988 	return (USBD_NORMAL_COMPLETION);
2989 
2990  bad:
2991 	return (USBD_NOMEM);
2992 }
2993 
2994 /*
2995  * Data structures and routines to emulate the root hub.
2996  */
2997 usb_device_descriptor_t uhci_devd = {
2998 	USB_DEVICE_DESCRIPTOR_SIZE,
2999 	UDESC_DEVICE,		/* type */
3000 	{0x00, 0x01},		/* USB version */
3001 	UDCLASS_HUB,		/* class */
3002 	UDSUBCLASS_HUB,		/* subclass */
3003 	UDPROTO_FSHUB,		/* protocol */
3004 	64,			/* max packet */
3005 	{0},{0},{0x00,0x01},	/* device id */
3006 	1,2,0,			/* string indicies */
3007 	1			/* # of configurations */
3008 };
3009 
3010 usb_config_descriptor_t uhci_confd = {
3011 	USB_CONFIG_DESCRIPTOR_SIZE,
3012 	UDESC_CONFIG,
3013 	{USB_CONFIG_DESCRIPTOR_SIZE +
3014 	 USB_INTERFACE_DESCRIPTOR_SIZE +
3015 	 USB_ENDPOINT_DESCRIPTOR_SIZE},
3016 	1,
3017 	1,
3018 	0,
3019 	UC_SELF_POWERED,
3020 	0			/* max power */
3021 };
3022 
3023 usb_interface_descriptor_t uhci_ifcd = {
3024 	USB_INTERFACE_DESCRIPTOR_SIZE,
3025 	UDESC_INTERFACE,
3026 	0,
3027 	0,
3028 	1,
3029 	UICLASS_HUB,
3030 	UISUBCLASS_HUB,
3031 	UIPROTO_FSHUB,
3032 	0
3033 };
3034 
3035 usb_endpoint_descriptor_t uhci_endpd = {
3036 	USB_ENDPOINT_DESCRIPTOR_SIZE,
3037 	UDESC_ENDPOINT,
3038 	UE_DIR_IN | UHCI_INTR_ENDPT,
3039 	UE_INTERRUPT,
3040 	{8},
3041 	255
3042 };
3043 
3044 usb_hub_descriptor_t uhci_hubd_piix = {
3045 	USB_HUB_DESCRIPTOR_SIZE,
3046 	UDESC_HUB,
3047 	2,
3048 	{ UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 },
3049 	50,			/* power on to power good */
3050 	0,
3051 	{ 0x00 },		/* both ports are removable */
3052 	{ 0 },
3053 };
3054 
3055 int
3056 uhci_str(usb_string_descriptor_t *p, int l, const char *s)
3057 {
3058 	int i;
3059 
3060 	if (l == 0)
3061 		return (0);
3062 	p->bLength = 2 * strlen(s) + 2;
3063 	if (l == 1)
3064 		return (1);
3065 	p->bDescriptorType = UDESC_STRING;
3066 	l -= 2;
3067 	for (i = 0; s[i] && l > 1; i++, l -= 2)
3068 		USETW2(p->bString[i], 0, s[i]);
3069 	return (2*i+2);
3070 }
3071 
3072 /*
3073  * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also
3074  * enables the port, and also states that SET_FEATURE(PORT_ENABLE)
3075  * should not be used by the USB subsystem.  As we cannot issue a
3076  * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port
3077  * will be enabled as part of the reset.
3078  *
3079  * On the VT83C572, the port cannot be successfully enabled until the
3080  * outstanding "port enable change" and "connection status change"
3081  * events have been reset.
3082  */
3083 Static usbd_status
3084 uhci_portreset(uhci_softc_t *sc, int index)
3085 {
3086 	int lim, port, x;
3087 
3088 	if (index == 1)
3089 		port = UHCI_PORTSC1;
3090 	else if (index == 2)
3091 		port = UHCI_PORTSC2;
3092 	else
3093 		return (USBD_IOERROR);
3094 
3095 	x = URWMASK(UREAD2(sc, port));
3096 	UWRITE2(sc, port, x | UHCI_PORTSC_PR);
3097 
3098 	usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
3099 
3100 	DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n",
3101 		    index, UREAD2(sc, port)));
3102 
3103 	x = URWMASK(UREAD2(sc, port));
3104 	UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
3105 
3106 	delay(100);
3107 
3108 	DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n",
3109 		    index, UREAD2(sc, port)));
3110 
3111 	x = URWMASK(UREAD2(sc, port));
3112 	UWRITE2(sc, port, x  | UHCI_PORTSC_PE);
3113 
3114 	for (lim = 10; --lim > 0;) {
3115 		usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY);
3116 
3117 		x = UREAD2(sc, port);
3118 
3119 		DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n",
3120 			    index, lim, x));
3121 
3122 		if (!(x & UHCI_PORTSC_CCS)) {
3123 			/*
3124 			 * No device is connected (or was disconnected
3125 			 * during reset).  Consider the port reset.
3126 			 * The delay must be long enough to ensure on
3127 			 * the initial iteration that the device
3128 			 * connection will have been registered.  50ms
3129 			 * appears to be sufficient, but 20ms is not.
3130 			 */
3131 			DPRINTFN(3,("uhci port %d loop %u, device detached\n",
3132 				    index, lim));
3133 			break;
3134 		}
3135 
3136 		if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) {
3137 			/*
3138 			 * Port enabled changed and/or connection
3139 			 * status changed were set.  Reset either or
3140 			 * both raised flags (by writing a 1 to that
3141 			 * bit), and wait again for state to settle.
3142 			 */
3143 			UWRITE2(sc, port, URWMASK(x) |
3144 				(x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)));
3145 			continue;
3146 		}
3147 
3148 		if (x & UHCI_PORTSC_PE)
3149 			/* Port is enabled */
3150 			break;
3151 
3152 		UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE);
3153 	}
3154 
3155 	DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n",
3156 		    index, UREAD2(sc, port)));
3157 
3158 	if (lim <= 0) {
3159 		DPRINTFN(1,("uhci port %d reset timed out\n", index));
3160 		return (USBD_TIMEOUT);
3161 	}
3162 
3163 	sc->sc_isreset = 1;
3164 	return (USBD_NORMAL_COMPLETION);
3165 }
3166 
3167 /*
3168  * Simulate a hardware hub by handling all the necessary requests.
3169  */
3170 usbd_status
3171 uhci_root_ctrl_transfer(usbd_xfer_handle xfer)
3172 {
3173 	usbd_status err;
3174 
3175 	/* Insert last in queue. */
3176 	err = usb_insert_transfer(xfer);
3177 	if (err)
3178 		return (err);
3179 
3180 	/*
3181 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
3182 	 * so start it first.
3183 	 */
3184 	return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
3185 }
3186 
3187 usbd_status
3188 uhci_root_ctrl_start(usbd_xfer_handle xfer)
3189 {
3190 	uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
3191 	usb_device_request_t *req;
3192 	void *buf = NULL;
3193 	int port, x;
3194 	int s, len, value, index, status, change, l, totlen = 0;
3195 	usb_port_status_t ps;
3196 	usbd_status err;
3197 
3198 	if (sc->sc_dying)
3199 		return (USBD_IOERROR);
3200 
3201 #ifdef DIAGNOSTIC
3202 	if (!(xfer->rqflags & URQ_REQUEST))
3203 		panic("uhci_root_ctrl_transfer: not a request");
3204 #endif
3205 	req = &xfer->request;
3206 
3207 	DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n",
3208 		    req->bmRequestType, req->bRequest));
3209 
3210 	len = UGETW(req->wLength);
3211 	value = UGETW(req->wValue);
3212 	index = UGETW(req->wIndex);
3213 
3214 	if (len != 0)
3215 		buf = KERNADDR(&xfer->dmabuf, 0);
3216 
3217 #define C(x,y) ((x) | ((y) << 8))
3218 	switch(C(req->bRequest, req->bmRequestType)) {
3219 	case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
3220 	case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
3221 	case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
3222 		/*
3223 		 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
3224 		 * for the integrated root hub.
3225 		 */
3226 		break;
3227 	case C(UR_GET_CONFIG, UT_READ_DEVICE):
3228 		if (len > 0) {
3229 			*(u_int8_t *)buf = sc->sc_conf;
3230 			totlen = 1;
3231 		}
3232 		break;
3233 	case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
3234 		DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value));
3235 		if (len == 0)
3236 			break;
3237 		switch(value >> 8) {
3238 		case UDESC_DEVICE:
3239 			if ((value & 0xff) != 0) {
3240 				err = USBD_IOERROR;
3241 				goto ret;
3242 			}
3243 			totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
3244 			USETW(uhci_devd.idVendor, sc->sc_id_vendor);
3245 			memcpy(buf, &uhci_devd, l);
3246 			break;
3247 		case UDESC_CONFIG:
3248 			if ((value & 0xff) != 0) {
3249 				err = USBD_IOERROR;
3250 				goto ret;
3251 			}
3252 			totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
3253 			memcpy(buf, &uhci_confd, l);
3254 			buf = (char *)buf + l;
3255 			len -= l;
3256 			l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
3257 			totlen += l;
3258 			memcpy(buf, &uhci_ifcd, l);
3259 			buf = (char *)buf + l;
3260 			len -= l;
3261 			l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
3262 			totlen += l;
3263 			memcpy(buf, &uhci_endpd, l);
3264 			break;
3265 		case UDESC_STRING:
3266 			*(u_int8_t *)buf = 0;
3267 			totlen = 1;
3268 			switch (value & 0xff) {
3269 			case 0: /* Language table */
3270 				totlen = uhci_str(buf, len, "\001");
3271 				break;
3272 			case 1: /* Vendor */
3273 				totlen = uhci_str(buf, len, sc->sc_vendor);
3274 				break;
3275 			case 2: /* Product */
3276 				totlen = uhci_str(buf, len, "UHCI root hub");
3277 				break;
3278 			}
3279 			break;
3280 		default:
3281 			err = USBD_IOERROR;
3282 			goto ret;
3283 		}
3284 		break;
3285 	case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
3286 		if (len > 0) {
3287 			*(u_int8_t *)buf = 0;
3288 			totlen = 1;
3289 		}
3290 		break;
3291 	case C(UR_GET_STATUS, UT_READ_DEVICE):
3292 		if (len > 1) {
3293 			USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
3294 			totlen = 2;
3295 		}
3296 		break;
3297 	case C(UR_GET_STATUS, UT_READ_INTERFACE):
3298 	case C(UR_GET_STATUS, UT_READ_ENDPOINT):
3299 		if (len > 1) {
3300 			USETW(((usb_status_t *)buf)->wStatus, 0);
3301 			totlen = 2;
3302 		}
3303 		break;
3304 	case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
3305 		if (value >= USB_MAX_DEVICES) {
3306 			err = USBD_IOERROR;
3307 			goto ret;
3308 		}
3309 		sc->sc_addr = value;
3310 		break;
3311 	case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
3312 		if (value != 0 && value != 1) {
3313 			err = USBD_IOERROR;
3314 			goto ret;
3315 		}
3316 		sc->sc_conf = value;
3317 		break;
3318 	case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
3319 		break;
3320 	case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
3321 	case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
3322 	case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
3323 		err = USBD_IOERROR;
3324 		goto ret;
3325 	case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
3326 		break;
3327 	case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
3328 		break;
3329 	/* Hub requests */
3330 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
3331 		break;
3332 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
3333 		DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
3334 			     "port=%d feature=%d\n",
3335 			     index, value));
3336 		if (index == 1)
3337 			port = UHCI_PORTSC1;
3338 		else if (index == 2)
3339 			port = UHCI_PORTSC2;
3340 		else {
3341 			err = USBD_IOERROR;
3342 			goto ret;
3343 		}
3344 		switch(value) {
3345 		case UHF_PORT_ENABLE:
3346 			x = URWMASK(UREAD2(sc, port));
3347 			UWRITE2(sc, port, x & ~UHCI_PORTSC_PE);
3348 			break;
3349 		case UHF_PORT_SUSPEND:
3350 			x = URWMASK(UREAD2(sc, port));
3351 			UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP);
3352 			break;
3353 		case UHF_PORT_RESET:
3354 			x = URWMASK(UREAD2(sc, port));
3355 			UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
3356 			break;
3357 		case UHF_C_PORT_CONNECTION:
3358 			x = URWMASK(UREAD2(sc, port));
3359 			UWRITE2(sc, port, x | UHCI_PORTSC_CSC);
3360 			break;
3361 		case UHF_C_PORT_ENABLE:
3362 			x = URWMASK(UREAD2(sc, port));
3363 			UWRITE2(sc, port, x | UHCI_PORTSC_POEDC);
3364 			break;
3365 		case UHF_C_PORT_OVER_CURRENT:
3366 			x = URWMASK(UREAD2(sc, port));
3367 			UWRITE2(sc, port, x | UHCI_PORTSC_OCIC);
3368 			break;
3369 		case UHF_C_PORT_RESET:
3370 			sc->sc_isreset = 0;
3371 			err = USBD_NORMAL_COMPLETION;
3372 			goto ret;
3373 		case UHF_PORT_CONNECTION:
3374 		case UHF_PORT_OVER_CURRENT:
3375 		case UHF_PORT_POWER:
3376 		case UHF_PORT_LOW_SPEED:
3377 		case UHF_C_PORT_SUSPEND:
3378 		default:
3379 			err = USBD_IOERROR;
3380 			goto ret;
3381 		}
3382 		break;
3383 	case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER):
3384 		if (index == 1)
3385 			port = UHCI_PORTSC1;
3386 		else if (index == 2)
3387 			port = UHCI_PORTSC2;
3388 		else {
3389 			err = USBD_IOERROR;
3390 			goto ret;
3391 		}
3392 		if (len > 0) {
3393 			*(u_int8_t *)buf =
3394 				(UREAD2(sc, port) & UHCI_PORTSC_LS) >>
3395 				UHCI_PORTSC_LS_SHIFT;
3396 			totlen = 1;
3397 		}
3398 		break;
3399 	case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
3400 		if (len == 0)
3401 			break;
3402 		if ((value & 0xff) != 0) {
3403 			err = USBD_IOERROR;
3404 			goto ret;
3405 		}
3406 		l = min(len, USB_HUB_DESCRIPTOR_SIZE);
3407 		totlen = l;
3408 		memcpy(buf, &uhci_hubd_piix, l);
3409 		break;
3410 	case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
3411 		if (len != 4) {
3412 			err = USBD_IOERROR;
3413 			goto ret;
3414 		}
3415 		memset(buf, 0, len);
3416 		totlen = len;
3417 		break;
3418 	case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
3419 		if (index == 1)
3420 			port = UHCI_PORTSC1;
3421 		else if (index == 2)
3422 			port = UHCI_PORTSC2;
3423 		else {
3424 			err = USBD_IOERROR;
3425 			goto ret;
3426 		}
3427 		if (len != 4) {
3428 			err = USBD_IOERROR;
3429 			goto ret;
3430 		}
3431 		x = UREAD2(sc, port);
3432 		status = change = 0;
3433 		if (x & UHCI_PORTSC_CCS)
3434 			status |= UPS_CURRENT_CONNECT_STATUS;
3435 		if (x & UHCI_PORTSC_CSC)
3436 			change |= UPS_C_CONNECT_STATUS;
3437 		if (x & UHCI_PORTSC_PE)
3438 			status |= UPS_PORT_ENABLED;
3439 		if (x & UHCI_PORTSC_POEDC)
3440 			change |= UPS_C_PORT_ENABLED;
3441 		if (x & UHCI_PORTSC_OCI)
3442 			status |= UPS_OVERCURRENT_INDICATOR;
3443 		if (x & UHCI_PORTSC_OCIC)
3444 			change |= UPS_C_OVERCURRENT_INDICATOR;
3445 		if (x & UHCI_PORTSC_SUSP)
3446 			status |= UPS_SUSPEND;
3447 		if (x & UHCI_PORTSC_LSDA)
3448 			status |= UPS_LOW_SPEED;
3449 		status |= UPS_PORT_POWER;
3450 		if (sc->sc_isreset)
3451 			change |= UPS_C_PORT_RESET;
3452 		USETW(ps.wPortStatus, status);
3453 		USETW(ps.wPortChange, change);
3454 		l = min(len, sizeof ps);
3455 		memcpy(buf, &ps, l);
3456 		totlen = l;
3457 		break;
3458 	case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
3459 		err = USBD_IOERROR;
3460 		goto ret;
3461 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
3462 		break;
3463 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
3464 		if (index == 1)
3465 			port = UHCI_PORTSC1;
3466 		else if (index == 2)
3467 			port = UHCI_PORTSC2;
3468 		else {
3469 			err = USBD_IOERROR;
3470 			goto ret;
3471 		}
3472 		switch(value) {
3473 		case UHF_PORT_ENABLE:
3474 			x = URWMASK(UREAD2(sc, port));
3475 			UWRITE2(sc, port, x | UHCI_PORTSC_PE);
3476 			break;
3477 		case UHF_PORT_SUSPEND:
3478 			x = URWMASK(UREAD2(sc, port));
3479 			UWRITE2(sc, port, x | UHCI_PORTSC_SUSP);
3480 			break;
3481 		case UHF_PORT_RESET:
3482 			err = uhci_portreset(sc, index);
3483 			goto ret;
3484 		case UHF_PORT_POWER:
3485 			/* Pretend we turned on power */
3486 			err = USBD_NORMAL_COMPLETION;
3487 			goto ret;
3488 		case UHF_C_PORT_CONNECTION:
3489 		case UHF_C_PORT_ENABLE:
3490 		case UHF_C_PORT_OVER_CURRENT:
3491 		case UHF_PORT_CONNECTION:
3492 		case UHF_PORT_OVER_CURRENT:
3493 		case UHF_PORT_LOW_SPEED:
3494 		case UHF_C_PORT_SUSPEND:
3495 		case UHF_C_PORT_RESET:
3496 		default:
3497 			err = USBD_IOERROR;
3498 			goto ret;
3499 		}
3500 		break;
3501 	default:
3502 		err = USBD_IOERROR;
3503 		goto ret;
3504 	}
3505 	xfer->actlen = totlen;
3506 	err = USBD_NORMAL_COMPLETION;
3507  ret:
3508 	xfer->status = err;
3509 	s = splusb();
3510 	usb_transfer_complete(xfer);
3511 	splx(s);
3512 	return (USBD_IN_PROGRESS);
3513 }
3514 
3515 /* Abort a root control request. */
3516 void
3517 uhci_root_ctrl_abort(usbd_xfer_handle xfer)
3518 {
3519 	/* Nothing to do, all transfers are synchronous. */
3520 }
3521 
3522 /* Close the root pipe. */
3523 void
3524 uhci_root_ctrl_close(usbd_pipe_handle pipe)
3525 {
3526 	DPRINTF(("uhci_root_ctrl_close\n"));
3527 }
3528 
3529 /* Abort a root interrupt request. */
3530 void
3531 uhci_root_intr_abort(usbd_xfer_handle xfer)
3532 {
3533 	uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
3534 
3535 	usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, xfer);
3536 	sc->sc_intr_xfer = NULL;
3537 
3538 	if (xfer->pipe->intrxfer == xfer) {
3539 		DPRINTF(("uhci_root_intr_abort: remove\n"));
3540 		xfer->pipe->intrxfer = 0;
3541 	}
3542 	xfer->status = USBD_CANCELLED;
3543 #ifdef DIAGNOSTIC
3544 	UXFER(xfer)->iinfo.isdone = 1;
3545 #endif
3546 	usb_transfer_complete(xfer);
3547 }
3548 
3549 usbd_status
3550 uhci_root_intr_transfer(usbd_xfer_handle xfer)
3551 {
3552 	usbd_status err;
3553 
3554 	/* Insert last in queue. */
3555 	err = usb_insert_transfer(xfer);
3556 	if (err)
3557 		return (err);
3558 
3559 	/*
3560 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
3561 	 * start first
3562 	 */
3563 	return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
3564 }
3565 
3566 /* Start a transfer on the root interrupt pipe */
3567 usbd_status
3568 uhci_root_intr_start(usbd_xfer_handle xfer)
3569 {
3570 	usbd_pipe_handle pipe = xfer->pipe;
3571 	uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
3572 	unsigned int ival;
3573 
3574 	DPRINTFN(3, ("uhci_root_intr_start: xfer=%p len=%d flags=%d\n",
3575 		     xfer, xfer->length, xfer->flags));
3576 
3577 	if (sc->sc_dying)
3578 		return (USBD_IOERROR);
3579 
3580 	/* XXX temporary variable needed to avoid gcc3 warning */
3581 	ival = xfer->pipe->endpoint->edesc->bInterval;
3582 	sc->sc_ival = mstohz(ival);
3583 	usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
3584 	sc->sc_intr_xfer = xfer;
3585 	return (USBD_IN_PROGRESS);
3586 }
3587 
3588 /* Close the root interrupt pipe. */
3589 void
3590 uhci_root_intr_close(usbd_pipe_handle pipe)
3591 {
3592 	uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
3593 
3594 	usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, sc->sc_intr_xfer);
3595 	sc->sc_intr_xfer = NULL;
3596 	DPRINTF(("uhci_root_intr_close\n"));
3597 }
3598