1 /* $NetBSD: uhci.c,v 1.189 2005/05/30 04:21:39 christos Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/uhci.c,v 1.33 1999/11/17 22:33:41 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 2004 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart@augustsson.net) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * USB Universal Host Controller driver. 43 * Handles e.g. PIIX3 and PIIX4. 44 * 45 * UHCI spec: http://developer.intel.com/design/USB/UHCI11D.htm 46 * USB spec: http://www.usb.org/developers/docs/usbspec.zip 47 * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf 48 * ftp://download.intel.com/design/intarch/datashts/29056201.pdf 49 */ 50 51 #include <sys/cdefs.h> 52 __KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.189 2005/05/30 04:21:39 christos Exp $"); 53 54 #include <sys/param.h> 55 #include <sys/systm.h> 56 #include <sys/kernel.h> 57 #include <sys/malloc.h> 58 #if defined(__NetBSD__) || defined(__OpenBSD__) 59 #include <sys/device.h> 60 #include <sys/select.h> 61 #include <sys/extent.h> 62 #include <uvm/uvm_extern.h> 63 #elif defined(__FreeBSD__) 64 #include <sys/module.h> 65 #include <sys/bus.h> 66 #include <machine/bus_pio.h> 67 #if defined(DIAGNOSTIC) && defined(__i386__) 68 #include <machine/cpu.h> 69 #endif 70 #endif 71 #include <sys/proc.h> 72 #include <sys/queue.h> 73 74 #include <machine/bus.h> 75 #include <machine/endian.h> 76 77 #include <dev/usb/usb.h> 78 #include <dev/usb/usbdi.h> 79 #include <dev/usb/usbdivar.h> 80 #include <dev/usb/usb_mem.h> 81 #include <dev/usb/usb_quirks.h> 82 83 #include <dev/usb/uhcireg.h> 84 #include <dev/usb/uhcivar.h> 85 86 /* Use bandwidth reclamation for control transfers. Some devices choke on it. */ 87 /*#define UHCI_CTL_LOOP */ 88 89 #if defined(__FreeBSD__) 90 #include <machine/clock.h> 91 92 #define delay(d) DELAY(d) 93 #endif 94 95 #if defined(__OpenBSD__) 96 struct cfdriver uhci_cd = { 97 NULL, "uhci", DV_DULL 98 }; 99 #endif 100 101 #ifdef UHCI_DEBUG 102 uhci_softc_t *thesc; 103 #define DPRINTF(x) if (uhcidebug) printf x 104 #define DPRINTFN(n,x) if (uhcidebug>(n)) printf x 105 int uhcidebug = 0; 106 int uhcinoloop = 0; 107 #ifndef __NetBSD__ 108 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 109 #endif 110 #else 111 #define DPRINTF(x) 112 #define DPRINTFN(n,x) 113 #endif 114 115 /* 116 * The UHCI controller is little endian, so on big endian machines 117 * the data stored in memory needs to be swapped. 118 */ 119 #if defined(__FreeBSD__) || defined(__OpenBSD__) 120 #if BYTE_ORDER == BIG_ENDIAN 121 #define htole32(x) (bswap32(x)) 122 #define le32toh(x) (bswap32(x)) 123 #else 124 #define htole32(x) (x) 125 #define le32toh(x) (x) 126 #endif 127 #endif 128 129 struct uhci_pipe { 130 struct usbd_pipe pipe; 131 int nexttoggle; 132 133 u_char aborting; 134 usbd_xfer_handle abortstart, abortend; 135 136 /* Info needed for different pipe kinds. */ 137 union { 138 /* Control pipe */ 139 struct { 140 uhci_soft_qh_t *sqh; 141 usb_dma_t reqdma; 142 uhci_soft_td_t *setup, *stat; 143 u_int length; 144 } ctl; 145 /* Interrupt pipe */ 146 struct { 147 int npoll; 148 int isread; 149 uhci_soft_qh_t **qhs; 150 } intr; 151 /* Bulk pipe */ 152 struct { 153 uhci_soft_qh_t *sqh; 154 u_int length; 155 int isread; 156 } bulk; 157 /* Iso pipe */ 158 struct iso { 159 uhci_soft_td_t **stds; 160 int next, inuse; 161 } iso; 162 } u; 163 }; 164 165 Static void uhci_globalreset(uhci_softc_t *); 166 Static usbd_status uhci_portreset(uhci_softc_t*, int); 167 Static void uhci_reset(uhci_softc_t *); 168 Static void uhci_shutdown(void *v); 169 Static void uhci_power(int, void *); 170 Static usbd_status uhci_run(uhci_softc_t *, int run); 171 Static uhci_soft_td_t *uhci_alloc_std(uhci_softc_t *); 172 Static void uhci_free_std(uhci_softc_t *, uhci_soft_td_t *); 173 Static uhci_soft_qh_t *uhci_alloc_sqh(uhci_softc_t *); 174 Static void uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *); 175 #if 0 176 Static void uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *, 177 uhci_intr_info_t *); 178 Static void uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *); 179 #endif 180 181 Static void uhci_free_std_chain(uhci_softc_t *, 182 uhci_soft_td_t *, uhci_soft_td_t *); 183 Static usbd_status uhci_alloc_std_chain(struct uhci_pipe *, 184 uhci_softc_t *, int, int, u_int16_t, usb_dma_t *, 185 uhci_soft_td_t **, uhci_soft_td_t **); 186 Static void uhci_poll_hub(void *); 187 Static void uhci_waitintr(uhci_softc_t *, usbd_xfer_handle); 188 Static void uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *); 189 Static void uhci_idone(uhci_intr_info_t *); 190 191 Static void uhci_abort_xfer(usbd_xfer_handle, usbd_status status); 192 193 Static void uhci_timeout(void *); 194 Static void uhci_timeout_task(void *); 195 Static void uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 196 Static void uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 197 Static void uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *); 198 Static void uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 199 Static void uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 200 Static void uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *); 201 Static int uhci_str(usb_string_descriptor_t *, int, const char *); 202 Static void uhci_add_loop(uhci_softc_t *sc); 203 Static void uhci_rem_loop(uhci_softc_t *sc); 204 205 Static usbd_status uhci_setup_isoc(usbd_pipe_handle pipe); 206 Static void uhci_device_isoc_enter(usbd_xfer_handle); 207 208 Static usbd_status uhci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 209 Static void uhci_freem(struct usbd_bus *, usb_dma_t *); 210 211 Static usbd_xfer_handle uhci_allocx(struct usbd_bus *); 212 Static void uhci_freex(struct usbd_bus *, usbd_xfer_handle); 213 214 Static usbd_status uhci_device_ctrl_transfer(usbd_xfer_handle); 215 Static usbd_status uhci_device_ctrl_start(usbd_xfer_handle); 216 Static void uhci_device_ctrl_abort(usbd_xfer_handle); 217 Static void uhci_device_ctrl_close(usbd_pipe_handle); 218 Static void uhci_device_ctrl_done(usbd_xfer_handle); 219 220 Static usbd_status uhci_device_intr_transfer(usbd_xfer_handle); 221 Static usbd_status uhci_device_intr_start(usbd_xfer_handle); 222 Static void uhci_device_intr_abort(usbd_xfer_handle); 223 Static void uhci_device_intr_close(usbd_pipe_handle); 224 Static void uhci_device_intr_done(usbd_xfer_handle); 225 226 Static usbd_status uhci_device_bulk_transfer(usbd_xfer_handle); 227 Static usbd_status uhci_device_bulk_start(usbd_xfer_handle); 228 Static void uhci_device_bulk_abort(usbd_xfer_handle); 229 Static void uhci_device_bulk_close(usbd_pipe_handle); 230 Static void uhci_device_bulk_done(usbd_xfer_handle); 231 232 Static usbd_status uhci_device_isoc_transfer(usbd_xfer_handle); 233 Static usbd_status uhci_device_isoc_start(usbd_xfer_handle); 234 Static void uhci_device_isoc_abort(usbd_xfer_handle); 235 Static void uhci_device_isoc_close(usbd_pipe_handle); 236 Static void uhci_device_isoc_done(usbd_xfer_handle); 237 238 Static usbd_status uhci_root_ctrl_transfer(usbd_xfer_handle); 239 Static usbd_status uhci_root_ctrl_start(usbd_xfer_handle); 240 Static void uhci_root_ctrl_abort(usbd_xfer_handle); 241 Static void uhci_root_ctrl_close(usbd_pipe_handle); 242 Static void uhci_root_ctrl_done(usbd_xfer_handle); 243 244 Static usbd_status uhci_root_intr_transfer(usbd_xfer_handle); 245 Static usbd_status uhci_root_intr_start(usbd_xfer_handle); 246 Static void uhci_root_intr_abort(usbd_xfer_handle); 247 Static void uhci_root_intr_close(usbd_pipe_handle); 248 Static void uhci_root_intr_done(usbd_xfer_handle); 249 250 Static usbd_status uhci_open(usbd_pipe_handle); 251 Static void uhci_poll(struct usbd_bus *); 252 Static void uhci_softintr(void *); 253 254 Static usbd_status uhci_device_request(usbd_xfer_handle xfer); 255 256 Static void uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *); 257 Static void uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *); 258 Static usbd_status uhci_device_setintr(uhci_softc_t *sc, 259 struct uhci_pipe *pipe, int ival); 260 261 Static void uhci_device_clear_toggle(usbd_pipe_handle pipe); 262 Static void uhci_noop(usbd_pipe_handle pipe); 263 264 Static __inline__ uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *, 265 uhci_soft_qh_t *); 266 267 #ifdef UHCI_DEBUG 268 Static void uhci_dump_all(uhci_softc_t *); 269 Static void uhci_dumpregs(uhci_softc_t *); 270 Static void uhci_dump_qhs(uhci_soft_qh_t *); 271 Static void uhci_dump_qh(uhci_soft_qh_t *); 272 Static void uhci_dump_tds(uhci_soft_td_t *); 273 Static void uhci_dump_td(uhci_soft_td_t *); 274 Static void uhci_dump_ii(uhci_intr_info_t *ii); 275 void uhci_dump(void); 276 #endif 277 278 #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 279 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 280 #define UWRITE1(sc, r, x) \ 281 do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \ 282 } while (/*CONSTCOND*/0) 283 #define UWRITE2(sc, r, x) \ 284 do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \ 285 } while (/*CONSTCOND*/0) 286 #define UWRITE4(sc, r, x) \ 287 do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \ 288 } while (/*CONSTCOND*/0) 289 #define UREAD1(sc, r) (UBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r))) 290 #define UREAD2(sc, r) (UBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r))) 291 #define UREAD4(sc, r) (UBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r))) 292 293 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd) 294 #define UHCISTS(sc) UREAD2(sc, UHCI_STS) 295 296 #define UHCI_RESET_TIMEOUT 100 /* ms, reset timeout */ 297 298 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK) 299 300 #define UHCI_INTR_ENDPT 1 301 302 struct usbd_bus_methods uhci_bus_methods = { 303 uhci_open, 304 uhci_softintr, 305 uhci_poll, 306 uhci_allocm, 307 uhci_freem, 308 uhci_allocx, 309 uhci_freex, 310 }; 311 312 struct usbd_pipe_methods uhci_root_ctrl_methods = { 313 uhci_root_ctrl_transfer, 314 uhci_root_ctrl_start, 315 uhci_root_ctrl_abort, 316 uhci_root_ctrl_close, 317 uhci_noop, 318 uhci_root_ctrl_done, 319 }; 320 321 struct usbd_pipe_methods uhci_root_intr_methods = { 322 uhci_root_intr_transfer, 323 uhci_root_intr_start, 324 uhci_root_intr_abort, 325 uhci_root_intr_close, 326 uhci_noop, 327 uhci_root_intr_done, 328 }; 329 330 struct usbd_pipe_methods uhci_device_ctrl_methods = { 331 uhci_device_ctrl_transfer, 332 uhci_device_ctrl_start, 333 uhci_device_ctrl_abort, 334 uhci_device_ctrl_close, 335 uhci_noop, 336 uhci_device_ctrl_done, 337 }; 338 339 struct usbd_pipe_methods uhci_device_intr_methods = { 340 uhci_device_intr_transfer, 341 uhci_device_intr_start, 342 uhci_device_intr_abort, 343 uhci_device_intr_close, 344 uhci_device_clear_toggle, 345 uhci_device_intr_done, 346 }; 347 348 struct usbd_pipe_methods uhci_device_bulk_methods = { 349 uhci_device_bulk_transfer, 350 uhci_device_bulk_start, 351 uhci_device_bulk_abort, 352 uhci_device_bulk_close, 353 uhci_device_clear_toggle, 354 uhci_device_bulk_done, 355 }; 356 357 struct usbd_pipe_methods uhci_device_isoc_methods = { 358 uhci_device_isoc_transfer, 359 uhci_device_isoc_start, 360 uhci_device_isoc_abort, 361 uhci_device_isoc_close, 362 uhci_noop, 363 uhci_device_isoc_done, 364 }; 365 366 #define uhci_add_intr_info(sc, ii) \ 367 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list) 368 #define uhci_del_intr_info(ii) \ 369 do { \ 370 LIST_REMOVE((ii), list); \ 371 (ii)->list.le_prev = NULL; \ 372 } while (0) 373 #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL) 374 375 Static __inline__ uhci_soft_qh_t * 376 uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh) 377 { 378 DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh)); 379 380 for (; pqh->hlink != sqh; pqh = pqh->hlink) { 381 #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG) 382 if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) { 383 printf("uhci_find_prev_qh: QH not found\n"); 384 return (NULL); 385 } 386 #endif 387 } 388 return (pqh); 389 } 390 391 void 392 uhci_globalreset(uhci_softc_t *sc) 393 { 394 UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */ 395 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */ 396 UHCICMD(sc, 0); /* do nothing */ 397 } 398 399 usbd_status 400 uhci_init(uhci_softc_t *sc) 401 { 402 usbd_status err; 403 int i, j; 404 uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh; 405 uhci_soft_td_t *std; 406 407 DPRINTFN(1,("uhci_init: start\n")); 408 409 #ifdef UHCI_DEBUG 410 thesc = sc; 411 412 if (uhcidebug > 2) 413 uhci_dumpregs(sc); 414 #endif 415 416 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */ 417 uhci_globalreset(sc); /* reset the controller */ 418 uhci_reset(sc); 419 420 #ifdef __NetBSD__ 421 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 422 USB_MEM_RESERVE); 423 #endif 424 425 /* Allocate and initialize real frame array. */ 426 err = usb_allocmem(&sc->sc_bus, 427 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 428 UHCI_FRAMELIST_ALIGN, &sc->sc_dma); 429 if (err) 430 return (err); 431 sc->sc_pframes = KERNADDR(&sc->sc_dma, 0); 432 UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */ 433 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/ 434 435 /* 436 * Allocate a TD, inactive, that hangs from the last QH. 437 * This is to avoid a bug in the PIIX that makes it run berserk 438 * otherwise. 439 */ 440 std = uhci_alloc_std(sc); 441 if (std == NULL) 442 return (USBD_NOMEM); 443 std->link.std = NULL; 444 std->td.td_link = htole32(UHCI_PTR_T); 445 std->td.td_status = htole32(0); /* inactive */ 446 std->td.td_token = htole32(0); 447 std->td.td_buffer = htole32(0); 448 449 /* Allocate the dummy QH marking the end and used for looping the QHs.*/ 450 lsqh = uhci_alloc_sqh(sc); 451 if (lsqh == NULL) 452 return (USBD_NOMEM); 453 lsqh->hlink = NULL; 454 lsqh->qh.qh_hlink = htole32(UHCI_PTR_T); /* end of QH chain */ 455 lsqh->elink = std; 456 lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD); 457 sc->sc_last_qh = lsqh; 458 459 /* Allocate the dummy QH where bulk traffic will be queued. */ 460 bsqh = uhci_alloc_sqh(sc); 461 if (bsqh == NULL) 462 return (USBD_NOMEM); 463 bsqh->hlink = lsqh; 464 bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH); 465 bsqh->elink = NULL; 466 bsqh->qh.qh_elink = htole32(UHCI_PTR_T); 467 sc->sc_bulk_start = sc->sc_bulk_end = bsqh; 468 469 /* Allocate dummy QH where high speed control traffic will be queued. */ 470 chsqh = uhci_alloc_sqh(sc); 471 if (chsqh == NULL) 472 return (USBD_NOMEM); 473 chsqh->hlink = bsqh; 474 chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH); 475 chsqh->elink = NULL; 476 chsqh->qh.qh_elink = htole32(UHCI_PTR_T); 477 sc->sc_hctl_start = sc->sc_hctl_end = chsqh; 478 479 /* Allocate dummy QH where control traffic will be queued. */ 480 clsqh = uhci_alloc_sqh(sc); 481 if (clsqh == NULL) 482 return (USBD_NOMEM); 483 clsqh->hlink = bsqh; 484 clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH); 485 clsqh->elink = NULL; 486 clsqh->qh.qh_elink = htole32(UHCI_PTR_T); 487 sc->sc_lctl_start = sc->sc_lctl_end = clsqh; 488 489 /* 490 * Make all (virtual) frame list pointers point to the interrupt 491 * queue heads and the interrupt queue heads at the control 492 * queue head and point the physical frame list to the virtual. 493 */ 494 for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 495 std = uhci_alloc_std(sc); 496 sqh = uhci_alloc_sqh(sc); 497 if (std == NULL || sqh == NULL) 498 return (USBD_NOMEM); 499 std->link.sqh = sqh; 500 std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH); 501 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 502 std->td.td_token = htole32(0); 503 std->td.td_buffer = htole32(0); 504 sqh->hlink = clsqh; 505 sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH); 506 sqh->elink = NULL; 507 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 508 sc->sc_vframes[i].htd = std; 509 sc->sc_vframes[i].etd = std; 510 sc->sc_vframes[i].hqh = sqh; 511 sc->sc_vframes[i].eqh = sqh; 512 for (j = i; 513 j < UHCI_FRAMELIST_COUNT; 514 j += UHCI_VFRAMELIST_COUNT) 515 sc->sc_pframes[j] = htole32(std->physaddr); 516 } 517 518 LIST_INIT(&sc->sc_intrhead); 519 520 SIMPLEQ_INIT(&sc->sc_free_xfers); 521 522 usb_callout_init(sc->sc_poll_handle); 523 524 /* Set up the bus struct. */ 525 sc->sc_bus.methods = &uhci_bus_methods; 526 sc->sc_bus.pipe_size = sizeof(struct uhci_pipe); 527 528 #if defined(__NetBSD__) || defined(__OpenBSD__) 529 sc->sc_suspend = PWR_RESUME; 530 sc->sc_powerhook = powerhook_establish(uhci_power, sc); 531 sc->sc_shutdownhook = shutdownhook_establish(uhci_shutdown, sc); 532 #endif 533 534 DPRINTFN(1,("uhci_init: enabling\n")); 535 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE | 536 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */ 537 538 UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */ 539 540 return (uhci_run(sc, 1)); /* and here we go... */ 541 } 542 543 #if defined(__NetBSD__) || defined(__OpenBSD__) 544 int 545 uhci_activate(device_ptr_t self, enum devact act) 546 { 547 struct uhci_softc *sc = (struct uhci_softc *)self; 548 int rv = 0; 549 550 switch (act) { 551 case DVACT_ACTIVATE: 552 return (EOPNOTSUPP); 553 554 case DVACT_DEACTIVATE: 555 if (sc->sc_child != NULL) 556 rv = config_deactivate(sc->sc_child); 557 break; 558 } 559 return (rv); 560 } 561 562 int 563 uhci_detach(struct uhci_softc *sc, int flags) 564 { 565 usbd_xfer_handle xfer; 566 int rv = 0; 567 568 if (sc->sc_child != NULL) 569 rv = config_detach(sc->sc_child, flags); 570 571 if (rv != 0) 572 return (rv); 573 574 #if defined(__NetBSD__) || defined(__OpenBSD__) 575 powerhook_disestablish(sc->sc_powerhook); 576 shutdownhook_disestablish(sc->sc_shutdownhook); 577 #endif 578 579 /* Free all xfers associated with this HC. */ 580 for (;;) { 581 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 582 if (xfer == NULL) 583 break; 584 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 585 free(xfer, M_USB); 586 } 587 588 /* XXX free other data structures XXX */ 589 590 return (rv); 591 } 592 #endif 593 594 usbd_status 595 uhci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 596 { 597 struct uhci_softc *sc = (struct uhci_softc *)bus; 598 usbd_status status; 599 u_int32_t n; 600 601 /* 602 * XXX 603 * Since we are allocating a buffer we can assume that we will 604 * need TDs for it. Since we don't want to allocate those from 605 * an interrupt context, we allocate them here and free them again. 606 * This is no guarantee that we'll get the TDs next time... 607 */ 608 n = size / 8; 609 if (n > 16) { 610 u_int32_t i; 611 uhci_soft_td_t **stds; 612 DPRINTF(("uhci_allocm: get %d TDs\n", n)); 613 stds = malloc(sizeof(uhci_soft_td_t *) * n, M_TEMP, 614 M_WAITOK|M_ZERO); 615 for(i=0; i < n; i++) 616 stds[i] = uhci_alloc_std(sc); 617 for(i=0; i < n; i++) 618 if (stds[i] != NULL) 619 uhci_free_std(sc, stds[i]); 620 free(stds, M_TEMP); 621 } 622 623 624 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 625 #ifdef __NetBSD__ 626 if (status == USBD_NOMEM) 627 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 628 #endif 629 return status; 630 } 631 632 void 633 uhci_freem(struct usbd_bus *bus, usb_dma_t *dma) 634 { 635 #ifdef __NetBSD__ 636 if (dma->block->flags & USB_DMA_RESERVE) { 637 usb_reserve_freem(&((struct uhci_softc *)bus)->sc_dma_reserve, 638 dma); 639 return; 640 } 641 #endif 642 usb_freemem(&((struct uhci_softc *)bus)->sc_bus, dma); 643 } 644 645 usbd_xfer_handle 646 uhci_allocx(struct usbd_bus *bus) 647 { 648 struct uhci_softc *sc = (struct uhci_softc *)bus; 649 usbd_xfer_handle xfer; 650 651 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 652 if (xfer != NULL) { 653 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 654 #ifdef DIAGNOSTIC 655 if (xfer->busy_free != XFER_FREE) { 656 printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer, 657 xfer->busy_free); 658 } 659 #endif 660 } else { 661 xfer = malloc(sizeof(struct uhci_xfer), M_USB, M_NOWAIT); 662 } 663 if (xfer != NULL) { 664 memset(xfer, 0, sizeof (struct uhci_xfer)); 665 UXFER(xfer)->iinfo.sc = sc; 666 #ifdef DIAGNOSTIC 667 UXFER(xfer)->iinfo.isdone = 1; 668 xfer->busy_free = XFER_BUSY; 669 #endif 670 } 671 return (xfer); 672 } 673 674 void 675 uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 676 { 677 struct uhci_softc *sc = (struct uhci_softc *)bus; 678 679 #ifdef DIAGNOSTIC 680 if (xfer->busy_free != XFER_BUSY) { 681 printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer, 682 xfer->busy_free); 683 return; 684 } 685 xfer->busy_free = XFER_FREE; 686 if (!UXFER(xfer)->iinfo.isdone) { 687 printf("uhci_freex: !isdone\n"); 688 return; 689 } 690 #endif 691 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 692 } 693 694 /* 695 * Shut down the controller when the system is going down. 696 */ 697 void 698 uhci_shutdown(void *v) 699 { 700 uhci_softc_t *sc = v; 701 702 DPRINTF(("uhci_shutdown: stopping the HC\n")); 703 uhci_run(sc, 0); /* stop the controller */ 704 } 705 706 /* 707 * Handle suspend/resume. 708 * 709 * We need to switch to polling mode here, because this routine is 710 * called from an interrupt context. This is all right since we 711 * are almost suspended anyway. 712 */ 713 void 714 uhci_power(int why, void *v) 715 { 716 uhci_softc_t *sc = v; 717 int cmd; 718 int s; 719 720 s = splhardusb(); 721 cmd = UREAD2(sc, UHCI_CMD); 722 723 DPRINTF(("uhci_power: sc=%p, why=%d (was %d), cmd=0x%x\n", 724 sc, why, sc->sc_suspend, cmd)); 725 726 switch (why) { 727 case PWR_SUSPEND: 728 case PWR_STANDBY: 729 #ifdef UHCI_DEBUG 730 if (uhcidebug > 2) 731 uhci_dumpregs(sc); 732 #endif 733 if (sc->sc_intr_xfer != NULL) 734 usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, 735 sc->sc_intr_xfer); 736 sc->sc_bus.use_polling++; 737 uhci_run(sc, 0); /* stop the controller */ 738 739 /* save some state if BIOS doesn't */ 740 sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM); 741 sc->sc_saved_sof = UREAD1(sc, UHCI_SOF); 742 743 UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */ 744 745 UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter global suspend */ 746 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 747 sc->sc_suspend = why; 748 sc->sc_bus.use_polling--; 749 DPRINTF(("uhci_power: cmd=0x%x\n", UREAD2(sc, UHCI_CMD))); 750 break; 751 case PWR_RESUME: 752 #ifdef DIAGNOSTIC 753 if (sc->sc_suspend == PWR_RESUME) 754 printf("uhci_power: weird, resume without suspend.\n"); 755 #endif 756 sc->sc_bus.use_polling++; 757 sc->sc_suspend = why; 758 if (cmd & UHCI_CMD_RS) 759 uhci_run(sc, 0); /* in case BIOS has started it */ 760 761 /* restore saved state */ 762 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); 763 UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum); 764 UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof); 765 766 UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force global resume */ 767 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 768 UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */ 769 UHCICMD(sc, UHCI_CMD_MAXP); 770 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE | 771 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* re-enable intrs */ 772 uhci_run(sc, 1); /* and start traffic again */ 773 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 774 sc->sc_bus.use_polling--; 775 if (sc->sc_intr_xfer != NULL) 776 usb_callout(sc->sc_poll_handle, sc->sc_ival, 777 uhci_poll_hub, sc->sc_intr_xfer); 778 #ifdef UHCI_DEBUG 779 if (uhcidebug > 2) 780 uhci_dumpregs(sc); 781 #endif 782 break; 783 case PWR_SOFTSUSPEND: 784 case PWR_SOFTSTANDBY: 785 case PWR_SOFTRESUME: 786 break; 787 } 788 splx(s); 789 } 790 791 #ifdef UHCI_DEBUG 792 Static void 793 uhci_dumpregs(uhci_softc_t *sc) 794 { 795 DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, " 796 "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n", 797 USBDEVNAME(sc->sc_bus.bdev), 798 UREAD2(sc, UHCI_CMD), 799 UREAD2(sc, UHCI_STS), 800 UREAD2(sc, UHCI_INTR), 801 UREAD2(sc, UHCI_FRNUM), 802 UREAD4(sc, UHCI_FLBASEADDR), 803 UREAD1(sc, UHCI_SOF), 804 UREAD2(sc, UHCI_PORTSC1), 805 UREAD2(sc, UHCI_PORTSC2))); 806 } 807 808 void 809 uhci_dump_td(uhci_soft_td_t *p) 810 { 811 char sbuf[128], sbuf2[128]; 812 813 DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx " 814 "token=0x%08lx buffer=0x%08lx\n", 815 p, (long)p->physaddr, 816 (long)le32toh(p->td.td_link), 817 (long)le32toh(p->td.td_status), 818 (long)le32toh(p->td.td_token), 819 (long)le32toh(p->td.td_buffer))); 820 821 bitmask_snprintf((u_int32_t)le32toh(p->td.td_link), "\20\1T\2Q\3VF", 822 sbuf, sizeof(sbuf)); 823 bitmask_snprintf((u_int32_t)le32toh(p->td.td_status), 824 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27" 825 "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD", 826 sbuf2, sizeof(sbuf2)); 827 828 DPRINTFN(-1,(" %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d," 829 "D=%d,maxlen=%d\n", sbuf, sbuf2, 830 UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)), 831 UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)), 832 UHCI_TD_GET_PID(le32toh(p->td.td_token)), 833 UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)), 834 UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)), 835 UHCI_TD_GET_DT(le32toh(p->td.td_token)), 836 UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token)))); 837 } 838 839 void 840 uhci_dump_qh(uhci_soft_qh_t *sqh) 841 { 842 DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh, 843 (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink), 844 le32toh(sqh->qh.qh_elink))); 845 } 846 847 848 #if 1 849 void 850 uhci_dump(void) 851 { 852 uhci_dump_all(thesc); 853 } 854 #endif 855 856 void 857 uhci_dump_all(uhci_softc_t *sc) 858 { 859 uhci_dumpregs(sc); 860 printf("intrs=%d\n", sc->sc_bus.no_intrs); 861 /*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/ 862 uhci_dump_qh(sc->sc_lctl_start); 863 } 864 865 866 void 867 uhci_dump_qhs(uhci_soft_qh_t *sqh) 868 { 869 uhci_dump_qh(sqh); 870 871 /* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards 872 * Traverses sideways first, then down. 873 * 874 * QH1 875 * QH2 876 * No QH 877 * TD2.1 878 * TD2.2 879 * TD1.1 880 * etc. 881 * 882 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1. 883 */ 884 885 886 if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T)) 887 uhci_dump_qhs(sqh->hlink); 888 else 889 DPRINTF(("No QH\n")); 890 891 if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T)) 892 uhci_dump_tds(sqh->elink); 893 else 894 DPRINTF(("No TD\n")); 895 } 896 897 void 898 uhci_dump_tds(uhci_soft_td_t *std) 899 { 900 uhci_soft_td_t *td; 901 902 for(td = std; td != NULL; td = td->link.std) { 903 uhci_dump_td(td); 904 905 /* Check whether the link pointer in this TD marks 906 * the link pointer as end of queue. This avoids 907 * printing the free list in case the queue/TD has 908 * already been moved there (seatbelt). 909 */ 910 if (le32toh(td->td.td_link) & UHCI_PTR_T || 911 le32toh(td->td.td_link) == 0) 912 break; 913 } 914 } 915 916 Static void 917 uhci_dump_ii(uhci_intr_info_t *ii) 918 { 919 usbd_pipe_handle pipe; 920 usb_endpoint_descriptor_t *ed; 921 usbd_device_handle dev; 922 923 #ifdef DIAGNOSTIC 924 #define DONE ii->isdone 925 #else 926 #define DONE 0 927 #endif 928 if (ii == NULL) { 929 printf("ii NULL\n"); 930 return; 931 } 932 if (ii->xfer == NULL) { 933 printf("ii %p: done=%d xfer=NULL\n", 934 ii, DONE); 935 return; 936 } 937 pipe = ii->xfer->pipe; 938 if (pipe == NULL) { 939 printf("ii %p: done=%d xfer=%p pipe=NULL\n", 940 ii, DONE, ii->xfer); 941 return; 942 } 943 if (pipe->endpoint == NULL) { 944 printf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n", 945 ii, DONE, ii->xfer, pipe); 946 return; 947 } 948 if (pipe->device == NULL) { 949 printf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n", 950 ii, DONE, ii->xfer, pipe); 951 return; 952 } 953 ed = pipe->endpoint->edesc; 954 dev = pipe->device; 955 printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n", 956 ii, DONE, ii->xfer, dev, 957 UGETW(dev->ddesc.idVendor), 958 UGETW(dev->ddesc.idProduct), 959 dev->address, pipe, 960 ed->bEndpointAddress, ed->bmAttributes); 961 #undef DONE 962 } 963 964 void uhci_dump_iis(struct uhci_softc *sc); 965 void 966 uhci_dump_iis(struct uhci_softc *sc) 967 { 968 uhci_intr_info_t *ii; 969 970 printf("intr_info list:\n"); 971 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list)) 972 uhci_dump_ii(ii); 973 } 974 975 void iidump(void); 976 void iidump(void) { uhci_dump_iis(thesc); } 977 978 #endif 979 980 /* 981 * This routine is executed periodically and simulates interrupts 982 * from the root controller interrupt pipe for port status change. 983 */ 984 void 985 uhci_poll_hub(void *addr) 986 { 987 usbd_xfer_handle xfer = addr; 988 usbd_pipe_handle pipe = xfer->pipe; 989 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 990 int s; 991 u_char *p; 992 993 DPRINTFN(20, ("uhci_poll_hub\n")); 994 995 usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer); 996 997 p = KERNADDR(&xfer->dmabuf, 0); 998 p[0] = 0; 999 if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 1000 p[0] |= 1<<1; 1001 if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 1002 p[0] |= 1<<2; 1003 if (p[0] == 0) 1004 /* No change, try again in a while */ 1005 return; 1006 1007 xfer->actlen = 1; 1008 xfer->status = USBD_NORMAL_COMPLETION; 1009 s = splusb(); 1010 xfer->device->bus->intr_context++; 1011 usb_transfer_complete(xfer); 1012 xfer->device->bus->intr_context--; 1013 splx(s); 1014 } 1015 1016 void 1017 uhci_root_intr_done(usbd_xfer_handle xfer) 1018 { 1019 } 1020 1021 void 1022 uhci_root_ctrl_done(usbd_xfer_handle xfer) 1023 { 1024 } 1025 1026 /* 1027 * Let the last QH loop back to the high speed control transfer QH. 1028 * This is what intel calls "bandwidth reclamation" and improves 1029 * USB performance a lot for some devices. 1030 * If we are already looping, just count it. 1031 */ 1032 void 1033 uhci_add_loop(uhci_softc_t *sc) { 1034 #ifdef UHCI_DEBUG 1035 if (uhcinoloop) 1036 return; 1037 #endif 1038 if (++sc->sc_loops == 1) { 1039 DPRINTFN(5,("uhci_start_loop: add\n")); 1040 /* Note, we don't loop back the soft pointer. */ 1041 sc->sc_last_qh->qh.qh_hlink = 1042 htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH); 1043 } 1044 } 1045 1046 void 1047 uhci_rem_loop(uhci_softc_t *sc) { 1048 #ifdef UHCI_DEBUG 1049 if (uhcinoloop) 1050 return; 1051 #endif 1052 if (--sc->sc_loops == 0) { 1053 DPRINTFN(5,("uhci_end_loop: remove\n")); 1054 sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T); 1055 } 1056 } 1057 1058 /* Add high speed control QH, called at splusb(). */ 1059 void 1060 uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1061 { 1062 uhci_soft_qh_t *eqh; 1063 1064 SPLUSBCHECK; 1065 1066 DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh)); 1067 eqh = sc->sc_hctl_end; 1068 sqh->hlink = eqh->hlink; 1069 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1070 eqh->hlink = sqh; 1071 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1072 sc->sc_hctl_end = sqh; 1073 #ifdef UHCI_CTL_LOOP 1074 uhci_add_loop(sc); 1075 #endif 1076 } 1077 1078 /* Remove high speed control QH, called at splusb(). */ 1079 void 1080 uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1081 { 1082 uhci_soft_qh_t *pqh; 1083 1084 SPLUSBCHECK; 1085 1086 DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh)); 1087 #ifdef UHCI_CTL_LOOP 1088 uhci_rem_loop(sc); 1089 #endif 1090 /* 1091 * The T bit should be set in the elink of the QH so that the HC 1092 * doesn't follow the pointer. This condition may fail if the 1093 * the transferred packet was short so that the QH still points 1094 * at the last used TD. 1095 * In this case we set the T bit and wait a little for the HC 1096 * to stop looking at the TD. 1097 */ 1098 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1099 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1100 delay(UHCI_QH_REMOVE_DELAY); 1101 } 1102 1103 pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh); 1104 pqh->hlink = sqh->hlink; 1105 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1106 delay(UHCI_QH_REMOVE_DELAY); 1107 if (sc->sc_hctl_end == sqh) 1108 sc->sc_hctl_end = pqh; 1109 } 1110 1111 /* Add low speed control QH, called at splusb(). */ 1112 void 1113 uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1114 { 1115 uhci_soft_qh_t *eqh; 1116 1117 SPLUSBCHECK; 1118 1119 DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh)); 1120 eqh = sc->sc_lctl_end; 1121 sqh->hlink = eqh->hlink; 1122 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1123 eqh->hlink = sqh; 1124 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1125 sc->sc_lctl_end = sqh; 1126 } 1127 1128 /* Remove low speed control QH, called at splusb(). */ 1129 void 1130 uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1131 { 1132 uhci_soft_qh_t *pqh; 1133 1134 SPLUSBCHECK; 1135 1136 DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh)); 1137 /* See comment in uhci_remove_hs_ctrl() */ 1138 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1139 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1140 delay(UHCI_QH_REMOVE_DELAY); 1141 } 1142 pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh); 1143 pqh->hlink = sqh->hlink; 1144 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1145 delay(UHCI_QH_REMOVE_DELAY); 1146 if (sc->sc_lctl_end == sqh) 1147 sc->sc_lctl_end = pqh; 1148 } 1149 1150 /* Add bulk QH, called at splusb(). */ 1151 void 1152 uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1153 { 1154 uhci_soft_qh_t *eqh; 1155 1156 SPLUSBCHECK; 1157 1158 DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh)); 1159 eqh = sc->sc_bulk_end; 1160 sqh->hlink = eqh->hlink; 1161 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1162 eqh->hlink = sqh; 1163 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1164 sc->sc_bulk_end = sqh; 1165 uhci_add_loop(sc); 1166 } 1167 1168 /* Remove bulk QH, called at splusb(). */ 1169 void 1170 uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1171 { 1172 uhci_soft_qh_t *pqh; 1173 1174 SPLUSBCHECK; 1175 1176 DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh)); 1177 uhci_rem_loop(sc); 1178 /* See comment in uhci_remove_hs_ctrl() */ 1179 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1180 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1181 delay(UHCI_QH_REMOVE_DELAY); 1182 } 1183 pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh); 1184 pqh->hlink = sqh->hlink; 1185 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1186 delay(UHCI_QH_REMOVE_DELAY); 1187 if (sc->sc_bulk_end == sqh) 1188 sc->sc_bulk_end = pqh; 1189 } 1190 1191 Static int uhci_intr1(uhci_softc_t *); 1192 1193 int 1194 uhci_intr(void *arg) 1195 { 1196 uhci_softc_t *sc = arg; 1197 1198 if (sc->sc_dying) 1199 return (0); 1200 1201 if (sc->sc_bus.use_polling) { 1202 #ifdef DIAGNOSTIC 1203 DPRINTFN(16, ("uhci_intr: ignored interrupt while polling\n")); 1204 #endif 1205 return (0); 1206 } 1207 1208 return (uhci_intr1(sc)); 1209 } 1210 1211 int 1212 uhci_intr1(uhci_softc_t *sc) 1213 { 1214 int status; 1215 int ack; 1216 1217 #ifdef UHCI_DEBUG 1218 if (uhcidebug > 15) { 1219 DPRINTF(("%s: uhci_intr1\n", USBDEVNAME(sc->sc_bus.bdev))); 1220 uhci_dumpregs(sc); 1221 } 1222 #endif 1223 1224 status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS; 1225 if (status == 0) /* The interrupt was not for us. */ 1226 return (0); 1227 1228 if (sc->sc_suspend != PWR_RESUME) { 1229 printf("%s: interrupt while not operating ignored\n", 1230 USBDEVNAME(sc->sc_bus.bdev)); 1231 UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */ 1232 return (0); 1233 } 1234 1235 ack = 0; 1236 if (status & UHCI_STS_USBINT) 1237 ack |= UHCI_STS_USBINT; 1238 if (status & UHCI_STS_USBEI) 1239 ack |= UHCI_STS_USBEI; 1240 if (status & UHCI_STS_RD) { 1241 ack |= UHCI_STS_RD; 1242 #ifdef UHCI_DEBUG 1243 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1244 #endif 1245 } 1246 if (status & UHCI_STS_HSE) { 1247 ack |= UHCI_STS_HSE; 1248 printf("%s: host system error\n", USBDEVNAME(sc->sc_bus.bdev)); 1249 } 1250 if (status & UHCI_STS_HCPE) { 1251 ack |= UHCI_STS_HCPE; 1252 printf("%s: host controller process error\n", 1253 USBDEVNAME(sc->sc_bus.bdev)); 1254 } 1255 if (status & UHCI_STS_HCH) { 1256 /* no acknowledge needed */ 1257 if (!sc->sc_dying) { 1258 printf("%s: host controller halted\n", 1259 USBDEVNAME(sc->sc_bus.bdev)); 1260 #ifdef UHCI_DEBUG 1261 uhci_dump_all(sc); 1262 #endif 1263 } 1264 sc->sc_dying = 1; 1265 } 1266 1267 if (!ack) 1268 return (0); /* nothing to acknowledge */ 1269 UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */ 1270 1271 sc->sc_bus.no_intrs++; 1272 usb_schedsoftintr(&sc->sc_bus); 1273 1274 DPRINTFN(15, ("%s: uhci_intr: exit\n", USBDEVNAME(sc->sc_bus.bdev))); 1275 1276 return (1); 1277 } 1278 1279 void 1280 uhci_softintr(void *v) 1281 { 1282 uhci_softc_t *sc = v; 1283 uhci_intr_info_t *ii, *nextii; 1284 1285 DPRINTFN(10,("%s: uhci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 1286 sc->sc_bus.intr_context)); 1287 1288 sc->sc_bus.intr_context++; 1289 1290 /* 1291 * Interrupts on UHCI really suck. When the host controller 1292 * interrupts because a transfer is completed there is no 1293 * way of knowing which transfer it was. You can scan down 1294 * the TDs and QHs of the previous frame to limit the search, 1295 * but that assumes that the interrupt was not delayed by more 1296 * than 1 ms, which may not always be true (e.g. after debug 1297 * output on a slow console). 1298 * We scan all interrupt descriptors to see if any have 1299 * completed. 1300 */ 1301 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = nextii) { 1302 nextii = LIST_NEXT(ii, list); 1303 uhci_check_intr(sc, ii); 1304 } 1305 1306 #ifdef USB_USE_SOFTINTR 1307 if (sc->sc_softwake) { 1308 sc->sc_softwake = 0; 1309 wakeup(&sc->sc_softwake); 1310 } 1311 #endif /* USB_USE_SOFTINTR */ 1312 1313 sc->sc_bus.intr_context--; 1314 } 1315 1316 /* Check for an interrupt. */ 1317 void 1318 uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii) 1319 { 1320 uhci_soft_td_t *std, *lstd; 1321 u_int32_t status; 1322 1323 DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii)); 1324 #ifdef DIAGNOSTIC 1325 if (ii == NULL) { 1326 printf("uhci_check_intr: no ii? %p\n", ii); 1327 return; 1328 } 1329 #endif 1330 if (ii->xfer->status == USBD_CANCELLED || 1331 ii->xfer->status == USBD_TIMEOUT) { 1332 DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer)); 1333 return; 1334 } 1335 1336 if (ii->stdstart == NULL) 1337 return; 1338 lstd = ii->stdend; 1339 #ifdef DIAGNOSTIC 1340 if (lstd == NULL) { 1341 printf("uhci_check_intr: std==0\n"); 1342 return; 1343 } 1344 #endif 1345 /* 1346 * If the last TD is still active we need to check whether there 1347 * is an error somewhere in the middle, or whether there was a 1348 * short packet (SPD and not ACTIVE). 1349 */ 1350 if (le32toh(lstd->td.td_status) & UHCI_TD_ACTIVE) { 1351 DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii)); 1352 for (std = ii->stdstart; std != lstd; std = std->link.std) { 1353 status = le32toh(std->td.td_status); 1354 /* If there's an active TD the xfer isn't done. */ 1355 if (status & UHCI_TD_ACTIVE) 1356 break; 1357 /* Any kind of error makes the xfer done. */ 1358 if (status & UHCI_TD_STALLED) 1359 goto done; 1360 /* We want short packets, and it is short: it's done */ 1361 if ((status & UHCI_TD_SPD) && 1362 UHCI_TD_GET_ACTLEN(status) < 1363 UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token))) 1364 goto done; 1365 } 1366 DPRINTFN(12, ("uhci_check_intr: ii=%p std=%p still active\n", 1367 ii, ii->stdstart)); 1368 return; 1369 } 1370 done: 1371 DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii)); 1372 usb_uncallout(ii->xfer->timeout_handle, uhci_timeout, ii); 1373 uhci_idone(ii); 1374 } 1375 1376 /* Called at splusb() */ 1377 void 1378 uhci_idone(uhci_intr_info_t *ii) 1379 { 1380 usbd_xfer_handle xfer = ii->xfer; 1381 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 1382 uhci_soft_td_t *std; 1383 u_int32_t status = 0, nstatus; 1384 int actlen; 1385 1386 DPRINTFN(12, ("uhci_idone: ii=%p\n", ii)); 1387 #ifdef DIAGNOSTIC 1388 { 1389 int s = splhigh(); 1390 if (ii->isdone) { 1391 splx(s); 1392 #ifdef UHCI_DEBUG 1393 printf("uhci_idone: ii is done!\n "); 1394 uhci_dump_ii(ii); 1395 #else 1396 printf("uhci_idone: ii=%p is done!\n", ii); 1397 #endif 1398 return; 1399 } 1400 ii->isdone = 1; 1401 splx(s); 1402 } 1403 #endif 1404 1405 if (xfer->nframes != 0) { 1406 /* Isoc transfer, do things differently. */ 1407 uhci_soft_td_t **stds = upipe->u.iso.stds; 1408 int i, n, nframes, len; 1409 1410 DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii)); 1411 1412 nframes = xfer->nframes; 1413 actlen = 0; 1414 n = UXFER(xfer)->curframe; 1415 for (i = 0; i < nframes; i++) { 1416 std = stds[n]; 1417 #ifdef UHCI_DEBUG 1418 if (uhcidebug > 5) { 1419 DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i)); 1420 uhci_dump_td(std); 1421 } 1422 #endif 1423 if (++n >= UHCI_VFRAMELIST_COUNT) 1424 n = 0; 1425 status = le32toh(std->td.td_status); 1426 len = UHCI_TD_GET_ACTLEN(status); 1427 xfer->frlengths[i] = len; 1428 actlen += len; 1429 } 1430 upipe->u.iso.inuse -= nframes; 1431 xfer->actlen = actlen; 1432 xfer->status = USBD_NORMAL_COMPLETION; 1433 goto end; 1434 } 1435 1436 #ifdef UHCI_DEBUG 1437 DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n", 1438 ii, xfer, upipe)); 1439 if (uhcidebug > 10) 1440 uhci_dump_tds(ii->stdstart); 1441 #endif 1442 1443 /* The transfer is done, compute actual length and status. */ 1444 actlen = 0; 1445 for (std = ii->stdstart; std != NULL; std = std->link.std) { 1446 nstatus = le32toh(std->td.td_status); 1447 if (nstatus & UHCI_TD_ACTIVE) 1448 break; 1449 1450 status = nstatus; 1451 if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) != 1452 UHCI_TD_PID_SETUP) 1453 actlen += UHCI_TD_GET_ACTLEN(status); 1454 else { 1455 /* 1456 * UHCI will report CRCTO in addition to a STALL or NAK 1457 * for a SETUP transaction. See section 3.2.2, "TD 1458 * CONTROL AND STATUS". 1459 */ 1460 if (status & (UHCI_TD_STALLED | UHCI_TD_NAK)) 1461 status &= ~UHCI_TD_CRCTO; 1462 } 1463 } 1464 /* If there are left over TDs we need to update the toggle. */ 1465 if (std != NULL) 1466 upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token)); 1467 1468 status &= UHCI_TD_ERROR; 1469 DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n", 1470 actlen, status)); 1471 xfer->actlen = actlen; 1472 if (status != 0) { 1473 #ifdef UHCI_DEBUG 1474 char sbuf[128]; 1475 1476 bitmask_snprintf((u_int32_t)status, 1477 "\20\22BITSTUFF\23CRCTO\24NAK\25" 1478 "BABBLE\26DBUFFER\27STALLED\30ACTIVE", 1479 sbuf, sizeof(sbuf)); 1480 1481 DPRINTFN((status == UHCI_TD_STALLED)*10, 1482 ("uhci_idone: error, addr=%d, endpt=0x%02x, " 1483 "status 0x%s\n", 1484 xfer->pipe->device->address, 1485 xfer->pipe->endpoint->edesc->bEndpointAddress, 1486 sbuf)); 1487 #endif 1488 1489 if (status == UHCI_TD_STALLED) 1490 xfer->status = USBD_STALLED; 1491 else 1492 xfer->status = USBD_IOERROR; /* more info XXX */ 1493 } else { 1494 xfer->status = USBD_NORMAL_COMPLETION; 1495 } 1496 1497 end: 1498 usb_transfer_complete(xfer); 1499 DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii)); 1500 } 1501 1502 /* 1503 * Called when a request does not complete. 1504 */ 1505 void 1506 uhci_timeout(void *addr) 1507 { 1508 uhci_intr_info_t *ii = addr; 1509 struct uhci_xfer *uxfer = UXFER(ii->xfer); 1510 struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.pipe; 1511 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus; 1512 1513 DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer)); 1514 1515 if (sc->sc_dying) { 1516 uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT); 1517 return; 1518 } 1519 1520 /* Execute the abort in a process context. */ 1521 usb_init_task(&uxfer->abort_task, uhci_timeout_task, ii->xfer); 1522 usb_add_task(uxfer->xfer.pipe->device, &uxfer->abort_task); 1523 } 1524 1525 void 1526 uhci_timeout_task(void *addr) 1527 { 1528 usbd_xfer_handle xfer = addr; 1529 int s; 1530 1531 DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer)); 1532 1533 s = splusb(); 1534 uhci_abort_xfer(xfer, USBD_TIMEOUT); 1535 splx(s); 1536 } 1537 1538 /* 1539 * Wait here until controller claims to have an interrupt. 1540 * Then call uhci_intr and return. Use timeout to avoid waiting 1541 * too long. 1542 * Only used during boot when interrupts are not enabled yet. 1543 */ 1544 void 1545 uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer) 1546 { 1547 int timo = xfer->timeout; 1548 uhci_intr_info_t *ii; 1549 1550 DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo)); 1551 1552 xfer->status = USBD_IN_PROGRESS; 1553 for (; timo >= 0; timo--) { 1554 usb_delay_ms(&sc->sc_bus, 1); 1555 DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS))); 1556 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) { 1557 uhci_intr1(sc); 1558 if (xfer->status != USBD_IN_PROGRESS) 1559 return; 1560 } 1561 } 1562 1563 /* Timeout */ 1564 DPRINTF(("uhci_waitintr: timeout\n")); 1565 for (ii = LIST_FIRST(&sc->sc_intrhead); 1566 ii != NULL && ii->xfer != xfer; 1567 ii = LIST_NEXT(ii, list)) 1568 ; 1569 #ifdef DIAGNOSTIC 1570 if (ii == NULL) 1571 panic("uhci_waitintr: lost intr_info"); 1572 #endif 1573 uhci_idone(ii); 1574 } 1575 1576 void 1577 uhci_poll(struct usbd_bus *bus) 1578 { 1579 uhci_softc_t *sc = (uhci_softc_t *)bus; 1580 1581 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) 1582 uhci_intr1(sc); 1583 } 1584 1585 void 1586 uhci_reset(uhci_softc_t *sc) 1587 { 1588 int n; 1589 1590 UHCICMD(sc, UHCI_CMD_HCRESET); 1591 /* The reset bit goes low when the controller is done. */ 1592 for (n = 0; n < UHCI_RESET_TIMEOUT && 1593 (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++) 1594 usb_delay_ms(&sc->sc_bus, 1); 1595 if (n >= UHCI_RESET_TIMEOUT) 1596 printf("%s: controller did not reset\n", 1597 USBDEVNAME(sc->sc_bus.bdev)); 1598 } 1599 1600 usbd_status 1601 uhci_run(uhci_softc_t *sc, int run) 1602 { 1603 int s, n, running; 1604 u_int16_t cmd; 1605 1606 run = run != 0; 1607 s = splhardusb(); 1608 DPRINTF(("uhci_run: setting run=%d\n", run)); 1609 cmd = UREAD2(sc, UHCI_CMD); 1610 if (run) 1611 cmd |= UHCI_CMD_RS; 1612 else 1613 cmd &= ~UHCI_CMD_RS; 1614 UHCICMD(sc, cmd); 1615 for(n = 0; n < 10; n++) { 1616 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH); 1617 /* return when we've entered the state we want */ 1618 if (run == running) { 1619 splx(s); 1620 DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n", 1621 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS))); 1622 return (USBD_NORMAL_COMPLETION); 1623 } 1624 usb_delay_ms(&sc->sc_bus, 1); 1625 } 1626 splx(s); 1627 printf("%s: cannot %s\n", USBDEVNAME(sc->sc_bus.bdev), 1628 run ? "start" : "stop"); 1629 return (USBD_IOERROR); 1630 } 1631 1632 /* 1633 * Memory management routines. 1634 * uhci_alloc_std allocates TDs 1635 * uhci_alloc_sqh allocates QHs 1636 * These two routines do their own free list management, 1637 * partly for speed, partly because allocating DMAable memory 1638 * has page size granularaity so much memory would be wasted if 1639 * only one TD/QH (32 bytes) was placed in each allocated chunk. 1640 */ 1641 1642 uhci_soft_td_t * 1643 uhci_alloc_std(uhci_softc_t *sc) 1644 { 1645 uhci_soft_td_t *std; 1646 usbd_status err; 1647 int i, offs; 1648 usb_dma_t dma; 1649 1650 if (sc->sc_freetds == NULL) { 1651 DPRINTFN(2,("uhci_alloc_std: allocating chunk\n")); 1652 err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK, 1653 UHCI_TD_ALIGN, &dma); 1654 if (err) 1655 return (0); 1656 for(i = 0; i < UHCI_STD_CHUNK; i++) { 1657 offs = i * UHCI_STD_SIZE; 1658 std = KERNADDR(&dma, offs); 1659 std->physaddr = DMAADDR(&dma, offs); 1660 std->link.std = sc->sc_freetds; 1661 sc->sc_freetds = std; 1662 } 1663 } 1664 std = sc->sc_freetds; 1665 sc->sc_freetds = std->link.std; 1666 memset(&std->td, 0, sizeof(uhci_td_t)); 1667 return std; 1668 } 1669 1670 void 1671 uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std) 1672 { 1673 #ifdef DIAGNOSTIC 1674 #define TD_IS_FREE 0x12345678 1675 if (le32toh(std->td.td_token) == TD_IS_FREE) { 1676 printf("uhci_free_std: freeing free TD %p\n", std); 1677 return; 1678 } 1679 std->td.td_token = htole32(TD_IS_FREE); 1680 #endif 1681 std->link.std = sc->sc_freetds; 1682 sc->sc_freetds = std; 1683 } 1684 1685 uhci_soft_qh_t * 1686 uhci_alloc_sqh(uhci_softc_t *sc) 1687 { 1688 uhci_soft_qh_t *sqh; 1689 usbd_status err; 1690 int i, offs; 1691 usb_dma_t dma; 1692 1693 if (sc->sc_freeqhs == NULL) { 1694 DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n")); 1695 err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK, 1696 UHCI_QH_ALIGN, &dma); 1697 if (err) 1698 return (0); 1699 for(i = 0; i < UHCI_SQH_CHUNK; i++) { 1700 offs = i * UHCI_SQH_SIZE; 1701 sqh = KERNADDR(&dma, offs); 1702 sqh->physaddr = DMAADDR(&dma, offs); 1703 sqh->hlink = sc->sc_freeqhs; 1704 sc->sc_freeqhs = sqh; 1705 } 1706 } 1707 sqh = sc->sc_freeqhs; 1708 sc->sc_freeqhs = sqh->hlink; 1709 memset(&sqh->qh, 0, sizeof(uhci_qh_t)); 1710 return (sqh); 1711 } 1712 1713 void 1714 uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1715 { 1716 sqh->hlink = sc->sc_freeqhs; 1717 sc->sc_freeqhs = sqh; 1718 } 1719 1720 void 1721 uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std, 1722 uhci_soft_td_t *stdend) 1723 { 1724 uhci_soft_td_t *p; 1725 1726 for (; std != stdend; std = p) { 1727 p = std->link.std; 1728 uhci_free_std(sc, std); 1729 } 1730 } 1731 1732 usbd_status 1733 uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len, 1734 int rd, u_int16_t flags, usb_dma_t *dma, 1735 uhci_soft_td_t **sp, uhci_soft_td_t **ep) 1736 { 1737 uhci_soft_td_t *p, *lastp; 1738 uhci_physaddr_t lastlink; 1739 int i, ntd, l, tog, maxp; 1740 u_int32_t status; 1741 int addr = upipe->pipe.device->address; 1742 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 1743 1744 DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d speed=%d " 1745 "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len, 1746 upipe->pipe.device->speed, flags)); 1747 maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize); 1748 if (maxp == 0) { 1749 printf("uhci_alloc_std_chain: maxp=0\n"); 1750 return (USBD_INVAL); 1751 } 1752 ntd = (len + maxp - 1) / maxp; 1753 if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0) 1754 ntd++; 1755 DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd)); 1756 if (ntd == 0) { 1757 *sp = *ep = 0; 1758 DPRINTFN(-1,("uhci_alloc_std_chain: ntd=0\n")); 1759 return (USBD_NORMAL_COMPLETION); 1760 } 1761 tog = upipe->nexttoggle; 1762 if (ntd % 2 == 0) 1763 tog ^= 1; 1764 upipe->nexttoggle = tog ^ 1; 1765 lastp = NULL; 1766 lastlink = UHCI_PTR_T; 1767 ntd--; 1768 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE); 1769 if (upipe->pipe.device->speed == USB_SPEED_LOW) 1770 status |= UHCI_TD_LS; 1771 if (flags & USBD_SHORT_XFER_OK) 1772 status |= UHCI_TD_SPD; 1773 for (i = ntd; i >= 0; i--) { 1774 p = uhci_alloc_std(sc); 1775 if (p == NULL) { 1776 uhci_free_std_chain(sc, lastp, NULL); 1777 return (USBD_NOMEM); 1778 } 1779 p->link.std = lastp; 1780 p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD); 1781 lastp = p; 1782 lastlink = p->physaddr; 1783 p->td.td_status = htole32(status); 1784 if (i == ntd) { 1785 /* last TD */ 1786 l = len % maxp; 1787 if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER)) 1788 l = maxp; 1789 *ep = p; 1790 } else 1791 l = maxp; 1792 p->td.td_token = 1793 htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) : 1794 UHCI_TD_OUT(l, endpt, addr, tog)); 1795 p->td.td_buffer = htole32(DMAADDR(dma, i * maxp)); 1796 tog ^= 1; 1797 } 1798 *sp = lastp; 1799 DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n", 1800 upipe->nexttoggle)); 1801 return (USBD_NORMAL_COMPLETION); 1802 } 1803 1804 void 1805 uhci_device_clear_toggle(usbd_pipe_handle pipe) 1806 { 1807 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1808 upipe->nexttoggle = 0; 1809 } 1810 1811 void 1812 uhci_noop(usbd_pipe_handle pipe) 1813 { 1814 } 1815 1816 usbd_status 1817 uhci_device_bulk_transfer(usbd_xfer_handle xfer) 1818 { 1819 usbd_status err; 1820 1821 /* Insert last in queue. */ 1822 err = usb_insert_transfer(xfer); 1823 if (err) 1824 return (err); 1825 1826 /* 1827 * Pipe isn't running (otherwise err would be USBD_INPROG), 1828 * so start it first. 1829 */ 1830 return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1831 } 1832 1833 usbd_status 1834 uhci_device_bulk_start(usbd_xfer_handle xfer) 1835 { 1836 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 1837 usbd_device_handle dev = upipe->pipe.device; 1838 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1839 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 1840 uhci_soft_td_t *data, *dataend; 1841 uhci_soft_qh_t *sqh; 1842 usbd_status err; 1843 int len, isread, endpt; 1844 int s; 1845 1846 DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%d flags=%d ii=%p\n", 1847 xfer, xfer->length, xfer->flags, ii)); 1848 1849 if (sc->sc_dying) 1850 return (USBD_IOERROR); 1851 1852 #ifdef DIAGNOSTIC 1853 if (xfer->rqflags & URQ_REQUEST) 1854 panic("uhci_device_bulk_transfer: a request"); 1855 #endif 1856 1857 len = xfer->length; 1858 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 1859 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 1860 sqh = upipe->u.bulk.sqh; 1861 1862 upipe->u.bulk.isread = isread; 1863 upipe->u.bulk.length = len; 1864 1865 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags, 1866 &xfer->dmabuf, &data, &dataend); 1867 if (err) 1868 return (err); 1869 dataend->td.td_status |= htole32(UHCI_TD_IOC); 1870 1871 #ifdef UHCI_DEBUG 1872 if (uhcidebug > 8) { 1873 DPRINTF(("uhci_device_bulk_transfer: data(1)\n")); 1874 uhci_dump_tds(data); 1875 } 1876 #endif 1877 1878 /* Set up interrupt info. */ 1879 ii->xfer = xfer; 1880 ii->stdstart = data; 1881 ii->stdend = dataend; 1882 #ifdef DIAGNOSTIC 1883 if (!ii->isdone) { 1884 printf("uhci_device_bulk_transfer: not done, ii=%p\n", ii); 1885 } 1886 ii->isdone = 0; 1887 #endif 1888 1889 sqh->elink = data; 1890 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 1891 1892 s = splusb(); 1893 uhci_add_bulk(sc, sqh); 1894 uhci_add_intr_info(sc, ii); 1895 1896 if (xfer->timeout && !sc->sc_bus.use_polling) { 1897 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 1898 uhci_timeout, ii); 1899 } 1900 xfer->status = USBD_IN_PROGRESS; 1901 splx(s); 1902 1903 #ifdef UHCI_DEBUG 1904 if (uhcidebug > 10) { 1905 DPRINTF(("uhci_device_bulk_transfer: data(2)\n")); 1906 uhci_dump_tds(data); 1907 } 1908 #endif 1909 1910 if (sc->sc_bus.use_polling) 1911 uhci_waitintr(sc, xfer); 1912 1913 return (USBD_IN_PROGRESS); 1914 } 1915 1916 /* Abort a device bulk request. */ 1917 void 1918 uhci_device_bulk_abort(usbd_xfer_handle xfer) 1919 { 1920 DPRINTF(("uhci_device_bulk_abort:\n")); 1921 uhci_abort_xfer(xfer, USBD_CANCELLED); 1922 } 1923 1924 /* 1925 * Abort a device request. 1926 * If this routine is called at splusb() it guarantees that the request 1927 * will be removed from the hardware scheduling and that the callback 1928 * for it will be called with USBD_CANCELLED status. 1929 * It's impossible to guarantee that the requested transfer will not 1930 * have happened since the hardware runs concurrently. 1931 * If the transaction has already happened we rely on the ordinary 1932 * interrupt processing to process it. 1933 */ 1934 void 1935 uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 1936 { 1937 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 1938 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 1939 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus; 1940 uhci_soft_td_t *std; 1941 int s; 1942 int wake; 1943 1944 DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status)); 1945 1946 if (sc->sc_dying) { 1947 /* If we're dying, just do the software part. */ 1948 s = splusb(); 1949 xfer->status = status; /* make software ignore it */ 1950 usb_uncallout(xfer->timeout_handle, uhci_timeout, xfer); 1951 usb_transfer_complete(xfer); 1952 splx(s); 1953 } 1954 1955 if (xfer->device->bus->intr_context || !curproc) 1956 panic("uhci_abort_xfer: not in process context"); 1957 1958 /* 1959 * If an abort is already in progress then just wait for it to 1960 * complete and return. 1961 */ 1962 if (xfer->hcflags & UXFER_ABORTING) { 1963 DPRINTFN(2, ("uhci_abort_xfer: already aborting\n")); 1964 #ifdef DIAGNOSTIC 1965 if (status == USBD_TIMEOUT) 1966 printf("uhci_abort_xfer: TIMEOUT while aborting\n"); 1967 #endif 1968 /* Override the status which might be USBD_TIMEOUT. */ 1969 xfer->status = status; 1970 DPRINTFN(2, ("uhci_abort_xfer: waiting for abort to finish\n")); 1971 xfer->hcflags |= UXFER_ABORTWAIT; 1972 while (xfer->hcflags & UXFER_ABORTING) 1973 tsleep(&xfer->hcflags, PZERO, "uhciaw", 0); 1974 return; 1975 } 1976 xfer->hcflags |= UXFER_ABORTING; 1977 1978 /* 1979 * Step 1: Make interrupt routine and hardware ignore xfer. 1980 */ 1981 s = splusb(); 1982 xfer->status = status; /* make software ignore it */ 1983 usb_uncallout(xfer->timeout_handle, uhci_timeout, ii); 1984 DPRINTFN(1,("uhci_abort_xfer: stop ii=%p\n", ii)); 1985 for (std = ii->stdstart; std != NULL; std = std->link.std) 1986 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 1987 splx(s); 1988 1989 /* 1990 * Step 2: Wait until we know hardware has finished any possible 1991 * use of the xfer. Also make sure the soft interrupt routine 1992 * has run. 1993 */ 1994 usb_delay_ms(upipe->pipe.device->bus, 2); /* Hardware finishes in 1ms */ 1995 s = splusb(); 1996 #ifdef USB_USE_SOFTINTR 1997 sc->sc_softwake = 1; 1998 #endif /* USB_USE_SOFTINTR */ 1999 usb_schedsoftintr(&sc->sc_bus); 2000 #ifdef USB_USE_SOFTINTR 2001 DPRINTFN(1,("uhci_abort_xfer: tsleep\n")); 2002 tsleep(&sc->sc_softwake, PZERO, "uhciab", 0); 2003 #endif /* USB_USE_SOFTINTR */ 2004 splx(s); 2005 2006 /* 2007 * Step 3: Execute callback. 2008 */ 2009 DPRINTFN(1,("uhci_abort_xfer: callback\n")); 2010 s = splusb(); 2011 #ifdef DIAGNOSTIC 2012 ii->isdone = 1; 2013 #endif 2014 wake = xfer->hcflags & UXFER_ABORTWAIT; 2015 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2016 usb_transfer_complete(xfer); 2017 if (wake) 2018 wakeup(&xfer->hcflags); 2019 splx(s); 2020 } 2021 2022 /* Close a device bulk pipe. */ 2023 void 2024 uhci_device_bulk_close(usbd_pipe_handle pipe) 2025 { 2026 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2027 usbd_device_handle dev = upipe->pipe.device; 2028 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2029 2030 uhci_free_sqh(sc, upipe->u.bulk.sqh); 2031 } 2032 2033 usbd_status 2034 uhci_device_ctrl_transfer(usbd_xfer_handle xfer) 2035 { 2036 usbd_status err; 2037 2038 /* Insert last in queue. */ 2039 err = usb_insert_transfer(xfer); 2040 if (err) 2041 return (err); 2042 2043 /* 2044 * Pipe isn't running (otherwise err would be USBD_INPROG), 2045 * so start it first. 2046 */ 2047 return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2048 } 2049 2050 usbd_status 2051 uhci_device_ctrl_start(usbd_xfer_handle xfer) 2052 { 2053 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus; 2054 usbd_status err; 2055 2056 if (sc->sc_dying) 2057 return (USBD_IOERROR); 2058 2059 #ifdef DIAGNOSTIC 2060 if (!(xfer->rqflags & URQ_REQUEST)) 2061 panic("uhci_device_ctrl_transfer: not a request"); 2062 #endif 2063 2064 err = uhci_device_request(xfer); 2065 if (err) 2066 return (err); 2067 2068 if (sc->sc_bus.use_polling) 2069 uhci_waitintr(sc, xfer); 2070 return (USBD_IN_PROGRESS); 2071 } 2072 2073 usbd_status 2074 uhci_device_intr_transfer(usbd_xfer_handle xfer) 2075 { 2076 usbd_status err; 2077 2078 /* Insert last in queue. */ 2079 err = usb_insert_transfer(xfer); 2080 if (err) 2081 return (err); 2082 2083 /* 2084 * Pipe isn't running (otherwise err would be USBD_INPROG), 2085 * so start it first. 2086 */ 2087 return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2088 } 2089 2090 usbd_status 2091 uhci_device_intr_start(usbd_xfer_handle xfer) 2092 { 2093 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2094 usbd_device_handle dev = upipe->pipe.device; 2095 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2096 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2097 uhci_soft_td_t *data, *dataend; 2098 uhci_soft_qh_t *sqh; 2099 usbd_status err; 2100 int isread, endpt; 2101 int i, s; 2102 2103 if (sc->sc_dying) 2104 return (USBD_IOERROR); 2105 2106 DPRINTFN(3,("uhci_device_intr_transfer: xfer=%p len=%d flags=%d\n", 2107 xfer, xfer->length, xfer->flags)); 2108 2109 #ifdef DIAGNOSTIC 2110 if (xfer->rqflags & URQ_REQUEST) 2111 panic("uhci_device_intr_transfer: a request"); 2112 #endif 2113 2114 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2115 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2116 2117 upipe->u.intr.isread = isread; 2118 2119 err = uhci_alloc_std_chain(upipe, sc, xfer->length, isread, 2120 xfer->flags, &xfer->dmabuf, &data, 2121 &dataend); 2122 if (err) 2123 return (err); 2124 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2125 2126 #ifdef UHCI_DEBUG 2127 if (uhcidebug > 10) { 2128 DPRINTF(("uhci_device_intr_transfer: data(1)\n")); 2129 uhci_dump_tds(data); 2130 uhci_dump_qh(upipe->u.intr.qhs[0]); 2131 } 2132 #endif 2133 2134 s = splusb(); 2135 /* Set up interrupt info. */ 2136 ii->xfer = xfer; 2137 ii->stdstart = data; 2138 ii->stdend = dataend; 2139 #ifdef DIAGNOSTIC 2140 if (!ii->isdone) { 2141 printf("uhci_device_intr_transfer: not done, ii=%p\n", ii); 2142 } 2143 ii->isdone = 0; 2144 #endif 2145 2146 DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n", 2147 upipe->u.intr.qhs[0])); 2148 for (i = 0; i < upipe->u.intr.npoll; i++) { 2149 sqh = upipe->u.intr.qhs[i]; 2150 sqh->elink = data; 2151 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2152 } 2153 uhci_add_intr_info(sc, ii); 2154 xfer->status = USBD_IN_PROGRESS; 2155 splx(s); 2156 2157 #ifdef UHCI_DEBUG 2158 if (uhcidebug > 10) { 2159 DPRINTF(("uhci_device_intr_transfer: data(2)\n")); 2160 uhci_dump_tds(data); 2161 uhci_dump_qh(upipe->u.intr.qhs[0]); 2162 } 2163 #endif 2164 2165 return (USBD_IN_PROGRESS); 2166 } 2167 2168 /* Abort a device control request. */ 2169 void 2170 uhci_device_ctrl_abort(usbd_xfer_handle xfer) 2171 { 2172 DPRINTF(("uhci_device_ctrl_abort:\n")); 2173 uhci_abort_xfer(xfer, USBD_CANCELLED); 2174 } 2175 2176 /* Close a device control pipe. */ 2177 void 2178 uhci_device_ctrl_close(usbd_pipe_handle pipe) 2179 { 2180 } 2181 2182 /* Abort a device interrupt request. */ 2183 void 2184 uhci_device_intr_abort(usbd_xfer_handle xfer) 2185 { 2186 DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer)); 2187 if (xfer->pipe->intrxfer == xfer) { 2188 DPRINTFN(1,("uhci_device_intr_abort: remove\n")); 2189 xfer->pipe->intrxfer = NULL; 2190 } 2191 uhci_abort_xfer(xfer, USBD_CANCELLED); 2192 } 2193 2194 /* Close a device interrupt pipe. */ 2195 void 2196 uhci_device_intr_close(usbd_pipe_handle pipe) 2197 { 2198 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2199 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 2200 int i, npoll; 2201 int s; 2202 2203 /* Unlink descriptors from controller data structures. */ 2204 npoll = upipe->u.intr.npoll; 2205 s = splusb(); 2206 for (i = 0; i < npoll; i++) 2207 uhci_remove_intr(sc, upipe->u.intr.qhs[i]); 2208 splx(s); 2209 2210 /* 2211 * We now have to wait for any activity on the physical 2212 * descriptors to stop. 2213 */ 2214 usb_delay_ms(&sc->sc_bus, 2); 2215 2216 for(i = 0; i < npoll; i++) 2217 uhci_free_sqh(sc, upipe->u.intr.qhs[i]); 2218 free(upipe->u.intr.qhs, M_USBHC); 2219 2220 /* XXX free other resources */ 2221 } 2222 2223 usbd_status 2224 uhci_device_request(usbd_xfer_handle xfer) 2225 { 2226 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2227 usb_device_request_t *req = &xfer->request; 2228 usbd_device_handle dev = upipe->pipe.device; 2229 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2230 int addr = dev->address; 2231 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2232 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2233 uhci_soft_td_t *setup, *data, *stat, *next, *dataend; 2234 uhci_soft_qh_t *sqh; 2235 int len; 2236 u_int32_t ls; 2237 usbd_status err; 2238 int isread; 2239 int s; 2240 2241 DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, " 2242 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2243 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2244 UGETW(req->wIndex), UGETW(req->wLength), 2245 addr, endpt)); 2246 2247 ls = dev->speed == USB_SPEED_LOW ? UHCI_TD_LS : 0; 2248 isread = req->bmRequestType & UT_READ; 2249 len = UGETW(req->wLength); 2250 2251 setup = upipe->u.ctl.setup; 2252 stat = upipe->u.ctl.stat; 2253 sqh = upipe->u.ctl.sqh; 2254 2255 /* Set up data transaction */ 2256 if (len != 0) { 2257 upipe->nexttoggle = 1; 2258 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags, 2259 &xfer->dmabuf, &data, &dataend); 2260 if (err) 2261 return (err); 2262 next = data; 2263 dataend->link.std = stat; 2264 dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_VF | UHCI_PTR_TD); 2265 } else { 2266 next = stat; 2267 } 2268 upipe->u.ctl.length = len; 2269 2270 memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req); 2271 2272 setup->link.std = next; 2273 setup->td.td_link = htole32(next->physaddr | UHCI_PTR_VF | UHCI_PTR_TD); 2274 setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2275 UHCI_TD_ACTIVE); 2276 setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr)); 2277 setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0)); 2278 2279 stat->link.std = NULL; 2280 stat->td.td_link = htole32(UHCI_PTR_T); 2281 stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2282 UHCI_TD_ACTIVE | UHCI_TD_IOC); 2283 stat->td.td_token = 2284 htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) : 2285 UHCI_TD_IN (0, endpt, addr, 1)); 2286 stat->td.td_buffer = htole32(0); 2287 2288 #ifdef UHCI_DEBUG 2289 if (uhcidebug > 10) { 2290 DPRINTF(("uhci_device_request: before transfer\n")); 2291 uhci_dump_tds(setup); 2292 } 2293 #endif 2294 2295 /* Set up interrupt info. */ 2296 ii->xfer = xfer; 2297 ii->stdstart = setup; 2298 ii->stdend = stat; 2299 #ifdef DIAGNOSTIC 2300 if (!ii->isdone) { 2301 printf("uhci_device_request: not done, ii=%p\n", ii); 2302 } 2303 ii->isdone = 0; 2304 #endif 2305 2306 sqh->elink = setup; 2307 sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD); 2308 2309 s = splusb(); 2310 if (dev->speed == USB_SPEED_LOW) 2311 uhci_add_ls_ctrl(sc, sqh); 2312 else 2313 uhci_add_hs_ctrl(sc, sqh); 2314 uhci_add_intr_info(sc, ii); 2315 #ifdef UHCI_DEBUG 2316 if (uhcidebug > 12) { 2317 uhci_soft_td_t *std; 2318 uhci_soft_qh_t *xqh; 2319 uhci_soft_qh_t *sxqh; 2320 int maxqh = 0; 2321 uhci_physaddr_t link; 2322 DPRINTF(("uhci_enter_ctl_q: follow from [0]\n")); 2323 for (std = sc->sc_vframes[0].htd, link = 0; 2324 (link & UHCI_PTR_QH) == 0; 2325 std = std->link.std) { 2326 link = le32toh(std->td.td_link); 2327 uhci_dump_td(std); 2328 } 2329 sxqh = (uhci_soft_qh_t *)std; 2330 uhci_dump_qh(sxqh); 2331 for (xqh = sxqh; 2332 xqh != NULL; 2333 xqh = (maxqh++ == 5 || xqh->hlink == sxqh || 2334 xqh->hlink == xqh ? NULL : xqh->hlink)) { 2335 uhci_dump_qh(xqh); 2336 } 2337 DPRINTF(("Enqueued QH:\n")); 2338 uhci_dump_qh(sqh); 2339 uhci_dump_tds(sqh->elink); 2340 } 2341 #endif 2342 if (xfer->timeout && !sc->sc_bus.use_polling) { 2343 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2344 uhci_timeout, ii); 2345 } 2346 xfer->status = USBD_IN_PROGRESS; 2347 splx(s); 2348 2349 return (USBD_NORMAL_COMPLETION); 2350 } 2351 2352 usbd_status 2353 uhci_device_isoc_transfer(usbd_xfer_handle xfer) 2354 { 2355 usbd_status err; 2356 2357 DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer)); 2358 2359 /* Put it on our queue, */ 2360 err = usb_insert_transfer(xfer); 2361 2362 /* bail out on error, */ 2363 if (err && err != USBD_IN_PROGRESS) 2364 return (err); 2365 2366 /* XXX should check inuse here */ 2367 2368 /* insert into schedule, */ 2369 uhci_device_isoc_enter(xfer); 2370 2371 /* and start if the pipe wasn't running */ 2372 if (!err) 2373 uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 2374 2375 return (err); 2376 } 2377 2378 void 2379 uhci_device_isoc_enter(usbd_xfer_handle xfer) 2380 { 2381 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2382 usbd_device_handle dev = upipe->pipe.device; 2383 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2384 struct iso *iso = &upipe->u.iso; 2385 uhci_soft_td_t *std; 2386 u_int32_t buf, len, status; 2387 int s, i, next, nframes; 2388 2389 DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p " 2390 "nframes=%d\n", 2391 iso->inuse, iso->next, xfer, xfer->nframes)); 2392 2393 if (sc->sc_dying) 2394 return; 2395 2396 if (xfer->status == USBD_IN_PROGRESS) { 2397 /* This request has already been entered into the frame list */ 2398 printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer); 2399 /* XXX */ 2400 } 2401 2402 #ifdef DIAGNOSTIC 2403 if (iso->inuse >= UHCI_VFRAMELIST_COUNT) 2404 printf("uhci_device_isoc_enter: overflow!\n"); 2405 #endif 2406 2407 next = iso->next; 2408 if (next == -1) { 2409 /* Not in use yet, schedule it a few frames ahead. */ 2410 next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT; 2411 DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next)); 2412 } 2413 2414 xfer->status = USBD_IN_PROGRESS; 2415 UXFER(xfer)->curframe = next; 2416 2417 buf = DMAADDR(&xfer->dmabuf, 0); 2418 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) | 2419 UHCI_TD_ACTIVE | 2420 UHCI_TD_IOS); 2421 nframes = xfer->nframes; 2422 s = splusb(); 2423 for (i = 0; i < nframes; i++) { 2424 std = iso->stds[next]; 2425 if (++next >= UHCI_VFRAMELIST_COUNT) 2426 next = 0; 2427 len = xfer->frlengths[i]; 2428 std->td.td_buffer = htole32(buf); 2429 if (i == nframes - 1) 2430 status |= UHCI_TD_IOC; 2431 std->td.td_status = htole32(status); 2432 std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK); 2433 std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len)); 2434 #ifdef UHCI_DEBUG 2435 if (uhcidebug > 5) { 2436 DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i)); 2437 uhci_dump_td(std); 2438 } 2439 #endif 2440 buf += len; 2441 } 2442 iso->next = next; 2443 iso->inuse += xfer->nframes; 2444 2445 splx(s); 2446 } 2447 2448 usbd_status 2449 uhci_device_isoc_start(usbd_xfer_handle xfer) 2450 { 2451 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2452 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus; 2453 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2454 uhci_soft_td_t *end; 2455 int s, i; 2456 2457 DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer)); 2458 2459 if (sc->sc_dying) 2460 return (USBD_IOERROR); 2461 2462 #ifdef DIAGNOSTIC 2463 if (xfer->status != USBD_IN_PROGRESS) 2464 printf("uhci_device_isoc_start: not in progress %p\n", xfer); 2465 #endif 2466 2467 /* Find the last TD */ 2468 i = UXFER(xfer)->curframe + xfer->nframes; 2469 if (i >= UHCI_VFRAMELIST_COUNT) 2470 i -= UHCI_VFRAMELIST_COUNT; 2471 end = upipe->u.iso.stds[i]; 2472 2473 #ifdef DIAGNOSTIC 2474 if (end == NULL) { 2475 printf("uhci_device_isoc_start: end == NULL\n"); 2476 return (USBD_INVAL); 2477 } 2478 #endif 2479 2480 s = splusb(); 2481 2482 /* Set up interrupt info. */ 2483 ii->xfer = xfer; 2484 ii->stdstart = end; 2485 ii->stdend = end; 2486 #ifdef DIAGNOSTIC 2487 if (!ii->isdone) 2488 printf("uhci_device_isoc_start: not done, ii=%p\n", ii); 2489 ii->isdone = 0; 2490 #endif 2491 uhci_add_intr_info(sc, ii); 2492 2493 splx(s); 2494 2495 return (USBD_IN_PROGRESS); 2496 } 2497 2498 void 2499 uhci_device_isoc_abort(usbd_xfer_handle xfer) 2500 { 2501 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2502 uhci_soft_td_t **stds = upipe->u.iso.stds; 2503 uhci_soft_td_t *std; 2504 int i, n, s, nframes, maxlen, len; 2505 2506 s = splusb(); 2507 2508 /* Transfer is already done. */ 2509 if (xfer->status != USBD_NOT_STARTED && 2510 xfer->status != USBD_IN_PROGRESS) { 2511 splx(s); 2512 return; 2513 } 2514 2515 /* Give xfer the requested abort code. */ 2516 xfer->status = USBD_CANCELLED; 2517 2518 /* make hardware ignore it, */ 2519 nframes = xfer->nframes; 2520 n = UXFER(xfer)->curframe; 2521 maxlen = 0; 2522 for (i = 0; i < nframes; i++) { 2523 std = stds[n]; 2524 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 2525 len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token)); 2526 if (len > maxlen) 2527 maxlen = len; 2528 if (++n >= UHCI_VFRAMELIST_COUNT) 2529 n = 0; 2530 } 2531 2532 /* and wait until we are sure the hardware has finished. */ 2533 delay(maxlen); 2534 2535 #ifdef DIAGNOSTIC 2536 UXFER(xfer)->iinfo.isdone = 1; 2537 #endif 2538 /* Run callback and remove from interrupt list. */ 2539 usb_transfer_complete(xfer); 2540 2541 splx(s); 2542 } 2543 2544 void 2545 uhci_device_isoc_close(usbd_pipe_handle pipe) 2546 { 2547 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2548 usbd_device_handle dev = upipe->pipe.device; 2549 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2550 uhci_soft_td_t *std, *vstd; 2551 struct iso *iso; 2552 int i, s; 2553 2554 /* 2555 * Make sure all TDs are marked as inactive. 2556 * Wait for completion. 2557 * Unschedule. 2558 * Deallocate. 2559 */ 2560 iso = &upipe->u.iso; 2561 2562 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) 2563 iso->stds[i]->td.td_status &= htole32(~UHCI_TD_ACTIVE); 2564 usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */ 2565 2566 s = splusb(); 2567 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2568 std = iso->stds[i]; 2569 for (vstd = sc->sc_vframes[i].htd; 2570 vstd != NULL && vstd->link.std != std; 2571 vstd = vstd->link.std) 2572 ; 2573 if (vstd == NULL) { 2574 /*panic*/ 2575 printf("uhci_device_isoc_close: %p not found\n", std); 2576 splx(s); 2577 return; 2578 } 2579 vstd->link = std->link; 2580 vstd->td.td_link = std->td.td_link; 2581 uhci_free_std(sc, std); 2582 } 2583 splx(s); 2584 2585 free(iso->stds, M_USBHC); 2586 } 2587 2588 usbd_status 2589 uhci_setup_isoc(usbd_pipe_handle pipe) 2590 { 2591 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2592 usbd_device_handle dev = upipe->pipe.device; 2593 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2594 int addr = upipe->pipe.device->address; 2595 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2596 int rd = UE_GET_DIR(endpt) == UE_DIR_IN; 2597 uhci_soft_td_t *std, *vstd; 2598 u_int32_t token; 2599 struct iso *iso; 2600 int i, s; 2601 2602 iso = &upipe->u.iso; 2603 iso->stds = malloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *), 2604 M_USBHC, M_WAITOK); 2605 2606 token = rd ? UHCI_TD_IN (0, endpt, addr, 0) : 2607 UHCI_TD_OUT(0, endpt, addr, 0); 2608 2609 /* Allocate the TDs and mark as inactive; */ 2610 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2611 std = uhci_alloc_std(sc); 2612 if (std == 0) 2613 goto bad; 2614 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 2615 std->td.td_token = htole32(token); 2616 iso->stds[i] = std; 2617 } 2618 2619 /* Insert TDs into schedule. */ 2620 s = splusb(); 2621 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2622 std = iso->stds[i]; 2623 vstd = sc->sc_vframes[i].htd; 2624 std->link = vstd->link; 2625 std->td.td_link = vstd->td.td_link; 2626 vstd->link.std = std; 2627 vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD); 2628 } 2629 splx(s); 2630 2631 iso->next = -1; 2632 iso->inuse = 0; 2633 2634 return (USBD_NORMAL_COMPLETION); 2635 2636 bad: 2637 while (--i >= 0) 2638 uhci_free_std(sc, iso->stds[i]); 2639 free(iso->stds, M_USBHC); 2640 return (USBD_NOMEM); 2641 } 2642 2643 void 2644 uhci_device_isoc_done(usbd_xfer_handle xfer) 2645 { 2646 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2647 2648 DPRINTFN(4, ("uhci_isoc_done: length=%d\n", xfer->actlen)); 2649 2650 if (ii->xfer != xfer) 2651 /* Not on interrupt list, ignore it. */ 2652 return; 2653 2654 if (!uhci_active_intr_info(ii)) 2655 return; 2656 2657 #ifdef DIAGNOSTIC 2658 if (xfer->busy_free != XFER_BUSY) { 2659 printf("uhci_device_isoc_done: xfer=%p not busy 0x%08x\n", 2660 xfer, xfer->busy_free); 2661 return; 2662 } 2663 2664 if (ii->stdend == NULL) { 2665 printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer); 2666 #ifdef UHCI_DEBUG 2667 uhci_dump_ii(ii); 2668 #endif 2669 return; 2670 } 2671 #endif 2672 2673 /* Turn off the interrupt since it is active even if the TD is not. */ 2674 ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC); 2675 2676 uhci_del_intr_info(ii); /* remove from active list */ 2677 } 2678 2679 void 2680 uhci_device_intr_done(usbd_xfer_handle xfer) 2681 { 2682 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2683 uhci_softc_t *sc = ii->sc; 2684 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2685 uhci_soft_qh_t *sqh; 2686 int i, npoll; 2687 2688 DPRINTFN(5, ("uhci_device_intr_done: length=%d\n", xfer->actlen)); 2689 2690 npoll = upipe->u.intr.npoll; 2691 for(i = 0; i < npoll; i++) { 2692 sqh = upipe->u.intr.qhs[i]; 2693 sqh->elink = NULL; 2694 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 2695 } 2696 uhci_free_std_chain(sc, ii->stdstart, NULL); 2697 2698 /* XXX Wasteful. */ 2699 if (xfer->pipe->repeat) { 2700 uhci_soft_td_t *data, *dataend; 2701 2702 DPRINTFN(5,("uhci_device_intr_done: requeing\n")); 2703 2704 /* This alloc cannot fail since we freed the chain above. */ 2705 uhci_alloc_std_chain(upipe, sc, xfer->length, 1, xfer->flags, 2706 &xfer->dmabuf, &data, &dataend); 2707 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2708 2709 #ifdef UHCI_DEBUG 2710 if (uhcidebug > 10) { 2711 DPRINTF(("uhci_device_intr_done: data(1)\n")); 2712 uhci_dump_tds(data); 2713 uhci_dump_qh(upipe->u.intr.qhs[0]); 2714 } 2715 #endif 2716 2717 ii->stdstart = data; 2718 ii->stdend = dataend; 2719 #ifdef DIAGNOSTIC 2720 if (!ii->isdone) { 2721 printf("uhci_device_intr_done: not done, ii=%p\n", ii); 2722 } 2723 ii->isdone = 0; 2724 #endif 2725 for (i = 0; i < npoll; i++) { 2726 sqh = upipe->u.intr.qhs[i]; 2727 sqh->elink = data; 2728 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2729 } 2730 xfer->status = USBD_IN_PROGRESS; 2731 /* The ii is already on the examined list, just leave it. */ 2732 } else { 2733 DPRINTFN(5,("uhci_device_intr_done: removing\n")); 2734 if (uhci_active_intr_info(ii)) 2735 uhci_del_intr_info(ii); 2736 } 2737 } 2738 2739 /* Deallocate request data structures */ 2740 void 2741 uhci_device_ctrl_done(usbd_xfer_handle xfer) 2742 { 2743 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2744 uhci_softc_t *sc = ii->sc; 2745 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2746 2747 #ifdef DIAGNOSTIC 2748 if (!(xfer->rqflags & URQ_REQUEST)) 2749 panic("uhci_device_ctrl_done: not a request"); 2750 #endif 2751 2752 if (!uhci_active_intr_info(ii)) 2753 return; 2754 2755 uhci_del_intr_info(ii); /* remove from active list */ 2756 2757 if (upipe->pipe.device->speed == USB_SPEED_LOW) 2758 uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh); 2759 else 2760 uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh); 2761 2762 if (upipe->u.ctl.length != 0) 2763 uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend); 2764 2765 DPRINTFN(5, ("uhci_device_ctrl_done: length=%d\n", xfer->actlen)); 2766 } 2767 2768 /* Deallocate request data structures */ 2769 void 2770 uhci_device_bulk_done(usbd_xfer_handle xfer) 2771 { 2772 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2773 uhci_softc_t *sc = ii->sc; 2774 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2775 2776 DPRINTFN(5,("uhci_device_bulk_done: xfer=%p ii=%p sc=%p upipe=%p\n", 2777 xfer, ii, sc, upipe)); 2778 2779 if (!uhci_active_intr_info(ii)) 2780 return; 2781 2782 uhci_del_intr_info(ii); /* remove from active list */ 2783 2784 uhci_remove_bulk(sc, upipe->u.bulk.sqh); 2785 2786 uhci_free_std_chain(sc, ii->stdstart, NULL); 2787 2788 DPRINTFN(5, ("uhci_device_bulk_done: length=%d\n", xfer->actlen)); 2789 } 2790 2791 /* Add interrupt QH, called with vflock. */ 2792 void 2793 uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 2794 { 2795 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 2796 uhci_soft_qh_t *eqh; 2797 2798 DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh)); 2799 2800 eqh = vf->eqh; 2801 sqh->hlink = eqh->hlink; 2802 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 2803 eqh->hlink = sqh; 2804 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 2805 vf->eqh = sqh; 2806 vf->bandwidth++; 2807 } 2808 2809 /* Remove interrupt QH. */ 2810 void 2811 uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 2812 { 2813 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 2814 uhci_soft_qh_t *pqh; 2815 2816 DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh)); 2817 2818 /* See comment in uhci_remove_ctrl() */ 2819 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 2820 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 2821 delay(UHCI_QH_REMOVE_DELAY); 2822 } 2823 2824 pqh = uhci_find_prev_qh(vf->hqh, sqh); 2825 pqh->hlink = sqh->hlink; 2826 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 2827 delay(UHCI_QH_REMOVE_DELAY); 2828 if (vf->eqh == sqh) 2829 vf->eqh = pqh; 2830 vf->bandwidth--; 2831 } 2832 2833 usbd_status 2834 uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival) 2835 { 2836 uhci_soft_qh_t *sqh; 2837 int i, npoll, s; 2838 u_int bestbw, bw, bestoffs, offs; 2839 2840 DPRINTFN(2, ("uhci_device_setintr: pipe=%p\n", upipe)); 2841 if (ival == 0) { 2842 printf("uhci_device_setintr: 0 interval\n"); 2843 return (USBD_INVAL); 2844 } 2845 2846 if (ival > UHCI_VFRAMELIST_COUNT) 2847 ival = UHCI_VFRAMELIST_COUNT; 2848 npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival; 2849 DPRINTFN(2, ("uhci_device_setintr: ival=%d npoll=%d\n", ival, npoll)); 2850 2851 upipe->u.intr.npoll = npoll; 2852 upipe->u.intr.qhs = 2853 malloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_WAITOK); 2854 2855 /* 2856 * Figure out which offset in the schedule that has most 2857 * bandwidth left over. 2858 */ 2859 #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1)) 2860 for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) { 2861 for (bw = i = 0; i < npoll; i++) 2862 bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth; 2863 if (bw < bestbw) { 2864 bestbw = bw; 2865 bestoffs = offs; 2866 } 2867 } 2868 DPRINTFN(1, ("uhci_device_setintr: bw=%d offs=%d\n", bestbw, bestoffs)); 2869 2870 for(i = 0; i < npoll; i++) { 2871 upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc); 2872 sqh->elink = NULL; 2873 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 2874 sqh->pos = MOD(i * ival + bestoffs); 2875 } 2876 #undef MOD 2877 2878 s = splusb(); 2879 /* Enter QHs into the controller data structures. */ 2880 for(i = 0; i < npoll; i++) 2881 uhci_add_intr(sc, upipe->u.intr.qhs[i]); 2882 splx(s); 2883 2884 DPRINTFN(5, ("uhci_device_setintr: returns %p\n", upipe)); 2885 return (USBD_NORMAL_COMPLETION); 2886 } 2887 2888 /* Open a new pipe. */ 2889 usbd_status 2890 uhci_open(usbd_pipe_handle pipe) 2891 { 2892 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 2893 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2894 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 2895 usbd_status err; 2896 int ival; 2897 2898 DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 2899 pipe, pipe->device->address, 2900 ed->bEndpointAddress, sc->sc_addr)); 2901 2902 upipe->aborting = 0; 2903 upipe->nexttoggle = 0; 2904 2905 if (pipe->device->address == sc->sc_addr) { 2906 switch (ed->bEndpointAddress) { 2907 case USB_CONTROL_ENDPOINT: 2908 pipe->methods = &uhci_root_ctrl_methods; 2909 break; 2910 case UE_DIR_IN | UHCI_INTR_ENDPT: 2911 pipe->methods = &uhci_root_intr_methods; 2912 break; 2913 default: 2914 return (USBD_INVAL); 2915 } 2916 } else { 2917 switch (ed->bmAttributes & UE_XFERTYPE) { 2918 case UE_CONTROL: 2919 pipe->methods = &uhci_device_ctrl_methods; 2920 upipe->u.ctl.sqh = uhci_alloc_sqh(sc); 2921 if (upipe->u.ctl.sqh == NULL) 2922 goto bad; 2923 upipe->u.ctl.setup = uhci_alloc_std(sc); 2924 if (upipe->u.ctl.setup == NULL) { 2925 uhci_free_sqh(sc, upipe->u.ctl.sqh); 2926 goto bad; 2927 } 2928 upipe->u.ctl.stat = uhci_alloc_std(sc); 2929 if (upipe->u.ctl.stat == NULL) { 2930 uhci_free_sqh(sc, upipe->u.ctl.sqh); 2931 uhci_free_std(sc, upipe->u.ctl.setup); 2932 goto bad; 2933 } 2934 err = usb_allocmem(&sc->sc_bus, 2935 sizeof(usb_device_request_t), 2936 0, &upipe->u.ctl.reqdma); 2937 if (err) { 2938 uhci_free_sqh(sc, upipe->u.ctl.sqh); 2939 uhci_free_std(sc, upipe->u.ctl.setup); 2940 uhci_free_std(sc, upipe->u.ctl.stat); 2941 goto bad; 2942 } 2943 break; 2944 case UE_INTERRUPT: 2945 pipe->methods = &uhci_device_intr_methods; 2946 ival = pipe->interval; 2947 if (ival == USBD_DEFAULT_INTERVAL) 2948 ival = ed->bInterval; 2949 return (uhci_device_setintr(sc, upipe, ival)); 2950 case UE_ISOCHRONOUS: 2951 pipe->methods = &uhci_device_isoc_methods; 2952 return (uhci_setup_isoc(pipe)); 2953 case UE_BULK: 2954 pipe->methods = &uhci_device_bulk_methods; 2955 upipe->u.bulk.sqh = uhci_alloc_sqh(sc); 2956 if (upipe->u.bulk.sqh == NULL) 2957 goto bad; 2958 break; 2959 } 2960 } 2961 return (USBD_NORMAL_COMPLETION); 2962 2963 bad: 2964 return (USBD_NOMEM); 2965 } 2966 2967 /* 2968 * Data structures and routines to emulate the root hub. 2969 */ 2970 usb_device_descriptor_t uhci_devd = { 2971 USB_DEVICE_DESCRIPTOR_SIZE, 2972 UDESC_DEVICE, /* type */ 2973 {0x00, 0x01}, /* USB version */ 2974 UDCLASS_HUB, /* class */ 2975 UDSUBCLASS_HUB, /* subclass */ 2976 UDPROTO_FSHUB, /* protocol */ 2977 64, /* max packet */ 2978 {0},{0},{0x00,0x01}, /* device id */ 2979 1,2,0, /* string indicies */ 2980 1 /* # of configurations */ 2981 }; 2982 2983 usb_config_descriptor_t uhci_confd = { 2984 USB_CONFIG_DESCRIPTOR_SIZE, 2985 UDESC_CONFIG, 2986 {USB_CONFIG_DESCRIPTOR_SIZE + 2987 USB_INTERFACE_DESCRIPTOR_SIZE + 2988 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2989 1, 2990 1, 2991 0, 2992 UC_SELF_POWERED, 2993 0 /* max power */ 2994 }; 2995 2996 usb_interface_descriptor_t uhci_ifcd = { 2997 USB_INTERFACE_DESCRIPTOR_SIZE, 2998 UDESC_INTERFACE, 2999 0, 3000 0, 3001 1, 3002 UICLASS_HUB, 3003 UISUBCLASS_HUB, 3004 UIPROTO_FSHUB, 3005 0 3006 }; 3007 3008 usb_endpoint_descriptor_t uhci_endpd = { 3009 USB_ENDPOINT_DESCRIPTOR_SIZE, 3010 UDESC_ENDPOINT, 3011 UE_DIR_IN | UHCI_INTR_ENDPT, 3012 UE_INTERRUPT, 3013 {8}, 3014 255 3015 }; 3016 3017 usb_hub_descriptor_t uhci_hubd_piix = { 3018 USB_HUB_DESCRIPTOR_SIZE, 3019 UDESC_HUB, 3020 2, 3021 { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 }, 3022 50, /* power on to power good */ 3023 0, 3024 { 0x00 }, /* both ports are removable */ 3025 }; 3026 3027 int 3028 uhci_str(usb_string_descriptor_t *p, int l, const char *s) 3029 { 3030 int i; 3031 3032 if (l == 0) 3033 return (0); 3034 p->bLength = 2 * strlen(s) + 2; 3035 if (l == 1) 3036 return (1); 3037 p->bDescriptorType = UDESC_STRING; 3038 l -= 2; 3039 for (i = 0; s[i] && l > 1; i++, l -= 2) 3040 USETW2(p->bString[i], 0, s[i]); 3041 return (2*i+2); 3042 } 3043 3044 /* 3045 * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also 3046 * enables the port, and also states that SET_FEATURE(PORT_ENABLE) 3047 * should not be used by the USB subsystem. As we cannot issue a 3048 * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port 3049 * will be enabled as part of the reset. 3050 * 3051 * On the VT83C572, the port cannot be successfully enabled until the 3052 * outstanding "port enable change" and "connection status change" 3053 * events have been reset. 3054 */ 3055 Static usbd_status 3056 uhci_portreset(uhci_softc_t *sc, int index) 3057 { 3058 int lim, port, x; 3059 3060 if (index == 1) 3061 port = UHCI_PORTSC1; 3062 else if (index == 2) 3063 port = UHCI_PORTSC2; 3064 else 3065 return (USBD_IOERROR); 3066 3067 x = URWMASK(UREAD2(sc, port)); 3068 UWRITE2(sc, port, x | UHCI_PORTSC_PR); 3069 3070 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 3071 3072 DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n", 3073 index, UREAD2(sc, port))); 3074 3075 x = URWMASK(UREAD2(sc, port)); 3076 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 3077 3078 delay(100); 3079 3080 DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n", 3081 index, UREAD2(sc, port))); 3082 3083 x = URWMASK(UREAD2(sc, port)); 3084 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3085 3086 for (lim = 10; --lim > 0;) { 3087 usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY); 3088 3089 x = UREAD2(sc, port); 3090 3091 DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n", 3092 index, lim, x)); 3093 3094 if (!(x & UHCI_PORTSC_CCS)) { 3095 /* 3096 * No device is connected (or was disconnected 3097 * during reset). Consider the port reset. 3098 * The delay must be long enough to ensure on 3099 * the initial iteration that the device 3100 * connection will have been registered. 50ms 3101 * appears to be sufficient, but 20ms is not. 3102 */ 3103 DPRINTFN(3,("uhci port %d loop %u, device detached\n", 3104 index, lim)); 3105 break; 3106 } 3107 3108 if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) { 3109 /* 3110 * Port enabled changed and/or connection 3111 * status changed were set. Reset either or 3112 * both raised flags (by writing a 1 to that 3113 * bit), and wait again for state to settle. 3114 */ 3115 UWRITE2(sc, port, URWMASK(x) | 3116 (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC))); 3117 continue; 3118 } 3119 3120 if (x & UHCI_PORTSC_PE) 3121 /* Port is enabled */ 3122 break; 3123 3124 UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE); 3125 } 3126 3127 DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n", 3128 index, UREAD2(sc, port))); 3129 3130 if (lim <= 0) { 3131 DPRINTFN(1,("uhci port %d reset timed out\n", index)); 3132 return (USBD_TIMEOUT); 3133 } 3134 3135 sc->sc_isreset = 1; 3136 return (USBD_NORMAL_COMPLETION); 3137 } 3138 3139 /* 3140 * Simulate a hardware hub by handling all the necessary requests. 3141 */ 3142 usbd_status 3143 uhci_root_ctrl_transfer(usbd_xfer_handle xfer) 3144 { 3145 usbd_status err; 3146 3147 /* Insert last in queue. */ 3148 err = usb_insert_transfer(xfer); 3149 if (err) 3150 return (err); 3151 3152 /* 3153 * Pipe isn't running (otherwise err would be USBD_INPROG), 3154 * so start it first. 3155 */ 3156 return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3157 } 3158 3159 usbd_status 3160 uhci_root_ctrl_start(usbd_xfer_handle xfer) 3161 { 3162 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus; 3163 usb_device_request_t *req; 3164 void *buf = NULL; 3165 int port, x; 3166 int s, len, value, index, status, change, l, totlen = 0; 3167 usb_port_status_t ps; 3168 usbd_status err; 3169 3170 if (sc->sc_dying) 3171 return (USBD_IOERROR); 3172 3173 #ifdef DIAGNOSTIC 3174 if (!(xfer->rqflags & URQ_REQUEST)) 3175 panic("uhci_root_ctrl_transfer: not a request"); 3176 #endif 3177 req = &xfer->request; 3178 3179 DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n", 3180 req->bmRequestType, req->bRequest)); 3181 3182 len = UGETW(req->wLength); 3183 value = UGETW(req->wValue); 3184 index = UGETW(req->wIndex); 3185 3186 if (len != 0) 3187 buf = KERNADDR(&xfer->dmabuf, 0); 3188 3189 #define C(x,y) ((x) | ((y) << 8)) 3190 switch(C(req->bRequest, req->bmRequestType)) { 3191 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 3192 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 3193 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 3194 /* 3195 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 3196 * for the integrated root hub. 3197 */ 3198 break; 3199 case C(UR_GET_CONFIG, UT_READ_DEVICE): 3200 if (len > 0) { 3201 *(u_int8_t *)buf = sc->sc_conf; 3202 totlen = 1; 3203 } 3204 break; 3205 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 3206 DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value)); 3207 switch(value >> 8) { 3208 case UDESC_DEVICE: 3209 if ((value & 0xff) != 0) { 3210 err = USBD_IOERROR; 3211 goto ret; 3212 } 3213 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 3214 USETW(uhci_devd.idVendor, sc->sc_id_vendor); 3215 memcpy(buf, &uhci_devd, l); 3216 break; 3217 case UDESC_CONFIG: 3218 if ((value & 0xff) != 0) { 3219 err = USBD_IOERROR; 3220 goto ret; 3221 } 3222 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 3223 memcpy(buf, &uhci_confd, l); 3224 buf = (char *)buf + l; 3225 len -= l; 3226 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 3227 totlen += l; 3228 memcpy(buf, &uhci_ifcd, l); 3229 buf = (char *)buf + l; 3230 len -= l; 3231 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 3232 totlen += l; 3233 memcpy(buf, &uhci_endpd, l); 3234 break; 3235 case UDESC_STRING: 3236 if (len == 0) 3237 break; 3238 *(u_int8_t *)buf = 0; 3239 totlen = 1; 3240 switch (value & 0xff) { 3241 case 0: /* Language table */ 3242 totlen = uhci_str(buf, len, "\001"); 3243 break; 3244 case 1: /* Vendor */ 3245 totlen = uhci_str(buf, len, sc->sc_vendor); 3246 break; 3247 case 2: /* Product */ 3248 totlen = uhci_str(buf, len, "UHCI root hub"); 3249 break; 3250 } 3251 break; 3252 default: 3253 err = USBD_IOERROR; 3254 goto ret; 3255 } 3256 break; 3257 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 3258 if (len > 0) { 3259 *(u_int8_t *)buf = 0; 3260 totlen = 1; 3261 } 3262 break; 3263 case C(UR_GET_STATUS, UT_READ_DEVICE): 3264 if (len > 1) { 3265 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 3266 totlen = 2; 3267 } 3268 break; 3269 case C(UR_GET_STATUS, UT_READ_INTERFACE): 3270 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 3271 if (len > 1) { 3272 USETW(((usb_status_t *)buf)->wStatus, 0); 3273 totlen = 2; 3274 } 3275 break; 3276 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 3277 if (value >= USB_MAX_DEVICES) { 3278 err = USBD_IOERROR; 3279 goto ret; 3280 } 3281 sc->sc_addr = value; 3282 break; 3283 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 3284 if (value != 0 && value != 1) { 3285 err = USBD_IOERROR; 3286 goto ret; 3287 } 3288 sc->sc_conf = value; 3289 break; 3290 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 3291 break; 3292 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 3293 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 3294 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 3295 err = USBD_IOERROR; 3296 goto ret; 3297 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 3298 break; 3299 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 3300 break; 3301 /* Hub requests */ 3302 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 3303 break; 3304 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 3305 DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 3306 "port=%d feature=%d\n", 3307 index, value)); 3308 if (index == 1) 3309 port = UHCI_PORTSC1; 3310 else if (index == 2) 3311 port = UHCI_PORTSC2; 3312 else { 3313 err = USBD_IOERROR; 3314 goto ret; 3315 } 3316 switch(value) { 3317 case UHF_PORT_ENABLE: 3318 x = URWMASK(UREAD2(sc, port)); 3319 UWRITE2(sc, port, x & ~UHCI_PORTSC_PE); 3320 break; 3321 case UHF_PORT_SUSPEND: 3322 x = URWMASK(UREAD2(sc, port)); 3323 UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP); 3324 break; 3325 case UHF_PORT_RESET: 3326 x = URWMASK(UREAD2(sc, port)); 3327 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 3328 break; 3329 case UHF_C_PORT_CONNECTION: 3330 x = URWMASK(UREAD2(sc, port)); 3331 UWRITE2(sc, port, x | UHCI_PORTSC_CSC); 3332 break; 3333 case UHF_C_PORT_ENABLE: 3334 x = URWMASK(UREAD2(sc, port)); 3335 UWRITE2(sc, port, x | UHCI_PORTSC_POEDC); 3336 break; 3337 case UHF_C_PORT_OVER_CURRENT: 3338 x = URWMASK(UREAD2(sc, port)); 3339 UWRITE2(sc, port, x | UHCI_PORTSC_OCIC); 3340 break; 3341 case UHF_C_PORT_RESET: 3342 sc->sc_isreset = 0; 3343 err = USBD_NORMAL_COMPLETION; 3344 goto ret; 3345 case UHF_PORT_CONNECTION: 3346 case UHF_PORT_OVER_CURRENT: 3347 case UHF_PORT_POWER: 3348 case UHF_PORT_LOW_SPEED: 3349 case UHF_C_PORT_SUSPEND: 3350 default: 3351 err = USBD_IOERROR; 3352 goto ret; 3353 } 3354 break; 3355 case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER): 3356 if (index == 1) 3357 port = UHCI_PORTSC1; 3358 else if (index == 2) 3359 port = UHCI_PORTSC2; 3360 else { 3361 err = USBD_IOERROR; 3362 goto ret; 3363 } 3364 if (len > 0) { 3365 *(u_int8_t *)buf = 3366 (UREAD2(sc, port) & UHCI_PORTSC_LS) >> 3367 UHCI_PORTSC_LS_SHIFT; 3368 totlen = 1; 3369 } 3370 break; 3371 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 3372 if ((value & 0xff) != 0) { 3373 err = USBD_IOERROR; 3374 goto ret; 3375 } 3376 l = min(len, USB_HUB_DESCRIPTOR_SIZE); 3377 totlen = l; 3378 memcpy(buf, &uhci_hubd_piix, l); 3379 break; 3380 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 3381 if (len != 4) { 3382 err = USBD_IOERROR; 3383 goto ret; 3384 } 3385 memset(buf, 0, len); 3386 totlen = len; 3387 break; 3388 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 3389 if (index == 1) 3390 port = UHCI_PORTSC1; 3391 else if (index == 2) 3392 port = UHCI_PORTSC2; 3393 else { 3394 err = USBD_IOERROR; 3395 goto ret; 3396 } 3397 if (len != 4) { 3398 err = USBD_IOERROR; 3399 goto ret; 3400 } 3401 x = UREAD2(sc, port); 3402 status = change = 0; 3403 if (x & UHCI_PORTSC_CCS) 3404 status |= UPS_CURRENT_CONNECT_STATUS; 3405 if (x & UHCI_PORTSC_CSC) 3406 change |= UPS_C_CONNECT_STATUS; 3407 if (x & UHCI_PORTSC_PE) 3408 status |= UPS_PORT_ENABLED; 3409 if (x & UHCI_PORTSC_POEDC) 3410 change |= UPS_C_PORT_ENABLED; 3411 if (x & UHCI_PORTSC_OCI) 3412 status |= UPS_OVERCURRENT_INDICATOR; 3413 if (x & UHCI_PORTSC_OCIC) 3414 change |= UPS_C_OVERCURRENT_INDICATOR; 3415 if (x & UHCI_PORTSC_SUSP) 3416 status |= UPS_SUSPEND; 3417 if (x & UHCI_PORTSC_LSDA) 3418 status |= UPS_LOW_SPEED; 3419 status |= UPS_PORT_POWER; 3420 if (sc->sc_isreset) 3421 change |= UPS_C_PORT_RESET; 3422 USETW(ps.wPortStatus, status); 3423 USETW(ps.wPortChange, change); 3424 l = min(len, sizeof ps); 3425 memcpy(buf, &ps, l); 3426 totlen = l; 3427 break; 3428 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 3429 err = USBD_IOERROR; 3430 goto ret; 3431 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 3432 break; 3433 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 3434 if (index == 1) 3435 port = UHCI_PORTSC1; 3436 else if (index == 2) 3437 port = UHCI_PORTSC2; 3438 else { 3439 err = USBD_IOERROR; 3440 goto ret; 3441 } 3442 switch(value) { 3443 case UHF_PORT_ENABLE: 3444 x = URWMASK(UREAD2(sc, port)); 3445 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3446 break; 3447 case UHF_PORT_SUSPEND: 3448 x = URWMASK(UREAD2(sc, port)); 3449 UWRITE2(sc, port, x | UHCI_PORTSC_SUSP); 3450 break; 3451 case UHF_PORT_RESET: 3452 err = uhci_portreset(sc, index); 3453 goto ret; 3454 case UHF_PORT_POWER: 3455 /* Pretend we turned on power */ 3456 err = USBD_NORMAL_COMPLETION; 3457 goto ret; 3458 case UHF_C_PORT_CONNECTION: 3459 case UHF_C_PORT_ENABLE: 3460 case UHF_C_PORT_OVER_CURRENT: 3461 case UHF_PORT_CONNECTION: 3462 case UHF_PORT_OVER_CURRENT: 3463 case UHF_PORT_LOW_SPEED: 3464 case UHF_C_PORT_SUSPEND: 3465 case UHF_C_PORT_RESET: 3466 default: 3467 err = USBD_IOERROR; 3468 goto ret; 3469 } 3470 break; 3471 default: 3472 err = USBD_IOERROR; 3473 goto ret; 3474 } 3475 xfer->actlen = totlen; 3476 err = USBD_NORMAL_COMPLETION; 3477 ret: 3478 xfer->status = err; 3479 s = splusb(); 3480 usb_transfer_complete(xfer); 3481 splx(s); 3482 return (USBD_IN_PROGRESS); 3483 } 3484 3485 /* Abort a root control request. */ 3486 void 3487 uhci_root_ctrl_abort(usbd_xfer_handle xfer) 3488 { 3489 /* Nothing to do, all transfers are synchronous. */ 3490 } 3491 3492 /* Close the root pipe. */ 3493 void 3494 uhci_root_ctrl_close(usbd_pipe_handle pipe) 3495 { 3496 DPRINTF(("uhci_root_ctrl_close\n")); 3497 } 3498 3499 /* Abort a root interrupt request. */ 3500 void 3501 uhci_root_intr_abort(usbd_xfer_handle xfer) 3502 { 3503 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus; 3504 3505 usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, xfer); 3506 sc->sc_intr_xfer = NULL; 3507 3508 if (xfer->pipe->intrxfer == xfer) { 3509 DPRINTF(("uhci_root_intr_abort: remove\n")); 3510 xfer->pipe->intrxfer = 0; 3511 } 3512 xfer->status = USBD_CANCELLED; 3513 #ifdef DIAGNOSTIC 3514 UXFER(xfer)->iinfo.isdone = 1; 3515 #endif 3516 usb_transfer_complete(xfer); 3517 } 3518 3519 usbd_status 3520 uhci_root_intr_transfer(usbd_xfer_handle xfer) 3521 { 3522 usbd_status err; 3523 3524 /* Insert last in queue. */ 3525 err = usb_insert_transfer(xfer); 3526 if (err) 3527 return (err); 3528 3529 /* 3530 * Pipe isn't running (otherwise err would be USBD_INPROG), 3531 * start first 3532 */ 3533 return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3534 } 3535 3536 /* Start a transfer on the root interrupt pipe */ 3537 usbd_status 3538 uhci_root_intr_start(usbd_xfer_handle xfer) 3539 { 3540 usbd_pipe_handle pipe = xfer->pipe; 3541 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 3542 unsigned int ival; 3543 3544 DPRINTFN(3, ("uhci_root_intr_start: xfer=%p len=%d flags=%d\n", 3545 xfer, xfer->length, xfer->flags)); 3546 3547 if (sc->sc_dying) 3548 return (USBD_IOERROR); 3549 3550 /* XXX temporary variable needed to avoid gcc3 warning */ 3551 ival = xfer->pipe->endpoint->edesc->bInterval; 3552 sc->sc_ival = mstohz(ival); 3553 usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer); 3554 sc->sc_intr_xfer = xfer; 3555 return (USBD_IN_PROGRESS); 3556 } 3557 3558 /* Close the root interrupt pipe. */ 3559 void 3560 uhci_root_intr_close(usbd_pipe_handle pipe) 3561 { 3562 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 3563 3564 usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, sc->sc_intr_xfer); 3565 sc->sc_intr_xfer = NULL; 3566 DPRINTF(("uhci_root_intr_close\n")); 3567 } 3568