1 /* $NetBSD: uhci.c,v 1.217 2008/04/28 20:23:59 martin Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/uhci.c,v 1.33 1999/11/17 22:33:41 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 2004 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart@augustsson.net) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * USB Universal Host Controller driver. 36 * Handles e.g. PIIX3 and PIIX4. 37 * 38 * UHCI spec: http://developer.intel.com/design/USB/UHCI11D.htm 39 * USB spec: http://www.usb.org/developers/docs/usbspec.zip 40 * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf 41 * ftp://download.intel.com/design/intarch/datashts/29056201.pdf 42 */ 43 44 #include <sys/cdefs.h> 45 __KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.217 2008/04/28 20:23:59 martin Exp $"); 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/kernel.h> 50 #include <sys/malloc.h> 51 #if defined(__NetBSD__) || defined(__OpenBSD__) 52 #include <sys/device.h> 53 #include <sys/select.h> 54 #include <sys/extent.h> 55 #include <uvm/uvm_extern.h> 56 #elif defined(__FreeBSD__) 57 #include <sys/module.h> 58 #include <sys/bus.h> 59 #include <machine/bus_pio.h> 60 #if defined(DIAGNOSTIC) && defined(__i386__) 61 #include <sys/cpu.h> 62 #endif 63 #endif 64 #include <sys/proc.h> 65 #include <sys/queue.h> 66 #include <sys/bus.h> 67 68 #include <machine/endian.h> 69 70 #include <dev/usb/usb.h> 71 #include <dev/usb/usbdi.h> 72 #include <dev/usb/usbdivar.h> 73 #include <dev/usb/usb_mem.h> 74 #include <dev/usb/usb_quirks.h> 75 76 #include <dev/usb/uhcireg.h> 77 #include <dev/usb/uhcivar.h> 78 #include <dev/usb/usbroothub_subr.h> 79 80 /* Use bandwidth reclamation for control transfers. Some devices choke on it. */ 81 /*#define UHCI_CTL_LOOP */ 82 83 #if defined(__FreeBSD__) 84 #include <machine/clock.h> 85 86 #define delay(d) DELAY(d) 87 #endif 88 89 #if defined(__OpenBSD__) 90 struct cfdriver uhci_cd = { 91 NULL, "uhci", DV_DULL 92 }; 93 #endif 94 95 #ifdef UHCI_DEBUG 96 uhci_softc_t *thesc; 97 #define DPRINTF(x) if (uhcidebug) printf x 98 #define DPRINTFN(n,x) if (uhcidebug>(n)) printf x 99 int uhcidebug = 0; 100 int uhcinoloop = 0; 101 #ifndef __NetBSD__ 102 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 103 #endif 104 #else 105 #define DPRINTF(x) 106 #define DPRINTFN(n,x) 107 #endif 108 109 /* 110 * The UHCI controller is little endian, so on big endian machines 111 * the data stored in memory needs to be swapped. 112 */ 113 #if defined(__FreeBSD__) || defined(__OpenBSD__) 114 #if BYTE_ORDER == BIG_ENDIAN 115 #define htole32(x) (bswap32(x)) 116 #define le32toh(x) (bswap32(x)) 117 #else 118 #define htole32(x) (x) 119 #define le32toh(x) (x) 120 #endif 121 #endif 122 123 struct uhci_pipe { 124 struct usbd_pipe pipe; 125 int nexttoggle; 126 127 u_char aborting; 128 usbd_xfer_handle abortstart, abortend; 129 130 /* Info needed for different pipe kinds. */ 131 union { 132 /* Control pipe */ 133 struct { 134 uhci_soft_qh_t *sqh; 135 usb_dma_t reqdma; 136 uhci_soft_td_t *setup, *stat; 137 u_int length; 138 } ctl; 139 /* Interrupt pipe */ 140 struct { 141 int npoll; 142 int isread; 143 uhci_soft_qh_t **qhs; 144 } intr; 145 /* Bulk pipe */ 146 struct { 147 uhci_soft_qh_t *sqh; 148 u_int length; 149 int isread; 150 } bulk; 151 /* Iso pipe */ 152 struct iso { 153 uhci_soft_td_t **stds; 154 int next, inuse; 155 } iso; 156 } u; 157 }; 158 159 Static void uhci_globalreset(uhci_softc_t *); 160 Static usbd_status uhci_portreset(uhci_softc_t*, int); 161 Static void uhci_reset(uhci_softc_t *); 162 Static usbd_status uhci_run(uhci_softc_t *, int run); 163 Static uhci_soft_td_t *uhci_alloc_std(uhci_softc_t *); 164 Static void uhci_free_std(uhci_softc_t *, uhci_soft_td_t *); 165 Static uhci_soft_qh_t *uhci_alloc_sqh(uhci_softc_t *); 166 Static void uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *); 167 #if 0 168 Static void uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *, 169 uhci_intr_info_t *); 170 Static void uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *); 171 #endif 172 173 Static void uhci_free_std_chain(uhci_softc_t *, 174 uhci_soft_td_t *, uhci_soft_td_t *); 175 Static usbd_status uhci_alloc_std_chain(struct uhci_pipe *, 176 uhci_softc_t *, int, int, u_int16_t, usb_dma_t *, 177 uhci_soft_td_t **, uhci_soft_td_t **); 178 Static void uhci_poll_hub(void *); 179 Static void uhci_waitintr(uhci_softc_t *, usbd_xfer_handle); 180 Static void uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *); 181 Static void uhci_idone(uhci_intr_info_t *); 182 183 Static void uhci_abort_xfer(usbd_xfer_handle, usbd_status status); 184 185 Static void uhci_timeout(void *); 186 Static void uhci_timeout_task(void *); 187 Static void uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 188 Static void uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 189 Static void uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *); 190 Static void uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 191 Static void uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 192 Static void uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *); 193 Static void uhci_add_loop(uhci_softc_t *sc); 194 Static void uhci_rem_loop(uhci_softc_t *sc); 195 196 Static usbd_status uhci_setup_isoc(usbd_pipe_handle pipe); 197 Static void uhci_device_isoc_enter(usbd_xfer_handle); 198 199 Static usbd_status uhci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 200 Static void uhci_freem(struct usbd_bus *, usb_dma_t *); 201 202 Static usbd_xfer_handle uhci_allocx(struct usbd_bus *); 203 Static void uhci_freex(struct usbd_bus *, usbd_xfer_handle); 204 205 Static usbd_status uhci_device_ctrl_transfer(usbd_xfer_handle); 206 Static usbd_status uhci_device_ctrl_start(usbd_xfer_handle); 207 Static void uhci_device_ctrl_abort(usbd_xfer_handle); 208 Static void uhci_device_ctrl_close(usbd_pipe_handle); 209 Static void uhci_device_ctrl_done(usbd_xfer_handle); 210 211 Static usbd_status uhci_device_intr_transfer(usbd_xfer_handle); 212 Static usbd_status uhci_device_intr_start(usbd_xfer_handle); 213 Static void uhci_device_intr_abort(usbd_xfer_handle); 214 Static void uhci_device_intr_close(usbd_pipe_handle); 215 Static void uhci_device_intr_done(usbd_xfer_handle); 216 217 Static usbd_status uhci_device_bulk_transfer(usbd_xfer_handle); 218 Static usbd_status uhci_device_bulk_start(usbd_xfer_handle); 219 Static void uhci_device_bulk_abort(usbd_xfer_handle); 220 Static void uhci_device_bulk_close(usbd_pipe_handle); 221 Static void uhci_device_bulk_done(usbd_xfer_handle); 222 223 Static usbd_status uhci_device_isoc_transfer(usbd_xfer_handle); 224 Static usbd_status uhci_device_isoc_start(usbd_xfer_handle); 225 Static void uhci_device_isoc_abort(usbd_xfer_handle); 226 Static void uhci_device_isoc_close(usbd_pipe_handle); 227 Static void uhci_device_isoc_done(usbd_xfer_handle); 228 229 Static usbd_status uhci_root_ctrl_transfer(usbd_xfer_handle); 230 Static usbd_status uhci_root_ctrl_start(usbd_xfer_handle); 231 Static void uhci_root_ctrl_abort(usbd_xfer_handle); 232 Static void uhci_root_ctrl_close(usbd_pipe_handle); 233 Static void uhci_root_ctrl_done(usbd_xfer_handle); 234 235 Static usbd_status uhci_root_intr_transfer(usbd_xfer_handle); 236 Static usbd_status uhci_root_intr_start(usbd_xfer_handle); 237 Static void uhci_root_intr_abort(usbd_xfer_handle); 238 Static void uhci_root_intr_close(usbd_pipe_handle); 239 Static void uhci_root_intr_done(usbd_xfer_handle); 240 241 Static usbd_status uhci_open(usbd_pipe_handle); 242 Static void uhci_poll(struct usbd_bus *); 243 Static void uhci_softintr(void *); 244 245 Static usbd_status uhci_device_request(usbd_xfer_handle xfer); 246 247 Static void uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *); 248 Static void uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *); 249 Static usbd_status uhci_device_setintr(uhci_softc_t *sc, 250 struct uhci_pipe *pipe, int ival); 251 252 Static void uhci_device_clear_toggle(usbd_pipe_handle pipe); 253 Static void uhci_noop(usbd_pipe_handle pipe); 254 255 Static inline uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *, 256 uhci_soft_qh_t *); 257 258 #ifdef UHCI_DEBUG 259 Static void uhci_dump_all(uhci_softc_t *); 260 Static void uhci_dumpregs(uhci_softc_t *); 261 Static void uhci_dump_qhs(uhci_soft_qh_t *); 262 Static void uhci_dump_qh(uhci_soft_qh_t *); 263 Static void uhci_dump_tds(uhci_soft_td_t *); 264 Static void uhci_dump_td(uhci_soft_td_t *); 265 Static void uhci_dump_ii(uhci_intr_info_t *ii); 266 void uhci_dump(void); 267 #endif 268 269 #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 270 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 271 #define UWRITE1(sc, r, x) \ 272 do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \ 273 } while (/*CONSTCOND*/0) 274 #define UWRITE2(sc, r, x) \ 275 do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \ 276 } while (/*CONSTCOND*/0) 277 #define UWRITE4(sc, r, x) \ 278 do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \ 279 } while (/*CONSTCOND*/0) 280 static __inline uint8_t 281 UREAD1(uhci_softc_t *sc, bus_size_t r) 282 { 283 284 UBARR(sc); 285 return bus_space_read_1(sc->iot, sc->ioh, r); 286 } 287 288 static __inline uint16_t 289 UREAD2(uhci_softc_t *sc, bus_size_t r) 290 { 291 292 UBARR(sc); 293 return bus_space_read_2(sc->iot, sc->ioh, r); 294 } 295 296 static __inline uint32_t 297 UREAD4(uhci_softc_t *sc, bus_size_t r) 298 { 299 300 UBARR(sc); 301 return bus_space_read_4(sc->iot, sc->ioh, r); 302 } 303 304 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd) 305 #define UHCISTS(sc) UREAD2(sc, UHCI_STS) 306 307 #define UHCI_RESET_TIMEOUT 100 /* ms, reset timeout */ 308 309 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK) 310 311 #define UHCI_INTR_ENDPT 1 312 313 const struct usbd_bus_methods uhci_bus_methods = { 314 uhci_open, 315 uhci_softintr, 316 uhci_poll, 317 uhci_allocm, 318 uhci_freem, 319 uhci_allocx, 320 uhci_freex, 321 }; 322 323 const struct usbd_pipe_methods uhci_root_ctrl_methods = { 324 uhci_root_ctrl_transfer, 325 uhci_root_ctrl_start, 326 uhci_root_ctrl_abort, 327 uhci_root_ctrl_close, 328 uhci_noop, 329 uhci_root_ctrl_done, 330 }; 331 332 const struct usbd_pipe_methods uhci_root_intr_methods = { 333 uhci_root_intr_transfer, 334 uhci_root_intr_start, 335 uhci_root_intr_abort, 336 uhci_root_intr_close, 337 uhci_noop, 338 uhci_root_intr_done, 339 }; 340 341 const struct usbd_pipe_methods uhci_device_ctrl_methods = { 342 uhci_device_ctrl_transfer, 343 uhci_device_ctrl_start, 344 uhci_device_ctrl_abort, 345 uhci_device_ctrl_close, 346 uhci_noop, 347 uhci_device_ctrl_done, 348 }; 349 350 const struct usbd_pipe_methods uhci_device_intr_methods = { 351 uhci_device_intr_transfer, 352 uhci_device_intr_start, 353 uhci_device_intr_abort, 354 uhci_device_intr_close, 355 uhci_device_clear_toggle, 356 uhci_device_intr_done, 357 }; 358 359 const struct usbd_pipe_methods uhci_device_bulk_methods = { 360 uhci_device_bulk_transfer, 361 uhci_device_bulk_start, 362 uhci_device_bulk_abort, 363 uhci_device_bulk_close, 364 uhci_device_clear_toggle, 365 uhci_device_bulk_done, 366 }; 367 368 const struct usbd_pipe_methods uhci_device_isoc_methods = { 369 uhci_device_isoc_transfer, 370 uhci_device_isoc_start, 371 uhci_device_isoc_abort, 372 uhci_device_isoc_close, 373 uhci_noop, 374 uhci_device_isoc_done, 375 }; 376 377 #define uhci_add_intr_info(sc, ii) \ 378 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list) 379 #define uhci_del_intr_info(ii) \ 380 do { \ 381 LIST_REMOVE((ii), list); \ 382 (ii)->list.le_prev = NULL; \ 383 } while (0) 384 #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL) 385 386 Static inline uhci_soft_qh_t * 387 uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh) 388 { 389 DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh)); 390 391 for (; pqh->hlink != sqh; pqh = pqh->hlink) { 392 #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG) 393 if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) { 394 printf("uhci_find_prev_qh: QH not found\n"); 395 return (NULL); 396 } 397 #endif 398 } 399 return (pqh); 400 } 401 402 void 403 uhci_globalreset(uhci_softc_t *sc) 404 { 405 UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */ 406 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */ 407 UHCICMD(sc, 0); /* do nothing */ 408 } 409 410 usbd_status 411 uhci_init(uhci_softc_t *sc) 412 { 413 usbd_status err; 414 int i, j; 415 uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh; 416 uhci_soft_td_t *std; 417 418 DPRINTFN(1,("uhci_init: start\n")); 419 420 #ifdef UHCI_DEBUG 421 thesc = sc; 422 423 if (uhcidebug > 2) 424 uhci_dumpregs(sc); 425 #endif 426 427 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */ 428 uhci_globalreset(sc); /* reset the controller */ 429 uhci_reset(sc); 430 431 #ifdef __NetBSD__ 432 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 433 USB_MEM_RESERVE); 434 #endif 435 436 /* Allocate and initialize real frame array. */ 437 err = usb_allocmem(&sc->sc_bus, 438 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 439 UHCI_FRAMELIST_ALIGN, &sc->sc_dma); 440 if (err) 441 return (err); 442 sc->sc_pframes = KERNADDR(&sc->sc_dma, 0); 443 UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */ 444 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/ 445 446 /* 447 * Allocate a TD, inactive, that hangs from the last QH. 448 * This is to avoid a bug in the PIIX that makes it run berserk 449 * otherwise. 450 */ 451 std = uhci_alloc_std(sc); 452 if (std == NULL) 453 return (USBD_NOMEM); 454 std->link.std = NULL; 455 std->td.td_link = htole32(UHCI_PTR_T); 456 std->td.td_status = htole32(0); /* inactive */ 457 std->td.td_token = htole32(0); 458 std->td.td_buffer = htole32(0); 459 460 /* Allocate the dummy QH marking the end and used for looping the QHs.*/ 461 lsqh = uhci_alloc_sqh(sc); 462 if (lsqh == NULL) 463 return (USBD_NOMEM); 464 lsqh->hlink = NULL; 465 lsqh->qh.qh_hlink = htole32(UHCI_PTR_T); /* end of QH chain */ 466 lsqh->elink = std; 467 lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD); 468 sc->sc_last_qh = lsqh; 469 470 /* Allocate the dummy QH where bulk traffic will be queued. */ 471 bsqh = uhci_alloc_sqh(sc); 472 if (bsqh == NULL) 473 return (USBD_NOMEM); 474 bsqh->hlink = lsqh; 475 bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH); 476 bsqh->elink = NULL; 477 bsqh->qh.qh_elink = htole32(UHCI_PTR_T); 478 sc->sc_bulk_start = sc->sc_bulk_end = bsqh; 479 480 /* Allocate dummy QH where high speed control traffic will be queued. */ 481 chsqh = uhci_alloc_sqh(sc); 482 if (chsqh == NULL) 483 return (USBD_NOMEM); 484 chsqh->hlink = bsqh; 485 chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH); 486 chsqh->elink = NULL; 487 chsqh->qh.qh_elink = htole32(UHCI_PTR_T); 488 sc->sc_hctl_start = sc->sc_hctl_end = chsqh; 489 490 /* Allocate dummy QH where control traffic will be queued. */ 491 clsqh = uhci_alloc_sqh(sc); 492 if (clsqh == NULL) 493 return (USBD_NOMEM); 494 clsqh->hlink = bsqh; 495 clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH); 496 clsqh->elink = NULL; 497 clsqh->qh.qh_elink = htole32(UHCI_PTR_T); 498 sc->sc_lctl_start = sc->sc_lctl_end = clsqh; 499 500 /* 501 * Make all (virtual) frame list pointers point to the interrupt 502 * queue heads and the interrupt queue heads at the control 503 * queue head and point the physical frame list to the virtual. 504 */ 505 for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 506 std = uhci_alloc_std(sc); 507 sqh = uhci_alloc_sqh(sc); 508 if (std == NULL || sqh == NULL) 509 return (USBD_NOMEM); 510 std->link.sqh = sqh; 511 std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH); 512 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 513 std->td.td_token = htole32(0); 514 std->td.td_buffer = htole32(0); 515 sqh->hlink = clsqh; 516 sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH); 517 sqh->elink = NULL; 518 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 519 sc->sc_vframes[i].htd = std; 520 sc->sc_vframes[i].etd = std; 521 sc->sc_vframes[i].hqh = sqh; 522 sc->sc_vframes[i].eqh = sqh; 523 for (j = i; 524 j < UHCI_FRAMELIST_COUNT; 525 j += UHCI_VFRAMELIST_COUNT) 526 sc->sc_pframes[j] = htole32(std->physaddr); 527 } 528 529 LIST_INIT(&sc->sc_intrhead); 530 531 SIMPLEQ_INIT(&sc->sc_free_xfers); 532 533 usb_callout_init(sc->sc_poll_handle); 534 535 /* Set up the bus struct. */ 536 sc->sc_bus.methods = &uhci_bus_methods; 537 sc->sc_bus.pipe_size = sizeof(struct uhci_pipe); 538 539 UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */ 540 541 DPRINTFN(1,("uhci_init: enabling\n")); 542 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE | 543 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */ 544 545 return (uhci_run(sc, 1)); /* and here we go... */ 546 } 547 548 #if defined(__NetBSD__) || defined(__OpenBSD__) 549 int 550 uhci_activate(device_t self, enum devact act) 551 { 552 struct uhci_softc *sc = device_private(self); 553 int rv = 0; 554 555 switch (act) { 556 case DVACT_ACTIVATE: 557 return (EOPNOTSUPP); 558 559 case DVACT_DEACTIVATE: 560 sc->sc_dying = 1; 561 if (sc->sc_child != NULL) 562 rv = config_deactivate(sc->sc_child); 563 break; 564 } 565 return (rv); 566 } 567 568 void 569 uhci_childdet(device_t self, device_t child) 570 { 571 struct uhci_softc *sc = device_private(self); 572 573 KASSERT(sc->sc_child == child); 574 sc->sc_child = NULL; 575 } 576 577 int 578 uhci_detach(struct uhci_softc *sc, int flags) 579 { 580 usbd_xfer_handle xfer; 581 int rv = 0; 582 583 if (sc->sc_child != NULL) 584 rv = config_detach(sc->sc_child, flags); 585 586 if (rv != 0) 587 return (rv); 588 589 /* Free all xfers associated with this HC. */ 590 for (;;) { 591 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 592 if (xfer == NULL) 593 break; 594 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 595 free(xfer, M_USB); 596 } 597 598 /* XXX free other data structures XXX */ 599 600 return (rv); 601 } 602 #endif 603 604 usbd_status 605 uhci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 606 { 607 struct uhci_softc *sc = bus->hci_private; 608 usbd_status status; 609 u_int32_t n; 610 611 /* 612 * XXX 613 * Since we are allocating a buffer we can assume that we will 614 * need TDs for it. Since we don't want to allocate those from 615 * an interrupt context, we allocate them here and free them again. 616 * This is no guarantee that we'll get the TDs next time... 617 */ 618 n = size / 8; 619 if (n > 16) { 620 u_int32_t i; 621 uhci_soft_td_t **stds; 622 DPRINTF(("uhci_allocm: get %d TDs\n", n)); 623 stds = malloc(sizeof(uhci_soft_td_t *) * n, M_TEMP, 624 M_WAITOK|M_ZERO); 625 for(i=0; i < n; i++) 626 stds[i] = uhci_alloc_std(sc); 627 for(i=0; i < n; i++) 628 if (stds[i] != NULL) 629 uhci_free_std(sc, stds[i]); 630 free(stds, M_TEMP); 631 } 632 633 634 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 635 #ifdef __NetBSD__ 636 if (status == USBD_NOMEM) 637 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 638 #endif 639 return status; 640 } 641 642 void 643 uhci_freem(struct usbd_bus *bus, usb_dma_t *dma) 644 { 645 #ifdef __NetBSD__ 646 if (dma->block->flags & USB_DMA_RESERVE) { 647 usb_reserve_freem(&((struct uhci_softc *)bus)->sc_dma_reserve, 648 dma); 649 return; 650 } 651 #endif 652 usb_freemem(&((struct uhci_softc *)bus)->sc_bus, dma); 653 } 654 655 usbd_xfer_handle 656 uhci_allocx(struct usbd_bus *bus) 657 { 658 struct uhci_softc *sc = bus->hci_private; 659 usbd_xfer_handle xfer; 660 661 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 662 if (xfer != NULL) { 663 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 664 #ifdef DIAGNOSTIC 665 if (xfer->busy_free != XFER_FREE) { 666 printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer, 667 xfer->busy_free); 668 } 669 #endif 670 } else { 671 xfer = malloc(sizeof(struct uhci_xfer), M_USB, M_NOWAIT); 672 } 673 if (xfer != NULL) { 674 memset(xfer, 0, sizeof (struct uhci_xfer)); 675 UXFER(xfer)->iinfo.sc = sc; 676 #ifdef DIAGNOSTIC 677 UXFER(xfer)->iinfo.isdone = 1; 678 xfer->busy_free = XFER_BUSY; 679 #endif 680 } 681 return (xfer); 682 } 683 684 void 685 uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 686 { 687 struct uhci_softc *sc = bus->hci_private; 688 689 #ifdef DIAGNOSTIC 690 if (xfer->busy_free != XFER_BUSY) { 691 printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer, 692 xfer->busy_free); 693 } 694 xfer->busy_free = XFER_FREE; 695 if (!UXFER(xfer)->iinfo.isdone) { 696 printf("uhci_freex: !isdone\n"); 697 } 698 #endif 699 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 700 } 701 702 /* 703 * Handle suspend/resume. 704 * 705 * We need to switch to polling mode here, because this routine is 706 * called from an interrupt context. This is all right since we 707 * are almost suspended anyway. 708 */ 709 bool 710 uhci_resume(device_t dv PMF_FN_ARGS) 711 { 712 uhci_softc_t *sc = device_private(dv); 713 int cmd; 714 int s; 715 716 s = splhardusb(); 717 718 cmd = UREAD2(sc, UHCI_CMD); 719 sc->sc_bus.use_polling++; 720 UWRITE2(sc, UHCI_INTR, 0); 721 uhci_globalreset(sc); 722 uhci_reset(sc); 723 if (cmd & UHCI_CMD_RS) 724 uhci_run(sc, 0); 725 726 /* restore saved state */ 727 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); 728 UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum); 729 UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof); 730 731 UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force resume */ 732 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 733 UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */ 734 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | 735 UHCI_INTR_RIE | UHCI_INTR_IOCE | UHCI_INTR_SPIE); 736 UHCICMD(sc, UHCI_CMD_MAXP); 737 uhci_run(sc, 1); /* and start traffic again */ 738 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 739 sc->sc_bus.use_polling--; 740 if (sc->sc_intr_xfer != NULL) 741 usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, 742 sc->sc_intr_xfer); 743 #ifdef UHCI_DEBUG 744 if (uhcidebug > 2) 745 uhci_dumpregs(sc); 746 #endif 747 748 splx(s); 749 750 return true; 751 } 752 753 bool 754 uhci_suspend(device_t dv PMF_FN_ARGS) 755 { 756 uhci_softc_t *sc = device_private(dv); 757 int cmd; 758 int s; 759 760 s = splhardusb(); 761 762 cmd = UREAD2(sc, UHCI_CMD); 763 764 #ifdef UHCI_DEBUG 765 if (uhcidebug > 2) 766 uhci_dumpregs(sc); 767 #endif 768 if (sc->sc_intr_xfer != NULL) 769 usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, 770 sc->sc_intr_xfer); 771 sc->sc_bus.use_polling++; 772 uhci_run(sc, 0); /* stop the controller */ 773 cmd &= ~UHCI_CMD_RS; 774 775 /* save some state if BIOS doesn't */ 776 sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM); 777 sc->sc_saved_sof = UREAD1(sc, UHCI_SOF); 778 779 UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */ 780 781 UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter suspend */ 782 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 783 sc->sc_bus.use_polling--; 784 785 splx(s); 786 787 return true; 788 } 789 790 #ifdef UHCI_DEBUG 791 Static void 792 uhci_dumpregs(uhci_softc_t *sc) 793 { 794 DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, " 795 "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n", 796 device_xname(sc->sc_dev), 797 UREAD2(sc, UHCI_CMD), 798 UREAD2(sc, UHCI_STS), 799 UREAD2(sc, UHCI_INTR), 800 UREAD2(sc, UHCI_FRNUM), 801 UREAD4(sc, UHCI_FLBASEADDR), 802 UREAD1(sc, UHCI_SOF), 803 UREAD2(sc, UHCI_PORTSC1), 804 UREAD2(sc, UHCI_PORTSC2))); 805 } 806 807 void 808 uhci_dump_td(uhci_soft_td_t *p) 809 { 810 char sbuf[128], sbuf2[128]; 811 812 DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx " 813 "token=0x%08lx buffer=0x%08lx\n", 814 p, (long)p->physaddr, 815 (long)le32toh(p->td.td_link), 816 (long)le32toh(p->td.td_status), 817 (long)le32toh(p->td.td_token), 818 (long)le32toh(p->td.td_buffer))); 819 820 bitmask_snprintf((u_int32_t)le32toh(p->td.td_link), "\20\1T\2Q\3VF", 821 sbuf, sizeof(sbuf)); 822 bitmask_snprintf((u_int32_t)le32toh(p->td.td_status), 823 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27" 824 "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD", 825 sbuf2, sizeof(sbuf2)); 826 827 DPRINTFN(-1,(" %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d," 828 "D=%d,maxlen=%d\n", sbuf, sbuf2, 829 UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)), 830 UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)), 831 UHCI_TD_GET_PID(le32toh(p->td.td_token)), 832 UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)), 833 UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)), 834 UHCI_TD_GET_DT(le32toh(p->td.td_token)), 835 UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token)))); 836 } 837 838 void 839 uhci_dump_qh(uhci_soft_qh_t *sqh) 840 { 841 DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh, 842 (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink), 843 le32toh(sqh->qh.qh_elink))); 844 } 845 846 847 #if 1 848 void 849 uhci_dump(void) 850 { 851 uhci_dump_all(thesc); 852 } 853 #endif 854 855 void 856 uhci_dump_all(uhci_softc_t *sc) 857 { 858 uhci_dumpregs(sc); 859 printf("intrs=%d\n", sc->sc_bus.no_intrs); 860 /*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/ 861 uhci_dump_qh(sc->sc_lctl_start); 862 } 863 864 865 void 866 uhci_dump_qhs(uhci_soft_qh_t *sqh) 867 { 868 uhci_dump_qh(sqh); 869 870 /* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards 871 * Traverses sideways first, then down. 872 * 873 * QH1 874 * QH2 875 * No QH 876 * TD2.1 877 * TD2.2 878 * TD1.1 879 * etc. 880 * 881 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1. 882 */ 883 884 885 if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T)) 886 uhci_dump_qhs(sqh->hlink); 887 else 888 DPRINTF(("No QH\n")); 889 890 if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T)) 891 uhci_dump_tds(sqh->elink); 892 else 893 DPRINTF(("No TD\n")); 894 } 895 896 void 897 uhci_dump_tds(uhci_soft_td_t *std) 898 { 899 uhci_soft_td_t *td; 900 901 for(td = std; td != NULL; td = td->link.std) { 902 uhci_dump_td(td); 903 904 /* Check whether the link pointer in this TD marks 905 * the link pointer as end of queue. This avoids 906 * printing the free list in case the queue/TD has 907 * already been moved there (seatbelt). 908 */ 909 if (le32toh(td->td.td_link) & UHCI_PTR_T || 910 le32toh(td->td.td_link) == 0) 911 break; 912 } 913 } 914 915 Static void 916 uhci_dump_ii(uhci_intr_info_t *ii) 917 { 918 usbd_pipe_handle pipe; 919 usb_endpoint_descriptor_t *ed; 920 usbd_device_handle dev; 921 922 #ifdef DIAGNOSTIC 923 #define DONE ii->isdone 924 #else 925 #define DONE 0 926 #endif 927 if (ii == NULL) { 928 printf("ii NULL\n"); 929 return; 930 } 931 if (ii->xfer == NULL) { 932 printf("ii %p: done=%d xfer=NULL\n", 933 ii, DONE); 934 return; 935 } 936 pipe = ii->xfer->pipe; 937 if (pipe == NULL) { 938 printf("ii %p: done=%d xfer=%p pipe=NULL\n", 939 ii, DONE, ii->xfer); 940 return; 941 } 942 if (pipe->endpoint == NULL) { 943 printf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n", 944 ii, DONE, ii->xfer, pipe); 945 return; 946 } 947 if (pipe->device == NULL) { 948 printf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n", 949 ii, DONE, ii->xfer, pipe); 950 return; 951 } 952 ed = pipe->endpoint->edesc; 953 dev = pipe->device; 954 printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n", 955 ii, DONE, ii->xfer, dev, 956 UGETW(dev->ddesc.idVendor), 957 UGETW(dev->ddesc.idProduct), 958 dev->address, pipe, 959 ed->bEndpointAddress, ed->bmAttributes); 960 #undef DONE 961 } 962 963 void uhci_dump_iis(struct uhci_softc *sc); 964 void 965 uhci_dump_iis(struct uhci_softc *sc) 966 { 967 uhci_intr_info_t *ii; 968 969 printf("intr_info list:\n"); 970 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list)) 971 uhci_dump_ii(ii); 972 } 973 974 void iidump(void); 975 void iidump(void) { uhci_dump_iis(thesc); } 976 977 #endif 978 979 /* 980 * This routine is executed periodically and simulates interrupts 981 * from the root controller interrupt pipe for port status change. 982 */ 983 void 984 uhci_poll_hub(void *addr) 985 { 986 usbd_xfer_handle xfer = addr; 987 usbd_pipe_handle pipe = xfer->pipe; 988 uhci_softc_t *sc = pipe->device->bus->hci_private; 989 int s; 990 u_char *p; 991 992 DPRINTFN(20, ("uhci_poll_hub\n")); 993 994 usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer); 995 996 p = KERNADDR(&xfer->dmabuf, 0); 997 p[0] = 0; 998 if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 999 p[0] |= 1<<1; 1000 if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 1001 p[0] |= 1<<2; 1002 if (p[0] == 0) 1003 /* No change, try again in a while */ 1004 return; 1005 1006 xfer->actlen = 1; 1007 xfer->status = USBD_NORMAL_COMPLETION; 1008 s = splusb(); 1009 xfer->device->bus->intr_context++; 1010 usb_transfer_complete(xfer); 1011 xfer->device->bus->intr_context--; 1012 splx(s); 1013 } 1014 1015 void 1016 uhci_root_intr_done(usbd_xfer_handle xfer) 1017 { 1018 } 1019 1020 void 1021 uhci_root_ctrl_done(usbd_xfer_handle xfer) 1022 { 1023 } 1024 1025 /* 1026 * Let the last QH loop back to the high speed control transfer QH. 1027 * This is what intel calls "bandwidth reclamation" and improves 1028 * USB performance a lot for some devices. 1029 * If we are already looping, just count it. 1030 */ 1031 void 1032 uhci_add_loop(uhci_softc_t *sc) { 1033 #ifdef UHCI_DEBUG 1034 if (uhcinoloop) 1035 return; 1036 #endif 1037 if (++sc->sc_loops == 1) { 1038 DPRINTFN(5,("uhci_start_loop: add\n")); 1039 /* Note, we don't loop back the soft pointer. */ 1040 sc->sc_last_qh->qh.qh_hlink = 1041 htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH); 1042 } 1043 } 1044 1045 void 1046 uhci_rem_loop(uhci_softc_t *sc) { 1047 #ifdef UHCI_DEBUG 1048 if (uhcinoloop) 1049 return; 1050 #endif 1051 if (--sc->sc_loops == 0) { 1052 DPRINTFN(5,("uhci_end_loop: remove\n")); 1053 sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T); 1054 } 1055 } 1056 1057 /* Add high speed control QH, called at splusb(). */ 1058 void 1059 uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1060 { 1061 uhci_soft_qh_t *eqh; 1062 1063 SPLUSBCHECK; 1064 1065 DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh)); 1066 eqh = sc->sc_hctl_end; 1067 sqh->hlink = eqh->hlink; 1068 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1069 eqh->hlink = sqh; 1070 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1071 sc->sc_hctl_end = sqh; 1072 #ifdef UHCI_CTL_LOOP 1073 uhci_add_loop(sc); 1074 #endif 1075 } 1076 1077 /* Remove high speed control QH, called at splusb(). */ 1078 void 1079 uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1080 { 1081 uhci_soft_qh_t *pqh; 1082 1083 SPLUSBCHECK; 1084 1085 DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh)); 1086 #ifdef UHCI_CTL_LOOP 1087 uhci_rem_loop(sc); 1088 #endif 1089 /* 1090 * The T bit should be set in the elink of the QH so that the HC 1091 * doesn't follow the pointer. This condition may fail if the 1092 * the transferred packet was short so that the QH still points 1093 * at the last used TD. 1094 * In this case we set the T bit and wait a little for the HC 1095 * to stop looking at the TD. 1096 */ 1097 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1098 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1099 delay(UHCI_QH_REMOVE_DELAY); 1100 } 1101 1102 pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh); 1103 pqh->hlink = sqh->hlink; 1104 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1105 delay(UHCI_QH_REMOVE_DELAY); 1106 if (sc->sc_hctl_end == sqh) 1107 sc->sc_hctl_end = pqh; 1108 } 1109 1110 /* Add low speed control QH, called at splusb(). */ 1111 void 1112 uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1113 { 1114 uhci_soft_qh_t *eqh; 1115 1116 SPLUSBCHECK; 1117 1118 DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh)); 1119 eqh = sc->sc_lctl_end; 1120 sqh->hlink = eqh->hlink; 1121 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1122 eqh->hlink = sqh; 1123 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1124 sc->sc_lctl_end = sqh; 1125 } 1126 1127 /* Remove low speed control QH, called at splusb(). */ 1128 void 1129 uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1130 { 1131 uhci_soft_qh_t *pqh; 1132 1133 SPLUSBCHECK; 1134 1135 DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh)); 1136 /* See comment in uhci_remove_hs_ctrl() */ 1137 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1138 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1139 delay(UHCI_QH_REMOVE_DELAY); 1140 } 1141 pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh); 1142 pqh->hlink = sqh->hlink; 1143 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1144 delay(UHCI_QH_REMOVE_DELAY); 1145 if (sc->sc_lctl_end == sqh) 1146 sc->sc_lctl_end = pqh; 1147 } 1148 1149 /* Add bulk QH, called at splusb(). */ 1150 void 1151 uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1152 { 1153 uhci_soft_qh_t *eqh; 1154 1155 SPLUSBCHECK; 1156 1157 DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh)); 1158 eqh = sc->sc_bulk_end; 1159 sqh->hlink = eqh->hlink; 1160 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1161 eqh->hlink = sqh; 1162 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1163 sc->sc_bulk_end = sqh; 1164 uhci_add_loop(sc); 1165 } 1166 1167 /* Remove bulk QH, called at splusb(). */ 1168 void 1169 uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1170 { 1171 uhci_soft_qh_t *pqh; 1172 1173 SPLUSBCHECK; 1174 1175 DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh)); 1176 uhci_rem_loop(sc); 1177 /* See comment in uhci_remove_hs_ctrl() */ 1178 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1179 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1180 delay(UHCI_QH_REMOVE_DELAY); 1181 } 1182 pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh); 1183 pqh->hlink = sqh->hlink; 1184 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1185 delay(UHCI_QH_REMOVE_DELAY); 1186 if (sc->sc_bulk_end == sqh) 1187 sc->sc_bulk_end = pqh; 1188 } 1189 1190 Static int uhci_intr1(uhci_softc_t *); 1191 1192 int 1193 uhci_intr(void *arg) 1194 { 1195 uhci_softc_t *sc = arg; 1196 1197 if (sc->sc_dying || !device_has_power(sc->sc_dev)) 1198 return (0); 1199 1200 if (sc->sc_bus.use_polling) { 1201 #ifdef DIAGNOSTIC 1202 DPRINTFN(16, ("uhci_intr: ignored interrupt while polling\n")); 1203 #endif 1204 return (0); 1205 } 1206 1207 return (uhci_intr1(sc)); 1208 } 1209 1210 int 1211 uhci_intr1(uhci_softc_t *sc) 1212 { 1213 int status; 1214 int ack; 1215 1216 #ifdef UHCI_DEBUG 1217 if (uhcidebug > 15) { 1218 DPRINTF(("%s: uhci_intr1\n", device_xname(sc->sc_dev))); 1219 uhci_dumpregs(sc); 1220 } 1221 #endif 1222 1223 status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS; 1224 if (status == 0) /* The interrupt was not for us. */ 1225 return (0); 1226 1227 if (sc->sc_suspend != PWR_RESUME) { 1228 #ifdef DIAGNOSTIC 1229 printf("%s: interrupt while not operating ignored\n", 1230 device_xname(sc->sc_dev)); 1231 #endif 1232 UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */ 1233 return (0); 1234 } 1235 1236 ack = 0; 1237 if (status & UHCI_STS_USBINT) 1238 ack |= UHCI_STS_USBINT; 1239 if (status & UHCI_STS_USBEI) 1240 ack |= UHCI_STS_USBEI; 1241 if (status & UHCI_STS_RD) { 1242 ack |= UHCI_STS_RD; 1243 #ifdef UHCI_DEBUG 1244 printf("%s: resume detect\n", device_xname(sc->sc_dev)); 1245 #endif 1246 } 1247 if (status & UHCI_STS_HSE) { 1248 ack |= UHCI_STS_HSE; 1249 printf("%s: host system error\n", device_xname(sc->sc_dev)); 1250 } 1251 if (status & UHCI_STS_HCPE) { 1252 ack |= UHCI_STS_HCPE; 1253 printf("%s: host controller process error\n", 1254 device_xname(sc->sc_dev)); 1255 } 1256 if (status & UHCI_STS_HCH) { 1257 /* no acknowledge needed */ 1258 if (!sc->sc_dying) { 1259 printf("%s: host controller halted\n", 1260 device_xname(sc->sc_dev)); 1261 #ifdef UHCI_DEBUG 1262 uhci_dump_all(sc); 1263 #endif 1264 } 1265 sc->sc_dying = 1; 1266 } 1267 1268 if (!ack) 1269 return (0); /* nothing to acknowledge */ 1270 UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */ 1271 1272 sc->sc_bus.no_intrs++; 1273 usb_schedsoftintr(&sc->sc_bus); 1274 1275 DPRINTFN(15, ("%s: uhci_intr: exit\n", device_xname(sc->sc_dev))); 1276 1277 return (1); 1278 } 1279 1280 void 1281 uhci_softintr(void *v) 1282 { 1283 struct usbd_bus *bus = v; 1284 uhci_softc_t *sc = bus->hci_private; 1285 uhci_intr_info_t *ii, *nextii; 1286 1287 DPRINTFN(10,("%s: uhci_softintr (%d)\n", device_xname(sc->sc_dev), 1288 sc->sc_bus.intr_context)); 1289 1290 sc->sc_bus.intr_context++; 1291 1292 /* 1293 * Interrupts on UHCI really suck. When the host controller 1294 * interrupts because a transfer is completed there is no 1295 * way of knowing which transfer it was. You can scan down 1296 * the TDs and QHs of the previous frame to limit the search, 1297 * but that assumes that the interrupt was not delayed by more 1298 * than 1 ms, which may not always be true (e.g. after debug 1299 * output on a slow console). 1300 * We scan all interrupt descriptors to see if any have 1301 * completed. 1302 */ 1303 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = nextii) { 1304 nextii = LIST_NEXT(ii, list); 1305 uhci_check_intr(sc, ii); 1306 } 1307 1308 #ifdef USB_USE_SOFTINTR 1309 if (sc->sc_softwake) { 1310 sc->sc_softwake = 0; 1311 wakeup(&sc->sc_softwake); 1312 } 1313 #endif /* USB_USE_SOFTINTR */ 1314 1315 sc->sc_bus.intr_context--; 1316 } 1317 1318 /* Check for an interrupt. */ 1319 void 1320 uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii) 1321 { 1322 uhci_soft_td_t *std, *lstd; 1323 u_int32_t status; 1324 1325 DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii)); 1326 #ifdef DIAGNOSTIC 1327 if (ii == NULL) { 1328 printf("uhci_check_intr: no ii? %p\n", ii); 1329 return; 1330 } 1331 #endif 1332 if (ii->xfer->status == USBD_CANCELLED || 1333 ii->xfer->status == USBD_TIMEOUT) { 1334 DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer)); 1335 return; 1336 } 1337 1338 if (ii->stdstart == NULL) 1339 return; 1340 lstd = ii->stdend; 1341 #ifdef DIAGNOSTIC 1342 if (lstd == NULL) { 1343 printf("uhci_check_intr: std==0\n"); 1344 return; 1345 } 1346 #endif 1347 /* 1348 * If the last TD is still active we need to check whether there 1349 * is an error somewhere in the middle, or whether there was a 1350 * short packet (SPD and not ACTIVE). 1351 */ 1352 if (le32toh(lstd->td.td_status) & UHCI_TD_ACTIVE) { 1353 DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii)); 1354 for (std = ii->stdstart; std != lstd; std = std->link.std) { 1355 status = le32toh(std->td.td_status); 1356 /* If there's an active TD the xfer isn't done. */ 1357 if (status & UHCI_TD_ACTIVE) 1358 break; 1359 /* Any kind of error makes the xfer done. */ 1360 if (status & UHCI_TD_STALLED) 1361 goto done; 1362 /* We want short packets, and it is short: it's done */ 1363 if ((status & UHCI_TD_SPD) && 1364 UHCI_TD_GET_ACTLEN(status) < 1365 UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token))) 1366 goto done; 1367 } 1368 DPRINTFN(12, ("uhci_check_intr: ii=%p std=%p still active\n", 1369 ii, ii->stdstart)); 1370 return; 1371 } 1372 done: 1373 DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii)); 1374 usb_uncallout(ii->xfer->timeout_handle, uhci_timeout, ii); 1375 uhci_idone(ii); 1376 } 1377 1378 /* Called at splusb() */ 1379 void 1380 uhci_idone(uhci_intr_info_t *ii) 1381 { 1382 usbd_xfer_handle xfer = ii->xfer; 1383 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 1384 uhci_soft_td_t *std; 1385 u_int32_t status = 0, nstatus; 1386 int actlen; 1387 1388 DPRINTFN(12, ("uhci_idone: ii=%p\n", ii)); 1389 #ifdef DIAGNOSTIC 1390 { 1391 int s = splhigh(); 1392 if (ii->isdone) { 1393 splx(s); 1394 #ifdef UHCI_DEBUG 1395 printf("uhci_idone: ii is done!\n "); 1396 uhci_dump_ii(ii); 1397 #else 1398 printf("uhci_idone: ii=%p is done!\n", ii); 1399 #endif 1400 return; 1401 } 1402 ii->isdone = 1; 1403 splx(s); 1404 } 1405 #endif 1406 1407 if (xfer->nframes != 0) { 1408 /* Isoc transfer, do things differently. */ 1409 uhci_soft_td_t **stds = upipe->u.iso.stds; 1410 int i, n, nframes, len; 1411 1412 DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii)); 1413 1414 nframes = xfer->nframes; 1415 actlen = 0; 1416 n = UXFER(xfer)->curframe; 1417 for (i = 0; i < nframes; i++) { 1418 std = stds[n]; 1419 #ifdef UHCI_DEBUG 1420 if (uhcidebug > 5) { 1421 DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i)); 1422 uhci_dump_td(std); 1423 } 1424 #endif 1425 if (++n >= UHCI_VFRAMELIST_COUNT) 1426 n = 0; 1427 status = le32toh(std->td.td_status); 1428 len = UHCI_TD_GET_ACTLEN(status); 1429 xfer->frlengths[i] = len; 1430 actlen += len; 1431 } 1432 upipe->u.iso.inuse -= nframes; 1433 xfer->actlen = actlen; 1434 xfer->status = USBD_NORMAL_COMPLETION; 1435 goto end; 1436 } 1437 1438 #ifdef UHCI_DEBUG 1439 DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n", 1440 ii, xfer, upipe)); 1441 if (uhcidebug > 10) 1442 uhci_dump_tds(ii->stdstart); 1443 #endif 1444 1445 /* The transfer is done, compute actual length and status. */ 1446 actlen = 0; 1447 for (std = ii->stdstart; std != NULL; std = std->link.std) { 1448 nstatus = le32toh(std->td.td_status); 1449 if (nstatus & UHCI_TD_ACTIVE) 1450 break; 1451 1452 status = nstatus; 1453 if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) != 1454 UHCI_TD_PID_SETUP) 1455 actlen += UHCI_TD_GET_ACTLEN(status); 1456 else { 1457 /* 1458 * UHCI will report CRCTO in addition to a STALL or NAK 1459 * for a SETUP transaction. See section 3.2.2, "TD 1460 * CONTROL AND STATUS". 1461 */ 1462 if (status & (UHCI_TD_STALLED | UHCI_TD_NAK)) 1463 status &= ~UHCI_TD_CRCTO; 1464 } 1465 } 1466 /* If there are left over TDs we need to update the toggle. */ 1467 if (std != NULL) 1468 upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token)); 1469 1470 status &= UHCI_TD_ERROR; 1471 DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n", 1472 actlen, status)); 1473 xfer->actlen = actlen; 1474 if (status != 0) { 1475 #ifdef UHCI_DEBUG 1476 char sbuf[128]; 1477 1478 bitmask_snprintf((u_int32_t)status, 1479 "\20\22BITSTUFF\23CRCTO\24NAK\25" 1480 "BABBLE\26DBUFFER\27STALLED\30ACTIVE", 1481 sbuf, sizeof(sbuf)); 1482 1483 DPRINTFN((status == UHCI_TD_STALLED)*10, 1484 ("uhci_idone: error, addr=%d, endpt=0x%02x, " 1485 "status 0x%s\n", 1486 xfer->pipe->device->address, 1487 xfer->pipe->endpoint->edesc->bEndpointAddress, 1488 sbuf)); 1489 #endif 1490 1491 if (status == UHCI_TD_STALLED) 1492 xfer->status = USBD_STALLED; 1493 else 1494 xfer->status = USBD_IOERROR; /* more info XXX */ 1495 } else { 1496 xfer->status = USBD_NORMAL_COMPLETION; 1497 } 1498 1499 end: 1500 usb_transfer_complete(xfer); 1501 DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii)); 1502 } 1503 1504 /* 1505 * Called when a request does not complete. 1506 */ 1507 void 1508 uhci_timeout(void *addr) 1509 { 1510 uhci_intr_info_t *ii = addr; 1511 struct uhci_xfer *uxfer = UXFER(ii->xfer); 1512 struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.pipe; 1513 uhci_softc_t *sc = upipe->pipe.device->bus->hci_private; 1514 1515 DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer)); 1516 1517 if (sc->sc_dying) { 1518 uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT); 1519 return; 1520 } 1521 1522 /* Execute the abort in a process context. */ 1523 usb_init_task(&uxfer->abort_task, uhci_timeout_task, ii->xfer); 1524 usb_add_task(uxfer->xfer.pipe->device, &uxfer->abort_task, 1525 USB_TASKQ_HC); 1526 } 1527 1528 void 1529 uhci_timeout_task(void *addr) 1530 { 1531 usbd_xfer_handle xfer = addr; 1532 int s; 1533 1534 DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer)); 1535 1536 s = splusb(); 1537 uhci_abort_xfer(xfer, USBD_TIMEOUT); 1538 splx(s); 1539 } 1540 1541 /* 1542 * Wait here until controller claims to have an interrupt. 1543 * Then call uhci_intr and return. Use timeout to avoid waiting 1544 * too long. 1545 * Only used during boot when interrupts are not enabled yet. 1546 */ 1547 void 1548 uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer) 1549 { 1550 int timo = xfer->timeout; 1551 uhci_intr_info_t *ii; 1552 1553 DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo)); 1554 1555 xfer->status = USBD_IN_PROGRESS; 1556 for (; timo >= 0; timo--) { 1557 usb_delay_ms(&sc->sc_bus, 1); 1558 DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS))); 1559 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) { 1560 uhci_intr1(sc); 1561 if (xfer->status != USBD_IN_PROGRESS) 1562 return; 1563 } 1564 } 1565 1566 /* Timeout */ 1567 DPRINTF(("uhci_waitintr: timeout\n")); 1568 for (ii = LIST_FIRST(&sc->sc_intrhead); 1569 ii != NULL && ii->xfer != xfer; 1570 ii = LIST_NEXT(ii, list)) 1571 ; 1572 #ifdef DIAGNOSTIC 1573 if (ii == NULL) 1574 panic("uhci_waitintr: lost intr_info"); 1575 #endif 1576 uhci_idone(ii); 1577 } 1578 1579 void 1580 uhci_poll(struct usbd_bus *bus) 1581 { 1582 uhci_softc_t *sc = bus->hci_private; 1583 1584 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) 1585 uhci_intr1(sc); 1586 } 1587 1588 void 1589 uhci_reset(uhci_softc_t *sc) 1590 { 1591 int n; 1592 1593 UHCICMD(sc, UHCI_CMD_HCRESET); 1594 /* The reset bit goes low when the controller is done. */ 1595 for (n = 0; n < UHCI_RESET_TIMEOUT && 1596 (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++) 1597 usb_delay_ms(&sc->sc_bus, 1); 1598 if (n >= UHCI_RESET_TIMEOUT) 1599 printf("%s: controller did not reset\n", 1600 device_xname(sc->sc_dev)); 1601 } 1602 1603 usbd_status 1604 uhci_run(uhci_softc_t *sc, int run) 1605 { 1606 int s, n, running; 1607 u_int16_t cmd; 1608 1609 run = run != 0; 1610 s = splhardusb(); 1611 DPRINTF(("uhci_run: setting run=%d\n", run)); 1612 cmd = UREAD2(sc, UHCI_CMD); 1613 if (run) 1614 cmd |= UHCI_CMD_RS; 1615 else 1616 cmd &= ~UHCI_CMD_RS; 1617 UHCICMD(sc, cmd); 1618 for(n = 0; n < 10; n++) { 1619 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH); 1620 /* return when we've entered the state we want */ 1621 if (run == running) { 1622 splx(s); 1623 DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n", 1624 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS))); 1625 return (USBD_NORMAL_COMPLETION); 1626 } 1627 usb_delay_ms(&sc->sc_bus, 1); 1628 } 1629 splx(s); 1630 printf("%s: cannot %s\n", device_xname(sc->sc_dev), 1631 run ? "start" : "stop"); 1632 return (USBD_IOERROR); 1633 } 1634 1635 /* 1636 * Memory management routines. 1637 * uhci_alloc_std allocates TDs 1638 * uhci_alloc_sqh allocates QHs 1639 * These two routines do their own free list management, 1640 * partly for speed, partly because allocating DMAable memory 1641 * has page size granularaity so much memory would be wasted if 1642 * only one TD/QH (32 bytes) was placed in each allocated chunk. 1643 */ 1644 1645 uhci_soft_td_t * 1646 uhci_alloc_std(uhci_softc_t *sc) 1647 { 1648 uhci_soft_td_t *std; 1649 usbd_status err; 1650 int i, offs; 1651 usb_dma_t dma; 1652 1653 if (sc->sc_freetds == NULL) { 1654 DPRINTFN(2,("uhci_alloc_std: allocating chunk\n")); 1655 err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK, 1656 UHCI_TD_ALIGN, &dma); 1657 if (err) 1658 return (0); 1659 for(i = 0; i < UHCI_STD_CHUNK; i++) { 1660 offs = i * UHCI_STD_SIZE; 1661 std = KERNADDR(&dma, offs); 1662 std->physaddr = DMAADDR(&dma, offs); 1663 std->link.std = sc->sc_freetds; 1664 sc->sc_freetds = std; 1665 } 1666 } 1667 std = sc->sc_freetds; 1668 sc->sc_freetds = std->link.std; 1669 memset(&std->td, 0, sizeof(uhci_td_t)); 1670 return std; 1671 } 1672 1673 void 1674 uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std) 1675 { 1676 #ifdef DIAGNOSTIC 1677 #define TD_IS_FREE 0x12345678 1678 if (le32toh(std->td.td_token) == TD_IS_FREE) { 1679 printf("uhci_free_std: freeing free TD %p\n", std); 1680 return; 1681 } 1682 std->td.td_token = htole32(TD_IS_FREE); 1683 #endif 1684 std->link.std = sc->sc_freetds; 1685 sc->sc_freetds = std; 1686 } 1687 1688 uhci_soft_qh_t * 1689 uhci_alloc_sqh(uhci_softc_t *sc) 1690 { 1691 uhci_soft_qh_t *sqh; 1692 usbd_status err; 1693 int i, offs; 1694 usb_dma_t dma; 1695 1696 if (sc->sc_freeqhs == NULL) { 1697 DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n")); 1698 err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK, 1699 UHCI_QH_ALIGN, &dma); 1700 if (err) 1701 return (0); 1702 for(i = 0; i < UHCI_SQH_CHUNK; i++) { 1703 offs = i * UHCI_SQH_SIZE; 1704 sqh = KERNADDR(&dma, offs); 1705 sqh->physaddr = DMAADDR(&dma, offs); 1706 sqh->hlink = sc->sc_freeqhs; 1707 sc->sc_freeqhs = sqh; 1708 } 1709 } 1710 sqh = sc->sc_freeqhs; 1711 sc->sc_freeqhs = sqh->hlink; 1712 memset(&sqh->qh, 0, sizeof(uhci_qh_t)); 1713 return (sqh); 1714 } 1715 1716 void 1717 uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1718 { 1719 sqh->hlink = sc->sc_freeqhs; 1720 sc->sc_freeqhs = sqh; 1721 } 1722 1723 void 1724 uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std, 1725 uhci_soft_td_t *stdend) 1726 { 1727 uhci_soft_td_t *p; 1728 1729 for (; std != stdend; std = p) { 1730 p = std->link.std; 1731 uhci_free_std(sc, std); 1732 } 1733 } 1734 1735 usbd_status 1736 uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len, 1737 int rd, u_int16_t flags, usb_dma_t *dma, 1738 uhci_soft_td_t **sp, uhci_soft_td_t **ep) 1739 { 1740 uhci_soft_td_t *p, *lastp; 1741 uhci_physaddr_t lastlink; 1742 int i, ntd, l, tog, maxp; 1743 u_int32_t status; 1744 int addr = upipe->pipe.device->address; 1745 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 1746 1747 DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d speed=%d " 1748 "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len, 1749 upipe->pipe.device->speed, flags)); 1750 maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize); 1751 if (maxp == 0) { 1752 printf("uhci_alloc_std_chain: maxp=0\n"); 1753 return (USBD_INVAL); 1754 } 1755 ntd = (len + maxp - 1) / maxp; 1756 if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0) 1757 ntd++; 1758 DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd)); 1759 if (ntd == 0) { 1760 *sp = *ep = 0; 1761 DPRINTFN(-1,("uhci_alloc_std_chain: ntd=0\n")); 1762 return (USBD_NORMAL_COMPLETION); 1763 } 1764 tog = upipe->nexttoggle; 1765 if (ntd % 2 == 0) 1766 tog ^= 1; 1767 upipe->nexttoggle = tog ^ 1; 1768 lastp = NULL; 1769 lastlink = UHCI_PTR_T; 1770 ntd--; 1771 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE); 1772 if (upipe->pipe.device->speed == USB_SPEED_LOW) 1773 status |= UHCI_TD_LS; 1774 if (flags & USBD_SHORT_XFER_OK) 1775 status |= UHCI_TD_SPD; 1776 for (i = ntd; i >= 0; i--) { 1777 p = uhci_alloc_std(sc); 1778 if (p == NULL) { 1779 KASSERT(lastp != NULL); 1780 uhci_free_std_chain(sc, lastp, NULL); 1781 return (USBD_NOMEM); 1782 } 1783 p->link.std = lastp; 1784 p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD); 1785 lastp = p; 1786 lastlink = p->physaddr; 1787 p->td.td_status = htole32(status); 1788 if (i == ntd) { 1789 /* last TD */ 1790 l = len % maxp; 1791 if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER)) 1792 l = maxp; 1793 *ep = p; 1794 } else 1795 l = maxp; 1796 p->td.td_token = 1797 htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) : 1798 UHCI_TD_OUT(l, endpt, addr, tog)); 1799 p->td.td_buffer = htole32(DMAADDR(dma, i * maxp)); 1800 tog ^= 1; 1801 } 1802 *sp = lastp; 1803 DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n", 1804 upipe->nexttoggle)); 1805 return (USBD_NORMAL_COMPLETION); 1806 } 1807 1808 void 1809 uhci_device_clear_toggle(usbd_pipe_handle pipe) 1810 { 1811 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1812 upipe->nexttoggle = 0; 1813 } 1814 1815 void 1816 uhci_noop(usbd_pipe_handle pipe) 1817 { 1818 } 1819 1820 usbd_status 1821 uhci_device_bulk_transfer(usbd_xfer_handle xfer) 1822 { 1823 usbd_status err; 1824 1825 /* Insert last in queue. */ 1826 err = usb_insert_transfer(xfer); 1827 if (err) 1828 return (err); 1829 1830 /* 1831 * Pipe isn't running (otherwise err would be USBD_INPROG), 1832 * so start it first. 1833 */ 1834 return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1835 } 1836 1837 usbd_status 1838 uhci_device_bulk_start(usbd_xfer_handle xfer) 1839 { 1840 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 1841 usbd_device_handle dev = upipe->pipe.device; 1842 uhci_softc_t *sc = dev->bus->hci_private; 1843 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 1844 uhci_soft_td_t *data, *dataend; 1845 uhci_soft_qh_t *sqh; 1846 usbd_status err; 1847 int len, isread, endpt; 1848 int s; 1849 1850 DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%d flags=%d ii=%p\n", 1851 xfer, xfer->length, xfer->flags, ii)); 1852 1853 if (sc->sc_dying) 1854 return (USBD_IOERROR); 1855 1856 #ifdef DIAGNOSTIC 1857 if (xfer->rqflags & URQ_REQUEST) 1858 panic("uhci_device_bulk_transfer: a request"); 1859 #endif 1860 1861 len = xfer->length; 1862 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 1863 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 1864 sqh = upipe->u.bulk.sqh; 1865 1866 upipe->u.bulk.isread = isread; 1867 upipe->u.bulk.length = len; 1868 1869 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags, 1870 &xfer->dmabuf, &data, &dataend); 1871 if (err) 1872 return (err); 1873 dataend->td.td_status |= htole32(UHCI_TD_IOC); 1874 1875 #ifdef UHCI_DEBUG 1876 if (uhcidebug > 8) { 1877 DPRINTF(("uhci_device_bulk_transfer: data(1)\n")); 1878 uhci_dump_tds(data); 1879 } 1880 #endif 1881 1882 /* Set up interrupt info. */ 1883 ii->xfer = xfer; 1884 ii->stdstart = data; 1885 ii->stdend = dataend; 1886 #ifdef DIAGNOSTIC 1887 if (!ii->isdone) { 1888 printf("uhci_device_bulk_transfer: not done, ii=%p\n", ii); 1889 } 1890 ii->isdone = 0; 1891 #endif 1892 1893 sqh->elink = data; 1894 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 1895 1896 s = splusb(); 1897 uhci_add_bulk(sc, sqh); 1898 uhci_add_intr_info(sc, ii); 1899 1900 if (xfer->timeout && !sc->sc_bus.use_polling) { 1901 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 1902 uhci_timeout, ii); 1903 } 1904 xfer->status = USBD_IN_PROGRESS; 1905 splx(s); 1906 1907 #ifdef UHCI_DEBUG 1908 if (uhcidebug > 10) { 1909 DPRINTF(("uhci_device_bulk_transfer: data(2)\n")); 1910 uhci_dump_tds(data); 1911 } 1912 #endif 1913 1914 if (sc->sc_bus.use_polling) 1915 uhci_waitintr(sc, xfer); 1916 1917 return (USBD_IN_PROGRESS); 1918 } 1919 1920 /* Abort a device bulk request. */ 1921 void 1922 uhci_device_bulk_abort(usbd_xfer_handle xfer) 1923 { 1924 DPRINTF(("uhci_device_bulk_abort:\n")); 1925 uhci_abort_xfer(xfer, USBD_CANCELLED); 1926 } 1927 1928 /* 1929 * Abort a device request. 1930 * If this routine is called at splusb() it guarantees that the request 1931 * will be removed from the hardware scheduling and that the callback 1932 * for it will be called with USBD_CANCELLED status. 1933 * It's impossible to guarantee that the requested transfer will not 1934 * have happened since the hardware runs concurrently. 1935 * If the transaction has already happened we rely on the ordinary 1936 * interrupt processing to process it. 1937 */ 1938 void 1939 uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 1940 { 1941 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 1942 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 1943 uhci_softc_t *sc = upipe->pipe.device->bus->hci_private; 1944 uhci_soft_td_t *std; 1945 int s; 1946 int wake; 1947 1948 DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status)); 1949 1950 if (sc->sc_dying) { 1951 /* If we're dying, just do the software part. */ 1952 s = splusb(); 1953 xfer->status = status; /* make software ignore it */ 1954 usb_uncallout(xfer->timeout_handle, uhci_timeout, xfer); 1955 usb_transfer_complete(xfer); 1956 splx(s); 1957 return; 1958 } 1959 1960 if (xfer->device->bus->intr_context || !curproc) 1961 panic("uhci_abort_xfer: not in process context"); 1962 1963 /* 1964 * If an abort is already in progress then just wait for it to 1965 * complete and return. 1966 */ 1967 if (xfer->hcflags & UXFER_ABORTING) { 1968 DPRINTFN(2, ("uhci_abort_xfer: already aborting\n")); 1969 #ifdef DIAGNOSTIC 1970 if (status == USBD_TIMEOUT) 1971 printf("uhci_abort_xfer: TIMEOUT while aborting\n"); 1972 #endif 1973 /* Override the status which might be USBD_TIMEOUT. */ 1974 xfer->status = status; 1975 DPRINTFN(2, ("uhci_abort_xfer: waiting for abort to finish\n")); 1976 xfer->hcflags |= UXFER_ABORTWAIT; 1977 while (xfer->hcflags & UXFER_ABORTING) 1978 tsleep(&xfer->hcflags, PZERO, "uhciaw", 0); 1979 return; 1980 } 1981 xfer->hcflags |= UXFER_ABORTING; 1982 1983 /* 1984 * Step 1: Make interrupt routine and hardware ignore xfer. 1985 */ 1986 s = splusb(); 1987 xfer->status = status; /* make software ignore it */ 1988 usb_uncallout(xfer->timeout_handle, uhci_timeout, ii); 1989 DPRINTFN(1,("uhci_abort_xfer: stop ii=%p\n", ii)); 1990 for (std = ii->stdstart; std != NULL; std = std->link.std) 1991 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 1992 splx(s); 1993 1994 /* 1995 * Step 2: Wait until we know hardware has finished any possible 1996 * use of the xfer. Also make sure the soft interrupt routine 1997 * has run. 1998 */ 1999 usb_delay_ms(upipe->pipe.device->bus, 2); /* Hardware finishes in 1ms */ 2000 s = splusb(); 2001 #ifdef USB_USE_SOFTINTR 2002 sc->sc_softwake = 1; 2003 #endif /* USB_USE_SOFTINTR */ 2004 usb_schedsoftintr(&sc->sc_bus); 2005 #ifdef USB_USE_SOFTINTR 2006 DPRINTFN(1,("uhci_abort_xfer: tsleep\n")); 2007 tsleep(&sc->sc_softwake, PZERO, "uhciab", 0); 2008 #endif /* USB_USE_SOFTINTR */ 2009 splx(s); 2010 2011 /* 2012 * Step 3: Execute callback. 2013 */ 2014 DPRINTFN(1,("uhci_abort_xfer: callback\n")); 2015 s = splusb(); 2016 #ifdef DIAGNOSTIC 2017 ii->isdone = 1; 2018 #endif 2019 wake = xfer->hcflags & UXFER_ABORTWAIT; 2020 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2021 usb_transfer_complete(xfer); 2022 if (wake) 2023 wakeup(&xfer->hcflags); 2024 splx(s); 2025 } 2026 2027 /* Close a device bulk pipe. */ 2028 void 2029 uhci_device_bulk_close(usbd_pipe_handle pipe) 2030 { 2031 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2032 usbd_device_handle dev = upipe->pipe.device; 2033 uhci_softc_t *sc = dev->bus->hci_private; 2034 2035 uhci_free_sqh(sc, upipe->u.bulk.sqh); 2036 } 2037 2038 usbd_status 2039 uhci_device_ctrl_transfer(usbd_xfer_handle xfer) 2040 { 2041 usbd_status err; 2042 2043 /* Insert last in queue. */ 2044 err = usb_insert_transfer(xfer); 2045 if (err) 2046 return (err); 2047 2048 /* 2049 * Pipe isn't running (otherwise err would be USBD_INPROG), 2050 * so start it first. 2051 */ 2052 return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2053 } 2054 2055 usbd_status 2056 uhci_device_ctrl_start(usbd_xfer_handle xfer) 2057 { 2058 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2059 usbd_status err; 2060 2061 if (sc->sc_dying) 2062 return (USBD_IOERROR); 2063 2064 #ifdef DIAGNOSTIC 2065 if (!(xfer->rqflags & URQ_REQUEST)) 2066 panic("uhci_device_ctrl_transfer: not a request"); 2067 #endif 2068 2069 err = uhci_device_request(xfer); 2070 if (err) 2071 return (err); 2072 2073 if (sc->sc_bus.use_polling) 2074 uhci_waitintr(sc, xfer); 2075 return (USBD_IN_PROGRESS); 2076 } 2077 2078 usbd_status 2079 uhci_device_intr_transfer(usbd_xfer_handle xfer) 2080 { 2081 usbd_status err; 2082 2083 /* Insert last in queue. */ 2084 err = usb_insert_transfer(xfer); 2085 if (err) 2086 return (err); 2087 2088 /* 2089 * Pipe isn't running (otherwise err would be USBD_INPROG), 2090 * so start it first. 2091 */ 2092 return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2093 } 2094 2095 usbd_status 2096 uhci_device_intr_start(usbd_xfer_handle xfer) 2097 { 2098 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2099 usbd_device_handle dev = upipe->pipe.device; 2100 uhci_softc_t *sc = dev->bus->hci_private; 2101 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2102 uhci_soft_td_t *data, *dataend; 2103 uhci_soft_qh_t *sqh; 2104 usbd_status err; 2105 int isread, endpt; 2106 int i, s; 2107 2108 if (sc->sc_dying) 2109 return (USBD_IOERROR); 2110 2111 DPRINTFN(3,("uhci_device_intr_transfer: xfer=%p len=%d flags=%d\n", 2112 xfer, xfer->length, xfer->flags)); 2113 2114 #ifdef DIAGNOSTIC 2115 if (xfer->rqflags & URQ_REQUEST) 2116 panic("uhci_device_intr_transfer: a request"); 2117 #endif 2118 2119 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2120 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2121 2122 upipe->u.intr.isread = isread; 2123 2124 err = uhci_alloc_std_chain(upipe, sc, xfer->length, isread, 2125 xfer->flags, &xfer->dmabuf, &data, 2126 &dataend); 2127 if (err) 2128 return (err); 2129 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2130 2131 #ifdef UHCI_DEBUG 2132 if (uhcidebug > 10) { 2133 DPRINTF(("uhci_device_intr_transfer: data(1)\n")); 2134 uhci_dump_tds(data); 2135 uhci_dump_qh(upipe->u.intr.qhs[0]); 2136 } 2137 #endif 2138 2139 s = splusb(); 2140 /* Set up interrupt info. */ 2141 ii->xfer = xfer; 2142 ii->stdstart = data; 2143 ii->stdend = dataend; 2144 #ifdef DIAGNOSTIC 2145 if (!ii->isdone) { 2146 printf("uhci_device_intr_transfer: not done, ii=%p\n", ii); 2147 } 2148 ii->isdone = 0; 2149 #endif 2150 2151 DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n", 2152 upipe->u.intr.qhs[0])); 2153 for (i = 0; i < upipe->u.intr.npoll; i++) { 2154 sqh = upipe->u.intr.qhs[i]; 2155 sqh->elink = data; 2156 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2157 } 2158 uhci_add_intr_info(sc, ii); 2159 xfer->status = USBD_IN_PROGRESS; 2160 splx(s); 2161 2162 #ifdef UHCI_DEBUG 2163 if (uhcidebug > 10) { 2164 DPRINTF(("uhci_device_intr_transfer: data(2)\n")); 2165 uhci_dump_tds(data); 2166 uhci_dump_qh(upipe->u.intr.qhs[0]); 2167 } 2168 #endif 2169 2170 return (USBD_IN_PROGRESS); 2171 } 2172 2173 /* Abort a device control request. */ 2174 void 2175 uhci_device_ctrl_abort(usbd_xfer_handle xfer) 2176 { 2177 DPRINTF(("uhci_device_ctrl_abort:\n")); 2178 uhci_abort_xfer(xfer, USBD_CANCELLED); 2179 } 2180 2181 /* Close a device control pipe. */ 2182 void 2183 uhci_device_ctrl_close(usbd_pipe_handle pipe) 2184 { 2185 } 2186 2187 /* Abort a device interrupt request. */ 2188 void 2189 uhci_device_intr_abort(usbd_xfer_handle xfer) 2190 { 2191 DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer)); 2192 if (xfer->pipe->intrxfer == xfer) { 2193 DPRINTFN(1,("uhci_device_intr_abort: remove\n")); 2194 xfer->pipe->intrxfer = NULL; 2195 } 2196 uhci_abort_xfer(xfer, USBD_CANCELLED); 2197 } 2198 2199 /* Close a device interrupt pipe. */ 2200 void 2201 uhci_device_intr_close(usbd_pipe_handle pipe) 2202 { 2203 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2204 uhci_softc_t *sc = pipe->device->bus->hci_private; 2205 int i, npoll; 2206 int s; 2207 2208 /* Unlink descriptors from controller data structures. */ 2209 npoll = upipe->u.intr.npoll; 2210 s = splusb(); 2211 for (i = 0; i < npoll; i++) 2212 uhci_remove_intr(sc, upipe->u.intr.qhs[i]); 2213 splx(s); 2214 2215 /* 2216 * We now have to wait for any activity on the physical 2217 * descriptors to stop. 2218 */ 2219 usb_delay_ms(&sc->sc_bus, 2); 2220 2221 for(i = 0; i < npoll; i++) 2222 uhci_free_sqh(sc, upipe->u.intr.qhs[i]); 2223 free(upipe->u.intr.qhs, M_USBHC); 2224 2225 /* XXX free other resources */ 2226 } 2227 2228 usbd_status 2229 uhci_device_request(usbd_xfer_handle xfer) 2230 { 2231 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2232 usb_device_request_t *req = &xfer->request; 2233 usbd_device_handle dev = upipe->pipe.device; 2234 uhci_softc_t *sc = dev->bus->hci_private; 2235 int addr = dev->address; 2236 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2237 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2238 uhci_soft_td_t *setup, *data, *stat, *next, *dataend; 2239 uhci_soft_qh_t *sqh; 2240 int len; 2241 u_int32_t ls; 2242 usbd_status err; 2243 int isread; 2244 int s; 2245 2246 DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, " 2247 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2248 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2249 UGETW(req->wIndex), UGETW(req->wLength), 2250 addr, endpt)); 2251 2252 ls = dev->speed == USB_SPEED_LOW ? UHCI_TD_LS : 0; 2253 isread = req->bmRequestType & UT_READ; 2254 len = UGETW(req->wLength); 2255 2256 setup = upipe->u.ctl.setup; 2257 stat = upipe->u.ctl.stat; 2258 sqh = upipe->u.ctl.sqh; 2259 2260 /* Set up data transaction */ 2261 if (len != 0) { 2262 upipe->nexttoggle = 1; 2263 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags, 2264 &xfer->dmabuf, &data, &dataend); 2265 if (err) 2266 return (err); 2267 next = data; 2268 dataend->link.std = stat; 2269 dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_VF | UHCI_PTR_TD); 2270 } else { 2271 next = stat; 2272 } 2273 upipe->u.ctl.length = len; 2274 2275 memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req); 2276 2277 setup->link.std = next; 2278 setup->td.td_link = htole32(next->physaddr | UHCI_PTR_VF | UHCI_PTR_TD); 2279 setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2280 UHCI_TD_ACTIVE); 2281 setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr)); 2282 setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0)); 2283 2284 stat->link.std = NULL; 2285 stat->td.td_link = htole32(UHCI_PTR_T); 2286 stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2287 UHCI_TD_ACTIVE | UHCI_TD_IOC); 2288 stat->td.td_token = 2289 htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) : 2290 UHCI_TD_IN (0, endpt, addr, 1)); 2291 stat->td.td_buffer = htole32(0); 2292 2293 #ifdef UHCI_DEBUG 2294 if (uhcidebug > 10) { 2295 DPRINTF(("uhci_device_request: before transfer\n")); 2296 uhci_dump_tds(setup); 2297 } 2298 #endif 2299 2300 /* Set up interrupt info. */ 2301 ii->xfer = xfer; 2302 ii->stdstart = setup; 2303 ii->stdend = stat; 2304 #ifdef DIAGNOSTIC 2305 if (!ii->isdone) { 2306 printf("uhci_device_request: not done, ii=%p\n", ii); 2307 } 2308 ii->isdone = 0; 2309 #endif 2310 2311 sqh->elink = setup; 2312 sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD); 2313 2314 s = splusb(); 2315 if (dev->speed == USB_SPEED_LOW) 2316 uhci_add_ls_ctrl(sc, sqh); 2317 else 2318 uhci_add_hs_ctrl(sc, sqh); 2319 uhci_add_intr_info(sc, ii); 2320 #ifdef UHCI_DEBUG 2321 if (uhcidebug > 12) { 2322 uhci_soft_td_t *std; 2323 uhci_soft_qh_t *xqh; 2324 uhci_soft_qh_t *sxqh; 2325 int maxqh = 0; 2326 uhci_physaddr_t link; 2327 DPRINTF(("uhci_enter_ctl_q: follow from [0]\n")); 2328 for (std = sc->sc_vframes[0].htd, link = 0; 2329 (link & UHCI_PTR_QH) == 0; 2330 std = std->link.std) { 2331 link = le32toh(std->td.td_link); 2332 uhci_dump_td(std); 2333 } 2334 sxqh = (uhci_soft_qh_t *)std; 2335 uhci_dump_qh(sxqh); 2336 for (xqh = sxqh; 2337 xqh != NULL; 2338 xqh = (maxqh++ == 5 || xqh->hlink == sxqh || 2339 xqh->hlink == xqh ? NULL : xqh->hlink)) { 2340 uhci_dump_qh(xqh); 2341 } 2342 DPRINTF(("Enqueued QH:\n")); 2343 uhci_dump_qh(sqh); 2344 uhci_dump_tds(sqh->elink); 2345 } 2346 #endif 2347 if (xfer->timeout && !sc->sc_bus.use_polling) { 2348 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2349 uhci_timeout, ii); 2350 } 2351 xfer->status = USBD_IN_PROGRESS; 2352 splx(s); 2353 2354 return (USBD_NORMAL_COMPLETION); 2355 } 2356 2357 usbd_status 2358 uhci_device_isoc_transfer(usbd_xfer_handle xfer) 2359 { 2360 usbd_status err; 2361 2362 DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer)); 2363 2364 /* Put it on our queue, */ 2365 err = usb_insert_transfer(xfer); 2366 2367 /* bail out on error, */ 2368 if (err && err != USBD_IN_PROGRESS) 2369 return (err); 2370 2371 /* XXX should check inuse here */ 2372 2373 /* insert into schedule, */ 2374 uhci_device_isoc_enter(xfer); 2375 2376 /* and start if the pipe wasn't running */ 2377 if (!err) 2378 uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 2379 2380 return (err); 2381 } 2382 2383 void 2384 uhci_device_isoc_enter(usbd_xfer_handle xfer) 2385 { 2386 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2387 usbd_device_handle dev = upipe->pipe.device; 2388 uhci_softc_t *sc = dev->bus->hci_private; 2389 struct iso *iso = &upipe->u.iso; 2390 uhci_soft_td_t *std; 2391 u_int32_t buf, len, status; 2392 int s, i, next, nframes; 2393 2394 DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p " 2395 "nframes=%d\n", 2396 iso->inuse, iso->next, xfer, xfer->nframes)); 2397 2398 if (sc->sc_dying) 2399 return; 2400 2401 if (xfer->status == USBD_IN_PROGRESS) { 2402 /* This request has already been entered into the frame list */ 2403 printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer); 2404 /* XXX */ 2405 } 2406 2407 #ifdef DIAGNOSTIC 2408 if (iso->inuse >= UHCI_VFRAMELIST_COUNT) 2409 printf("uhci_device_isoc_enter: overflow!\n"); 2410 #endif 2411 2412 next = iso->next; 2413 if (next == -1) { 2414 /* Not in use yet, schedule it a few frames ahead. */ 2415 next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT; 2416 DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next)); 2417 } 2418 2419 xfer->status = USBD_IN_PROGRESS; 2420 UXFER(xfer)->curframe = next; 2421 2422 buf = DMAADDR(&xfer->dmabuf, 0); 2423 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) | 2424 UHCI_TD_ACTIVE | 2425 UHCI_TD_IOS); 2426 nframes = xfer->nframes; 2427 s = splusb(); 2428 for (i = 0; i < nframes; i++) { 2429 std = iso->stds[next]; 2430 if (++next >= UHCI_VFRAMELIST_COUNT) 2431 next = 0; 2432 len = xfer->frlengths[i]; 2433 std->td.td_buffer = htole32(buf); 2434 if (i == nframes - 1) 2435 status |= UHCI_TD_IOC; 2436 std->td.td_status = htole32(status); 2437 std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK); 2438 std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len)); 2439 #ifdef UHCI_DEBUG 2440 if (uhcidebug > 5) { 2441 DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i)); 2442 uhci_dump_td(std); 2443 } 2444 #endif 2445 buf += len; 2446 } 2447 iso->next = next; 2448 iso->inuse += xfer->nframes; 2449 2450 splx(s); 2451 } 2452 2453 usbd_status 2454 uhci_device_isoc_start(usbd_xfer_handle xfer) 2455 { 2456 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2457 uhci_softc_t *sc = upipe->pipe.device->bus->hci_private; 2458 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2459 uhci_soft_td_t *end; 2460 int s, i; 2461 2462 DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer)); 2463 2464 if (sc->sc_dying) 2465 return (USBD_IOERROR); 2466 2467 #ifdef DIAGNOSTIC 2468 if (xfer->status != USBD_IN_PROGRESS) 2469 printf("uhci_device_isoc_start: not in progress %p\n", xfer); 2470 #endif 2471 2472 /* Find the last TD */ 2473 i = UXFER(xfer)->curframe + xfer->nframes; 2474 if (i >= UHCI_VFRAMELIST_COUNT) 2475 i -= UHCI_VFRAMELIST_COUNT; 2476 end = upipe->u.iso.stds[i]; 2477 2478 #ifdef DIAGNOSTIC 2479 if (end == NULL) { 2480 printf("uhci_device_isoc_start: end == NULL\n"); 2481 return (USBD_INVAL); 2482 } 2483 #endif 2484 2485 s = splusb(); 2486 2487 /* Set up interrupt info. */ 2488 ii->xfer = xfer; 2489 ii->stdstart = end; 2490 ii->stdend = end; 2491 #ifdef DIAGNOSTIC 2492 if (!ii->isdone) 2493 printf("uhci_device_isoc_start: not done, ii=%p\n", ii); 2494 ii->isdone = 0; 2495 #endif 2496 uhci_add_intr_info(sc, ii); 2497 2498 splx(s); 2499 2500 return (USBD_IN_PROGRESS); 2501 } 2502 2503 void 2504 uhci_device_isoc_abort(usbd_xfer_handle xfer) 2505 { 2506 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2507 uhci_soft_td_t **stds = upipe->u.iso.stds; 2508 uhci_soft_td_t *std; 2509 int i, n, s, nframes, maxlen, len; 2510 2511 s = splusb(); 2512 2513 /* Transfer is already done. */ 2514 if (xfer->status != USBD_NOT_STARTED && 2515 xfer->status != USBD_IN_PROGRESS) { 2516 splx(s); 2517 return; 2518 } 2519 2520 /* Give xfer the requested abort code. */ 2521 xfer->status = USBD_CANCELLED; 2522 2523 /* make hardware ignore it, */ 2524 nframes = xfer->nframes; 2525 n = UXFER(xfer)->curframe; 2526 maxlen = 0; 2527 for (i = 0; i < nframes; i++) { 2528 std = stds[n]; 2529 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 2530 len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token)); 2531 if (len > maxlen) 2532 maxlen = len; 2533 if (++n >= UHCI_VFRAMELIST_COUNT) 2534 n = 0; 2535 } 2536 2537 /* and wait until we are sure the hardware has finished. */ 2538 delay(maxlen); 2539 2540 #ifdef DIAGNOSTIC 2541 UXFER(xfer)->iinfo.isdone = 1; 2542 #endif 2543 /* Run callback and remove from interrupt list. */ 2544 usb_transfer_complete(xfer); 2545 2546 splx(s); 2547 } 2548 2549 void 2550 uhci_device_isoc_close(usbd_pipe_handle pipe) 2551 { 2552 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2553 usbd_device_handle dev = upipe->pipe.device; 2554 uhci_softc_t *sc = dev->bus->hci_private; 2555 uhci_soft_td_t *std, *vstd; 2556 struct iso *iso; 2557 int i, s; 2558 2559 /* 2560 * Make sure all TDs are marked as inactive. 2561 * Wait for completion. 2562 * Unschedule. 2563 * Deallocate. 2564 */ 2565 iso = &upipe->u.iso; 2566 2567 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) 2568 iso->stds[i]->td.td_status &= htole32(~UHCI_TD_ACTIVE); 2569 usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */ 2570 2571 s = splusb(); 2572 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2573 std = iso->stds[i]; 2574 for (vstd = sc->sc_vframes[i].htd; 2575 vstd != NULL && vstd->link.std != std; 2576 vstd = vstd->link.std) 2577 ; 2578 if (vstd == NULL) { 2579 /*panic*/ 2580 printf("uhci_device_isoc_close: %p not found\n", std); 2581 splx(s); 2582 return; 2583 } 2584 vstd->link = std->link; 2585 vstd->td.td_link = std->td.td_link; 2586 uhci_free_std(sc, std); 2587 } 2588 splx(s); 2589 2590 free(iso->stds, M_USBHC); 2591 } 2592 2593 usbd_status 2594 uhci_setup_isoc(usbd_pipe_handle pipe) 2595 { 2596 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2597 usbd_device_handle dev = upipe->pipe.device; 2598 uhci_softc_t *sc = dev->bus->hci_private; 2599 int addr = upipe->pipe.device->address; 2600 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2601 int rd = UE_GET_DIR(endpt) == UE_DIR_IN; 2602 uhci_soft_td_t *std, *vstd; 2603 u_int32_t token; 2604 struct iso *iso; 2605 int i, s; 2606 2607 iso = &upipe->u.iso; 2608 iso->stds = malloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *), 2609 M_USBHC, M_WAITOK); 2610 2611 token = rd ? UHCI_TD_IN (0, endpt, addr, 0) : 2612 UHCI_TD_OUT(0, endpt, addr, 0); 2613 2614 /* Allocate the TDs and mark as inactive; */ 2615 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2616 std = uhci_alloc_std(sc); 2617 if (std == 0) 2618 goto bad; 2619 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 2620 std->td.td_token = htole32(token); 2621 iso->stds[i] = std; 2622 } 2623 2624 /* Insert TDs into schedule. */ 2625 s = splusb(); 2626 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2627 std = iso->stds[i]; 2628 vstd = sc->sc_vframes[i].htd; 2629 std->link = vstd->link; 2630 std->td.td_link = vstd->td.td_link; 2631 vstd->link.std = std; 2632 vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD); 2633 } 2634 splx(s); 2635 2636 iso->next = -1; 2637 iso->inuse = 0; 2638 2639 return (USBD_NORMAL_COMPLETION); 2640 2641 bad: 2642 while (--i >= 0) 2643 uhci_free_std(sc, iso->stds[i]); 2644 free(iso->stds, M_USBHC); 2645 return (USBD_NOMEM); 2646 } 2647 2648 void 2649 uhci_device_isoc_done(usbd_xfer_handle xfer) 2650 { 2651 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2652 2653 DPRINTFN(4, ("uhci_isoc_done: length=%d, busy_free=0x%08x\n", 2654 xfer->actlen, xfer->busy_free)); 2655 2656 if (ii->xfer != xfer) 2657 /* Not on interrupt list, ignore it. */ 2658 return; 2659 2660 if (!uhci_active_intr_info(ii)) 2661 return; 2662 2663 #ifdef DIAGNOSTIC 2664 if (ii->stdend == NULL) { 2665 printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer); 2666 #ifdef UHCI_DEBUG 2667 uhci_dump_ii(ii); 2668 #endif 2669 return; 2670 } 2671 #endif 2672 2673 /* Turn off the interrupt since it is active even if the TD is not. */ 2674 ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC); 2675 2676 uhci_del_intr_info(ii); /* remove from active list */ 2677 } 2678 2679 void 2680 uhci_device_intr_done(usbd_xfer_handle xfer) 2681 { 2682 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2683 uhci_softc_t *sc = ii->sc; 2684 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2685 uhci_soft_qh_t *sqh; 2686 int i, npoll; 2687 2688 DPRINTFN(5, ("uhci_device_intr_done: length=%d\n", xfer->actlen)); 2689 2690 npoll = upipe->u.intr.npoll; 2691 for(i = 0; i < npoll; i++) { 2692 sqh = upipe->u.intr.qhs[i]; 2693 sqh->elink = NULL; 2694 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 2695 } 2696 uhci_free_std_chain(sc, ii->stdstart, NULL); 2697 2698 /* XXX Wasteful. */ 2699 if (xfer->pipe->repeat) { 2700 uhci_soft_td_t *data, *dataend; 2701 2702 DPRINTFN(5,("uhci_device_intr_done: requeing\n")); 2703 2704 /* This alloc cannot fail since we freed the chain above. */ 2705 uhci_alloc_std_chain(upipe, sc, xfer->length, 1, xfer->flags, 2706 &xfer->dmabuf, &data, &dataend); 2707 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2708 2709 #ifdef UHCI_DEBUG 2710 if (uhcidebug > 10) { 2711 DPRINTF(("uhci_device_intr_done: data(1)\n")); 2712 uhci_dump_tds(data); 2713 uhci_dump_qh(upipe->u.intr.qhs[0]); 2714 } 2715 #endif 2716 2717 ii->stdstart = data; 2718 ii->stdend = dataend; 2719 #ifdef DIAGNOSTIC 2720 if (!ii->isdone) { 2721 printf("uhci_device_intr_done: not done, ii=%p\n", ii); 2722 } 2723 ii->isdone = 0; 2724 #endif 2725 for (i = 0; i < npoll; i++) { 2726 sqh = upipe->u.intr.qhs[i]; 2727 sqh->elink = data; 2728 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2729 } 2730 xfer->status = USBD_IN_PROGRESS; 2731 /* The ii is already on the examined list, just leave it. */ 2732 } else { 2733 DPRINTFN(5,("uhci_device_intr_done: removing\n")); 2734 if (uhci_active_intr_info(ii)) 2735 uhci_del_intr_info(ii); 2736 } 2737 } 2738 2739 /* Deallocate request data structures */ 2740 void 2741 uhci_device_ctrl_done(usbd_xfer_handle xfer) 2742 { 2743 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2744 uhci_softc_t *sc = ii->sc; 2745 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2746 2747 #ifdef DIAGNOSTIC 2748 if (!(xfer->rqflags & URQ_REQUEST)) 2749 panic("uhci_device_ctrl_done: not a request"); 2750 #endif 2751 2752 if (!uhci_active_intr_info(ii)) 2753 return; 2754 2755 uhci_del_intr_info(ii); /* remove from active list */ 2756 2757 if (upipe->pipe.device->speed == USB_SPEED_LOW) 2758 uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh); 2759 else 2760 uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh); 2761 2762 if (upipe->u.ctl.length != 0) 2763 uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend); 2764 2765 DPRINTFN(5, ("uhci_device_ctrl_done: length=%d\n", xfer->actlen)); 2766 } 2767 2768 /* Deallocate request data structures */ 2769 void 2770 uhci_device_bulk_done(usbd_xfer_handle xfer) 2771 { 2772 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2773 uhci_softc_t *sc = ii->sc; 2774 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2775 2776 DPRINTFN(5,("uhci_device_bulk_done: xfer=%p ii=%p sc=%p upipe=%p\n", 2777 xfer, ii, sc, upipe)); 2778 2779 if (!uhci_active_intr_info(ii)) 2780 return; 2781 2782 uhci_del_intr_info(ii); /* remove from active list */ 2783 2784 uhci_remove_bulk(sc, upipe->u.bulk.sqh); 2785 2786 uhci_free_std_chain(sc, ii->stdstart, NULL); 2787 2788 DPRINTFN(5, ("uhci_device_bulk_done: length=%d\n", xfer->actlen)); 2789 } 2790 2791 /* Add interrupt QH, called with vflock. */ 2792 void 2793 uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 2794 { 2795 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 2796 uhci_soft_qh_t *eqh; 2797 2798 DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh)); 2799 2800 eqh = vf->eqh; 2801 sqh->hlink = eqh->hlink; 2802 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 2803 eqh->hlink = sqh; 2804 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 2805 vf->eqh = sqh; 2806 vf->bandwidth++; 2807 } 2808 2809 /* Remove interrupt QH. */ 2810 void 2811 uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 2812 { 2813 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 2814 uhci_soft_qh_t *pqh; 2815 2816 DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh)); 2817 2818 /* See comment in uhci_remove_ctrl() */ 2819 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 2820 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 2821 delay(UHCI_QH_REMOVE_DELAY); 2822 } 2823 2824 pqh = uhci_find_prev_qh(vf->hqh, sqh); 2825 pqh->hlink = sqh->hlink; 2826 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 2827 delay(UHCI_QH_REMOVE_DELAY); 2828 if (vf->eqh == sqh) 2829 vf->eqh = pqh; 2830 vf->bandwidth--; 2831 } 2832 2833 usbd_status 2834 uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival) 2835 { 2836 uhci_soft_qh_t *sqh; 2837 int i, npoll, s; 2838 u_int bestbw, bw, bestoffs, offs; 2839 2840 DPRINTFN(2, ("uhci_device_setintr: pipe=%p\n", upipe)); 2841 if (ival == 0) { 2842 printf("uhci_device_setintr: 0 interval\n"); 2843 return (USBD_INVAL); 2844 } 2845 2846 if (ival > UHCI_VFRAMELIST_COUNT) 2847 ival = UHCI_VFRAMELIST_COUNT; 2848 npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival; 2849 DPRINTFN(2, ("uhci_device_setintr: ival=%d npoll=%d\n", ival, npoll)); 2850 2851 upipe->u.intr.npoll = npoll; 2852 upipe->u.intr.qhs = 2853 malloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_WAITOK); 2854 2855 /* 2856 * Figure out which offset in the schedule that has most 2857 * bandwidth left over. 2858 */ 2859 #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1)) 2860 for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) { 2861 for (bw = i = 0; i < npoll; i++) 2862 bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth; 2863 if (bw < bestbw) { 2864 bestbw = bw; 2865 bestoffs = offs; 2866 } 2867 } 2868 DPRINTFN(1, ("uhci_device_setintr: bw=%d offs=%d\n", bestbw, bestoffs)); 2869 2870 for(i = 0; i < npoll; i++) { 2871 upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc); 2872 sqh->elink = NULL; 2873 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 2874 sqh->pos = MOD(i * ival + bestoffs); 2875 } 2876 #undef MOD 2877 2878 s = splusb(); 2879 /* Enter QHs into the controller data structures. */ 2880 for(i = 0; i < npoll; i++) 2881 uhci_add_intr(sc, upipe->u.intr.qhs[i]); 2882 splx(s); 2883 2884 DPRINTFN(5, ("uhci_device_setintr: returns %p\n", upipe)); 2885 return (USBD_NORMAL_COMPLETION); 2886 } 2887 2888 /* Open a new pipe. */ 2889 usbd_status 2890 uhci_open(usbd_pipe_handle pipe) 2891 { 2892 uhci_softc_t *sc = pipe->device->bus->hci_private; 2893 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2894 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 2895 usbd_status err; 2896 int ival; 2897 2898 DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 2899 pipe, pipe->device->address, 2900 ed->bEndpointAddress, sc->sc_addr)); 2901 2902 upipe->aborting = 0; 2903 upipe->nexttoggle = 0; 2904 2905 if (pipe->device->address == sc->sc_addr) { 2906 switch (ed->bEndpointAddress) { 2907 case USB_CONTROL_ENDPOINT: 2908 pipe->methods = &uhci_root_ctrl_methods; 2909 break; 2910 case UE_DIR_IN | UHCI_INTR_ENDPT: 2911 pipe->methods = &uhci_root_intr_methods; 2912 break; 2913 default: 2914 return (USBD_INVAL); 2915 } 2916 } else { 2917 switch (ed->bmAttributes & UE_XFERTYPE) { 2918 case UE_CONTROL: 2919 pipe->methods = &uhci_device_ctrl_methods; 2920 upipe->u.ctl.sqh = uhci_alloc_sqh(sc); 2921 if (upipe->u.ctl.sqh == NULL) 2922 goto bad; 2923 upipe->u.ctl.setup = uhci_alloc_std(sc); 2924 if (upipe->u.ctl.setup == NULL) { 2925 uhci_free_sqh(sc, upipe->u.ctl.sqh); 2926 goto bad; 2927 } 2928 upipe->u.ctl.stat = uhci_alloc_std(sc); 2929 if (upipe->u.ctl.stat == NULL) { 2930 uhci_free_sqh(sc, upipe->u.ctl.sqh); 2931 uhci_free_std(sc, upipe->u.ctl.setup); 2932 goto bad; 2933 } 2934 err = usb_allocmem(&sc->sc_bus, 2935 sizeof(usb_device_request_t), 2936 0, &upipe->u.ctl.reqdma); 2937 if (err) { 2938 uhci_free_sqh(sc, upipe->u.ctl.sqh); 2939 uhci_free_std(sc, upipe->u.ctl.setup); 2940 uhci_free_std(sc, upipe->u.ctl.stat); 2941 goto bad; 2942 } 2943 break; 2944 case UE_INTERRUPT: 2945 pipe->methods = &uhci_device_intr_methods; 2946 ival = pipe->interval; 2947 if (ival == USBD_DEFAULT_INTERVAL) 2948 ival = ed->bInterval; 2949 return (uhci_device_setintr(sc, upipe, ival)); 2950 case UE_ISOCHRONOUS: 2951 pipe->methods = &uhci_device_isoc_methods; 2952 return (uhci_setup_isoc(pipe)); 2953 case UE_BULK: 2954 pipe->methods = &uhci_device_bulk_methods; 2955 upipe->u.bulk.sqh = uhci_alloc_sqh(sc); 2956 if (upipe->u.bulk.sqh == NULL) 2957 goto bad; 2958 break; 2959 } 2960 } 2961 return (USBD_NORMAL_COMPLETION); 2962 2963 bad: 2964 return (USBD_NOMEM); 2965 } 2966 2967 /* 2968 * Data structures and routines to emulate the root hub. 2969 */ 2970 usb_device_descriptor_t uhci_devd = { 2971 USB_DEVICE_DESCRIPTOR_SIZE, 2972 UDESC_DEVICE, /* type */ 2973 {0x00, 0x01}, /* USB version */ 2974 UDCLASS_HUB, /* class */ 2975 UDSUBCLASS_HUB, /* subclass */ 2976 UDPROTO_FSHUB, /* protocol */ 2977 64, /* max packet */ 2978 {0},{0},{0x00,0x01}, /* device id */ 2979 1,2,0, /* string indicies */ 2980 1 /* # of configurations */ 2981 }; 2982 2983 const usb_config_descriptor_t uhci_confd = { 2984 USB_CONFIG_DESCRIPTOR_SIZE, 2985 UDESC_CONFIG, 2986 {USB_CONFIG_DESCRIPTOR_SIZE + 2987 USB_INTERFACE_DESCRIPTOR_SIZE + 2988 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2989 1, 2990 1, 2991 0, 2992 UC_ATTR_MBO | UC_SELF_POWERED, 2993 0 /* max power */ 2994 }; 2995 2996 const usb_interface_descriptor_t uhci_ifcd = { 2997 USB_INTERFACE_DESCRIPTOR_SIZE, 2998 UDESC_INTERFACE, 2999 0, 3000 0, 3001 1, 3002 UICLASS_HUB, 3003 UISUBCLASS_HUB, 3004 UIPROTO_FSHUB, 3005 0 3006 }; 3007 3008 const usb_endpoint_descriptor_t uhci_endpd = { 3009 USB_ENDPOINT_DESCRIPTOR_SIZE, 3010 UDESC_ENDPOINT, 3011 UE_DIR_IN | UHCI_INTR_ENDPT, 3012 UE_INTERRUPT, 3013 {8}, 3014 255 3015 }; 3016 3017 const usb_hub_descriptor_t uhci_hubd_piix = { 3018 USB_HUB_DESCRIPTOR_SIZE, 3019 UDESC_HUB, 3020 2, 3021 { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 }, 3022 50, /* power on to power good */ 3023 0, 3024 { 0x00 }, /* both ports are removable */ 3025 { 0 }, 3026 }; 3027 3028 /* 3029 * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also 3030 * enables the port, and also states that SET_FEATURE(PORT_ENABLE) 3031 * should not be used by the USB subsystem. As we cannot issue a 3032 * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port 3033 * will be enabled as part of the reset. 3034 * 3035 * On the VT83C572, the port cannot be successfully enabled until the 3036 * outstanding "port enable change" and "connection status change" 3037 * events have been reset. 3038 */ 3039 Static usbd_status 3040 uhci_portreset(uhci_softc_t *sc, int index) 3041 { 3042 int lim, port, x; 3043 3044 if (index == 1) 3045 port = UHCI_PORTSC1; 3046 else if (index == 2) 3047 port = UHCI_PORTSC2; 3048 else 3049 return (USBD_IOERROR); 3050 3051 x = URWMASK(UREAD2(sc, port)); 3052 UWRITE2(sc, port, x | UHCI_PORTSC_PR); 3053 3054 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 3055 3056 DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n", 3057 index, UREAD2(sc, port))); 3058 3059 x = URWMASK(UREAD2(sc, port)); 3060 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 3061 3062 delay(100); 3063 3064 DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n", 3065 index, UREAD2(sc, port))); 3066 3067 x = URWMASK(UREAD2(sc, port)); 3068 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3069 3070 for (lim = 10; --lim > 0;) { 3071 usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY); 3072 3073 x = UREAD2(sc, port); 3074 3075 DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n", 3076 index, lim, x)); 3077 3078 if (!(x & UHCI_PORTSC_CCS)) { 3079 /* 3080 * No device is connected (or was disconnected 3081 * during reset). Consider the port reset. 3082 * The delay must be long enough to ensure on 3083 * the initial iteration that the device 3084 * connection will have been registered. 50ms 3085 * appears to be sufficient, but 20ms is not. 3086 */ 3087 DPRINTFN(3,("uhci port %d loop %u, device detached\n", 3088 index, lim)); 3089 break; 3090 } 3091 3092 if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) { 3093 /* 3094 * Port enabled changed and/or connection 3095 * status changed were set. Reset either or 3096 * both raised flags (by writing a 1 to that 3097 * bit), and wait again for state to settle. 3098 */ 3099 UWRITE2(sc, port, URWMASK(x) | 3100 (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC))); 3101 continue; 3102 } 3103 3104 if (x & UHCI_PORTSC_PE) 3105 /* Port is enabled */ 3106 break; 3107 3108 UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE); 3109 } 3110 3111 DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n", 3112 index, UREAD2(sc, port))); 3113 3114 if (lim <= 0) { 3115 DPRINTFN(1,("uhci port %d reset timed out\n", index)); 3116 return (USBD_TIMEOUT); 3117 } 3118 3119 sc->sc_isreset = 1; 3120 return (USBD_NORMAL_COMPLETION); 3121 } 3122 3123 /* 3124 * Simulate a hardware hub by handling all the necessary requests. 3125 */ 3126 usbd_status 3127 uhci_root_ctrl_transfer(usbd_xfer_handle xfer) 3128 { 3129 usbd_status err; 3130 3131 /* Insert last in queue. */ 3132 err = usb_insert_transfer(xfer); 3133 if (err) 3134 return (err); 3135 3136 /* 3137 * Pipe isn't running (otherwise err would be USBD_INPROG), 3138 * so start it first. 3139 */ 3140 return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3141 } 3142 3143 usbd_status 3144 uhci_root_ctrl_start(usbd_xfer_handle xfer) 3145 { 3146 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3147 usb_device_request_t *req; 3148 void *buf = NULL; 3149 int port, x; 3150 int s, len, value, index, status, change, l, totlen = 0; 3151 usb_port_status_t ps; 3152 usbd_status err; 3153 3154 if (sc->sc_dying) 3155 return (USBD_IOERROR); 3156 3157 #ifdef DIAGNOSTIC 3158 if (!(xfer->rqflags & URQ_REQUEST)) 3159 panic("uhci_root_ctrl_transfer: not a request"); 3160 #endif 3161 req = &xfer->request; 3162 3163 DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n", 3164 req->bmRequestType, req->bRequest)); 3165 3166 len = UGETW(req->wLength); 3167 value = UGETW(req->wValue); 3168 index = UGETW(req->wIndex); 3169 3170 if (len != 0) 3171 buf = KERNADDR(&xfer->dmabuf, 0); 3172 3173 #define C(x,y) ((x) | ((y) << 8)) 3174 switch(C(req->bRequest, req->bmRequestType)) { 3175 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 3176 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 3177 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 3178 /* 3179 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 3180 * for the integrated root hub. 3181 */ 3182 break; 3183 case C(UR_GET_CONFIG, UT_READ_DEVICE): 3184 if (len > 0) { 3185 *(u_int8_t *)buf = sc->sc_conf; 3186 totlen = 1; 3187 } 3188 break; 3189 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 3190 DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value)); 3191 if (len == 0) 3192 break; 3193 switch(value >> 8) { 3194 case UDESC_DEVICE: 3195 if ((value & 0xff) != 0) { 3196 err = USBD_IOERROR; 3197 goto ret; 3198 } 3199 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 3200 USETW(uhci_devd.idVendor, sc->sc_id_vendor); 3201 memcpy(buf, &uhci_devd, l); 3202 break; 3203 case UDESC_CONFIG: 3204 if ((value & 0xff) != 0) { 3205 err = USBD_IOERROR; 3206 goto ret; 3207 } 3208 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 3209 memcpy(buf, &uhci_confd, l); 3210 buf = (char *)buf + l; 3211 len -= l; 3212 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 3213 totlen += l; 3214 memcpy(buf, &uhci_ifcd, l); 3215 buf = (char *)buf + l; 3216 len -= l; 3217 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 3218 totlen += l; 3219 memcpy(buf, &uhci_endpd, l); 3220 break; 3221 case UDESC_STRING: 3222 #define sd ((usb_string_descriptor_t *)buf) 3223 switch (value & 0xff) { 3224 case 0: /* Language table */ 3225 totlen = usb_makelangtbl(sd, len); 3226 break; 3227 case 1: /* Vendor */ 3228 totlen = usb_makestrdesc(sd, len, 3229 sc->sc_vendor); 3230 break; 3231 case 2: /* Product */ 3232 totlen = usb_makestrdesc(sd, len, 3233 "UHCI root hub"); 3234 break; 3235 } 3236 #undef sd 3237 break; 3238 default: 3239 err = USBD_IOERROR; 3240 goto ret; 3241 } 3242 break; 3243 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 3244 if (len > 0) { 3245 *(u_int8_t *)buf = 0; 3246 totlen = 1; 3247 } 3248 break; 3249 case C(UR_GET_STATUS, UT_READ_DEVICE): 3250 if (len > 1) { 3251 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 3252 totlen = 2; 3253 } 3254 break; 3255 case C(UR_GET_STATUS, UT_READ_INTERFACE): 3256 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 3257 if (len > 1) { 3258 USETW(((usb_status_t *)buf)->wStatus, 0); 3259 totlen = 2; 3260 } 3261 break; 3262 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 3263 if (value >= USB_MAX_DEVICES) { 3264 err = USBD_IOERROR; 3265 goto ret; 3266 } 3267 sc->sc_addr = value; 3268 break; 3269 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 3270 if (value != 0 && value != 1) { 3271 err = USBD_IOERROR; 3272 goto ret; 3273 } 3274 sc->sc_conf = value; 3275 break; 3276 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 3277 break; 3278 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 3279 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 3280 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 3281 err = USBD_IOERROR; 3282 goto ret; 3283 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 3284 break; 3285 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 3286 break; 3287 /* Hub requests */ 3288 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 3289 break; 3290 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 3291 DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 3292 "port=%d feature=%d\n", 3293 index, value)); 3294 if (index == 1) 3295 port = UHCI_PORTSC1; 3296 else if (index == 2) 3297 port = UHCI_PORTSC2; 3298 else { 3299 err = USBD_IOERROR; 3300 goto ret; 3301 } 3302 switch(value) { 3303 case UHF_PORT_ENABLE: 3304 x = URWMASK(UREAD2(sc, port)); 3305 UWRITE2(sc, port, x & ~UHCI_PORTSC_PE); 3306 break; 3307 case UHF_PORT_SUSPEND: 3308 x = URWMASK(UREAD2(sc, port)); 3309 UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP); 3310 break; 3311 case UHF_PORT_RESET: 3312 x = URWMASK(UREAD2(sc, port)); 3313 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 3314 break; 3315 case UHF_C_PORT_CONNECTION: 3316 x = URWMASK(UREAD2(sc, port)); 3317 UWRITE2(sc, port, x | UHCI_PORTSC_CSC); 3318 break; 3319 case UHF_C_PORT_ENABLE: 3320 x = URWMASK(UREAD2(sc, port)); 3321 UWRITE2(sc, port, x | UHCI_PORTSC_POEDC); 3322 break; 3323 case UHF_C_PORT_OVER_CURRENT: 3324 x = URWMASK(UREAD2(sc, port)); 3325 UWRITE2(sc, port, x | UHCI_PORTSC_OCIC); 3326 break; 3327 case UHF_C_PORT_RESET: 3328 sc->sc_isreset = 0; 3329 err = USBD_NORMAL_COMPLETION; 3330 goto ret; 3331 case UHF_PORT_CONNECTION: 3332 case UHF_PORT_OVER_CURRENT: 3333 case UHF_PORT_POWER: 3334 case UHF_PORT_LOW_SPEED: 3335 case UHF_C_PORT_SUSPEND: 3336 default: 3337 err = USBD_IOERROR; 3338 goto ret; 3339 } 3340 break; 3341 case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER): 3342 if (index == 1) 3343 port = UHCI_PORTSC1; 3344 else if (index == 2) 3345 port = UHCI_PORTSC2; 3346 else { 3347 err = USBD_IOERROR; 3348 goto ret; 3349 } 3350 if (len > 0) { 3351 *(u_int8_t *)buf = 3352 (UREAD2(sc, port) & UHCI_PORTSC_LS) >> 3353 UHCI_PORTSC_LS_SHIFT; 3354 totlen = 1; 3355 } 3356 break; 3357 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 3358 if (len == 0) 3359 break; 3360 if ((value & 0xff) != 0) { 3361 err = USBD_IOERROR; 3362 goto ret; 3363 } 3364 l = min(len, USB_HUB_DESCRIPTOR_SIZE); 3365 totlen = l; 3366 memcpy(buf, &uhci_hubd_piix, l); 3367 break; 3368 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 3369 if (len != 4) { 3370 err = USBD_IOERROR; 3371 goto ret; 3372 } 3373 memset(buf, 0, len); 3374 totlen = len; 3375 break; 3376 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 3377 if (index == 1) 3378 port = UHCI_PORTSC1; 3379 else if (index == 2) 3380 port = UHCI_PORTSC2; 3381 else { 3382 err = USBD_IOERROR; 3383 goto ret; 3384 } 3385 if (len != 4) { 3386 err = USBD_IOERROR; 3387 goto ret; 3388 } 3389 x = UREAD2(sc, port); 3390 status = change = 0; 3391 if (x & UHCI_PORTSC_CCS) 3392 status |= UPS_CURRENT_CONNECT_STATUS; 3393 if (x & UHCI_PORTSC_CSC) 3394 change |= UPS_C_CONNECT_STATUS; 3395 if (x & UHCI_PORTSC_PE) 3396 status |= UPS_PORT_ENABLED; 3397 if (x & UHCI_PORTSC_POEDC) 3398 change |= UPS_C_PORT_ENABLED; 3399 if (x & UHCI_PORTSC_OCI) 3400 status |= UPS_OVERCURRENT_INDICATOR; 3401 if (x & UHCI_PORTSC_OCIC) 3402 change |= UPS_C_OVERCURRENT_INDICATOR; 3403 if (x & UHCI_PORTSC_SUSP) 3404 status |= UPS_SUSPEND; 3405 if (x & UHCI_PORTSC_LSDA) 3406 status |= UPS_LOW_SPEED; 3407 status |= UPS_PORT_POWER; 3408 if (sc->sc_isreset) 3409 change |= UPS_C_PORT_RESET; 3410 USETW(ps.wPortStatus, status); 3411 USETW(ps.wPortChange, change); 3412 l = min(len, sizeof ps); 3413 memcpy(buf, &ps, l); 3414 totlen = l; 3415 break; 3416 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 3417 err = USBD_IOERROR; 3418 goto ret; 3419 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 3420 break; 3421 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 3422 if (index == 1) 3423 port = UHCI_PORTSC1; 3424 else if (index == 2) 3425 port = UHCI_PORTSC2; 3426 else { 3427 err = USBD_IOERROR; 3428 goto ret; 3429 } 3430 switch(value) { 3431 case UHF_PORT_ENABLE: 3432 x = URWMASK(UREAD2(sc, port)); 3433 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3434 break; 3435 case UHF_PORT_SUSPEND: 3436 x = URWMASK(UREAD2(sc, port)); 3437 UWRITE2(sc, port, x | UHCI_PORTSC_SUSP); 3438 break; 3439 case UHF_PORT_RESET: 3440 err = uhci_portreset(sc, index); 3441 goto ret; 3442 case UHF_PORT_POWER: 3443 /* Pretend we turned on power */ 3444 err = USBD_NORMAL_COMPLETION; 3445 goto ret; 3446 case UHF_C_PORT_CONNECTION: 3447 case UHF_C_PORT_ENABLE: 3448 case UHF_C_PORT_OVER_CURRENT: 3449 case UHF_PORT_CONNECTION: 3450 case UHF_PORT_OVER_CURRENT: 3451 case UHF_PORT_LOW_SPEED: 3452 case UHF_C_PORT_SUSPEND: 3453 case UHF_C_PORT_RESET: 3454 default: 3455 err = USBD_IOERROR; 3456 goto ret; 3457 } 3458 break; 3459 default: 3460 err = USBD_IOERROR; 3461 goto ret; 3462 } 3463 xfer->actlen = totlen; 3464 err = USBD_NORMAL_COMPLETION; 3465 ret: 3466 xfer->status = err; 3467 s = splusb(); 3468 usb_transfer_complete(xfer); 3469 splx(s); 3470 return (USBD_IN_PROGRESS); 3471 } 3472 3473 /* Abort a root control request. */ 3474 void 3475 uhci_root_ctrl_abort(usbd_xfer_handle xfer) 3476 { 3477 /* Nothing to do, all transfers are synchronous. */ 3478 } 3479 3480 /* Close the root pipe. */ 3481 void 3482 uhci_root_ctrl_close(usbd_pipe_handle pipe) 3483 { 3484 DPRINTF(("uhci_root_ctrl_close\n")); 3485 } 3486 3487 /* Abort a root interrupt request. */ 3488 void 3489 uhci_root_intr_abort(usbd_xfer_handle xfer) 3490 { 3491 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3492 3493 usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, xfer); 3494 sc->sc_intr_xfer = NULL; 3495 3496 if (xfer->pipe->intrxfer == xfer) { 3497 DPRINTF(("uhci_root_intr_abort: remove\n")); 3498 xfer->pipe->intrxfer = 0; 3499 } 3500 xfer->status = USBD_CANCELLED; 3501 #ifdef DIAGNOSTIC 3502 UXFER(xfer)->iinfo.isdone = 1; 3503 #endif 3504 usb_transfer_complete(xfer); 3505 } 3506 3507 usbd_status 3508 uhci_root_intr_transfer(usbd_xfer_handle xfer) 3509 { 3510 usbd_status err; 3511 3512 /* Insert last in queue. */ 3513 err = usb_insert_transfer(xfer); 3514 if (err) 3515 return (err); 3516 3517 /* 3518 * Pipe isn't running (otherwise err would be USBD_INPROG), 3519 * start first 3520 */ 3521 return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3522 } 3523 3524 /* Start a transfer on the root interrupt pipe */ 3525 usbd_status 3526 uhci_root_intr_start(usbd_xfer_handle xfer) 3527 { 3528 usbd_pipe_handle pipe = xfer->pipe; 3529 uhci_softc_t *sc = pipe->device->bus->hci_private; 3530 unsigned int ival; 3531 3532 DPRINTFN(3, ("uhci_root_intr_start: xfer=%p len=%d flags=%d\n", 3533 xfer, xfer->length, xfer->flags)); 3534 3535 if (sc->sc_dying) 3536 return (USBD_IOERROR); 3537 3538 /* XXX temporary variable needed to avoid gcc3 warning */ 3539 ival = xfer->pipe->endpoint->edesc->bInterval; 3540 sc->sc_ival = mstohz(ival); 3541 usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer); 3542 sc->sc_intr_xfer = xfer; 3543 return (USBD_IN_PROGRESS); 3544 } 3545 3546 /* Close the root interrupt pipe. */ 3547 void 3548 uhci_root_intr_close(usbd_pipe_handle pipe) 3549 { 3550 uhci_softc_t *sc = pipe->device->bus->hci_private; 3551 3552 usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, sc->sc_intr_xfer); 3553 sc->sc_intr_xfer = NULL; 3554 DPRINTF(("uhci_root_intr_close\n")); 3555 } 3556