1 /* $NetBSD: uhci.c,v 1.226 2009/04/19 12:32:52 ad Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/uhci.c,v 1.33 1999/11/17 22:33:41 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 2004 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart@augustsson.net) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * USB Universal Host Controller driver. 36 * Handles e.g. PIIX3 and PIIX4. 37 * 38 * UHCI spec: http://developer.intel.com/design/USB/UHCI11D.htm 39 * USB spec: http://www.usb.org/developers/docs/usbspec.zip 40 * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf 41 * ftp://download.intel.com/design/intarch/datashts/29056201.pdf 42 */ 43 44 #include <sys/cdefs.h> 45 __KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.226 2009/04/19 12:32:52 ad Exp $"); 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/kernel.h> 50 #include <sys/malloc.h> 51 #if defined(__NetBSD__) || defined(__OpenBSD__) 52 #include <sys/device.h> 53 #include <sys/select.h> 54 #include <sys/extent.h> 55 #include <uvm/uvm_extern.h> 56 #elif defined(__FreeBSD__) 57 #include <sys/module.h> 58 #include <sys/bus.h> 59 #include <machine/bus_pio.h> 60 #if defined(DIAGNOSTIC) && defined(__i386__) 61 #include <sys/cpu.h> 62 #endif 63 #endif 64 #include <sys/proc.h> 65 #include <sys/queue.h> 66 #include <sys/bus.h> 67 68 #include <machine/endian.h> 69 70 #include <dev/usb/usb.h> 71 #include <dev/usb/usbdi.h> 72 #include <dev/usb/usbdivar.h> 73 #include <dev/usb/usb_mem.h> 74 #include <dev/usb/usb_quirks.h> 75 76 #include <dev/usb/uhcireg.h> 77 #include <dev/usb/uhcivar.h> 78 #include <dev/usb/usbroothub_subr.h> 79 80 /* Use bandwidth reclamation for control transfers. Some devices choke on it. */ 81 /*#define UHCI_CTL_LOOP */ 82 83 #if defined(__FreeBSD__) 84 #include <machine/clock.h> 85 86 #define delay(d) DELAY(d) 87 #endif 88 89 #if defined(__OpenBSD__) 90 struct cfdriver uhci_cd = { 91 NULL, "uhci", DV_DULL 92 }; 93 #endif 94 95 #ifdef UHCI_DEBUG 96 uhci_softc_t *thesc; 97 #define DPRINTF(x) if (uhcidebug) printf x 98 #define DPRINTFN(n,x) if (uhcidebug>(n)) printf x 99 int uhcidebug = 0; 100 int uhcinoloop = 0; 101 #ifndef __NetBSD__ 102 #define snprintb((q), (f), "%b", q,f,b,l) snprintf((b), (l)) 103 #endif 104 #else 105 #define DPRINTF(x) 106 #define DPRINTFN(n,x) 107 #endif 108 109 /* 110 * The UHCI controller is little endian, so on big endian machines 111 * the data stored in memory needs to be swapped. 112 */ 113 #if defined(__FreeBSD__) || defined(__OpenBSD__) 114 #if BYTE_ORDER == BIG_ENDIAN 115 #define htole32(x) (bswap32(x)) 116 #define le32toh(x) (bswap32(x)) 117 #else 118 #define htole32(x) (x) 119 #define le32toh(x) (x) 120 #endif 121 #endif 122 123 struct uhci_pipe { 124 struct usbd_pipe pipe; 125 int nexttoggle; 126 127 u_char aborting; 128 usbd_xfer_handle abortstart, abortend; 129 130 /* Info needed for different pipe kinds. */ 131 union { 132 /* Control pipe */ 133 struct { 134 uhci_soft_qh_t *sqh; 135 usb_dma_t reqdma; 136 uhci_soft_td_t *setup, *stat; 137 u_int length; 138 } ctl; 139 /* Interrupt pipe */ 140 struct { 141 int npoll; 142 int isread; 143 uhci_soft_qh_t **qhs; 144 } intr; 145 /* Bulk pipe */ 146 struct { 147 uhci_soft_qh_t *sqh; 148 u_int length; 149 int isread; 150 } bulk; 151 /* Iso pipe */ 152 struct iso { 153 uhci_soft_td_t **stds; 154 int next, inuse; 155 } iso; 156 } u; 157 }; 158 159 Static void uhci_globalreset(uhci_softc_t *); 160 Static usbd_status uhci_portreset(uhci_softc_t*, int); 161 Static void uhci_reset(uhci_softc_t *); 162 Static usbd_status uhci_run(uhci_softc_t *, int run); 163 Static uhci_soft_td_t *uhci_alloc_std(uhci_softc_t *); 164 Static void uhci_free_std(uhci_softc_t *, uhci_soft_td_t *); 165 Static uhci_soft_qh_t *uhci_alloc_sqh(uhci_softc_t *); 166 Static void uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *); 167 #if 0 168 Static void uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *, 169 uhci_intr_info_t *); 170 Static void uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *); 171 #endif 172 173 Static void uhci_free_std_chain(uhci_softc_t *, 174 uhci_soft_td_t *, uhci_soft_td_t *); 175 Static usbd_status uhci_alloc_std_chain(struct uhci_pipe *, 176 uhci_softc_t *, int, int, u_int16_t, usb_dma_t *, 177 uhci_soft_td_t **, uhci_soft_td_t **); 178 Static void uhci_poll_hub(void *); 179 Static void uhci_waitintr(uhci_softc_t *, usbd_xfer_handle); 180 Static void uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *); 181 Static void uhci_idone(uhci_intr_info_t *); 182 183 Static void uhci_abort_xfer(usbd_xfer_handle, usbd_status status); 184 185 Static void uhci_timeout(void *); 186 Static void uhci_timeout_task(void *); 187 Static void uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 188 Static void uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 189 Static void uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *); 190 Static void uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 191 Static void uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 192 Static void uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *); 193 Static void uhci_add_loop(uhci_softc_t *sc); 194 Static void uhci_rem_loop(uhci_softc_t *sc); 195 196 Static usbd_status uhci_setup_isoc(usbd_pipe_handle pipe); 197 Static void uhci_device_isoc_enter(usbd_xfer_handle); 198 199 Static usbd_status uhci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 200 Static void uhci_freem(struct usbd_bus *, usb_dma_t *); 201 202 Static usbd_xfer_handle uhci_allocx(struct usbd_bus *); 203 Static void uhci_freex(struct usbd_bus *, usbd_xfer_handle); 204 205 Static usbd_status uhci_device_ctrl_transfer(usbd_xfer_handle); 206 Static usbd_status uhci_device_ctrl_start(usbd_xfer_handle); 207 Static void uhci_device_ctrl_abort(usbd_xfer_handle); 208 Static void uhci_device_ctrl_close(usbd_pipe_handle); 209 Static void uhci_device_ctrl_done(usbd_xfer_handle); 210 211 Static usbd_status uhci_device_intr_transfer(usbd_xfer_handle); 212 Static usbd_status uhci_device_intr_start(usbd_xfer_handle); 213 Static void uhci_device_intr_abort(usbd_xfer_handle); 214 Static void uhci_device_intr_close(usbd_pipe_handle); 215 Static void uhci_device_intr_done(usbd_xfer_handle); 216 217 Static usbd_status uhci_device_bulk_transfer(usbd_xfer_handle); 218 Static usbd_status uhci_device_bulk_start(usbd_xfer_handle); 219 Static void uhci_device_bulk_abort(usbd_xfer_handle); 220 Static void uhci_device_bulk_close(usbd_pipe_handle); 221 Static void uhci_device_bulk_done(usbd_xfer_handle); 222 223 Static usbd_status uhci_device_isoc_transfer(usbd_xfer_handle); 224 Static usbd_status uhci_device_isoc_start(usbd_xfer_handle); 225 Static void uhci_device_isoc_abort(usbd_xfer_handle); 226 Static void uhci_device_isoc_close(usbd_pipe_handle); 227 Static void uhci_device_isoc_done(usbd_xfer_handle); 228 229 Static usbd_status uhci_root_ctrl_transfer(usbd_xfer_handle); 230 Static usbd_status uhci_root_ctrl_start(usbd_xfer_handle); 231 Static void uhci_root_ctrl_abort(usbd_xfer_handle); 232 Static void uhci_root_ctrl_close(usbd_pipe_handle); 233 Static void uhci_root_ctrl_done(usbd_xfer_handle); 234 235 Static usbd_status uhci_root_intr_transfer(usbd_xfer_handle); 236 Static usbd_status uhci_root_intr_start(usbd_xfer_handle); 237 Static void uhci_root_intr_abort(usbd_xfer_handle); 238 Static void uhci_root_intr_close(usbd_pipe_handle); 239 Static void uhci_root_intr_done(usbd_xfer_handle); 240 241 Static usbd_status uhci_open(usbd_pipe_handle); 242 Static void uhci_poll(struct usbd_bus *); 243 Static void uhci_softintr(void *); 244 245 Static usbd_status uhci_device_request(usbd_xfer_handle xfer); 246 247 Static void uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *); 248 Static void uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *); 249 Static usbd_status uhci_device_setintr(uhci_softc_t *sc, 250 struct uhci_pipe *pipe, int ival); 251 252 Static void uhci_device_clear_toggle(usbd_pipe_handle pipe); 253 Static void uhci_noop(usbd_pipe_handle pipe); 254 255 Static inline uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *, 256 uhci_soft_qh_t *); 257 258 #ifdef UHCI_DEBUG 259 Static void uhci_dump_all(uhci_softc_t *); 260 Static void uhci_dumpregs(uhci_softc_t *); 261 Static void uhci_dump_qhs(uhci_soft_qh_t *); 262 Static void uhci_dump_qh(uhci_soft_qh_t *); 263 Static void uhci_dump_tds(uhci_soft_td_t *); 264 Static void uhci_dump_td(uhci_soft_td_t *); 265 Static void uhci_dump_ii(uhci_intr_info_t *ii); 266 void uhci_dump(void); 267 #endif 268 269 #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 270 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 271 #define UWRITE1(sc, r, x) \ 272 do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \ 273 } while (/*CONSTCOND*/0) 274 #define UWRITE2(sc, r, x) \ 275 do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \ 276 } while (/*CONSTCOND*/0) 277 #define UWRITE4(sc, r, x) \ 278 do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \ 279 } while (/*CONSTCOND*/0) 280 static __inline uint8_t 281 UREAD1(uhci_softc_t *sc, bus_size_t r) 282 { 283 284 UBARR(sc); 285 return bus_space_read_1(sc->iot, sc->ioh, r); 286 } 287 288 static __inline uint16_t 289 UREAD2(uhci_softc_t *sc, bus_size_t r) 290 { 291 292 UBARR(sc); 293 return bus_space_read_2(sc->iot, sc->ioh, r); 294 } 295 296 static __inline uint32_t 297 UREAD4(uhci_softc_t *sc, bus_size_t r) 298 { 299 300 UBARR(sc); 301 return bus_space_read_4(sc->iot, sc->ioh, r); 302 } 303 304 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd) 305 #define UHCISTS(sc) UREAD2(sc, UHCI_STS) 306 307 #define UHCI_RESET_TIMEOUT 100 /* ms, reset timeout */ 308 309 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK) 310 311 #define UHCI_INTR_ENDPT 1 312 313 const struct usbd_bus_methods uhci_bus_methods = { 314 uhci_open, 315 uhci_softintr, 316 uhci_poll, 317 uhci_allocm, 318 uhci_freem, 319 uhci_allocx, 320 uhci_freex, 321 }; 322 323 const struct usbd_pipe_methods uhci_root_ctrl_methods = { 324 uhci_root_ctrl_transfer, 325 uhci_root_ctrl_start, 326 uhci_root_ctrl_abort, 327 uhci_root_ctrl_close, 328 uhci_noop, 329 uhci_root_ctrl_done, 330 }; 331 332 const struct usbd_pipe_methods uhci_root_intr_methods = { 333 uhci_root_intr_transfer, 334 uhci_root_intr_start, 335 uhci_root_intr_abort, 336 uhci_root_intr_close, 337 uhci_noop, 338 uhci_root_intr_done, 339 }; 340 341 const struct usbd_pipe_methods uhci_device_ctrl_methods = { 342 uhci_device_ctrl_transfer, 343 uhci_device_ctrl_start, 344 uhci_device_ctrl_abort, 345 uhci_device_ctrl_close, 346 uhci_noop, 347 uhci_device_ctrl_done, 348 }; 349 350 const struct usbd_pipe_methods uhci_device_intr_methods = { 351 uhci_device_intr_transfer, 352 uhci_device_intr_start, 353 uhci_device_intr_abort, 354 uhci_device_intr_close, 355 uhci_device_clear_toggle, 356 uhci_device_intr_done, 357 }; 358 359 const struct usbd_pipe_methods uhci_device_bulk_methods = { 360 uhci_device_bulk_transfer, 361 uhci_device_bulk_start, 362 uhci_device_bulk_abort, 363 uhci_device_bulk_close, 364 uhci_device_clear_toggle, 365 uhci_device_bulk_done, 366 }; 367 368 const struct usbd_pipe_methods uhci_device_isoc_methods = { 369 uhci_device_isoc_transfer, 370 uhci_device_isoc_start, 371 uhci_device_isoc_abort, 372 uhci_device_isoc_close, 373 uhci_noop, 374 uhci_device_isoc_done, 375 }; 376 377 #define uhci_add_intr_info(sc, ii) \ 378 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list) 379 #define uhci_del_intr_info(ii) \ 380 do { \ 381 LIST_REMOVE((ii), list); \ 382 (ii)->list.le_prev = NULL; \ 383 } while (0) 384 #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL) 385 386 Static inline uhci_soft_qh_t * 387 uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh) 388 { 389 DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh)); 390 391 for (; pqh->hlink != sqh; pqh = pqh->hlink) { 392 #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG) 393 usb_syncmem(&pqh->dma, 394 pqh->offs + offsetof(uhci_qh_t, qh_hlink), 395 sizeof(pqh->qh.qh_hlink), 396 BUS_DMASYNC_POSTWRITE); 397 if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) { 398 printf("uhci_find_prev_qh: QH not found\n"); 399 return (NULL); 400 } 401 #endif 402 } 403 return (pqh); 404 } 405 406 void 407 uhci_globalreset(uhci_softc_t *sc) 408 { 409 UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */ 410 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */ 411 UHCICMD(sc, 0); /* do nothing */ 412 } 413 414 usbd_status 415 uhci_init(uhci_softc_t *sc) 416 { 417 usbd_status err; 418 int i, j; 419 uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh; 420 uhci_soft_td_t *std; 421 422 DPRINTFN(1,("uhci_init: start\n")); 423 424 #ifdef UHCI_DEBUG 425 thesc = sc; 426 427 if (uhcidebug > 2) 428 uhci_dumpregs(sc); 429 #endif 430 431 sc->sc_suspend = PWR_RESUME; 432 433 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */ 434 uhci_globalreset(sc); /* reset the controller */ 435 uhci_reset(sc); 436 437 #ifdef __NetBSD__ 438 usb_setup_reserve(sc->sc_dev, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 439 USB_MEM_RESERVE); 440 #endif 441 442 /* Allocate and initialize real frame array. */ 443 err = usb_allocmem(&sc->sc_bus, 444 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 445 UHCI_FRAMELIST_ALIGN, &sc->sc_dma); 446 if (err) 447 return (err); 448 sc->sc_pframes = KERNADDR(&sc->sc_dma, 0); 449 UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */ 450 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/ 451 452 /* 453 * Allocate a TD, inactive, that hangs from the last QH. 454 * This is to avoid a bug in the PIIX that makes it run berserk 455 * otherwise. 456 */ 457 std = uhci_alloc_std(sc); 458 if (std == NULL) 459 return (USBD_NOMEM); 460 std->link.std = NULL; 461 std->td.td_link = htole32(UHCI_PTR_T); 462 std->td.td_status = htole32(0); /* inactive */ 463 std->td.td_token = htole32(0); 464 std->td.td_buffer = htole32(0); 465 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 466 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 467 468 /* Allocate the dummy QH marking the end and used for looping the QHs.*/ 469 lsqh = uhci_alloc_sqh(sc); 470 if (lsqh == NULL) 471 return (USBD_NOMEM); 472 lsqh->hlink = NULL; 473 lsqh->qh.qh_hlink = htole32(UHCI_PTR_T); /* end of QH chain */ 474 lsqh->elink = std; 475 lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD); 476 sc->sc_last_qh = lsqh; 477 usb_syncmem(&lsqh->dma, lsqh->offs, sizeof(lsqh->qh), 478 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 479 480 /* Allocate the dummy QH where bulk traffic will be queued. */ 481 bsqh = uhci_alloc_sqh(sc); 482 if (bsqh == NULL) 483 return (USBD_NOMEM); 484 bsqh->hlink = lsqh; 485 bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH); 486 bsqh->elink = NULL; 487 bsqh->qh.qh_elink = htole32(UHCI_PTR_T); 488 sc->sc_bulk_start = sc->sc_bulk_end = bsqh; 489 usb_syncmem(&bsqh->dma, bsqh->offs, sizeof(bsqh->qh), 490 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 491 492 /* Allocate dummy QH where high speed control traffic will be queued. */ 493 chsqh = uhci_alloc_sqh(sc); 494 if (chsqh == NULL) 495 return (USBD_NOMEM); 496 chsqh->hlink = bsqh; 497 chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH); 498 chsqh->elink = NULL; 499 chsqh->qh.qh_elink = htole32(UHCI_PTR_T); 500 sc->sc_hctl_start = sc->sc_hctl_end = chsqh; 501 usb_syncmem(&chsqh->dma, chsqh->offs, sizeof(chsqh->qh), 502 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 503 504 /* Allocate dummy QH where control traffic will be queued. */ 505 clsqh = uhci_alloc_sqh(sc); 506 if (clsqh == NULL) 507 return (USBD_NOMEM); 508 clsqh->hlink = chsqh; 509 clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH); 510 clsqh->elink = NULL; 511 clsqh->qh.qh_elink = htole32(UHCI_PTR_T); 512 sc->sc_lctl_start = sc->sc_lctl_end = clsqh; 513 usb_syncmem(&clsqh->dma, clsqh->offs, sizeof(clsqh->qh), 514 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 515 516 /* 517 * Make all (virtual) frame list pointers point to the interrupt 518 * queue heads and the interrupt queue heads at the control 519 * queue head and point the physical frame list to the virtual. 520 */ 521 for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 522 std = uhci_alloc_std(sc); 523 sqh = uhci_alloc_sqh(sc); 524 if (std == NULL || sqh == NULL) 525 return (USBD_NOMEM); 526 std->link.sqh = sqh; 527 std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH); 528 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 529 std->td.td_token = htole32(0); 530 std->td.td_buffer = htole32(0); 531 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 532 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 533 sqh->hlink = clsqh; 534 sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH); 535 sqh->elink = NULL; 536 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 537 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 538 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 539 sc->sc_vframes[i].htd = std; 540 sc->sc_vframes[i].etd = std; 541 sc->sc_vframes[i].hqh = sqh; 542 sc->sc_vframes[i].eqh = sqh; 543 for (j = i; 544 j < UHCI_FRAMELIST_COUNT; 545 j += UHCI_VFRAMELIST_COUNT) 546 sc->sc_pframes[j] = htole32(std->physaddr); 547 } 548 usb_syncmem(&sc->sc_dma, 0, 549 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 550 BUS_DMASYNC_PREWRITE); 551 552 553 LIST_INIT(&sc->sc_intrhead); 554 555 SIMPLEQ_INIT(&sc->sc_free_xfers); 556 557 usb_callout_init(sc->sc_poll_handle); 558 559 /* Set up the bus struct. */ 560 sc->sc_bus.methods = &uhci_bus_methods; 561 sc->sc_bus.pipe_size = sizeof(struct uhci_pipe); 562 563 UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */ 564 565 DPRINTFN(1,("uhci_init: enabling\n")); 566 567 err = uhci_run(sc, 1); /* and here we go... */ 568 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE | 569 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */ 570 return err; 571 } 572 573 #if defined(__NetBSD__) || defined(__OpenBSD__) 574 int 575 uhci_activate(device_t self, enum devact act) 576 { 577 struct uhci_softc *sc = device_private(self); 578 int rv = 0; 579 580 switch (act) { 581 case DVACT_ACTIVATE: 582 return (EOPNOTSUPP); 583 584 case DVACT_DEACTIVATE: 585 sc->sc_dying = 1; 586 if (sc->sc_child != NULL) 587 rv = config_deactivate(sc->sc_child); 588 break; 589 } 590 return (rv); 591 } 592 593 void 594 uhci_childdet(device_t self, device_t child) 595 { 596 struct uhci_softc *sc = device_private(self); 597 598 KASSERT(sc->sc_child == child); 599 sc->sc_child = NULL; 600 } 601 602 int 603 uhci_detach(struct uhci_softc *sc, int flags) 604 { 605 usbd_xfer_handle xfer; 606 int rv = 0; 607 608 if (sc->sc_child != NULL) 609 rv = config_detach(sc->sc_child, flags); 610 611 if (rv != 0) 612 return (rv); 613 614 /* Free all xfers associated with this HC. */ 615 for (;;) { 616 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 617 if (xfer == NULL) 618 break; 619 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 620 free(xfer, M_USB); 621 } 622 623 callout_halt(&sc->sc_poll_handle, NULL); 624 callout_destroy(&sc->sc_poll_handle); 625 626 /* XXX free other data structures XXX */ 627 628 return (rv); 629 } 630 #endif 631 632 usbd_status 633 uhci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 634 { 635 struct uhci_softc *sc = bus->hci_private; 636 usbd_status status; 637 u_int32_t n; 638 639 /* 640 * XXX 641 * Since we are allocating a buffer we can assume that we will 642 * need TDs for it. Since we don't want to allocate those from 643 * an interrupt context, we allocate them here and free them again. 644 * This is no guarantee that we'll get the TDs next time... 645 */ 646 n = size / 8; 647 if (n > 16) { 648 u_int32_t i; 649 uhci_soft_td_t **stds; 650 DPRINTF(("uhci_allocm: get %d TDs\n", n)); 651 stds = malloc(sizeof(uhci_soft_td_t *) * n, M_TEMP, 652 M_WAITOK|M_ZERO); 653 for(i=0; i < n; i++) 654 stds[i] = uhci_alloc_std(sc); 655 for(i=0; i < n; i++) 656 if (stds[i] != NULL) 657 uhci_free_std(sc, stds[i]); 658 free(stds, M_TEMP); 659 } 660 661 662 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 663 #ifdef __NetBSD__ 664 if (status == USBD_NOMEM) 665 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 666 #endif 667 return status; 668 } 669 670 void 671 uhci_freem(struct usbd_bus *bus, usb_dma_t *dma) 672 { 673 #ifdef __NetBSD__ 674 if (dma->block->flags & USB_DMA_RESERVE) { 675 usb_reserve_freem(&((struct uhci_softc *)bus)->sc_dma_reserve, 676 dma); 677 return; 678 } 679 #endif 680 usb_freemem(&((struct uhci_softc *)bus)->sc_bus, dma); 681 } 682 683 usbd_xfer_handle 684 uhci_allocx(struct usbd_bus *bus) 685 { 686 struct uhci_softc *sc = bus->hci_private; 687 usbd_xfer_handle xfer; 688 689 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 690 if (xfer != NULL) { 691 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 692 #ifdef DIAGNOSTIC 693 if (xfer->busy_free != XFER_FREE) { 694 printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer, 695 xfer->busy_free); 696 } 697 #endif 698 } else { 699 xfer = malloc(sizeof(struct uhci_xfer), M_USB, M_NOWAIT); 700 } 701 if (xfer != NULL) { 702 memset(xfer, 0, sizeof (struct uhci_xfer)); 703 UXFER(xfer)->iinfo.sc = sc; 704 #ifdef DIAGNOSTIC 705 UXFER(xfer)->iinfo.isdone = 1; 706 xfer->busy_free = XFER_BUSY; 707 #endif 708 } 709 return (xfer); 710 } 711 712 void 713 uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 714 { 715 struct uhci_softc *sc = bus->hci_private; 716 717 #ifdef DIAGNOSTIC 718 if (xfer->busy_free != XFER_BUSY) { 719 printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer, 720 xfer->busy_free); 721 } 722 xfer->busy_free = XFER_FREE; 723 if (!UXFER(xfer)->iinfo.isdone) { 724 printf("uhci_freex: !isdone\n"); 725 } 726 #endif 727 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 728 } 729 730 /* 731 * Handle suspend/resume. 732 * 733 * We need to switch to polling mode here, because this routine is 734 * called from an interrupt context. This is all right since we 735 * are almost suspended anyway. 736 */ 737 bool 738 uhci_resume(device_t dv PMF_FN_ARGS) 739 { 740 uhci_softc_t *sc = device_private(dv); 741 int cmd; 742 int s; 743 744 s = splhardusb(); 745 746 cmd = UREAD2(sc, UHCI_CMD); 747 sc->sc_bus.use_polling++; 748 UWRITE2(sc, UHCI_INTR, 0); 749 uhci_globalreset(sc); 750 uhci_reset(sc); 751 if (cmd & UHCI_CMD_RS) 752 uhci_run(sc, 0); 753 754 /* restore saved state */ 755 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); 756 UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum); 757 UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof); 758 759 UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force resume */ 760 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 761 UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */ 762 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | 763 UHCI_INTR_RIE | UHCI_INTR_IOCE | UHCI_INTR_SPIE); 764 UHCICMD(sc, UHCI_CMD_MAXP); 765 uhci_run(sc, 1); /* and start traffic again */ 766 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 767 sc->sc_bus.use_polling--; 768 if (sc->sc_intr_xfer != NULL) 769 usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, 770 sc->sc_intr_xfer); 771 #ifdef UHCI_DEBUG 772 if (uhcidebug > 2) 773 uhci_dumpregs(sc); 774 #endif 775 776 sc->sc_suspend = PWR_RESUME; 777 splx(s); 778 779 return true; 780 } 781 782 bool 783 uhci_suspend(device_t dv PMF_FN_ARGS) 784 { 785 uhci_softc_t *sc = device_private(dv); 786 int cmd; 787 int s; 788 789 s = splhardusb(); 790 791 cmd = UREAD2(sc, UHCI_CMD); 792 793 #ifdef UHCI_DEBUG 794 if (uhcidebug > 2) 795 uhci_dumpregs(sc); 796 #endif 797 if (sc->sc_intr_xfer != NULL) 798 usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, 799 sc->sc_intr_xfer); 800 sc->sc_suspend = PWR_SUSPEND; 801 sc->sc_bus.use_polling++; 802 803 uhci_run(sc, 0); /* stop the controller */ 804 cmd &= ~UHCI_CMD_RS; 805 806 /* save some state if BIOS doesn't */ 807 sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM); 808 sc->sc_saved_sof = UREAD1(sc, UHCI_SOF); 809 810 UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */ 811 812 UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter suspend */ 813 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 814 sc->sc_bus.use_polling--; 815 816 splx(s); 817 818 return true; 819 } 820 821 #ifdef UHCI_DEBUG 822 Static void 823 uhci_dumpregs(uhci_softc_t *sc) 824 { 825 DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, " 826 "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n", 827 device_xname(sc->sc_dev), 828 UREAD2(sc, UHCI_CMD), 829 UREAD2(sc, UHCI_STS), 830 UREAD2(sc, UHCI_INTR), 831 UREAD2(sc, UHCI_FRNUM), 832 UREAD4(sc, UHCI_FLBASEADDR), 833 UREAD1(sc, UHCI_SOF), 834 UREAD2(sc, UHCI_PORTSC1), 835 UREAD2(sc, UHCI_PORTSC2))); 836 } 837 838 void 839 uhci_dump_td(uhci_soft_td_t *p) 840 { 841 char sbuf[128], sbuf2[128]; 842 843 844 usb_syncmem(&p->dma, p->offs, sizeof(p->td), 845 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 846 DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx " 847 "token=0x%08lx buffer=0x%08lx\n", 848 p, (long)p->physaddr, 849 (long)le32toh(p->td.td_link), 850 (long)le32toh(p->td.td_status), 851 (long)le32toh(p->td.td_token), 852 (long)le32toh(p->td.td_buffer))); 853 854 snprintb(sbuf, sizeof(sbuf), "\20\1T\2Q\3VF", 855 (u_int32_t)le32toh(p->td.td_link)); 856 snprintb(sbuf2, sizeof(sbuf2), 857 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27" 858 "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD", 859 (u_int32_t)le32toh(p->td.td_status)); 860 861 DPRINTFN(-1,(" %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d," 862 "D=%d,maxlen=%d\n", sbuf, sbuf2, 863 UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)), 864 UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)), 865 UHCI_TD_GET_PID(le32toh(p->td.td_token)), 866 UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)), 867 UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)), 868 UHCI_TD_GET_DT(le32toh(p->td.td_token)), 869 UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token)))); 870 usb_syncmem(&p->dma, p->offs, sizeof(p->td), 871 BUS_DMASYNC_PREREAD); 872 } 873 874 void 875 uhci_dump_qh(uhci_soft_qh_t *sqh) 876 { 877 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 878 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 879 DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh, 880 (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink), 881 le32toh(sqh->qh.qh_elink))); 882 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD); 883 } 884 885 886 #if 1 887 void 888 uhci_dump(void) 889 { 890 uhci_dump_all(thesc); 891 } 892 #endif 893 894 void 895 uhci_dump_all(uhci_softc_t *sc) 896 { 897 uhci_dumpregs(sc); 898 printf("intrs=%d\n", sc->sc_bus.no_intrs); 899 /*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/ 900 uhci_dump_qh(sc->sc_lctl_start); 901 } 902 903 904 void 905 uhci_dump_qhs(uhci_soft_qh_t *sqh) 906 { 907 uhci_dump_qh(sqh); 908 909 /* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards 910 * Traverses sideways first, then down. 911 * 912 * QH1 913 * QH2 914 * No QH 915 * TD2.1 916 * TD2.2 917 * TD1.1 918 * etc. 919 * 920 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1. 921 */ 922 923 924 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 925 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 926 if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T)) 927 uhci_dump_qhs(sqh->hlink); 928 else 929 DPRINTF(("No QH\n")); 930 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD); 931 932 if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T)) 933 uhci_dump_tds(sqh->elink); 934 else 935 DPRINTF(("No TD\n")); 936 } 937 938 void 939 uhci_dump_tds(uhci_soft_td_t *std) 940 { 941 uhci_soft_td_t *td; 942 int stop; 943 944 for(td = std; td != NULL; td = td->link.std) { 945 uhci_dump_td(td); 946 947 /* Check whether the link pointer in this TD marks 948 * the link pointer as end of queue. This avoids 949 * printing the free list in case the queue/TD has 950 * already been moved there (seatbelt). 951 */ 952 usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link), 953 sizeof(td->td.td_link), 954 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 955 stop = (le32toh(td->td.td_link) & UHCI_PTR_T || 956 le32toh(td->td.td_link) == 0); 957 usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link), 958 sizeof(td->td.td_link), BUS_DMASYNC_PREREAD); 959 if (stop) 960 break; 961 } 962 } 963 964 Static void 965 uhci_dump_ii(uhci_intr_info_t *ii) 966 { 967 usbd_pipe_handle pipe; 968 usb_endpoint_descriptor_t *ed; 969 usbd_device_handle dev; 970 971 #ifdef DIAGNOSTIC 972 #define DONE ii->isdone 973 #else 974 #define DONE 0 975 #endif 976 if (ii == NULL) { 977 printf("ii NULL\n"); 978 return; 979 } 980 if (ii->xfer == NULL) { 981 printf("ii %p: done=%d xfer=NULL\n", 982 ii, DONE); 983 return; 984 } 985 pipe = ii->xfer->pipe; 986 if (pipe == NULL) { 987 printf("ii %p: done=%d xfer=%p pipe=NULL\n", 988 ii, DONE, ii->xfer); 989 return; 990 } 991 if (pipe->endpoint == NULL) { 992 printf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n", 993 ii, DONE, ii->xfer, pipe); 994 return; 995 } 996 if (pipe->device == NULL) { 997 printf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n", 998 ii, DONE, ii->xfer, pipe); 999 return; 1000 } 1001 ed = pipe->endpoint->edesc; 1002 dev = pipe->device; 1003 printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n", 1004 ii, DONE, ii->xfer, dev, 1005 UGETW(dev->ddesc.idVendor), 1006 UGETW(dev->ddesc.idProduct), 1007 dev->address, pipe, 1008 ed->bEndpointAddress, ed->bmAttributes); 1009 #undef DONE 1010 } 1011 1012 void uhci_dump_iis(struct uhci_softc *sc); 1013 void 1014 uhci_dump_iis(struct uhci_softc *sc) 1015 { 1016 uhci_intr_info_t *ii; 1017 1018 printf("intr_info list:\n"); 1019 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list)) 1020 uhci_dump_ii(ii); 1021 } 1022 1023 void iidump(void); 1024 void iidump(void) { uhci_dump_iis(thesc); } 1025 1026 #endif 1027 1028 /* 1029 * This routine is executed periodically and simulates interrupts 1030 * from the root controller interrupt pipe for port status change. 1031 */ 1032 void 1033 uhci_poll_hub(void *addr) 1034 { 1035 usbd_xfer_handle xfer = addr; 1036 usbd_pipe_handle pipe = xfer->pipe; 1037 uhci_softc_t *sc = pipe->device->bus->hci_private; 1038 int s; 1039 u_char *p; 1040 1041 DPRINTFN(20, ("uhci_poll_hub\n")); 1042 1043 usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer); 1044 1045 p = KERNADDR(&xfer->dmabuf, 0); 1046 p[0] = 0; 1047 if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 1048 p[0] |= 1<<1; 1049 if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 1050 p[0] |= 1<<2; 1051 if (p[0] == 0) 1052 /* No change, try again in a while */ 1053 return; 1054 1055 xfer->actlen = 1; 1056 xfer->status = USBD_NORMAL_COMPLETION; 1057 s = splusb(); 1058 xfer->device->bus->intr_context++; 1059 usb_transfer_complete(xfer); 1060 xfer->device->bus->intr_context--; 1061 splx(s); 1062 } 1063 1064 void 1065 uhci_root_intr_done(usbd_xfer_handle xfer) 1066 { 1067 } 1068 1069 void 1070 uhci_root_ctrl_done(usbd_xfer_handle xfer) 1071 { 1072 } 1073 1074 /* 1075 * Let the last QH loop back to the high speed control transfer QH. 1076 * This is what intel calls "bandwidth reclamation" and improves 1077 * USB performance a lot for some devices. 1078 * If we are already looping, just count it. 1079 */ 1080 void 1081 uhci_add_loop(uhci_softc_t *sc) { 1082 #ifdef UHCI_DEBUG 1083 if (uhcinoloop) 1084 return; 1085 #endif 1086 if (++sc->sc_loops == 1) { 1087 DPRINTFN(5,("uhci_start_loop: add\n")); 1088 /* Note, we don't loop back the soft pointer. */ 1089 sc->sc_last_qh->qh.qh_hlink = 1090 htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH); 1091 usb_syncmem(&sc->sc_last_qh->dma, 1092 sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink), 1093 sizeof(sc->sc_last_qh->qh.qh_hlink), 1094 BUS_DMASYNC_PREWRITE); 1095 } 1096 } 1097 1098 void 1099 uhci_rem_loop(uhci_softc_t *sc) { 1100 #ifdef UHCI_DEBUG 1101 if (uhcinoloop) 1102 return; 1103 #endif 1104 if (--sc->sc_loops == 0) { 1105 DPRINTFN(5,("uhci_end_loop: remove\n")); 1106 sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T); 1107 usb_syncmem(&sc->sc_last_qh->dma, 1108 sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink), 1109 sizeof(sc->sc_last_qh->qh.qh_hlink), 1110 BUS_DMASYNC_PREWRITE); 1111 } 1112 } 1113 1114 /* Add high speed control QH, called at splusb(). */ 1115 void 1116 uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1117 { 1118 uhci_soft_qh_t *eqh; 1119 1120 SPLUSBCHECK; 1121 1122 DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh)); 1123 eqh = sc->sc_hctl_end; 1124 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1125 sizeof(eqh->qh.qh_hlink), 1126 BUS_DMASYNC_POSTWRITE); 1127 sqh->hlink = eqh->hlink; 1128 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1129 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1130 BUS_DMASYNC_PREWRITE); 1131 eqh->hlink = sqh; 1132 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1133 sc->sc_hctl_end = sqh; 1134 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1135 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1136 #ifdef UHCI_CTL_LOOP 1137 uhci_add_loop(sc); 1138 #endif 1139 } 1140 1141 /* Remove high speed control QH, called at splusb(). */ 1142 void 1143 uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1144 { 1145 uhci_soft_qh_t *pqh; 1146 1147 SPLUSBCHECK; 1148 1149 DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh)); 1150 #ifdef UHCI_CTL_LOOP 1151 uhci_rem_loop(sc); 1152 #endif 1153 /* 1154 * The T bit should be set in the elink of the QH so that the HC 1155 * doesn't follow the pointer. This condition may fail if the 1156 * the transferred packet was short so that the QH still points 1157 * at the last used TD. 1158 * In this case we set the T bit and wait a little for the HC 1159 * to stop looking at the TD. 1160 * Note that if the TD chain is large enough, the controller 1161 * may still be looking at the chain at the end of this function. 1162 * uhci_free_std_chain() will make sure the controller stops 1163 * looking at it quickly, but until then we should not change 1164 * sqh->hlink. 1165 */ 1166 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1167 sizeof(sqh->qh.qh_elink), 1168 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1169 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1170 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1171 usb_syncmem(&sqh->dma, 1172 sqh->offs + offsetof(uhci_qh_t, qh_elink), 1173 sizeof(sqh->qh.qh_elink), 1174 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1175 delay(UHCI_QH_REMOVE_DELAY); 1176 } 1177 1178 pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh); 1179 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 1180 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1181 pqh->hlink = sqh->hlink; 1182 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1183 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 1184 sizeof(pqh->qh.qh_hlink), 1185 BUS_DMASYNC_PREWRITE); 1186 delay(UHCI_QH_REMOVE_DELAY); 1187 if (sc->sc_hctl_end == sqh) 1188 sc->sc_hctl_end = pqh; 1189 } 1190 1191 /* Add low speed control QH, called at splusb(). */ 1192 void 1193 uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1194 { 1195 uhci_soft_qh_t *eqh; 1196 1197 SPLUSBCHECK; 1198 1199 DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh)); 1200 eqh = sc->sc_lctl_end; 1201 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1202 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1203 sqh->hlink = eqh->hlink; 1204 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1205 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1206 BUS_DMASYNC_PREWRITE); 1207 eqh->hlink = sqh; 1208 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1209 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1210 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1211 sc->sc_lctl_end = sqh; 1212 } 1213 1214 /* Remove low speed control QH, called at splusb(). */ 1215 void 1216 uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1217 { 1218 uhci_soft_qh_t *pqh; 1219 1220 SPLUSBCHECK; 1221 1222 DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh)); 1223 /* See comment in uhci_remove_hs_ctrl() */ 1224 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1225 sizeof(sqh->qh.qh_elink), 1226 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1227 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1228 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1229 usb_syncmem(&sqh->dma, 1230 sqh->offs + offsetof(uhci_qh_t, qh_elink), 1231 sizeof(sqh->qh.qh_elink), 1232 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1233 delay(UHCI_QH_REMOVE_DELAY); 1234 } 1235 pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh); 1236 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 1237 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1238 pqh->hlink = sqh->hlink; 1239 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1240 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 1241 sizeof(pqh->qh.qh_hlink), 1242 BUS_DMASYNC_PREWRITE); 1243 delay(UHCI_QH_REMOVE_DELAY); 1244 if (sc->sc_lctl_end == sqh) 1245 sc->sc_lctl_end = pqh; 1246 } 1247 1248 /* Add bulk QH, called at splusb(). */ 1249 void 1250 uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1251 { 1252 uhci_soft_qh_t *eqh; 1253 1254 SPLUSBCHECK; 1255 1256 DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh)); 1257 eqh = sc->sc_bulk_end; 1258 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1259 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1260 sqh->hlink = eqh->hlink; 1261 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1262 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1263 BUS_DMASYNC_PREWRITE); 1264 eqh->hlink = sqh; 1265 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1266 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1267 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1268 sc->sc_bulk_end = sqh; 1269 uhci_add_loop(sc); 1270 } 1271 1272 /* Remove bulk QH, called at splusb(). */ 1273 void 1274 uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1275 { 1276 uhci_soft_qh_t *pqh; 1277 1278 SPLUSBCHECK; 1279 1280 DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh)); 1281 uhci_rem_loop(sc); 1282 /* See comment in uhci_remove_hs_ctrl() */ 1283 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1284 sizeof(sqh->qh.qh_elink), 1285 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1286 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1287 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1288 usb_syncmem(&sqh->dma, 1289 sqh->offs + offsetof(uhci_qh_t, qh_elink), 1290 sizeof(sqh->qh.qh_elink), 1291 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1292 delay(UHCI_QH_REMOVE_DELAY); 1293 } 1294 pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh); 1295 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 1296 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1297 pqh->hlink = sqh->hlink; 1298 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1299 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 1300 sizeof(pqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1301 delay(UHCI_QH_REMOVE_DELAY); 1302 if (sc->sc_bulk_end == sqh) 1303 sc->sc_bulk_end = pqh; 1304 } 1305 1306 Static int uhci_intr1(uhci_softc_t *); 1307 1308 int 1309 uhci_intr(void *arg) 1310 { 1311 uhci_softc_t *sc = arg; 1312 1313 if (sc->sc_dying || !device_has_power(sc->sc_dev)) 1314 return (0); 1315 1316 if (sc->sc_bus.use_polling || UREAD2(sc, UHCI_INTR) == 0) { 1317 #ifdef DIAGNOSTIC 1318 DPRINTFN(16, ("uhci_intr: ignored interrupt while polling\n")); 1319 #endif 1320 return (0); 1321 } 1322 1323 return (uhci_intr1(sc)); 1324 } 1325 1326 int 1327 uhci_intr1(uhci_softc_t *sc) 1328 { 1329 int status; 1330 int ack; 1331 1332 #ifdef UHCI_DEBUG 1333 if (uhcidebug > 15) { 1334 DPRINTF(("%s: uhci_intr1\n", device_xname(sc->sc_dev))); 1335 uhci_dumpregs(sc); 1336 } 1337 #endif 1338 1339 status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS; 1340 if (status == 0) /* The interrupt was not for us. */ 1341 return (0); 1342 1343 if (sc->sc_suspend != PWR_RESUME) { 1344 #ifdef DIAGNOSTIC 1345 printf("%s: interrupt while not operating ignored\n", 1346 device_xname(sc->sc_dev)); 1347 #endif 1348 UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */ 1349 return (0); 1350 } 1351 1352 ack = 0; 1353 if (status & UHCI_STS_USBINT) 1354 ack |= UHCI_STS_USBINT; 1355 if (status & UHCI_STS_USBEI) 1356 ack |= UHCI_STS_USBEI; 1357 if (status & UHCI_STS_RD) { 1358 ack |= UHCI_STS_RD; 1359 #ifdef UHCI_DEBUG 1360 printf("%s: resume detect\n", device_xname(sc->sc_dev)); 1361 #endif 1362 } 1363 if (status & UHCI_STS_HSE) { 1364 ack |= UHCI_STS_HSE; 1365 printf("%s: host system error\n", device_xname(sc->sc_dev)); 1366 } 1367 if (status & UHCI_STS_HCPE) { 1368 ack |= UHCI_STS_HCPE; 1369 printf("%s: host controller process error\n", 1370 device_xname(sc->sc_dev)); 1371 } 1372 if (status & UHCI_STS_HCH) { 1373 /* no acknowledge needed */ 1374 if (!sc->sc_dying) { 1375 printf("%s: host controller halted\n", 1376 device_xname(sc->sc_dev)); 1377 #ifdef UHCI_DEBUG 1378 uhci_dump_all(sc); 1379 #endif 1380 } 1381 sc->sc_dying = 1; 1382 } 1383 1384 if (!ack) 1385 return (0); /* nothing to acknowledge */ 1386 UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */ 1387 1388 sc->sc_bus.no_intrs++; 1389 usb_schedsoftintr(&sc->sc_bus); 1390 1391 DPRINTFN(15, ("%s: uhci_intr: exit\n", device_xname(sc->sc_dev))); 1392 1393 return (1); 1394 } 1395 1396 void 1397 uhci_softintr(void *v) 1398 { 1399 struct usbd_bus *bus = v; 1400 uhci_softc_t *sc = bus->hci_private; 1401 uhci_intr_info_t *ii, *nextii; 1402 1403 DPRINTFN(10,("%s: uhci_softintr (%d)\n", device_xname(sc->sc_dev), 1404 sc->sc_bus.intr_context)); 1405 1406 sc->sc_bus.intr_context++; 1407 1408 /* 1409 * Interrupts on UHCI really suck. When the host controller 1410 * interrupts because a transfer is completed there is no 1411 * way of knowing which transfer it was. You can scan down 1412 * the TDs and QHs of the previous frame to limit the search, 1413 * but that assumes that the interrupt was not delayed by more 1414 * than 1 ms, which may not always be true (e.g. after debug 1415 * output on a slow console). 1416 * We scan all interrupt descriptors to see if any have 1417 * completed. 1418 */ 1419 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = nextii) { 1420 nextii = LIST_NEXT(ii, list); 1421 uhci_check_intr(sc, ii); 1422 } 1423 1424 #ifdef USB_USE_SOFTINTR 1425 if (sc->sc_softwake) { 1426 sc->sc_softwake = 0; 1427 wakeup(&sc->sc_softwake); 1428 } 1429 #endif /* USB_USE_SOFTINTR */ 1430 1431 sc->sc_bus.intr_context--; 1432 } 1433 1434 /* Check for an interrupt. */ 1435 void 1436 uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii) 1437 { 1438 uhci_soft_td_t *std, *lstd; 1439 u_int32_t status; 1440 1441 DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii)); 1442 #ifdef DIAGNOSTIC 1443 if (ii == NULL) { 1444 printf("uhci_check_intr: no ii? %p\n", ii); 1445 return; 1446 } 1447 #endif 1448 if (ii->xfer->status == USBD_CANCELLED || 1449 ii->xfer->status == USBD_TIMEOUT) { 1450 DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer)); 1451 return; 1452 } 1453 1454 if (ii->stdstart == NULL) 1455 return; 1456 lstd = ii->stdend; 1457 #ifdef DIAGNOSTIC 1458 if (lstd == NULL) { 1459 printf("uhci_check_intr: std==0\n"); 1460 return; 1461 } 1462 #endif 1463 /* 1464 * If the last TD is still active we need to check whether there 1465 * is an error somewhere in the middle, or whether there was a 1466 * short packet (SPD and not ACTIVE). 1467 */ 1468 usb_syncmem(&lstd->dma, 1469 lstd->offs + offsetof(uhci_td_t, td_status), 1470 sizeof(lstd->td.td_status), 1471 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1472 if (le32toh(lstd->td.td_status) & UHCI_TD_ACTIVE) { 1473 DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii)); 1474 for (std = ii->stdstart; std != lstd; std = std->link.std) { 1475 usb_syncmem(&std->dma, 1476 std->offs + offsetof(uhci_td_t, td_status), 1477 sizeof(std->td.td_status), 1478 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1479 status = le32toh(std->td.td_status); 1480 usb_syncmem(&std->dma, 1481 std->offs + offsetof(uhci_td_t, td_status), 1482 sizeof(std->td.td_status), BUS_DMASYNC_PREREAD); 1483 /* If there's an active TD the xfer isn't done. */ 1484 if (status & UHCI_TD_ACTIVE) 1485 break; 1486 /* Any kind of error makes the xfer done. */ 1487 if (status & UHCI_TD_STALLED) 1488 goto done; 1489 /* We want short packets, and it is short: it's done */ 1490 usb_syncmem(&std->dma, 1491 std->offs + offsetof(uhci_td_t, td_token), 1492 sizeof(std->td.td_token), 1493 BUS_DMASYNC_POSTWRITE); 1494 if ((status & UHCI_TD_SPD) && 1495 UHCI_TD_GET_ACTLEN(status) < 1496 UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token))) 1497 goto done; 1498 } 1499 DPRINTFN(12, ("uhci_check_intr: ii=%p std=%p still active\n", 1500 ii, ii->stdstart)); 1501 usb_syncmem(&lstd->dma, 1502 lstd->offs + offsetof(uhci_td_t, td_status), 1503 sizeof(lstd->td.td_status), 1504 BUS_DMASYNC_PREREAD); 1505 return; 1506 } 1507 done: 1508 DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii)); 1509 usb_uncallout(ii->xfer->timeout_handle, uhci_timeout, ii); 1510 uhci_idone(ii); 1511 } 1512 1513 /* Called at splusb() */ 1514 void 1515 uhci_idone(uhci_intr_info_t *ii) 1516 { 1517 usbd_xfer_handle xfer = ii->xfer; 1518 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 1519 uhci_soft_td_t *std; 1520 u_int32_t status = 0, nstatus; 1521 int actlen; 1522 1523 DPRINTFN(12, ("uhci_idone: ii=%p\n", ii)); 1524 #ifdef DIAGNOSTIC 1525 { 1526 int s = splhigh(); 1527 if (ii->isdone) { 1528 splx(s); 1529 #ifdef UHCI_DEBUG 1530 printf("uhci_idone: ii is done!\n "); 1531 uhci_dump_ii(ii); 1532 #else 1533 printf("uhci_idone: ii=%p is done!\n", ii); 1534 #endif 1535 return; 1536 } 1537 ii->isdone = 1; 1538 splx(s); 1539 } 1540 #endif 1541 1542 if (xfer->nframes != 0) { 1543 /* Isoc transfer, do things differently. */ 1544 uhci_soft_td_t **stds = upipe->u.iso.stds; 1545 int i, n, nframes, len; 1546 1547 DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii)); 1548 1549 nframes = xfer->nframes; 1550 actlen = 0; 1551 n = UXFER(xfer)->curframe; 1552 for (i = 0; i < nframes; i++) { 1553 std = stds[n]; 1554 #ifdef UHCI_DEBUG 1555 if (uhcidebug > 5) { 1556 DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i)); 1557 uhci_dump_td(std); 1558 } 1559 #endif 1560 if (++n >= UHCI_VFRAMELIST_COUNT) 1561 n = 0; 1562 usb_syncmem(&std->dma, 1563 std->offs + offsetof(uhci_td_t, td_status), 1564 sizeof(std->td.td_status), 1565 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1566 status = le32toh(std->td.td_status); 1567 len = UHCI_TD_GET_ACTLEN(status); 1568 xfer->frlengths[i] = len; 1569 actlen += len; 1570 } 1571 upipe->u.iso.inuse -= nframes; 1572 xfer->actlen = actlen; 1573 xfer->status = USBD_NORMAL_COMPLETION; 1574 goto end; 1575 } 1576 1577 #ifdef UHCI_DEBUG 1578 DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n", 1579 ii, xfer, upipe)); 1580 if (uhcidebug > 10) 1581 uhci_dump_tds(ii->stdstart); 1582 #endif 1583 1584 /* The transfer is done, compute actual length and status. */ 1585 actlen = 0; 1586 for (std = ii->stdstart; std != NULL; std = std->link.std) { 1587 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1588 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1589 nstatus = le32toh(std->td.td_status); 1590 if (nstatus & UHCI_TD_ACTIVE) 1591 break; 1592 1593 status = nstatus; 1594 if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) != 1595 UHCI_TD_PID_SETUP) 1596 actlen += UHCI_TD_GET_ACTLEN(status); 1597 else { 1598 /* 1599 * UHCI will report CRCTO in addition to a STALL or NAK 1600 * for a SETUP transaction. See section 3.2.2, "TD 1601 * CONTROL AND STATUS". 1602 */ 1603 if (status & (UHCI_TD_STALLED | UHCI_TD_NAK)) 1604 status &= ~UHCI_TD_CRCTO; 1605 } 1606 } 1607 /* If there are left over TDs we need to update the toggle. */ 1608 if (std != NULL) 1609 upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token)); 1610 1611 status &= UHCI_TD_ERROR; 1612 DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n", 1613 actlen, status)); 1614 xfer->actlen = actlen; 1615 if (status != 0) { 1616 #ifdef UHCI_DEBUG 1617 char sbuf[128]; 1618 1619 snprintb(sbuf, sizeof(sbuf), 1620 "\20\22BITSTUFF\23CRCTO\24NAK\25" 1621 "BABBLE\26DBUFFER\27STALLED\30ACTIVE",(u_int32_t)status); 1622 1623 DPRINTFN((status == UHCI_TD_STALLED)*10, 1624 ("uhci_idone: error, addr=%d, endpt=0x%02x, " 1625 "status 0x%s\n", 1626 xfer->pipe->device->address, 1627 xfer->pipe->endpoint->edesc->bEndpointAddress, 1628 sbuf)); 1629 #endif 1630 1631 if (status == UHCI_TD_STALLED) 1632 xfer->status = USBD_STALLED; 1633 else 1634 xfer->status = USBD_IOERROR; /* more info XXX */ 1635 } else { 1636 xfer->status = USBD_NORMAL_COMPLETION; 1637 } 1638 1639 end: 1640 usb_transfer_complete(xfer); 1641 DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii)); 1642 } 1643 1644 /* 1645 * Called when a request does not complete. 1646 */ 1647 void 1648 uhci_timeout(void *addr) 1649 { 1650 uhci_intr_info_t *ii = addr; 1651 struct uhci_xfer *uxfer = UXFER(ii->xfer); 1652 struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.pipe; 1653 uhci_softc_t *sc = upipe->pipe.device->bus->hci_private; 1654 1655 DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer)); 1656 1657 if (sc->sc_dying) { 1658 uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT); 1659 return; 1660 } 1661 1662 /* Execute the abort in a process context. */ 1663 usb_init_task(&uxfer->abort_task, uhci_timeout_task, ii->xfer); 1664 usb_add_task(uxfer->xfer.pipe->device, &uxfer->abort_task, 1665 USB_TASKQ_HC); 1666 } 1667 1668 void 1669 uhci_timeout_task(void *addr) 1670 { 1671 usbd_xfer_handle xfer = addr; 1672 int s; 1673 1674 DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer)); 1675 1676 s = splusb(); 1677 uhci_abort_xfer(xfer, USBD_TIMEOUT); 1678 splx(s); 1679 } 1680 1681 /* 1682 * Wait here until controller claims to have an interrupt. 1683 * Then call uhci_intr and return. Use timeout to avoid waiting 1684 * too long. 1685 * Only used during boot when interrupts are not enabled yet. 1686 */ 1687 void 1688 uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer) 1689 { 1690 int timo = xfer->timeout; 1691 uhci_intr_info_t *ii; 1692 1693 DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo)); 1694 1695 xfer->status = USBD_IN_PROGRESS; 1696 for (; timo >= 0; timo--) { 1697 usb_delay_ms(&sc->sc_bus, 1); 1698 DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS))); 1699 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) { 1700 uhci_intr1(sc); 1701 if (xfer->status != USBD_IN_PROGRESS) 1702 return; 1703 } 1704 } 1705 1706 /* Timeout */ 1707 DPRINTF(("uhci_waitintr: timeout\n")); 1708 for (ii = LIST_FIRST(&sc->sc_intrhead); 1709 ii != NULL && ii->xfer != xfer; 1710 ii = LIST_NEXT(ii, list)) 1711 ; 1712 #ifdef DIAGNOSTIC 1713 if (ii == NULL) 1714 panic("uhci_waitintr: lost intr_info"); 1715 #endif 1716 uhci_idone(ii); 1717 } 1718 1719 void 1720 uhci_poll(struct usbd_bus *bus) 1721 { 1722 uhci_softc_t *sc = bus->hci_private; 1723 1724 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) 1725 uhci_intr1(sc); 1726 } 1727 1728 void 1729 uhci_reset(uhci_softc_t *sc) 1730 { 1731 int n; 1732 1733 UHCICMD(sc, UHCI_CMD_HCRESET); 1734 /* The reset bit goes low when the controller is done. */ 1735 for (n = 0; n < UHCI_RESET_TIMEOUT && 1736 (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++) 1737 usb_delay_ms(&sc->sc_bus, 1); 1738 if (n >= UHCI_RESET_TIMEOUT) 1739 printf("%s: controller did not reset\n", 1740 device_xname(sc->sc_dev)); 1741 } 1742 1743 usbd_status 1744 uhci_run(uhci_softc_t *sc, int run) 1745 { 1746 int s, n, running; 1747 u_int16_t cmd; 1748 1749 run = run != 0; 1750 s = splhardusb(); 1751 DPRINTF(("uhci_run: setting run=%d\n", run)); 1752 cmd = UREAD2(sc, UHCI_CMD); 1753 if (run) 1754 cmd |= UHCI_CMD_RS; 1755 else 1756 cmd &= ~UHCI_CMD_RS; 1757 UHCICMD(sc, cmd); 1758 for(n = 0; n < 10; n++) { 1759 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH); 1760 /* return when we've entered the state we want */ 1761 if (run == running) { 1762 splx(s); 1763 DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n", 1764 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS))); 1765 return (USBD_NORMAL_COMPLETION); 1766 } 1767 usb_delay_ms(&sc->sc_bus, 1); 1768 } 1769 splx(s); 1770 printf("%s: cannot %s\n", device_xname(sc->sc_dev), 1771 run ? "start" : "stop"); 1772 return (USBD_IOERROR); 1773 } 1774 1775 /* 1776 * Memory management routines. 1777 * uhci_alloc_std allocates TDs 1778 * uhci_alloc_sqh allocates QHs 1779 * These two routines do their own free list management, 1780 * partly for speed, partly because allocating DMAable memory 1781 * has page size granularaity so much memory would be wasted if 1782 * only one TD/QH (32 bytes) was placed in each allocated chunk. 1783 */ 1784 1785 uhci_soft_td_t * 1786 uhci_alloc_std(uhci_softc_t *sc) 1787 { 1788 uhci_soft_td_t *std; 1789 usbd_status err; 1790 int i, offs; 1791 usb_dma_t dma; 1792 1793 if (sc->sc_freetds == NULL) { 1794 DPRINTFN(2,("uhci_alloc_std: allocating chunk\n")); 1795 err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK, 1796 UHCI_TD_ALIGN, &dma); 1797 if (err) 1798 return (0); 1799 for(i = 0; i < UHCI_STD_CHUNK; i++) { 1800 offs = i * UHCI_STD_SIZE; 1801 std = KERNADDR(&dma, offs); 1802 std->physaddr = DMAADDR(&dma, offs); 1803 std->dma = dma; 1804 std->offs = offs; 1805 std->link.std = sc->sc_freetds; 1806 sc->sc_freetds = std; 1807 } 1808 } 1809 std = sc->sc_freetds; 1810 sc->sc_freetds = std->link.std; 1811 memset(&std->td, 0, sizeof(uhci_td_t)); 1812 return std; 1813 } 1814 1815 void 1816 uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std) 1817 { 1818 #ifdef DIAGNOSTIC 1819 #define TD_IS_FREE 0x12345678 1820 if (le32toh(std->td.td_token) == TD_IS_FREE) { 1821 printf("uhci_free_std: freeing free TD %p\n", std); 1822 return; 1823 } 1824 std->td.td_token = htole32(TD_IS_FREE); 1825 #endif 1826 std->link.std = sc->sc_freetds; 1827 sc->sc_freetds = std; 1828 } 1829 1830 uhci_soft_qh_t * 1831 uhci_alloc_sqh(uhci_softc_t *sc) 1832 { 1833 uhci_soft_qh_t *sqh; 1834 usbd_status err; 1835 int i, offs; 1836 usb_dma_t dma; 1837 1838 if (sc->sc_freeqhs == NULL) { 1839 DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n")); 1840 err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK, 1841 UHCI_QH_ALIGN, &dma); 1842 if (err) 1843 return (0); 1844 for(i = 0; i < UHCI_SQH_CHUNK; i++) { 1845 offs = i * UHCI_SQH_SIZE; 1846 sqh = KERNADDR(&dma, offs); 1847 sqh->physaddr = DMAADDR(&dma, offs); 1848 sqh->dma = dma; 1849 sqh->offs = offs; 1850 sqh->hlink = sc->sc_freeqhs; 1851 sc->sc_freeqhs = sqh; 1852 } 1853 } 1854 sqh = sc->sc_freeqhs; 1855 sc->sc_freeqhs = sqh->hlink; 1856 memset(&sqh->qh, 0, sizeof(uhci_qh_t)); 1857 return (sqh); 1858 } 1859 1860 void 1861 uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1862 { 1863 sqh->hlink = sc->sc_freeqhs; 1864 sc->sc_freeqhs = sqh; 1865 } 1866 1867 void 1868 uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std, 1869 uhci_soft_td_t *stdend) 1870 { 1871 uhci_soft_td_t *p; 1872 1873 /* 1874 * to avoid race condition with the controller which may be looking 1875 * at this chain, we need to first invalidate all links, and 1876 * then wait for the controller to move to another queue 1877 */ 1878 for (p = std; p != stdend; p = p->link.std) { 1879 usb_syncmem(&p->dma, 1880 p->offs + offsetof(uhci_td_t, td_link), 1881 sizeof(p->td.td_link), 1882 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1883 if ((p->td.td_link & UHCI_PTR_T) == 0) { 1884 p->td.td_link = UHCI_PTR_T; 1885 usb_syncmem(&p->dma, 1886 p->offs + offsetof(uhci_td_t, td_link), 1887 sizeof(p->td.td_link), 1888 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1889 } 1890 } 1891 delay(UHCI_QH_REMOVE_DELAY); 1892 1893 for (; std != stdend; std = p) { 1894 p = std->link.std; 1895 uhci_free_std(sc, std); 1896 } 1897 } 1898 1899 usbd_status 1900 uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len, 1901 int rd, u_int16_t flags, usb_dma_t *dma, 1902 uhci_soft_td_t **sp, uhci_soft_td_t **ep) 1903 { 1904 uhci_soft_td_t *p, *lastp; 1905 uhci_physaddr_t lastlink; 1906 int i, ntd, l, tog, maxp; 1907 u_int32_t status; 1908 int addr = upipe->pipe.device->address; 1909 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 1910 1911 DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d speed=%d " 1912 "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len, 1913 upipe->pipe.device->speed, flags)); 1914 maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize); 1915 if (maxp == 0) { 1916 printf("uhci_alloc_std_chain: maxp=0\n"); 1917 return (USBD_INVAL); 1918 } 1919 ntd = (len + maxp - 1) / maxp; 1920 if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0) 1921 ntd++; 1922 DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd)); 1923 if (ntd == 0) { 1924 *sp = *ep = 0; 1925 DPRINTFN(-1,("uhci_alloc_std_chain: ntd=0\n")); 1926 return (USBD_NORMAL_COMPLETION); 1927 } 1928 tog = upipe->nexttoggle; 1929 if (ntd % 2 == 0) 1930 tog ^= 1; 1931 upipe->nexttoggle = tog ^ 1; 1932 lastp = NULL; 1933 lastlink = UHCI_PTR_T; 1934 ntd--; 1935 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE); 1936 if (upipe->pipe.device->speed == USB_SPEED_LOW) 1937 status |= UHCI_TD_LS; 1938 if (flags & USBD_SHORT_XFER_OK) 1939 status |= UHCI_TD_SPD; 1940 usb_syncmem(dma, 0, len, 1941 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 1942 for (i = ntd; i >= 0; i--) { 1943 p = uhci_alloc_std(sc); 1944 if (p == NULL) { 1945 KASSERT(lastp != NULL); 1946 uhci_free_std_chain(sc, lastp, NULL); 1947 return (USBD_NOMEM); 1948 } 1949 p->link.std = lastp; 1950 p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD); 1951 lastp = p; 1952 lastlink = p->physaddr; 1953 p->td.td_status = htole32(status); 1954 if (i == ntd) { 1955 /* last TD */ 1956 l = len % maxp; 1957 if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER)) 1958 l = maxp; 1959 *ep = p; 1960 } else 1961 l = maxp; 1962 p->td.td_token = 1963 htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) : 1964 UHCI_TD_OUT(l, endpt, addr, tog)); 1965 p->td.td_buffer = htole32(DMAADDR(dma, i * maxp)); 1966 usb_syncmem(&p->dma, p->offs, sizeof(p->td), 1967 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1968 tog ^= 1; 1969 } 1970 *sp = lastp; 1971 DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n", 1972 upipe->nexttoggle)); 1973 return (USBD_NORMAL_COMPLETION); 1974 } 1975 1976 void 1977 uhci_device_clear_toggle(usbd_pipe_handle pipe) 1978 { 1979 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1980 upipe->nexttoggle = 0; 1981 } 1982 1983 void 1984 uhci_noop(usbd_pipe_handle pipe) 1985 { 1986 } 1987 1988 usbd_status 1989 uhci_device_bulk_transfer(usbd_xfer_handle xfer) 1990 { 1991 usbd_status err; 1992 1993 /* Insert last in queue. */ 1994 err = usb_insert_transfer(xfer); 1995 if (err) 1996 return (err); 1997 1998 /* 1999 * Pipe isn't running (otherwise err would be USBD_INPROG), 2000 * so start it first. 2001 */ 2002 return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2003 } 2004 2005 usbd_status 2006 uhci_device_bulk_start(usbd_xfer_handle xfer) 2007 { 2008 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2009 usbd_device_handle dev = upipe->pipe.device; 2010 uhci_softc_t *sc = dev->bus->hci_private; 2011 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2012 uhci_soft_td_t *data, *dataend; 2013 uhci_soft_qh_t *sqh; 2014 usbd_status err; 2015 int len, isread, endpt; 2016 int s; 2017 2018 DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%d flags=%d ii=%p\n", 2019 xfer, xfer->length, xfer->flags, ii)); 2020 2021 if (sc->sc_dying) 2022 return (USBD_IOERROR); 2023 2024 #ifdef DIAGNOSTIC 2025 if (xfer->rqflags & URQ_REQUEST) 2026 panic("uhci_device_bulk_transfer: a request"); 2027 #endif 2028 2029 len = xfer->length; 2030 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2031 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2032 sqh = upipe->u.bulk.sqh; 2033 2034 upipe->u.bulk.isread = isread; 2035 upipe->u.bulk.length = len; 2036 2037 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags, 2038 &xfer->dmabuf, &data, &dataend); 2039 if (err) 2040 return (err); 2041 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2042 usb_syncmem(&dataend->dma, 2043 dataend->offs + offsetof(uhci_td_t, td_status), 2044 sizeof(dataend->td.td_status), 2045 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2046 2047 2048 #ifdef UHCI_DEBUG 2049 if (uhcidebug > 8) { 2050 DPRINTF(("uhci_device_bulk_transfer: data(1)\n")); 2051 uhci_dump_tds(data); 2052 } 2053 #endif 2054 2055 /* Set up interrupt info. */ 2056 ii->xfer = xfer; 2057 ii->stdstart = data; 2058 ii->stdend = dataend; 2059 #ifdef DIAGNOSTIC 2060 if (!ii->isdone) { 2061 printf("uhci_device_bulk_transfer: not done, ii=%p\n", ii); 2062 } 2063 ii->isdone = 0; 2064 #endif 2065 2066 sqh->elink = data; 2067 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2068 /* uhci_add_bulk() will do usb_syncmem(sqh) */ 2069 2070 s = splusb(); 2071 uhci_add_bulk(sc, sqh); 2072 uhci_add_intr_info(sc, ii); 2073 2074 if (xfer->timeout && !sc->sc_bus.use_polling) { 2075 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2076 uhci_timeout, ii); 2077 } 2078 xfer->status = USBD_IN_PROGRESS; 2079 splx(s); 2080 2081 #ifdef UHCI_DEBUG 2082 if (uhcidebug > 10) { 2083 DPRINTF(("uhci_device_bulk_transfer: data(2)\n")); 2084 uhci_dump_tds(data); 2085 } 2086 #endif 2087 2088 if (sc->sc_bus.use_polling) 2089 uhci_waitintr(sc, xfer); 2090 2091 return (USBD_IN_PROGRESS); 2092 } 2093 2094 /* Abort a device bulk request. */ 2095 void 2096 uhci_device_bulk_abort(usbd_xfer_handle xfer) 2097 { 2098 DPRINTF(("uhci_device_bulk_abort:\n")); 2099 uhci_abort_xfer(xfer, USBD_CANCELLED); 2100 } 2101 2102 /* 2103 * Abort a device request. 2104 * If this routine is called at splusb() it guarantees that the request 2105 * will be removed from the hardware scheduling and that the callback 2106 * for it will be called with USBD_CANCELLED status. 2107 * It's impossible to guarantee that the requested transfer will not 2108 * have happened since the hardware runs concurrently. 2109 * If the transaction has already happened we rely on the ordinary 2110 * interrupt processing to process it. 2111 */ 2112 void 2113 uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2114 { 2115 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2116 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2117 uhci_softc_t *sc = upipe->pipe.device->bus->hci_private; 2118 uhci_soft_td_t *std; 2119 int s; 2120 int wake; 2121 2122 DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status)); 2123 2124 if (sc->sc_dying) { 2125 /* If we're dying, just do the software part. */ 2126 s = splusb(); 2127 xfer->status = status; /* make software ignore it */ 2128 usb_uncallout(xfer->timeout_handle, uhci_timeout, xfer); 2129 usb_transfer_complete(xfer); 2130 splx(s); 2131 return; 2132 } 2133 2134 if (xfer->device->bus->intr_context || !curproc) 2135 panic("uhci_abort_xfer: not in process context"); 2136 2137 /* 2138 * If an abort is already in progress then just wait for it to 2139 * complete and return. 2140 */ 2141 if (xfer->hcflags & UXFER_ABORTING) { 2142 DPRINTFN(2, ("uhci_abort_xfer: already aborting\n")); 2143 #ifdef DIAGNOSTIC 2144 if (status == USBD_TIMEOUT) 2145 printf("uhci_abort_xfer: TIMEOUT while aborting\n"); 2146 #endif 2147 /* Override the status which might be USBD_TIMEOUT. */ 2148 xfer->status = status; 2149 DPRINTFN(2, ("uhci_abort_xfer: waiting for abort to finish\n")); 2150 xfer->hcflags |= UXFER_ABORTWAIT; 2151 while (xfer->hcflags & UXFER_ABORTING) 2152 tsleep(&xfer->hcflags, PZERO, "uhciaw", 0); 2153 return; 2154 } 2155 xfer->hcflags |= UXFER_ABORTING; 2156 2157 /* 2158 * Step 1: Make interrupt routine and hardware ignore xfer. 2159 */ 2160 s = splusb(); 2161 xfer->status = status; /* make software ignore it */ 2162 usb_uncallout(xfer->timeout_handle, uhci_timeout, ii); 2163 DPRINTFN(1,("uhci_abort_xfer: stop ii=%p\n", ii)); 2164 for (std = ii->stdstart; std != NULL; std = std->link.std) { 2165 usb_syncmem(&std->dma, 2166 std->offs + offsetof(uhci_td_t, td_status), 2167 sizeof(std->td.td_status), 2168 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2169 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 2170 usb_syncmem(&std->dma, 2171 std->offs + offsetof(uhci_td_t, td_status), 2172 sizeof(std->td.td_status), 2173 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2174 } 2175 splx(s); 2176 2177 /* 2178 * Step 2: Wait until we know hardware has finished any possible 2179 * use of the xfer. Also make sure the soft interrupt routine 2180 * has run. 2181 */ 2182 usb_delay_ms(upipe->pipe.device->bus, 2); /* Hardware finishes in 1ms */ 2183 s = splusb(); 2184 #ifdef USB_USE_SOFTINTR 2185 sc->sc_softwake = 1; 2186 #endif /* USB_USE_SOFTINTR */ 2187 usb_schedsoftintr(&sc->sc_bus); 2188 #ifdef USB_USE_SOFTINTR 2189 DPRINTFN(1,("uhci_abort_xfer: tsleep\n")); 2190 tsleep(&sc->sc_softwake, PZERO, "uhciab", 0); 2191 #endif /* USB_USE_SOFTINTR */ 2192 splx(s); 2193 2194 /* 2195 * Step 3: Execute callback. 2196 */ 2197 DPRINTFN(1,("uhci_abort_xfer: callback\n")); 2198 s = splusb(); 2199 #ifdef DIAGNOSTIC 2200 ii->isdone = 1; 2201 #endif 2202 wake = xfer->hcflags & UXFER_ABORTWAIT; 2203 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2204 usb_transfer_complete(xfer); 2205 if (wake) 2206 wakeup(&xfer->hcflags); 2207 splx(s); 2208 } 2209 2210 /* Close a device bulk pipe. */ 2211 void 2212 uhci_device_bulk_close(usbd_pipe_handle pipe) 2213 { 2214 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2215 usbd_device_handle dev = upipe->pipe.device; 2216 uhci_softc_t *sc = dev->bus->hci_private; 2217 2218 uhci_free_sqh(sc, upipe->u.bulk.sqh); 2219 } 2220 2221 usbd_status 2222 uhci_device_ctrl_transfer(usbd_xfer_handle xfer) 2223 { 2224 usbd_status err; 2225 2226 /* Insert last in queue. */ 2227 err = usb_insert_transfer(xfer); 2228 if (err) 2229 return (err); 2230 2231 /* 2232 * Pipe isn't running (otherwise err would be USBD_INPROG), 2233 * so start it first. 2234 */ 2235 return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2236 } 2237 2238 usbd_status 2239 uhci_device_ctrl_start(usbd_xfer_handle xfer) 2240 { 2241 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2242 usbd_status err; 2243 2244 if (sc->sc_dying) 2245 return (USBD_IOERROR); 2246 2247 #ifdef DIAGNOSTIC 2248 if (!(xfer->rqflags & URQ_REQUEST)) 2249 panic("uhci_device_ctrl_transfer: not a request"); 2250 #endif 2251 2252 err = uhci_device_request(xfer); 2253 if (err) 2254 return (err); 2255 2256 if (sc->sc_bus.use_polling) 2257 uhci_waitintr(sc, xfer); 2258 return (USBD_IN_PROGRESS); 2259 } 2260 2261 usbd_status 2262 uhci_device_intr_transfer(usbd_xfer_handle xfer) 2263 { 2264 usbd_status err; 2265 2266 /* Insert last in queue. */ 2267 err = usb_insert_transfer(xfer); 2268 if (err) 2269 return (err); 2270 2271 /* 2272 * Pipe isn't running (otherwise err would be USBD_INPROG), 2273 * so start it first. 2274 */ 2275 return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2276 } 2277 2278 usbd_status 2279 uhci_device_intr_start(usbd_xfer_handle xfer) 2280 { 2281 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2282 usbd_device_handle dev = upipe->pipe.device; 2283 uhci_softc_t *sc = dev->bus->hci_private; 2284 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2285 uhci_soft_td_t *data, *dataend; 2286 uhci_soft_qh_t *sqh; 2287 usbd_status err; 2288 int isread, endpt; 2289 int i, s; 2290 2291 if (sc->sc_dying) 2292 return (USBD_IOERROR); 2293 2294 DPRINTFN(3,("uhci_device_intr_transfer: xfer=%p len=%d flags=%d\n", 2295 xfer, xfer->length, xfer->flags)); 2296 2297 #ifdef DIAGNOSTIC 2298 if (xfer->rqflags & URQ_REQUEST) 2299 panic("uhci_device_intr_transfer: a request"); 2300 #endif 2301 2302 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2303 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2304 2305 upipe->u.intr.isread = isread; 2306 2307 err = uhci_alloc_std_chain(upipe, sc, xfer->length, isread, 2308 xfer->flags, &xfer->dmabuf, &data, 2309 &dataend); 2310 if (err) 2311 return (err); 2312 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2313 usb_syncmem(&dataend->dma, 2314 dataend->offs + offsetof(uhci_td_t, td_status), 2315 sizeof(dataend->td.td_status), 2316 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2317 2318 #ifdef UHCI_DEBUG 2319 if (uhcidebug > 10) { 2320 DPRINTF(("uhci_device_intr_transfer: data(1)\n")); 2321 uhci_dump_tds(data); 2322 uhci_dump_qh(upipe->u.intr.qhs[0]); 2323 } 2324 #endif 2325 2326 s = splusb(); 2327 /* Set up interrupt info. */ 2328 ii->xfer = xfer; 2329 ii->stdstart = data; 2330 ii->stdend = dataend; 2331 #ifdef DIAGNOSTIC 2332 if (!ii->isdone) { 2333 printf("uhci_device_intr_transfer: not done, ii=%p\n", ii); 2334 } 2335 ii->isdone = 0; 2336 #endif 2337 2338 DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n", 2339 upipe->u.intr.qhs[0])); 2340 for (i = 0; i < upipe->u.intr.npoll; i++) { 2341 sqh = upipe->u.intr.qhs[i]; 2342 sqh->elink = data; 2343 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2344 usb_syncmem(&sqh->dma, 2345 sqh->offs + offsetof(uhci_qh_t, qh_elink), 2346 sizeof(sqh->qh.qh_elink), 2347 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2348 } 2349 uhci_add_intr_info(sc, ii); 2350 xfer->status = USBD_IN_PROGRESS; 2351 splx(s); 2352 2353 #ifdef UHCI_DEBUG 2354 if (uhcidebug > 10) { 2355 DPRINTF(("uhci_device_intr_transfer: data(2)\n")); 2356 uhci_dump_tds(data); 2357 uhci_dump_qh(upipe->u.intr.qhs[0]); 2358 } 2359 #endif 2360 2361 return (USBD_IN_PROGRESS); 2362 } 2363 2364 /* Abort a device control request. */ 2365 void 2366 uhci_device_ctrl_abort(usbd_xfer_handle xfer) 2367 { 2368 DPRINTF(("uhci_device_ctrl_abort:\n")); 2369 uhci_abort_xfer(xfer, USBD_CANCELLED); 2370 } 2371 2372 /* Close a device control pipe. */ 2373 void 2374 uhci_device_ctrl_close(usbd_pipe_handle pipe) 2375 { 2376 } 2377 2378 /* Abort a device interrupt request. */ 2379 void 2380 uhci_device_intr_abort(usbd_xfer_handle xfer) 2381 { 2382 DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer)); 2383 if (xfer->pipe->intrxfer == xfer) { 2384 DPRINTFN(1,("uhci_device_intr_abort: remove\n")); 2385 xfer->pipe->intrxfer = NULL; 2386 } 2387 uhci_abort_xfer(xfer, USBD_CANCELLED); 2388 } 2389 2390 /* Close a device interrupt pipe. */ 2391 void 2392 uhci_device_intr_close(usbd_pipe_handle pipe) 2393 { 2394 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2395 uhci_softc_t *sc = pipe->device->bus->hci_private; 2396 int i, npoll; 2397 int s; 2398 2399 /* Unlink descriptors from controller data structures. */ 2400 npoll = upipe->u.intr.npoll; 2401 s = splusb(); 2402 for (i = 0; i < npoll; i++) 2403 uhci_remove_intr(sc, upipe->u.intr.qhs[i]); 2404 splx(s); 2405 2406 /* 2407 * We now have to wait for any activity on the physical 2408 * descriptors to stop. 2409 */ 2410 usb_delay_ms(&sc->sc_bus, 2); 2411 2412 for(i = 0; i < npoll; i++) 2413 uhci_free_sqh(sc, upipe->u.intr.qhs[i]); 2414 free(upipe->u.intr.qhs, M_USBHC); 2415 2416 /* XXX free other resources */ 2417 } 2418 2419 usbd_status 2420 uhci_device_request(usbd_xfer_handle xfer) 2421 { 2422 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2423 usb_device_request_t *req = &xfer->request; 2424 usbd_device_handle dev = upipe->pipe.device; 2425 uhci_softc_t *sc = dev->bus->hci_private; 2426 int addr = dev->address; 2427 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2428 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2429 uhci_soft_td_t *setup, *data, *stat, *next, *dataend; 2430 uhci_soft_qh_t *sqh; 2431 int len; 2432 u_int32_t ls; 2433 usbd_status err; 2434 int isread; 2435 int s; 2436 2437 DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, " 2438 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2439 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2440 UGETW(req->wIndex), UGETW(req->wLength), 2441 addr, endpt)); 2442 2443 ls = dev->speed == USB_SPEED_LOW ? UHCI_TD_LS : 0; 2444 isread = req->bmRequestType & UT_READ; 2445 len = UGETW(req->wLength); 2446 2447 setup = upipe->u.ctl.setup; 2448 stat = upipe->u.ctl.stat; 2449 sqh = upipe->u.ctl.sqh; 2450 2451 /* Set up data transaction */ 2452 if (len != 0) { 2453 upipe->nexttoggle = 1; 2454 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags, 2455 &xfer->dmabuf, &data, &dataend); 2456 if (err) 2457 return (err); 2458 next = data; 2459 dataend->link.std = stat; 2460 dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_VF | UHCI_PTR_TD); 2461 usb_syncmem(&dataend->dma, 2462 dataend->offs + offsetof(uhci_td_t, td_link), 2463 sizeof(dataend->td.td_link), 2464 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2465 } else { 2466 next = stat; 2467 } 2468 upipe->u.ctl.length = len; 2469 2470 memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req); 2471 usb_syncmem(&upipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE); 2472 2473 setup->link.std = next; 2474 setup->td.td_link = htole32(next->physaddr | UHCI_PTR_VF | UHCI_PTR_TD); 2475 setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2476 UHCI_TD_ACTIVE); 2477 setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr)); 2478 setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0)); 2479 usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td), 2480 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2481 2482 stat->link.std = NULL; 2483 stat->td.td_link = htole32(UHCI_PTR_T); 2484 stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2485 UHCI_TD_ACTIVE | UHCI_TD_IOC); 2486 stat->td.td_token = 2487 htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) : 2488 UHCI_TD_IN (0, endpt, addr, 1)); 2489 stat->td.td_buffer = htole32(0); 2490 usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td), 2491 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2492 2493 #ifdef UHCI_DEBUG 2494 if (uhcidebug > 10) { 2495 DPRINTF(("uhci_device_request: before transfer\n")); 2496 uhci_dump_tds(setup); 2497 } 2498 #endif 2499 2500 /* Set up interrupt info. */ 2501 ii->xfer = xfer; 2502 ii->stdstart = setup; 2503 ii->stdend = stat; 2504 #ifdef DIAGNOSTIC 2505 if (!ii->isdone) { 2506 printf("uhci_device_request: not done, ii=%p\n", ii); 2507 } 2508 ii->isdone = 0; 2509 #endif 2510 2511 sqh->elink = setup; 2512 sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD); 2513 /* uhci_add_?s_ctrl() will do usb_syncmem(sqh) */ 2514 2515 s = splusb(); 2516 if (dev->speed == USB_SPEED_LOW) 2517 uhci_add_ls_ctrl(sc, sqh); 2518 else 2519 uhci_add_hs_ctrl(sc, sqh); 2520 uhci_add_intr_info(sc, ii); 2521 #ifdef UHCI_DEBUG 2522 if (uhcidebug > 12) { 2523 uhci_soft_td_t *std; 2524 uhci_soft_qh_t *xqh; 2525 uhci_soft_qh_t *sxqh; 2526 int maxqh = 0; 2527 uhci_physaddr_t link; 2528 DPRINTF(("uhci_enter_ctl_q: follow from [0]\n")); 2529 for (std = sc->sc_vframes[0].htd, link = 0; 2530 (link & UHCI_PTR_QH) == 0; 2531 std = std->link.std) { 2532 link = le32toh(std->td.td_link); 2533 uhci_dump_td(std); 2534 } 2535 sxqh = (uhci_soft_qh_t *)std; 2536 uhci_dump_qh(sxqh); 2537 for (xqh = sxqh; 2538 xqh != NULL; 2539 xqh = (maxqh++ == 5 || xqh->hlink == sxqh || 2540 xqh->hlink == xqh ? NULL : xqh->hlink)) { 2541 uhci_dump_qh(xqh); 2542 } 2543 DPRINTF(("Enqueued QH:\n")); 2544 uhci_dump_qh(sqh); 2545 uhci_dump_tds(sqh->elink); 2546 } 2547 #endif 2548 if (xfer->timeout && !sc->sc_bus.use_polling) { 2549 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2550 uhci_timeout, ii); 2551 } 2552 xfer->status = USBD_IN_PROGRESS; 2553 splx(s); 2554 2555 return (USBD_NORMAL_COMPLETION); 2556 } 2557 2558 usbd_status 2559 uhci_device_isoc_transfer(usbd_xfer_handle xfer) 2560 { 2561 usbd_status err; 2562 2563 DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer)); 2564 2565 /* Put it on our queue, */ 2566 err = usb_insert_transfer(xfer); 2567 2568 /* bail out on error, */ 2569 if (err && err != USBD_IN_PROGRESS) 2570 return (err); 2571 2572 /* XXX should check inuse here */ 2573 2574 /* insert into schedule, */ 2575 uhci_device_isoc_enter(xfer); 2576 2577 /* and start if the pipe wasn't running */ 2578 if (!err) 2579 uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 2580 2581 return (err); 2582 } 2583 2584 void 2585 uhci_device_isoc_enter(usbd_xfer_handle xfer) 2586 { 2587 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2588 usbd_device_handle dev = upipe->pipe.device; 2589 uhci_softc_t *sc = dev->bus->hci_private; 2590 struct iso *iso = &upipe->u.iso; 2591 uhci_soft_td_t *std; 2592 u_int32_t buf, len, status, offs; 2593 int s, i, next, nframes; 2594 int rd = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN; 2595 2596 DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p " 2597 "nframes=%d\n", 2598 iso->inuse, iso->next, xfer, xfer->nframes)); 2599 2600 if (sc->sc_dying) 2601 return; 2602 2603 if (xfer->status == USBD_IN_PROGRESS) { 2604 /* This request has already been entered into the frame list */ 2605 printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer); 2606 /* XXX */ 2607 } 2608 2609 #ifdef DIAGNOSTIC 2610 if (iso->inuse >= UHCI_VFRAMELIST_COUNT) 2611 printf("uhci_device_isoc_enter: overflow!\n"); 2612 #endif 2613 2614 next = iso->next; 2615 if (next == -1) { 2616 /* Not in use yet, schedule it a few frames ahead. */ 2617 next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT; 2618 DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next)); 2619 } 2620 2621 xfer->status = USBD_IN_PROGRESS; 2622 UXFER(xfer)->curframe = next; 2623 2624 buf = DMAADDR(&xfer->dmabuf, 0); 2625 offs = 0; 2626 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) | 2627 UHCI_TD_ACTIVE | 2628 UHCI_TD_IOS); 2629 nframes = xfer->nframes; 2630 s = splusb(); 2631 for (i = 0; i < nframes; i++) { 2632 std = iso->stds[next]; 2633 if (++next >= UHCI_VFRAMELIST_COUNT) 2634 next = 0; 2635 len = xfer->frlengths[i]; 2636 std->td.td_buffer = htole32(buf); 2637 usb_syncmem(&xfer->dmabuf, offs, len, 2638 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 2639 if (i == nframes - 1) 2640 status |= UHCI_TD_IOC; 2641 std->td.td_status = htole32(status); 2642 std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK); 2643 std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len)); 2644 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 2645 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2646 #ifdef UHCI_DEBUG 2647 if (uhcidebug > 5) { 2648 DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i)); 2649 uhci_dump_td(std); 2650 } 2651 #endif 2652 buf += len; 2653 offs += len; 2654 } 2655 iso->next = next; 2656 iso->inuse += xfer->nframes; 2657 2658 splx(s); 2659 } 2660 2661 usbd_status 2662 uhci_device_isoc_start(usbd_xfer_handle xfer) 2663 { 2664 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2665 uhci_softc_t *sc = upipe->pipe.device->bus->hci_private; 2666 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2667 uhci_soft_td_t *end; 2668 int s, i; 2669 2670 DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer)); 2671 2672 if (sc->sc_dying) 2673 return (USBD_IOERROR); 2674 2675 #ifdef DIAGNOSTIC 2676 if (xfer->status != USBD_IN_PROGRESS) 2677 printf("uhci_device_isoc_start: not in progress %p\n", xfer); 2678 #endif 2679 2680 /* Find the last TD */ 2681 i = UXFER(xfer)->curframe + xfer->nframes; 2682 if (i >= UHCI_VFRAMELIST_COUNT) 2683 i -= UHCI_VFRAMELIST_COUNT; 2684 end = upipe->u.iso.stds[i]; 2685 2686 #ifdef DIAGNOSTIC 2687 if (end == NULL) { 2688 printf("uhci_device_isoc_start: end == NULL\n"); 2689 return (USBD_INVAL); 2690 } 2691 #endif 2692 2693 s = splusb(); 2694 2695 /* Set up interrupt info. */ 2696 ii->xfer = xfer; 2697 ii->stdstart = end; 2698 ii->stdend = end; 2699 #ifdef DIAGNOSTIC 2700 if (!ii->isdone) 2701 printf("uhci_device_isoc_start: not done, ii=%p\n", ii); 2702 ii->isdone = 0; 2703 #endif 2704 uhci_add_intr_info(sc, ii); 2705 2706 splx(s); 2707 2708 return (USBD_IN_PROGRESS); 2709 } 2710 2711 void 2712 uhci_device_isoc_abort(usbd_xfer_handle xfer) 2713 { 2714 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2715 uhci_soft_td_t **stds = upipe->u.iso.stds; 2716 uhci_soft_td_t *std; 2717 int i, n, s, nframes, maxlen, len; 2718 2719 s = splusb(); 2720 2721 /* Transfer is already done. */ 2722 if (xfer->status != USBD_NOT_STARTED && 2723 xfer->status != USBD_IN_PROGRESS) { 2724 splx(s); 2725 return; 2726 } 2727 2728 /* Give xfer the requested abort code. */ 2729 xfer->status = USBD_CANCELLED; 2730 2731 /* make hardware ignore it, */ 2732 nframes = xfer->nframes; 2733 n = UXFER(xfer)->curframe; 2734 maxlen = 0; 2735 for (i = 0; i < nframes; i++) { 2736 std = stds[n]; 2737 usb_syncmem(&std->dma, 2738 std->offs + offsetof(uhci_td_t, td_status), 2739 sizeof(std->td.td_status), 2740 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2741 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 2742 usb_syncmem(&std->dma, 2743 std->offs + offsetof(uhci_td_t, td_status), 2744 sizeof(std->td.td_status), 2745 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2746 usb_syncmem(&std->dma, 2747 std->offs + offsetof(uhci_td_t, td_token), 2748 sizeof(std->td.td_token), 2749 BUS_DMASYNC_POSTWRITE); 2750 len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token)); 2751 if (len > maxlen) 2752 maxlen = len; 2753 if (++n >= UHCI_VFRAMELIST_COUNT) 2754 n = 0; 2755 } 2756 2757 /* and wait until we are sure the hardware has finished. */ 2758 delay(maxlen); 2759 2760 #ifdef DIAGNOSTIC 2761 UXFER(xfer)->iinfo.isdone = 1; 2762 #endif 2763 /* Run callback and remove from interrupt list. */ 2764 usb_transfer_complete(xfer); 2765 2766 splx(s); 2767 } 2768 2769 void 2770 uhci_device_isoc_close(usbd_pipe_handle pipe) 2771 { 2772 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2773 usbd_device_handle dev = upipe->pipe.device; 2774 uhci_softc_t *sc = dev->bus->hci_private; 2775 uhci_soft_td_t *std, *vstd; 2776 struct iso *iso; 2777 int i, s; 2778 2779 /* 2780 * Make sure all TDs are marked as inactive. 2781 * Wait for completion. 2782 * Unschedule. 2783 * Deallocate. 2784 */ 2785 iso = &upipe->u.iso; 2786 2787 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2788 std = iso->stds[i]; 2789 usb_syncmem(&std->dma, 2790 std->offs + offsetof(uhci_td_t, td_status), 2791 sizeof(std->td.td_status), 2792 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2793 std->td.td_status &= htole32(~UHCI_TD_ACTIVE); 2794 usb_syncmem(&std->dma, 2795 std->offs + offsetof(uhci_td_t, td_status), 2796 sizeof(std->td.td_status), 2797 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2798 } 2799 usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */ 2800 2801 s = splusb(); 2802 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2803 std = iso->stds[i]; 2804 for (vstd = sc->sc_vframes[i].htd; 2805 vstd != NULL && vstd->link.std != std; 2806 vstd = vstd->link.std) 2807 ; 2808 if (vstd == NULL) { 2809 /*panic*/ 2810 printf("uhci_device_isoc_close: %p not found\n", std); 2811 splx(s); 2812 return; 2813 } 2814 vstd->link = std->link; 2815 usb_syncmem(&std->dma, 2816 std->offs + offsetof(uhci_td_t, td_link), 2817 sizeof(std->td.td_link), 2818 BUS_DMASYNC_POSTWRITE); 2819 vstd->td.td_link = std->td.td_link; 2820 usb_syncmem(&vstd->dma, 2821 vstd->offs + offsetof(uhci_td_t, td_link), 2822 sizeof(vstd->td.td_link), 2823 BUS_DMASYNC_PREWRITE); 2824 uhci_free_std(sc, std); 2825 } 2826 splx(s); 2827 2828 free(iso->stds, M_USBHC); 2829 } 2830 2831 usbd_status 2832 uhci_setup_isoc(usbd_pipe_handle pipe) 2833 { 2834 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2835 usbd_device_handle dev = upipe->pipe.device; 2836 uhci_softc_t *sc = dev->bus->hci_private; 2837 int addr = upipe->pipe.device->address; 2838 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2839 int rd = UE_GET_DIR(endpt) == UE_DIR_IN; 2840 uhci_soft_td_t *std, *vstd; 2841 u_int32_t token; 2842 struct iso *iso; 2843 int i, s; 2844 2845 iso = &upipe->u.iso; 2846 iso->stds = malloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *), 2847 M_USBHC, M_WAITOK); 2848 2849 token = rd ? UHCI_TD_IN (0, endpt, addr, 0) : 2850 UHCI_TD_OUT(0, endpt, addr, 0); 2851 2852 /* Allocate the TDs and mark as inactive; */ 2853 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2854 std = uhci_alloc_std(sc); 2855 if (std == 0) 2856 goto bad; 2857 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 2858 std->td.td_token = htole32(token); 2859 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 2860 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2861 iso->stds[i] = std; 2862 } 2863 2864 /* Insert TDs into schedule. */ 2865 s = splusb(); 2866 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2867 std = iso->stds[i]; 2868 vstd = sc->sc_vframes[i].htd; 2869 usb_syncmem(&vstd->dma, 2870 vstd->offs + offsetof(uhci_td_t, td_link), 2871 sizeof(vstd->td.td_link), 2872 BUS_DMASYNC_POSTWRITE); 2873 std->link = vstd->link; 2874 std->td.td_link = vstd->td.td_link; 2875 usb_syncmem(&std->dma, 2876 std->offs + offsetof(uhci_td_t, td_link), 2877 sizeof(std->td.td_link), 2878 BUS_DMASYNC_PREWRITE); 2879 vstd->link.std = std; 2880 vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD); 2881 usb_syncmem(&vstd->dma, 2882 vstd->offs + offsetof(uhci_td_t, td_link), 2883 sizeof(vstd->td.td_link), 2884 BUS_DMASYNC_PREWRITE); 2885 } 2886 splx(s); 2887 2888 iso->next = -1; 2889 iso->inuse = 0; 2890 2891 return (USBD_NORMAL_COMPLETION); 2892 2893 bad: 2894 while (--i >= 0) 2895 uhci_free_std(sc, iso->stds[i]); 2896 free(iso->stds, M_USBHC); 2897 return (USBD_NOMEM); 2898 } 2899 2900 void 2901 uhci_device_isoc_done(usbd_xfer_handle xfer) 2902 { 2903 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2904 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2905 int i, offs; 2906 int rd = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN; 2907 2908 2909 DPRINTFN(4, ("uhci_isoc_done: length=%d, busy_free=0x%08x\n", 2910 xfer->actlen, xfer->busy_free)); 2911 2912 if (ii->xfer != xfer) 2913 /* Not on interrupt list, ignore it. */ 2914 return; 2915 2916 if (!uhci_active_intr_info(ii)) 2917 return; 2918 2919 #ifdef DIAGNOSTIC 2920 if (ii->stdend == NULL) { 2921 printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer); 2922 #ifdef UHCI_DEBUG 2923 uhci_dump_ii(ii); 2924 #endif 2925 return; 2926 } 2927 #endif 2928 2929 /* Turn off the interrupt since it is active even if the TD is not. */ 2930 usb_syncmem(&ii->stdend->dma, 2931 ii->stdend->offs + offsetof(uhci_td_t, td_status), 2932 sizeof(ii->stdend->td.td_status), 2933 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2934 ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC); 2935 usb_syncmem(&ii->stdend->dma, 2936 ii->stdend->offs + offsetof(uhci_td_t, td_status), 2937 sizeof(ii->stdend->td.td_status), 2938 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2939 2940 uhci_del_intr_info(ii); /* remove from active list */ 2941 2942 offs = 0; 2943 for (i = 0; i < xfer->nframes; i++) { 2944 usb_syncmem(&xfer->dmabuf, offs, xfer->frlengths[i], 2945 rd ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 2946 offs += xfer->frlengths[i]; 2947 } 2948 } 2949 2950 void 2951 uhci_device_intr_done(usbd_xfer_handle xfer) 2952 { 2953 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2954 uhci_softc_t *sc = ii->sc; 2955 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2956 uhci_soft_qh_t *sqh; 2957 int i, npoll, isread; 2958 2959 DPRINTFN(5, ("uhci_device_intr_done: length=%d\n", xfer->actlen)); 2960 2961 npoll = upipe->u.intr.npoll; 2962 for(i = 0; i < npoll; i++) { 2963 sqh = upipe->u.intr.qhs[i]; 2964 sqh->elink = NULL; 2965 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 2966 usb_syncmem(&sqh->dma, 2967 sqh->offs + offsetof(uhci_qh_t, qh_elink), 2968 sizeof(sqh->qh.qh_elink), 2969 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2970 } 2971 uhci_free_std_chain(sc, ii->stdstart, NULL); 2972 2973 isread = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN; 2974 usb_syncmem(&xfer->dmabuf, 0, xfer->length, 2975 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 2976 2977 /* XXX Wasteful. */ 2978 if (xfer->pipe->repeat) { 2979 uhci_soft_td_t *data, *dataend; 2980 2981 DPRINTFN(5,("uhci_device_intr_done: requeing\n")); 2982 2983 /* This alloc cannot fail since we freed the chain above. */ 2984 uhci_alloc_std_chain(upipe, sc, xfer->length, 2985 upipe->u.intr.isread, xfer->flags, 2986 &xfer->dmabuf, &data, &dataend); 2987 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2988 usb_syncmem(&dataend->dma, 2989 dataend->offs + offsetof(uhci_td_t, td_status), 2990 sizeof(dataend->td.td_status), 2991 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2992 2993 #ifdef UHCI_DEBUG 2994 if (uhcidebug > 10) { 2995 DPRINTF(("uhci_device_intr_done: data(1)\n")); 2996 uhci_dump_tds(data); 2997 uhci_dump_qh(upipe->u.intr.qhs[0]); 2998 } 2999 #endif 3000 3001 ii->stdstart = data; 3002 ii->stdend = dataend; 3003 #ifdef DIAGNOSTIC 3004 if (!ii->isdone) { 3005 printf("uhci_device_intr_done: not done, ii=%p\n", ii); 3006 } 3007 ii->isdone = 0; 3008 #endif 3009 for (i = 0; i < npoll; i++) { 3010 sqh = upipe->u.intr.qhs[i]; 3011 sqh->elink = data; 3012 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 3013 usb_syncmem(&sqh->dma, 3014 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3015 sizeof(sqh->qh.qh_elink), 3016 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3017 } 3018 xfer->status = USBD_IN_PROGRESS; 3019 /* The ii is already on the examined list, just leave it. */ 3020 } else { 3021 DPRINTFN(5,("uhci_device_intr_done: removing\n")); 3022 if (uhci_active_intr_info(ii)) 3023 uhci_del_intr_info(ii); 3024 } 3025 } 3026 3027 /* Deallocate request data structures */ 3028 void 3029 uhci_device_ctrl_done(usbd_xfer_handle xfer) 3030 { 3031 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 3032 uhci_softc_t *sc = ii->sc; 3033 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 3034 int len = UGETW(xfer->request.wLength); 3035 int isread = (xfer->request.bmRequestType & UT_READ); 3036 3037 #ifdef DIAGNOSTIC 3038 if (!(xfer->rqflags & URQ_REQUEST)) 3039 panic("uhci_device_ctrl_done: not a request"); 3040 #endif 3041 3042 if (!uhci_active_intr_info(ii)) 3043 return; 3044 3045 uhci_del_intr_info(ii); /* remove from active list */ 3046 3047 if (upipe->pipe.device->speed == USB_SPEED_LOW) 3048 uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh); 3049 else 3050 uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh); 3051 3052 if (upipe->u.ctl.length != 0) 3053 uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend); 3054 3055 if (len) { 3056 usb_syncmem(&xfer->dmabuf, 0, len, 3057 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 3058 } 3059 usb_syncmem(&upipe->u.ctl.reqdma, 0, 3060 sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE); 3061 3062 DPRINTFN(5, ("uhci_device_ctrl_done: length=%d\n", xfer->actlen)); 3063 } 3064 3065 /* Deallocate request data structures */ 3066 void 3067 uhci_device_bulk_done(usbd_xfer_handle xfer) 3068 { 3069 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 3070 uhci_softc_t *sc = ii->sc; 3071 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 3072 3073 DPRINTFN(5,("uhci_device_bulk_done: xfer=%p ii=%p sc=%p upipe=%p\n", 3074 xfer, ii, sc, upipe)); 3075 3076 if (!uhci_active_intr_info(ii)) 3077 return; 3078 3079 uhci_del_intr_info(ii); /* remove from active list */ 3080 3081 uhci_remove_bulk(sc, upipe->u.bulk.sqh); 3082 3083 uhci_free_std_chain(sc, ii->stdstart, NULL); 3084 3085 DPRINTFN(5, ("uhci_device_bulk_done: length=%d\n", xfer->actlen)); 3086 } 3087 3088 /* Add interrupt QH, called with vflock. */ 3089 void 3090 uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 3091 { 3092 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 3093 uhci_soft_qh_t *eqh; 3094 3095 DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh)); 3096 3097 eqh = vf->eqh; 3098 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 3099 sizeof(eqh->qh.qh_hlink), 3100 BUS_DMASYNC_POSTWRITE); 3101 sqh->hlink = eqh->hlink; 3102 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 3103 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 3104 sizeof(sqh->qh.qh_hlink), 3105 BUS_DMASYNC_PREWRITE); 3106 eqh->hlink = sqh; 3107 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 3108 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 3109 sizeof(eqh->qh.qh_hlink), 3110 BUS_DMASYNC_PREWRITE); 3111 vf->eqh = sqh; 3112 vf->bandwidth++; 3113 } 3114 3115 /* Remove interrupt QH. */ 3116 void 3117 uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 3118 { 3119 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 3120 uhci_soft_qh_t *pqh; 3121 3122 DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh)); 3123 3124 /* See comment in uhci_remove_ctrl() */ 3125 3126 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 3127 sizeof(sqh->qh.qh_elink), 3128 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3129 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 3130 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 3131 usb_syncmem(&sqh->dma, 3132 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3133 sizeof(sqh->qh.qh_elink), 3134 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3135 delay(UHCI_QH_REMOVE_DELAY); 3136 } 3137 3138 pqh = uhci_find_prev_qh(vf->hqh, sqh); 3139 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 3140 sizeof(sqh->qh.qh_hlink), 3141 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3142 pqh->hlink = sqh->hlink; 3143 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 3144 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 3145 sizeof(pqh->qh.qh_hlink), 3146 BUS_DMASYNC_PREWRITE); 3147 delay(UHCI_QH_REMOVE_DELAY); 3148 if (vf->eqh == sqh) 3149 vf->eqh = pqh; 3150 vf->bandwidth--; 3151 } 3152 3153 usbd_status 3154 uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival) 3155 { 3156 uhci_soft_qh_t *sqh; 3157 int i, npoll, s; 3158 u_int bestbw, bw, bestoffs, offs; 3159 3160 DPRINTFN(2, ("uhci_device_setintr: pipe=%p\n", upipe)); 3161 if (ival == 0) { 3162 printf("uhci_device_setintr: 0 interval\n"); 3163 return (USBD_INVAL); 3164 } 3165 3166 if (ival > UHCI_VFRAMELIST_COUNT) 3167 ival = UHCI_VFRAMELIST_COUNT; 3168 npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival; 3169 DPRINTFN(2, ("uhci_device_setintr: ival=%d npoll=%d\n", ival, npoll)); 3170 3171 upipe->u.intr.npoll = npoll; 3172 upipe->u.intr.qhs = 3173 malloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_WAITOK); 3174 3175 /* 3176 * Figure out which offset in the schedule that has most 3177 * bandwidth left over. 3178 */ 3179 #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1)) 3180 for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) { 3181 for (bw = i = 0; i < npoll; i++) 3182 bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth; 3183 if (bw < bestbw) { 3184 bestbw = bw; 3185 bestoffs = offs; 3186 } 3187 } 3188 DPRINTFN(1, ("uhci_device_setintr: bw=%d offs=%d\n", bestbw, bestoffs)); 3189 3190 for(i = 0; i < npoll; i++) { 3191 upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc); 3192 sqh->elink = NULL; 3193 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 3194 usb_syncmem(&sqh->dma, 3195 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3196 sizeof(sqh->qh.qh_elink), 3197 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3198 sqh->pos = MOD(i * ival + bestoffs); 3199 } 3200 #undef MOD 3201 3202 s = splusb(); 3203 /* Enter QHs into the controller data structures. */ 3204 for(i = 0; i < npoll; i++) 3205 uhci_add_intr(sc, upipe->u.intr.qhs[i]); 3206 splx(s); 3207 3208 DPRINTFN(5, ("uhci_device_setintr: returns %p\n", upipe)); 3209 return (USBD_NORMAL_COMPLETION); 3210 } 3211 3212 /* Open a new pipe. */ 3213 usbd_status 3214 uhci_open(usbd_pipe_handle pipe) 3215 { 3216 uhci_softc_t *sc = pipe->device->bus->hci_private; 3217 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 3218 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 3219 usbd_status err; 3220 int ival; 3221 3222 DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 3223 pipe, pipe->device->address, 3224 ed->bEndpointAddress, sc->sc_addr)); 3225 3226 upipe->aborting = 0; 3227 upipe->nexttoggle = 0; 3228 3229 if (pipe->device->address == sc->sc_addr) { 3230 switch (ed->bEndpointAddress) { 3231 case USB_CONTROL_ENDPOINT: 3232 pipe->methods = &uhci_root_ctrl_methods; 3233 break; 3234 case UE_DIR_IN | UHCI_INTR_ENDPT: 3235 pipe->methods = &uhci_root_intr_methods; 3236 break; 3237 default: 3238 return (USBD_INVAL); 3239 } 3240 } else { 3241 switch (ed->bmAttributes & UE_XFERTYPE) { 3242 case UE_CONTROL: 3243 pipe->methods = &uhci_device_ctrl_methods; 3244 upipe->u.ctl.sqh = uhci_alloc_sqh(sc); 3245 if (upipe->u.ctl.sqh == NULL) 3246 goto bad; 3247 upipe->u.ctl.setup = uhci_alloc_std(sc); 3248 if (upipe->u.ctl.setup == NULL) { 3249 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3250 goto bad; 3251 } 3252 upipe->u.ctl.stat = uhci_alloc_std(sc); 3253 if (upipe->u.ctl.stat == NULL) { 3254 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3255 uhci_free_std(sc, upipe->u.ctl.setup); 3256 goto bad; 3257 } 3258 err = usb_allocmem(&sc->sc_bus, 3259 sizeof(usb_device_request_t), 3260 0, &upipe->u.ctl.reqdma); 3261 if (err) { 3262 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3263 uhci_free_std(sc, upipe->u.ctl.setup); 3264 uhci_free_std(sc, upipe->u.ctl.stat); 3265 goto bad; 3266 } 3267 break; 3268 case UE_INTERRUPT: 3269 pipe->methods = &uhci_device_intr_methods; 3270 ival = pipe->interval; 3271 if (ival == USBD_DEFAULT_INTERVAL) 3272 ival = ed->bInterval; 3273 return (uhci_device_setintr(sc, upipe, ival)); 3274 case UE_ISOCHRONOUS: 3275 pipe->methods = &uhci_device_isoc_methods; 3276 return (uhci_setup_isoc(pipe)); 3277 case UE_BULK: 3278 pipe->methods = &uhci_device_bulk_methods; 3279 upipe->u.bulk.sqh = uhci_alloc_sqh(sc); 3280 if (upipe->u.bulk.sqh == NULL) 3281 goto bad; 3282 break; 3283 } 3284 } 3285 return (USBD_NORMAL_COMPLETION); 3286 3287 bad: 3288 return (USBD_NOMEM); 3289 } 3290 3291 /* 3292 * Data structures and routines to emulate the root hub. 3293 */ 3294 usb_device_descriptor_t uhci_devd = { 3295 USB_DEVICE_DESCRIPTOR_SIZE, 3296 UDESC_DEVICE, /* type */ 3297 {0x00, 0x01}, /* USB version */ 3298 UDCLASS_HUB, /* class */ 3299 UDSUBCLASS_HUB, /* subclass */ 3300 UDPROTO_FSHUB, /* protocol */ 3301 64, /* max packet */ 3302 {0},{0},{0x00,0x01}, /* device id */ 3303 1,2,0, /* string indicies */ 3304 1 /* # of configurations */ 3305 }; 3306 3307 const usb_config_descriptor_t uhci_confd = { 3308 USB_CONFIG_DESCRIPTOR_SIZE, 3309 UDESC_CONFIG, 3310 {USB_CONFIG_DESCRIPTOR_SIZE + 3311 USB_INTERFACE_DESCRIPTOR_SIZE + 3312 USB_ENDPOINT_DESCRIPTOR_SIZE}, 3313 1, 3314 1, 3315 0, 3316 UC_ATTR_MBO | UC_SELF_POWERED, 3317 0 /* max power */ 3318 }; 3319 3320 const usb_interface_descriptor_t uhci_ifcd = { 3321 USB_INTERFACE_DESCRIPTOR_SIZE, 3322 UDESC_INTERFACE, 3323 0, 3324 0, 3325 1, 3326 UICLASS_HUB, 3327 UISUBCLASS_HUB, 3328 UIPROTO_FSHUB, 3329 0 3330 }; 3331 3332 const usb_endpoint_descriptor_t uhci_endpd = { 3333 USB_ENDPOINT_DESCRIPTOR_SIZE, 3334 UDESC_ENDPOINT, 3335 UE_DIR_IN | UHCI_INTR_ENDPT, 3336 UE_INTERRUPT, 3337 {8}, 3338 255 3339 }; 3340 3341 const usb_hub_descriptor_t uhci_hubd_piix = { 3342 USB_HUB_DESCRIPTOR_SIZE, 3343 UDESC_HUB, 3344 2, 3345 { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 }, 3346 50, /* power on to power good */ 3347 0, 3348 { 0x00 }, /* both ports are removable */ 3349 { 0 }, 3350 }; 3351 3352 /* 3353 * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also 3354 * enables the port, and also states that SET_FEATURE(PORT_ENABLE) 3355 * should not be used by the USB subsystem. As we cannot issue a 3356 * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port 3357 * will be enabled as part of the reset. 3358 * 3359 * On the VT83C572, the port cannot be successfully enabled until the 3360 * outstanding "port enable change" and "connection status change" 3361 * events have been reset. 3362 */ 3363 Static usbd_status 3364 uhci_portreset(uhci_softc_t *sc, int index) 3365 { 3366 int lim, port, x; 3367 3368 if (index == 1) 3369 port = UHCI_PORTSC1; 3370 else if (index == 2) 3371 port = UHCI_PORTSC2; 3372 else 3373 return (USBD_IOERROR); 3374 3375 x = URWMASK(UREAD2(sc, port)); 3376 UWRITE2(sc, port, x | UHCI_PORTSC_PR); 3377 3378 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 3379 3380 DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n", 3381 index, UREAD2(sc, port))); 3382 3383 x = URWMASK(UREAD2(sc, port)); 3384 UWRITE2(sc, port, x & ~(UHCI_PORTSC_PR | UHCI_PORTSC_SUSP)); 3385 3386 delay(100); 3387 3388 DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n", 3389 index, UREAD2(sc, port))); 3390 3391 x = URWMASK(UREAD2(sc, port)); 3392 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3393 3394 for (lim = 10; --lim > 0;) { 3395 usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY); 3396 3397 x = UREAD2(sc, port); 3398 3399 DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n", 3400 index, lim, x)); 3401 3402 if (!(x & UHCI_PORTSC_CCS)) { 3403 /* 3404 * No device is connected (or was disconnected 3405 * during reset). Consider the port reset. 3406 * The delay must be long enough to ensure on 3407 * the initial iteration that the device 3408 * connection will have been registered. 50ms 3409 * appears to be sufficient, but 20ms is not. 3410 */ 3411 DPRINTFN(3,("uhci port %d loop %u, device detached\n", 3412 index, lim)); 3413 break; 3414 } 3415 3416 if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) { 3417 /* 3418 * Port enabled changed and/or connection 3419 * status changed were set. Reset either or 3420 * both raised flags (by writing a 1 to that 3421 * bit), and wait again for state to settle. 3422 */ 3423 UWRITE2(sc, port, URWMASK(x) | 3424 (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC))); 3425 continue; 3426 } 3427 3428 if (x & UHCI_PORTSC_PE) 3429 /* Port is enabled */ 3430 break; 3431 3432 UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE); 3433 } 3434 3435 DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n", 3436 index, UREAD2(sc, port))); 3437 3438 if (lim <= 0) { 3439 DPRINTFN(1,("uhci port %d reset timed out\n", index)); 3440 return (USBD_TIMEOUT); 3441 } 3442 3443 sc->sc_isreset = 1; 3444 return (USBD_NORMAL_COMPLETION); 3445 } 3446 3447 /* 3448 * Simulate a hardware hub by handling all the necessary requests. 3449 */ 3450 usbd_status 3451 uhci_root_ctrl_transfer(usbd_xfer_handle xfer) 3452 { 3453 usbd_status err; 3454 3455 /* Insert last in queue. */ 3456 err = usb_insert_transfer(xfer); 3457 if (err) 3458 return (err); 3459 3460 /* 3461 * Pipe isn't running (otherwise err would be USBD_INPROG), 3462 * so start it first. 3463 */ 3464 return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3465 } 3466 3467 usbd_status 3468 uhci_root_ctrl_start(usbd_xfer_handle xfer) 3469 { 3470 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3471 usb_device_request_t *req; 3472 void *buf = NULL; 3473 int port, x; 3474 int s, len, value, index, status, change, l, totlen = 0; 3475 usb_port_status_t ps; 3476 usbd_status err; 3477 3478 if (sc->sc_dying) 3479 return (USBD_IOERROR); 3480 3481 #ifdef DIAGNOSTIC 3482 if (!(xfer->rqflags & URQ_REQUEST)) 3483 panic("uhci_root_ctrl_transfer: not a request"); 3484 #endif 3485 req = &xfer->request; 3486 3487 DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n", 3488 req->bmRequestType, req->bRequest)); 3489 3490 len = UGETW(req->wLength); 3491 value = UGETW(req->wValue); 3492 index = UGETW(req->wIndex); 3493 3494 if (len != 0) 3495 buf = KERNADDR(&xfer->dmabuf, 0); 3496 3497 #define C(x,y) ((x) | ((y) << 8)) 3498 switch(C(req->bRequest, req->bmRequestType)) { 3499 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 3500 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 3501 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 3502 /* 3503 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 3504 * for the integrated root hub. 3505 */ 3506 break; 3507 case C(UR_GET_CONFIG, UT_READ_DEVICE): 3508 if (len > 0) { 3509 *(u_int8_t *)buf = sc->sc_conf; 3510 totlen = 1; 3511 } 3512 break; 3513 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 3514 DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value)); 3515 if (len == 0) 3516 break; 3517 switch(value >> 8) { 3518 case UDESC_DEVICE: 3519 if ((value & 0xff) != 0) { 3520 err = USBD_IOERROR; 3521 goto ret; 3522 } 3523 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 3524 USETW(uhci_devd.idVendor, sc->sc_id_vendor); 3525 memcpy(buf, &uhci_devd, l); 3526 break; 3527 case UDESC_CONFIG: 3528 if ((value & 0xff) != 0) { 3529 err = USBD_IOERROR; 3530 goto ret; 3531 } 3532 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 3533 memcpy(buf, &uhci_confd, l); 3534 buf = (char *)buf + l; 3535 len -= l; 3536 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 3537 totlen += l; 3538 memcpy(buf, &uhci_ifcd, l); 3539 buf = (char *)buf + l; 3540 len -= l; 3541 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 3542 totlen += l; 3543 memcpy(buf, &uhci_endpd, l); 3544 break; 3545 case UDESC_STRING: 3546 #define sd ((usb_string_descriptor_t *)buf) 3547 switch (value & 0xff) { 3548 case 0: /* Language table */ 3549 totlen = usb_makelangtbl(sd, len); 3550 break; 3551 case 1: /* Vendor */ 3552 totlen = usb_makestrdesc(sd, len, 3553 sc->sc_vendor); 3554 break; 3555 case 2: /* Product */ 3556 totlen = usb_makestrdesc(sd, len, 3557 "UHCI root hub"); 3558 break; 3559 } 3560 #undef sd 3561 break; 3562 default: 3563 err = USBD_IOERROR; 3564 goto ret; 3565 } 3566 break; 3567 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 3568 if (len > 0) { 3569 *(u_int8_t *)buf = 0; 3570 totlen = 1; 3571 } 3572 break; 3573 case C(UR_GET_STATUS, UT_READ_DEVICE): 3574 if (len > 1) { 3575 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 3576 totlen = 2; 3577 } 3578 break; 3579 case C(UR_GET_STATUS, UT_READ_INTERFACE): 3580 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 3581 if (len > 1) { 3582 USETW(((usb_status_t *)buf)->wStatus, 0); 3583 totlen = 2; 3584 } 3585 break; 3586 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 3587 if (value >= USB_MAX_DEVICES) { 3588 err = USBD_IOERROR; 3589 goto ret; 3590 } 3591 sc->sc_addr = value; 3592 break; 3593 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 3594 if (value != 0 && value != 1) { 3595 err = USBD_IOERROR; 3596 goto ret; 3597 } 3598 sc->sc_conf = value; 3599 break; 3600 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 3601 break; 3602 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 3603 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 3604 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 3605 err = USBD_IOERROR; 3606 goto ret; 3607 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 3608 break; 3609 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 3610 break; 3611 /* Hub requests */ 3612 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 3613 break; 3614 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 3615 DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 3616 "port=%d feature=%d\n", 3617 index, value)); 3618 if (index == 1) 3619 port = UHCI_PORTSC1; 3620 else if (index == 2) 3621 port = UHCI_PORTSC2; 3622 else { 3623 err = USBD_IOERROR; 3624 goto ret; 3625 } 3626 switch(value) { 3627 case UHF_PORT_ENABLE: 3628 x = URWMASK(UREAD2(sc, port)); 3629 UWRITE2(sc, port, x & ~UHCI_PORTSC_PE); 3630 break; 3631 case UHF_PORT_SUSPEND: 3632 x = URWMASK(UREAD2(sc, port)); 3633 if (!(x & UHCI_PORTSC_SUSP)) /* not suspended */ 3634 break; 3635 UWRITE2(sc, port, x | UHCI_PORTSC_RD); 3636 /* see USB2 spec ch. 7.1.7.7 */ 3637 usb_delay_ms(&sc->sc_bus, 20); 3638 UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP); 3639 /* 10ms resume delay must be provided by caller */ 3640 break; 3641 case UHF_PORT_RESET: 3642 x = URWMASK(UREAD2(sc, port)); 3643 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 3644 break; 3645 case UHF_C_PORT_CONNECTION: 3646 x = URWMASK(UREAD2(sc, port)); 3647 UWRITE2(sc, port, x | UHCI_PORTSC_CSC); 3648 break; 3649 case UHF_C_PORT_ENABLE: 3650 x = URWMASK(UREAD2(sc, port)); 3651 UWRITE2(sc, port, x | UHCI_PORTSC_POEDC); 3652 break; 3653 case UHF_C_PORT_OVER_CURRENT: 3654 x = URWMASK(UREAD2(sc, port)); 3655 UWRITE2(sc, port, x | UHCI_PORTSC_OCIC); 3656 break; 3657 case UHF_C_PORT_RESET: 3658 sc->sc_isreset = 0; 3659 err = USBD_NORMAL_COMPLETION; 3660 goto ret; 3661 case UHF_PORT_CONNECTION: 3662 case UHF_PORT_OVER_CURRENT: 3663 case UHF_PORT_POWER: 3664 case UHF_PORT_LOW_SPEED: 3665 case UHF_C_PORT_SUSPEND: 3666 default: 3667 err = USBD_IOERROR; 3668 goto ret; 3669 } 3670 break; 3671 case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER): 3672 if (index == 1) 3673 port = UHCI_PORTSC1; 3674 else if (index == 2) 3675 port = UHCI_PORTSC2; 3676 else { 3677 err = USBD_IOERROR; 3678 goto ret; 3679 } 3680 if (len > 0) { 3681 *(u_int8_t *)buf = 3682 (UREAD2(sc, port) & UHCI_PORTSC_LS) >> 3683 UHCI_PORTSC_LS_SHIFT; 3684 totlen = 1; 3685 } 3686 break; 3687 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 3688 if (len == 0) 3689 break; 3690 if ((value & 0xff) != 0) { 3691 err = USBD_IOERROR; 3692 goto ret; 3693 } 3694 l = min(len, USB_HUB_DESCRIPTOR_SIZE); 3695 totlen = l; 3696 memcpy(buf, &uhci_hubd_piix, l); 3697 break; 3698 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 3699 if (len != 4) { 3700 err = USBD_IOERROR; 3701 goto ret; 3702 } 3703 memset(buf, 0, len); 3704 totlen = len; 3705 break; 3706 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 3707 if (index == 1) 3708 port = UHCI_PORTSC1; 3709 else if (index == 2) 3710 port = UHCI_PORTSC2; 3711 else { 3712 err = USBD_IOERROR; 3713 goto ret; 3714 } 3715 if (len != 4) { 3716 err = USBD_IOERROR; 3717 goto ret; 3718 } 3719 x = UREAD2(sc, port); 3720 status = change = 0; 3721 if (x & UHCI_PORTSC_CCS) 3722 status |= UPS_CURRENT_CONNECT_STATUS; 3723 if (x & UHCI_PORTSC_CSC) 3724 change |= UPS_C_CONNECT_STATUS; 3725 if (x & UHCI_PORTSC_PE) 3726 status |= UPS_PORT_ENABLED; 3727 if (x & UHCI_PORTSC_POEDC) 3728 change |= UPS_C_PORT_ENABLED; 3729 if (x & UHCI_PORTSC_OCI) 3730 status |= UPS_OVERCURRENT_INDICATOR; 3731 if (x & UHCI_PORTSC_OCIC) 3732 change |= UPS_C_OVERCURRENT_INDICATOR; 3733 if (x & UHCI_PORTSC_SUSP) 3734 status |= UPS_SUSPEND; 3735 if (x & UHCI_PORTSC_LSDA) 3736 status |= UPS_LOW_SPEED; 3737 status |= UPS_PORT_POWER; 3738 if (sc->sc_isreset) 3739 change |= UPS_C_PORT_RESET; 3740 USETW(ps.wPortStatus, status); 3741 USETW(ps.wPortChange, change); 3742 l = min(len, sizeof ps); 3743 memcpy(buf, &ps, l); 3744 totlen = l; 3745 break; 3746 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 3747 err = USBD_IOERROR; 3748 goto ret; 3749 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 3750 break; 3751 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 3752 if (index == 1) 3753 port = UHCI_PORTSC1; 3754 else if (index == 2) 3755 port = UHCI_PORTSC2; 3756 else { 3757 err = USBD_IOERROR; 3758 goto ret; 3759 } 3760 switch(value) { 3761 case UHF_PORT_ENABLE: 3762 x = URWMASK(UREAD2(sc, port)); 3763 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3764 break; 3765 case UHF_PORT_SUSPEND: 3766 x = URWMASK(UREAD2(sc, port)); 3767 UWRITE2(sc, port, x | UHCI_PORTSC_SUSP); 3768 break; 3769 case UHF_PORT_RESET: 3770 err = uhci_portreset(sc, index); 3771 goto ret; 3772 case UHF_PORT_POWER: 3773 /* Pretend we turned on power */ 3774 err = USBD_NORMAL_COMPLETION; 3775 goto ret; 3776 case UHF_C_PORT_CONNECTION: 3777 case UHF_C_PORT_ENABLE: 3778 case UHF_C_PORT_OVER_CURRENT: 3779 case UHF_PORT_CONNECTION: 3780 case UHF_PORT_OVER_CURRENT: 3781 case UHF_PORT_LOW_SPEED: 3782 case UHF_C_PORT_SUSPEND: 3783 case UHF_C_PORT_RESET: 3784 default: 3785 err = USBD_IOERROR; 3786 goto ret; 3787 } 3788 break; 3789 default: 3790 err = USBD_IOERROR; 3791 goto ret; 3792 } 3793 xfer->actlen = totlen; 3794 err = USBD_NORMAL_COMPLETION; 3795 ret: 3796 xfer->status = err; 3797 s = splusb(); 3798 usb_transfer_complete(xfer); 3799 splx(s); 3800 return (USBD_IN_PROGRESS); 3801 } 3802 3803 /* Abort a root control request. */ 3804 void 3805 uhci_root_ctrl_abort(usbd_xfer_handle xfer) 3806 { 3807 /* Nothing to do, all transfers are synchronous. */ 3808 } 3809 3810 /* Close the root pipe. */ 3811 void 3812 uhci_root_ctrl_close(usbd_pipe_handle pipe) 3813 { 3814 DPRINTF(("uhci_root_ctrl_close\n")); 3815 } 3816 3817 /* Abort a root interrupt request. */ 3818 void 3819 uhci_root_intr_abort(usbd_xfer_handle xfer) 3820 { 3821 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3822 3823 usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, xfer); 3824 sc->sc_intr_xfer = NULL; 3825 3826 if (xfer->pipe->intrxfer == xfer) { 3827 DPRINTF(("uhci_root_intr_abort: remove\n")); 3828 xfer->pipe->intrxfer = 0; 3829 } 3830 xfer->status = USBD_CANCELLED; 3831 #ifdef DIAGNOSTIC 3832 UXFER(xfer)->iinfo.isdone = 1; 3833 #endif 3834 usb_transfer_complete(xfer); 3835 } 3836 3837 usbd_status 3838 uhci_root_intr_transfer(usbd_xfer_handle xfer) 3839 { 3840 usbd_status err; 3841 3842 /* Insert last in queue. */ 3843 err = usb_insert_transfer(xfer); 3844 if (err) 3845 return (err); 3846 3847 /* 3848 * Pipe isn't running (otherwise err would be USBD_INPROG), 3849 * start first 3850 */ 3851 return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3852 } 3853 3854 /* Start a transfer on the root interrupt pipe */ 3855 usbd_status 3856 uhci_root_intr_start(usbd_xfer_handle xfer) 3857 { 3858 usbd_pipe_handle pipe = xfer->pipe; 3859 uhci_softc_t *sc = pipe->device->bus->hci_private; 3860 unsigned int ival; 3861 3862 DPRINTFN(3, ("uhci_root_intr_start: xfer=%p len=%d flags=%d\n", 3863 xfer, xfer->length, xfer->flags)); 3864 3865 if (sc->sc_dying) 3866 return (USBD_IOERROR); 3867 3868 /* XXX temporary variable needed to avoid gcc3 warning */ 3869 ival = xfer->pipe->endpoint->edesc->bInterval; 3870 sc->sc_ival = mstohz(ival); 3871 usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer); 3872 sc->sc_intr_xfer = xfer; 3873 return (USBD_IN_PROGRESS); 3874 } 3875 3876 /* Close the root interrupt pipe. */ 3877 void 3878 uhci_root_intr_close(usbd_pipe_handle pipe) 3879 { 3880 uhci_softc_t *sc = pipe->device->bus->hci_private; 3881 3882 usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, sc->sc_intr_xfer); 3883 sc->sc_intr_xfer = NULL; 3884 DPRINTF(("uhci_root_intr_close\n")); 3885 } 3886