1 /* $NetBSD: uhci.c,v 1.212 2007/12/09 20:28:24 jmcneill Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/uhci.c,v 1.33 1999/11/17 22:33:41 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 2004 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart@augustsson.net) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * USB Universal Host Controller driver. 43 * Handles e.g. PIIX3 and PIIX4. 44 * 45 * UHCI spec: http://developer.intel.com/design/USB/UHCI11D.htm 46 * USB spec: http://www.usb.org/developers/docs/usbspec.zip 47 * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf 48 * ftp://download.intel.com/design/intarch/datashts/29056201.pdf 49 */ 50 51 #include <sys/cdefs.h> 52 __KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.212 2007/12/09 20:28:24 jmcneill Exp $"); 53 54 #include <sys/param.h> 55 #include <sys/systm.h> 56 #include <sys/kernel.h> 57 #include <sys/malloc.h> 58 #if defined(__NetBSD__) || defined(__OpenBSD__) 59 #include <sys/device.h> 60 #include <sys/select.h> 61 #include <sys/extent.h> 62 #include <uvm/uvm_extern.h> 63 #elif defined(__FreeBSD__) 64 #include <sys/module.h> 65 #include <sys/bus.h> 66 #include <machine/bus_pio.h> 67 #if defined(DIAGNOSTIC) && defined(__i386__) 68 #include <sys/cpu.h> 69 #endif 70 #endif 71 #include <sys/proc.h> 72 #include <sys/queue.h> 73 #include <sys/bus.h> 74 75 #include <machine/endian.h> 76 77 #include <dev/usb/usb.h> 78 #include <dev/usb/usbdi.h> 79 #include <dev/usb/usbdivar.h> 80 #include <dev/usb/usb_mem.h> 81 #include <dev/usb/usb_quirks.h> 82 83 #include <dev/usb/uhcireg.h> 84 #include <dev/usb/uhcivar.h> 85 86 /* Use bandwidth reclamation for control transfers. Some devices choke on it. */ 87 /*#define UHCI_CTL_LOOP */ 88 89 #if defined(__FreeBSD__) 90 #include <machine/clock.h> 91 92 #define delay(d) DELAY(d) 93 #endif 94 95 #if defined(__OpenBSD__) 96 struct cfdriver uhci_cd = { 97 NULL, "uhci", DV_DULL 98 }; 99 #endif 100 101 #ifdef UHCI_DEBUG 102 uhci_softc_t *thesc; 103 #define DPRINTF(x) if (uhcidebug) printf x 104 #define DPRINTFN(n,x) if (uhcidebug>(n)) printf x 105 int uhcidebug = 0; 106 int uhcinoloop = 0; 107 #ifndef __NetBSD__ 108 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 109 #endif 110 #else 111 #define DPRINTF(x) 112 #define DPRINTFN(n,x) 113 #endif 114 115 /* 116 * The UHCI controller is little endian, so on big endian machines 117 * the data stored in memory needs to be swapped. 118 */ 119 #if defined(__FreeBSD__) || defined(__OpenBSD__) 120 #if BYTE_ORDER == BIG_ENDIAN 121 #define htole32(x) (bswap32(x)) 122 #define le32toh(x) (bswap32(x)) 123 #else 124 #define htole32(x) (x) 125 #define le32toh(x) (x) 126 #endif 127 #endif 128 129 struct uhci_pipe { 130 struct usbd_pipe pipe; 131 int nexttoggle; 132 133 u_char aborting; 134 usbd_xfer_handle abortstart, abortend; 135 136 /* Info needed for different pipe kinds. */ 137 union { 138 /* Control pipe */ 139 struct { 140 uhci_soft_qh_t *sqh; 141 usb_dma_t reqdma; 142 uhci_soft_td_t *setup, *stat; 143 u_int length; 144 } ctl; 145 /* Interrupt pipe */ 146 struct { 147 int npoll; 148 int isread; 149 uhci_soft_qh_t **qhs; 150 } intr; 151 /* Bulk pipe */ 152 struct { 153 uhci_soft_qh_t *sqh; 154 u_int length; 155 int isread; 156 } bulk; 157 /* Iso pipe */ 158 struct iso { 159 uhci_soft_td_t **stds; 160 int next, inuse; 161 } iso; 162 } u; 163 }; 164 165 Static void uhci_globalreset(uhci_softc_t *); 166 Static usbd_status uhci_portreset(uhci_softc_t*, int); 167 Static void uhci_reset(uhci_softc_t *); 168 Static usbd_status uhci_run(uhci_softc_t *, int run); 169 Static uhci_soft_td_t *uhci_alloc_std(uhci_softc_t *); 170 Static void uhci_free_std(uhci_softc_t *, uhci_soft_td_t *); 171 Static uhci_soft_qh_t *uhci_alloc_sqh(uhci_softc_t *); 172 Static void uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *); 173 #if 0 174 Static void uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *, 175 uhci_intr_info_t *); 176 Static void uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *); 177 #endif 178 179 Static void uhci_free_std_chain(uhci_softc_t *, 180 uhci_soft_td_t *, uhci_soft_td_t *); 181 Static usbd_status uhci_alloc_std_chain(struct uhci_pipe *, 182 uhci_softc_t *, int, int, u_int16_t, usb_dma_t *, 183 uhci_soft_td_t **, uhci_soft_td_t **); 184 Static void uhci_poll_hub(void *); 185 Static void uhci_waitintr(uhci_softc_t *, usbd_xfer_handle); 186 Static void uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *); 187 Static void uhci_idone(uhci_intr_info_t *); 188 189 Static void uhci_abort_xfer(usbd_xfer_handle, usbd_status status); 190 191 Static void uhci_timeout(void *); 192 Static void uhci_timeout_task(void *); 193 Static void uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 194 Static void uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 195 Static void uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *); 196 Static void uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 197 Static void uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 198 Static void uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *); 199 Static int uhci_str(usb_string_descriptor_t *, int, const char *); 200 Static void uhci_add_loop(uhci_softc_t *sc); 201 Static void uhci_rem_loop(uhci_softc_t *sc); 202 203 Static usbd_status uhci_setup_isoc(usbd_pipe_handle pipe); 204 Static void uhci_device_isoc_enter(usbd_xfer_handle); 205 206 Static usbd_status uhci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 207 Static void uhci_freem(struct usbd_bus *, usb_dma_t *); 208 209 Static usbd_xfer_handle uhci_allocx(struct usbd_bus *); 210 Static void uhci_freex(struct usbd_bus *, usbd_xfer_handle); 211 212 Static usbd_status uhci_device_ctrl_transfer(usbd_xfer_handle); 213 Static usbd_status uhci_device_ctrl_start(usbd_xfer_handle); 214 Static void uhci_device_ctrl_abort(usbd_xfer_handle); 215 Static void uhci_device_ctrl_close(usbd_pipe_handle); 216 Static void uhci_device_ctrl_done(usbd_xfer_handle); 217 218 Static usbd_status uhci_device_intr_transfer(usbd_xfer_handle); 219 Static usbd_status uhci_device_intr_start(usbd_xfer_handle); 220 Static void uhci_device_intr_abort(usbd_xfer_handle); 221 Static void uhci_device_intr_close(usbd_pipe_handle); 222 Static void uhci_device_intr_done(usbd_xfer_handle); 223 224 Static usbd_status uhci_device_bulk_transfer(usbd_xfer_handle); 225 Static usbd_status uhci_device_bulk_start(usbd_xfer_handle); 226 Static void uhci_device_bulk_abort(usbd_xfer_handle); 227 Static void uhci_device_bulk_close(usbd_pipe_handle); 228 Static void uhci_device_bulk_done(usbd_xfer_handle); 229 230 Static usbd_status uhci_device_isoc_transfer(usbd_xfer_handle); 231 Static usbd_status uhci_device_isoc_start(usbd_xfer_handle); 232 Static void uhci_device_isoc_abort(usbd_xfer_handle); 233 Static void uhci_device_isoc_close(usbd_pipe_handle); 234 Static void uhci_device_isoc_done(usbd_xfer_handle); 235 236 Static usbd_status uhci_root_ctrl_transfer(usbd_xfer_handle); 237 Static usbd_status uhci_root_ctrl_start(usbd_xfer_handle); 238 Static void uhci_root_ctrl_abort(usbd_xfer_handle); 239 Static void uhci_root_ctrl_close(usbd_pipe_handle); 240 Static void uhci_root_ctrl_done(usbd_xfer_handle); 241 242 Static usbd_status uhci_root_intr_transfer(usbd_xfer_handle); 243 Static usbd_status uhci_root_intr_start(usbd_xfer_handle); 244 Static void uhci_root_intr_abort(usbd_xfer_handle); 245 Static void uhci_root_intr_close(usbd_pipe_handle); 246 Static void uhci_root_intr_done(usbd_xfer_handle); 247 248 Static usbd_status uhci_open(usbd_pipe_handle); 249 Static void uhci_poll(struct usbd_bus *); 250 Static void uhci_softintr(void *); 251 252 Static usbd_status uhci_device_request(usbd_xfer_handle xfer); 253 254 Static void uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *); 255 Static void uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *); 256 Static usbd_status uhci_device_setintr(uhci_softc_t *sc, 257 struct uhci_pipe *pipe, int ival); 258 259 Static void uhci_device_clear_toggle(usbd_pipe_handle pipe); 260 Static void uhci_noop(usbd_pipe_handle pipe); 261 262 Static inline uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *, 263 uhci_soft_qh_t *); 264 265 #ifdef UHCI_DEBUG 266 Static void uhci_dump_all(uhci_softc_t *); 267 Static void uhci_dumpregs(uhci_softc_t *); 268 Static void uhci_dump_qhs(uhci_soft_qh_t *); 269 Static void uhci_dump_qh(uhci_soft_qh_t *); 270 Static void uhci_dump_tds(uhci_soft_td_t *); 271 Static void uhci_dump_td(uhci_soft_td_t *); 272 Static void uhci_dump_ii(uhci_intr_info_t *ii); 273 void uhci_dump(void); 274 #endif 275 276 #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 277 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 278 #define UWRITE1(sc, r, x) \ 279 do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \ 280 } while (/*CONSTCOND*/0) 281 #define UWRITE2(sc, r, x) \ 282 do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \ 283 } while (/*CONSTCOND*/0) 284 #define UWRITE4(sc, r, x) \ 285 do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \ 286 } while (/*CONSTCOND*/0) 287 static __inline uint8_t 288 UREAD1(uhci_softc_t *sc, bus_size_t r) 289 { 290 291 UBARR(sc); 292 return bus_space_read_1(sc->iot, sc->ioh, r); 293 } 294 295 static __inline uint16_t 296 UREAD2(uhci_softc_t *sc, bus_size_t r) 297 { 298 299 UBARR(sc); 300 return bus_space_read_2(sc->iot, sc->ioh, r); 301 } 302 303 static __inline uint32_t 304 UREAD4(uhci_softc_t *sc, bus_size_t r) 305 { 306 307 UBARR(sc); 308 return bus_space_read_4(sc->iot, sc->ioh, r); 309 } 310 311 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd) 312 #define UHCISTS(sc) UREAD2(sc, UHCI_STS) 313 314 #define UHCI_RESET_TIMEOUT 100 /* ms, reset timeout */ 315 316 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK) 317 318 #define UHCI_INTR_ENDPT 1 319 320 const struct usbd_bus_methods uhci_bus_methods = { 321 uhci_open, 322 uhci_softintr, 323 uhci_poll, 324 uhci_allocm, 325 uhci_freem, 326 uhci_allocx, 327 uhci_freex, 328 }; 329 330 const struct usbd_pipe_methods uhci_root_ctrl_methods = { 331 uhci_root_ctrl_transfer, 332 uhci_root_ctrl_start, 333 uhci_root_ctrl_abort, 334 uhci_root_ctrl_close, 335 uhci_noop, 336 uhci_root_ctrl_done, 337 }; 338 339 const struct usbd_pipe_methods uhci_root_intr_methods = { 340 uhci_root_intr_transfer, 341 uhci_root_intr_start, 342 uhci_root_intr_abort, 343 uhci_root_intr_close, 344 uhci_noop, 345 uhci_root_intr_done, 346 }; 347 348 const struct usbd_pipe_methods uhci_device_ctrl_methods = { 349 uhci_device_ctrl_transfer, 350 uhci_device_ctrl_start, 351 uhci_device_ctrl_abort, 352 uhci_device_ctrl_close, 353 uhci_noop, 354 uhci_device_ctrl_done, 355 }; 356 357 const struct usbd_pipe_methods uhci_device_intr_methods = { 358 uhci_device_intr_transfer, 359 uhci_device_intr_start, 360 uhci_device_intr_abort, 361 uhci_device_intr_close, 362 uhci_device_clear_toggle, 363 uhci_device_intr_done, 364 }; 365 366 const struct usbd_pipe_methods uhci_device_bulk_methods = { 367 uhci_device_bulk_transfer, 368 uhci_device_bulk_start, 369 uhci_device_bulk_abort, 370 uhci_device_bulk_close, 371 uhci_device_clear_toggle, 372 uhci_device_bulk_done, 373 }; 374 375 const struct usbd_pipe_methods uhci_device_isoc_methods = { 376 uhci_device_isoc_transfer, 377 uhci_device_isoc_start, 378 uhci_device_isoc_abort, 379 uhci_device_isoc_close, 380 uhci_noop, 381 uhci_device_isoc_done, 382 }; 383 384 #define uhci_add_intr_info(sc, ii) \ 385 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list) 386 #define uhci_del_intr_info(ii) \ 387 do { \ 388 LIST_REMOVE((ii), list); \ 389 (ii)->list.le_prev = NULL; \ 390 } while (0) 391 #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL) 392 393 Static inline uhci_soft_qh_t * 394 uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh) 395 { 396 DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh)); 397 398 for (; pqh->hlink != sqh; pqh = pqh->hlink) { 399 #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG) 400 if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) { 401 printf("uhci_find_prev_qh: QH not found\n"); 402 return (NULL); 403 } 404 #endif 405 } 406 return (pqh); 407 } 408 409 void 410 uhci_globalreset(uhci_softc_t *sc) 411 { 412 UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */ 413 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */ 414 UHCICMD(sc, 0); /* do nothing */ 415 } 416 417 usbd_status 418 uhci_init(uhci_softc_t *sc) 419 { 420 usbd_status err; 421 int i, j; 422 uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh; 423 uhci_soft_td_t *std; 424 425 DPRINTFN(1,("uhci_init: start\n")); 426 427 #ifdef UHCI_DEBUG 428 thesc = sc; 429 430 if (uhcidebug > 2) 431 uhci_dumpregs(sc); 432 #endif 433 434 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */ 435 uhci_globalreset(sc); /* reset the controller */ 436 uhci_reset(sc); 437 438 #ifdef __NetBSD__ 439 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 440 USB_MEM_RESERVE); 441 #endif 442 443 /* Allocate and initialize real frame array. */ 444 err = usb_allocmem(&sc->sc_bus, 445 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 446 UHCI_FRAMELIST_ALIGN, &sc->sc_dma); 447 if (err) 448 return (err); 449 sc->sc_pframes = KERNADDR(&sc->sc_dma, 0); 450 UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */ 451 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/ 452 453 /* 454 * Allocate a TD, inactive, that hangs from the last QH. 455 * This is to avoid a bug in the PIIX that makes it run berserk 456 * otherwise. 457 */ 458 std = uhci_alloc_std(sc); 459 if (std == NULL) 460 return (USBD_NOMEM); 461 std->link.std = NULL; 462 std->td.td_link = htole32(UHCI_PTR_T); 463 std->td.td_status = htole32(0); /* inactive */ 464 std->td.td_token = htole32(0); 465 std->td.td_buffer = htole32(0); 466 467 /* Allocate the dummy QH marking the end and used for looping the QHs.*/ 468 lsqh = uhci_alloc_sqh(sc); 469 if (lsqh == NULL) 470 return (USBD_NOMEM); 471 lsqh->hlink = NULL; 472 lsqh->qh.qh_hlink = htole32(UHCI_PTR_T); /* end of QH chain */ 473 lsqh->elink = std; 474 lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD); 475 sc->sc_last_qh = lsqh; 476 477 /* Allocate the dummy QH where bulk traffic will be queued. */ 478 bsqh = uhci_alloc_sqh(sc); 479 if (bsqh == NULL) 480 return (USBD_NOMEM); 481 bsqh->hlink = lsqh; 482 bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH); 483 bsqh->elink = NULL; 484 bsqh->qh.qh_elink = htole32(UHCI_PTR_T); 485 sc->sc_bulk_start = sc->sc_bulk_end = bsqh; 486 487 /* Allocate dummy QH where high speed control traffic will be queued. */ 488 chsqh = uhci_alloc_sqh(sc); 489 if (chsqh == NULL) 490 return (USBD_NOMEM); 491 chsqh->hlink = bsqh; 492 chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH); 493 chsqh->elink = NULL; 494 chsqh->qh.qh_elink = htole32(UHCI_PTR_T); 495 sc->sc_hctl_start = sc->sc_hctl_end = chsqh; 496 497 /* Allocate dummy QH where control traffic will be queued. */ 498 clsqh = uhci_alloc_sqh(sc); 499 if (clsqh == NULL) 500 return (USBD_NOMEM); 501 clsqh->hlink = bsqh; 502 clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH); 503 clsqh->elink = NULL; 504 clsqh->qh.qh_elink = htole32(UHCI_PTR_T); 505 sc->sc_lctl_start = sc->sc_lctl_end = clsqh; 506 507 /* 508 * Make all (virtual) frame list pointers point to the interrupt 509 * queue heads and the interrupt queue heads at the control 510 * queue head and point the physical frame list to the virtual. 511 */ 512 for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 513 std = uhci_alloc_std(sc); 514 sqh = uhci_alloc_sqh(sc); 515 if (std == NULL || sqh == NULL) 516 return (USBD_NOMEM); 517 std->link.sqh = sqh; 518 std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH); 519 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 520 std->td.td_token = htole32(0); 521 std->td.td_buffer = htole32(0); 522 sqh->hlink = clsqh; 523 sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH); 524 sqh->elink = NULL; 525 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 526 sc->sc_vframes[i].htd = std; 527 sc->sc_vframes[i].etd = std; 528 sc->sc_vframes[i].hqh = sqh; 529 sc->sc_vframes[i].eqh = sqh; 530 for (j = i; 531 j < UHCI_FRAMELIST_COUNT; 532 j += UHCI_VFRAMELIST_COUNT) 533 sc->sc_pframes[j] = htole32(std->physaddr); 534 } 535 536 LIST_INIT(&sc->sc_intrhead); 537 538 SIMPLEQ_INIT(&sc->sc_free_xfers); 539 540 usb_callout_init(sc->sc_poll_handle); 541 542 /* Set up the bus struct. */ 543 sc->sc_bus.methods = &uhci_bus_methods; 544 sc->sc_bus.pipe_size = sizeof(struct uhci_pipe); 545 546 UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */ 547 548 DPRINTFN(1,("uhci_init: enabling\n")); 549 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE | 550 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */ 551 552 return (uhci_run(sc, 1)); /* and here we go... */ 553 } 554 555 #if defined(__NetBSD__) || defined(__OpenBSD__) 556 int 557 uhci_activate(device_ptr_t self, enum devact act) 558 { 559 struct uhci_softc *sc = (struct uhci_softc *)self; 560 int rv = 0; 561 562 switch (act) { 563 case DVACT_ACTIVATE: 564 return (EOPNOTSUPP); 565 566 case DVACT_DEACTIVATE: 567 sc->sc_dying = 1; 568 if (sc->sc_child != NULL) 569 rv = config_deactivate(sc->sc_child); 570 break; 571 } 572 return (rv); 573 } 574 575 int 576 uhci_detach(struct uhci_softc *sc, int flags) 577 { 578 usbd_xfer_handle xfer; 579 int rv = 0; 580 581 if (sc->sc_child != NULL) 582 rv = config_detach(sc->sc_child, flags); 583 584 if (rv != 0) 585 return (rv); 586 587 /* Free all xfers associated with this HC. */ 588 for (;;) { 589 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 590 if (xfer == NULL) 591 break; 592 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 593 free(xfer, M_USB); 594 } 595 596 /* XXX free other data structures XXX */ 597 598 return (rv); 599 } 600 #endif 601 602 usbd_status 603 uhci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 604 { 605 struct uhci_softc *sc = (struct uhci_softc *)bus; 606 usbd_status status; 607 u_int32_t n; 608 609 /* 610 * XXX 611 * Since we are allocating a buffer we can assume that we will 612 * need TDs for it. Since we don't want to allocate those from 613 * an interrupt context, we allocate them here and free them again. 614 * This is no guarantee that we'll get the TDs next time... 615 */ 616 n = size / 8; 617 if (n > 16) { 618 u_int32_t i; 619 uhci_soft_td_t **stds; 620 DPRINTF(("uhci_allocm: get %d TDs\n", n)); 621 stds = malloc(sizeof(uhci_soft_td_t *) * n, M_TEMP, 622 M_WAITOK|M_ZERO); 623 for(i=0; i < n; i++) 624 stds[i] = uhci_alloc_std(sc); 625 for(i=0; i < n; i++) 626 if (stds[i] != NULL) 627 uhci_free_std(sc, stds[i]); 628 free(stds, M_TEMP); 629 } 630 631 632 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 633 #ifdef __NetBSD__ 634 if (status == USBD_NOMEM) 635 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 636 #endif 637 return status; 638 } 639 640 void 641 uhci_freem(struct usbd_bus *bus, usb_dma_t *dma) 642 { 643 #ifdef __NetBSD__ 644 if (dma->block->flags & USB_DMA_RESERVE) { 645 usb_reserve_freem(&((struct uhci_softc *)bus)->sc_dma_reserve, 646 dma); 647 return; 648 } 649 #endif 650 usb_freemem(&((struct uhci_softc *)bus)->sc_bus, dma); 651 } 652 653 usbd_xfer_handle 654 uhci_allocx(struct usbd_bus *bus) 655 { 656 struct uhci_softc *sc = (struct uhci_softc *)bus; 657 usbd_xfer_handle xfer; 658 659 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 660 if (xfer != NULL) { 661 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 662 #ifdef DIAGNOSTIC 663 if (xfer->busy_free != XFER_FREE) { 664 printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer, 665 xfer->busy_free); 666 } 667 #endif 668 } else { 669 xfer = malloc(sizeof(struct uhci_xfer), M_USB, M_NOWAIT); 670 } 671 if (xfer != NULL) { 672 memset(xfer, 0, sizeof (struct uhci_xfer)); 673 UXFER(xfer)->iinfo.sc = sc; 674 #ifdef DIAGNOSTIC 675 UXFER(xfer)->iinfo.isdone = 1; 676 xfer->busy_free = XFER_BUSY; 677 #endif 678 } 679 return (xfer); 680 } 681 682 void 683 uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 684 { 685 struct uhci_softc *sc = (struct uhci_softc *)bus; 686 687 #ifdef DIAGNOSTIC 688 if (xfer->busy_free != XFER_BUSY) { 689 printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer, 690 xfer->busy_free); 691 } 692 xfer->busy_free = XFER_FREE; 693 if (!UXFER(xfer)->iinfo.isdone) { 694 printf("uhci_freex: !isdone\n"); 695 } 696 #endif 697 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 698 } 699 700 /* 701 * Handle suspend/resume. 702 * 703 * We need to switch to polling mode here, because this routine is 704 * called from an interrupt context. This is all right since we 705 * are almost suspended anyway. 706 */ 707 bool 708 uhci_resume(device_t dv) 709 { 710 uhci_softc_t *sc = device_private(dv); 711 int cmd; 712 int s; 713 714 s = splhardusb(); 715 716 cmd = UREAD2(sc, UHCI_CMD); 717 sc->sc_bus.use_polling++; 718 if (cmd & UHCI_CMD_RS) 719 uhci_run(sc, 0); 720 721 /* restore saved state */ 722 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); 723 UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum); 724 UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof); 725 726 UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force resume */ 727 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 728 UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */ 729 UHCICMD(sc, UHCI_CMD_MAXP); 730 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | 731 UHCI_INTR_RIE | UHCI_INTR_IOCE | UHCI_INTR_SPIE); 732 uhci_run(sc, 1); /* and start traffic again */ 733 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 734 sc->sc_bus.use_polling--; 735 if (sc->sc_intr_xfer != NULL) 736 usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, 737 sc->sc_intr_xfer); 738 #ifdef UHCI_DEBUG 739 if (uhcidebug > 2) 740 uhci_dumpregs(sc); 741 #endif 742 743 splx(s); 744 745 return true; 746 } 747 748 bool 749 uhci_suspend(device_t dv) 750 { 751 uhci_softc_t *sc = device_private(dv); 752 int cmd; 753 int s; 754 755 s = splhardusb(); 756 757 cmd = UREAD2(sc, UHCI_CMD); 758 759 #ifdef UHCI_DEBUG 760 if (uhcidebug > 2) 761 uhci_dumpregs(sc); 762 #endif 763 if (sc->sc_intr_xfer != NULL) 764 usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, 765 sc->sc_intr_xfer); 766 sc->sc_bus.use_polling++; 767 uhci_run(sc, 0); /* stop the controller */ 768 cmd &= ~UHCI_CMD_RS; 769 770 /* save some state if BIOS doesn't */ 771 sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM); 772 sc->sc_saved_sof = UREAD1(sc, UHCI_SOF); 773 774 UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */ 775 776 UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter suspend */ 777 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 778 sc->sc_bus.use_polling--; 779 780 splx(s); 781 782 return true; 783 } 784 785 #ifdef UHCI_DEBUG 786 Static void 787 uhci_dumpregs(uhci_softc_t *sc) 788 { 789 DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, " 790 "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n", 791 USBDEVNAME(sc->sc_bus.bdev), 792 UREAD2(sc, UHCI_CMD), 793 UREAD2(sc, UHCI_STS), 794 UREAD2(sc, UHCI_INTR), 795 UREAD2(sc, UHCI_FRNUM), 796 UREAD4(sc, UHCI_FLBASEADDR), 797 UREAD1(sc, UHCI_SOF), 798 UREAD2(sc, UHCI_PORTSC1), 799 UREAD2(sc, UHCI_PORTSC2))); 800 } 801 802 void 803 uhci_dump_td(uhci_soft_td_t *p) 804 { 805 char sbuf[128], sbuf2[128]; 806 807 DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx " 808 "token=0x%08lx buffer=0x%08lx\n", 809 p, (long)p->physaddr, 810 (long)le32toh(p->td.td_link), 811 (long)le32toh(p->td.td_status), 812 (long)le32toh(p->td.td_token), 813 (long)le32toh(p->td.td_buffer))); 814 815 bitmask_snprintf((u_int32_t)le32toh(p->td.td_link), "\20\1T\2Q\3VF", 816 sbuf, sizeof(sbuf)); 817 bitmask_snprintf((u_int32_t)le32toh(p->td.td_status), 818 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27" 819 "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD", 820 sbuf2, sizeof(sbuf2)); 821 822 DPRINTFN(-1,(" %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d," 823 "D=%d,maxlen=%d\n", sbuf, sbuf2, 824 UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)), 825 UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)), 826 UHCI_TD_GET_PID(le32toh(p->td.td_token)), 827 UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)), 828 UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)), 829 UHCI_TD_GET_DT(le32toh(p->td.td_token)), 830 UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token)))); 831 } 832 833 void 834 uhci_dump_qh(uhci_soft_qh_t *sqh) 835 { 836 DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh, 837 (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink), 838 le32toh(sqh->qh.qh_elink))); 839 } 840 841 842 #if 1 843 void 844 uhci_dump(void) 845 { 846 uhci_dump_all(thesc); 847 } 848 #endif 849 850 void 851 uhci_dump_all(uhci_softc_t *sc) 852 { 853 uhci_dumpregs(sc); 854 printf("intrs=%d\n", sc->sc_bus.no_intrs); 855 /*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/ 856 uhci_dump_qh(sc->sc_lctl_start); 857 } 858 859 860 void 861 uhci_dump_qhs(uhci_soft_qh_t *sqh) 862 { 863 uhci_dump_qh(sqh); 864 865 /* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards 866 * Traverses sideways first, then down. 867 * 868 * QH1 869 * QH2 870 * No QH 871 * TD2.1 872 * TD2.2 873 * TD1.1 874 * etc. 875 * 876 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1. 877 */ 878 879 880 if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T)) 881 uhci_dump_qhs(sqh->hlink); 882 else 883 DPRINTF(("No QH\n")); 884 885 if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T)) 886 uhci_dump_tds(sqh->elink); 887 else 888 DPRINTF(("No TD\n")); 889 } 890 891 void 892 uhci_dump_tds(uhci_soft_td_t *std) 893 { 894 uhci_soft_td_t *td; 895 896 for(td = std; td != NULL; td = td->link.std) { 897 uhci_dump_td(td); 898 899 /* Check whether the link pointer in this TD marks 900 * the link pointer as end of queue. This avoids 901 * printing the free list in case the queue/TD has 902 * already been moved there (seatbelt). 903 */ 904 if (le32toh(td->td.td_link) & UHCI_PTR_T || 905 le32toh(td->td.td_link) == 0) 906 break; 907 } 908 } 909 910 Static void 911 uhci_dump_ii(uhci_intr_info_t *ii) 912 { 913 usbd_pipe_handle pipe; 914 usb_endpoint_descriptor_t *ed; 915 usbd_device_handle dev; 916 917 #ifdef DIAGNOSTIC 918 #define DONE ii->isdone 919 #else 920 #define DONE 0 921 #endif 922 if (ii == NULL) { 923 printf("ii NULL\n"); 924 return; 925 } 926 if (ii->xfer == NULL) { 927 printf("ii %p: done=%d xfer=NULL\n", 928 ii, DONE); 929 return; 930 } 931 pipe = ii->xfer->pipe; 932 if (pipe == NULL) { 933 printf("ii %p: done=%d xfer=%p pipe=NULL\n", 934 ii, DONE, ii->xfer); 935 return; 936 } 937 if (pipe->endpoint == NULL) { 938 printf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n", 939 ii, DONE, ii->xfer, pipe); 940 return; 941 } 942 if (pipe->device == NULL) { 943 printf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n", 944 ii, DONE, ii->xfer, pipe); 945 return; 946 } 947 ed = pipe->endpoint->edesc; 948 dev = pipe->device; 949 printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n", 950 ii, DONE, ii->xfer, dev, 951 UGETW(dev->ddesc.idVendor), 952 UGETW(dev->ddesc.idProduct), 953 dev->address, pipe, 954 ed->bEndpointAddress, ed->bmAttributes); 955 #undef DONE 956 } 957 958 void uhci_dump_iis(struct uhci_softc *sc); 959 void 960 uhci_dump_iis(struct uhci_softc *sc) 961 { 962 uhci_intr_info_t *ii; 963 964 printf("intr_info list:\n"); 965 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list)) 966 uhci_dump_ii(ii); 967 } 968 969 void iidump(void); 970 void iidump(void) { uhci_dump_iis(thesc); } 971 972 #endif 973 974 /* 975 * This routine is executed periodically and simulates interrupts 976 * from the root controller interrupt pipe for port status change. 977 */ 978 void 979 uhci_poll_hub(void *addr) 980 { 981 usbd_xfer_handle xfer = addr; 982 usbd_pipe_handle pipe = xfer->pipe; 983 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 984 int s; 985 u_char *p; 986 987 DPRINTFN(20, ("uhci_poll_hub\n")); 988 989 usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer); 990 991 p = KERNADDR(&xfer->dmabuf, 0); 992 p[0] = 0; 993 if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 994 p[0] |= 1<<1; 995 if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 996 p[0] |= 1<<2; 997 if (p[0] == 0) 998 /* No change, try again in a while */ 999 return; 1000 1001 xfer->actlen = 1; 1002 xfer->status = USBD_NORMAL_COMPLETION; 1003 s = splusb(); 1004 xfer->device->bus->intr_context++; 1005 usb_transfer_complete(xfer); 1006 xfer->device->bus->intr_context--; 1007 splx(s); 1008 } 1009 1010 void 1011 uhci_root_intr_done(usbd_xfer_handle xfer) 1012 { 1013 } 1014 1015 void 1016 uhci_root_ctrl_done(usbd_xfer_handle xfer) 1017 { 1018 } 1019 1020 /* 1021 * Let the last QH loop back to the high speed control transfer QH. 1022 * This is what intel calls "bandwidth reclamation" and improves 1023 * USB performance a lot for some devices. 1024 * If we are already looping, just count it. 1025 */ 1026 void 1027 uhci_add_loop(uhci_softc_t *sc) { 1028 #ifdef UHCI_DEBUG 1029 if (uhcinoloop) 1030 return; 1031 #endif 1032 if (++sc->sc_loops == 1) { 1033 DPRINTFN(5,("uhci_start_loop: add\n")); 1034 /* Note, we don't loop back the soft pointer. */ 1035 sc->sc_last_qh->qh.qh_hlink = 1036 htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH); 1037 } 1038 } 1039 1040 void 1041 uhci_rem_loop(uhci_softc_t *sc) { 1042 #ifdef UHCI_DEBUG 1043 if (uhcinoloop) 1044 return; 1045 #endif 1046 if (--sc->sc_loops == 0) { 1047 DPRINTFN(5,("uhci_end_loop: remove\n")); 1048 sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T); 1049 } 1050 } 1051 1052 /* Add high speed control QH, called at splusb(). */ 1053 void 1054 uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1055 { 1056 uhci_soft_qh_t *eqh; 1057 1058 SPLUSBCHECK; 1059 1060 DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh)); 1061 eqh = sc->sc_hctl_end; 1062 sqh->hlink = eqh->hlink; 1063 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1064 eqh->hlink = sqh; 1065 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1066 sc->sc_hctl_end = sqh; 1067 #ifdef UHCI_CTL_LOOP 1068 uhci_add_loop(sc); 1069 #endif 1070 } 1071 1072 /* Remove high speed control QH, called at splusb(). */ 1073 void 1074 uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1075 { 1076 uhci_soft_qh_t *pqh; 1077 1078 SPLUSBCHECK; 1079 1080 DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh)); 1081 #ifdef UHCI_CTL_LOOP 1082 uhci_rem_loop(sc); 1083 #endif 1084 /* 1085 * The T bit should be set in the elink of the QH so that the HC 1086 * doesn't follow the pointer. This condition may fail if the 1087 * the transferred packet was short so that the QH still points 1088 * at the last used TD. 1089 * In this case we set the T bit and wait a little for the HC 1090 * to stop looking at the TD. 1091 */ 1092 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1093 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1094 delay(UHCI_QH_REMOVE_DELAY); 1095 } 1096 1097 pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh); 1098 pqh->hlink = sqh->hlink; 1099 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1100 delay(UHCI_QH_REMOVE_DELAY); 1101 if (sc->sc_hctl_end == sqh) 1102 sc->sc_hctl_end = pqh; 1103 } 1104 1105 /* Add low speed control QH, called at splusb(). */ 1106 void 1107 uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1108 { 1109 uhci_soft_qh_t *eqh; 1110 1111 SPLUSBCHECK; 1112 1113 DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh)); 1114 eqh = sc->sc_lctl_end; 1115 sqh->hlink = eqh->hlink; 1116 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1117 eqh->hlink = sqh; 1118 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1119 sc->sc_lctl_end = sqh; 1120 } 1121 1122 /* Remove low speed control QH, called at splusb(). */ 1123 void 1124 uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1125 { 1126 uhci_soft_qh_t *pqh; 1127 1128 SPLUSBCHECK; 1129 1130 DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh)); 1131 /* See comment in uhci_remove_hs_ctrl() */ 1132 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1133 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1134 delay(UHCI_QH_REMOVE_DELAY); 1135 } 1136 pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh); 1137 pqh->hlink = sqh->hlink; 1138 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1139 delay(UHCI_QH_REMOVE_DELAY); 1140 if (sc->sc_lctl_end == sqh) 1141 sc->sc_lctl_end = pqh; 1142 } 1143 1144 /* Add bulk QH, called at splusb(). */ 1145 void 1146 uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1147 { 1148 uhci_soft_qh_t *eqh; 1149 1150 SPLUSBCHECK; 1151 1152 DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh)); 1153 eqh = sc->sc_bulk_end; 1154 sqh->hlink = eqh->hlink; 1155 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1156 eqh->hlink = sqh; 1157 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1158 sc->sc_bulk_end = sqh; 1159 uhci_add_loop(sc); 1160 } 1161 1162 /* Remove bulk QH, called at splusb(). */ 1163 void 1164 uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1165 { 1166 uhci_soft_qh_t *pqh; 1167 1168 SPLUSBCHECK; 1169 1170 DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh)); 1171 uhci_rem_loop(sc); 1172 /* See comment in uhci_remove_hs_ctrl() */ 1173 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1174 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1175 delay(UHCI_QH_REMOVE_DELAY); 1176 } 1177 pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh); 1178 pqh->hlink = sqh->hlink; 1179 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1180 delay(UHCI_QH_REMOVE_DELAY); 1181 if (sc->sc_bulk_end == sqh) 1182 sc->sc_bulk_end = pqh; 1183 } 1184 1185 Static int uhci_intr1(uhci_softc_t *); 1186 1187 int 1188 uhci_intr(void *arg) 1189 { 1190 uhci_softc_t *sc = arg; 1191 1192 if (sc->sc_dying || !device_has_power(&sc->sc_bus.bdev)) 1193 return (0); 1194 1195 if (sc->sc_bus.use_polling) { 1196 #ifdef DIAGNOSTIC 1197 DPRINTFN(16, ("uhci_intr: ignored interrupt while polling\n")); 1198 #endif 1199 return (0); 1200 } 1201 1202 return (uhci_intr1(sc)); 1203 } 1204 1205 int 1206 uhci_intr1(uhci_softc_t *sc) 1207 { 1208 int status; 1209 int ack; 1210 1211 #ifdef UHCI_DEBUG 1212 if (uhcidebug > 15) { 1213 DPRINTF(("%s: uhci_intr1\n", USBDEVNAME(sc->sc_bus.bdev))); 1214 uhci_dumpregs(sc); 1215 } 1216 #endif 1217 1218 status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS; 1219 if (status == 0) /* The interrupt was not for us. */ 1220 return (0); 1221 1222 if (sc->sc_suspend != PWR_RESUME) { 1223 #ifdef DIAGNOSTIC 1224 printf("%s: interrupt while not operating ignored\n", 1225 USBDEVNAME(sc->sc_bus.bdev)); 1226 #endif 1227 UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */ 1228 return (0); 1229 } 1230 1231 ack = 0; 1232 if (status & UHCI_STS_USBINT) 1233 ack |= UHCI_STS_USBINT; 1234 if (status & UHCI_STS_USBEI) 1235 ack |= UHCI_STS_USBEI; 1236 if (status & UHCI_STS_RD) { 1237 ack |= UHCI_STS_RD; 1238 #ifdef UHCI_DEBUG 1239 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1240 #endif 1241 } 1242 if (status & UHCI_STS_HSE) { 1243 ack |= UHCI_STS_HSE; 1244 printf("%s: host system error\n", USBDEVNAME(sc->sc_bus.bdev)); 1245 } 1246 if (status & UHCI_STS_HCPE) { 1247 ack |= UHCI_STS_HCPE; 1248 printf("%s: host controller process error\n", 1249 USBDEVNAME(sc->sc_bus.bdev)); 1250 } 1251 if (status & UHCI_STS_HCH) { 1252 /* no acknowledge needed */ 1253 if (!sc->sc_dying) { 1254 printf("%s: host controller halted\n", 1255 USBDEVNAME(sc->sc_bus.bdev)); 1256 #ifdef UHCI_DEBUG 1257 uhci_dump_all(sc); 1258 #endif 1259 } 1260 sc->sc_dying = 1; 1261 } 1262 1263 if (!ack) 1264 return (0); /* nothing to acknowledge */ 1265 UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */ 1266 1267 sc->sc_bus.no_intrs++; 1268 usb_schedsoftintr(&sc->sc_bus); 1269 1270 DPRINTFN(15, ("%s: uhci_intr: exit\n", USBDEVNAME(sc->sc_bus.bdev))); 1271 1272 return (1); 1273 } 1274 1275 void 1276 uhci_softintr(void *v) 1277 { 1278 uhci_softc_t *sc = v; 1279 uhci_intr_info_t *ii, *nextii; 1280 1281 DPRINTFN(10,("%s: uhci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 1282 sc->sc_bus.intr_context)); 1283 1284 sc->sc_bus.intr_context++; 1285 1286 /* 1287 * Interrupts on UHCI really suck. When the host controller 1288 * interrupts because a transfer is completed there is no 1289 * way of knowing which transfer it was. You can scan down 1290 * the TDs and QHs of the previous frame to limit the search, 1291 * but that assumes that the interrupt was not delayed by more 1292 * than 1 ms, which may not always be true (e.g. after debug 1293 * output on a slow console). 1294 * We scan all interrupt descriptors to see if any have 1295 * completed. 1296 */ 1297 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = nextii) { 1298 nextii = LIST_NEXT(ii, list); 1299 uhci_check_intr(sc, ii); 1300 } 1301 1302 #ifdef USB_USE_SOFTINTR 1303 if (sc->sc_softwake) { 1304 sc->sc_softwake = 0; 1305 wakeup(&sc->sc_softwake); 1306 } 1307 #endif /* USB_USE_SOFTINTR */ 1308 1309 sc->sc_bus.intr_context--; 1310 } 1311 1312 /* Check for an interrupt. */ 1313 void 1314 uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii) 1315 { 1316 uhci_soft_td_t *std, *lstd; 1317 u_int32_t status; 1318 1319 DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii)); 1320 #ifdef DIAGNOSTIC 1321 if (ii == NULL) { 1322 printf("uhci_check_intr: no ii? %p\n", ii); 1323 return; 1324 } 1325 #endif 1326 if (ii->xfer->status == USBD_CANCELLED || 1327 ii->xfer->status == USBD_TIMEOUT) { 1328 DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer)); 1329 return; 1330 } 1331 1332 if (ii->stdstart == NULL) 1333 return; 1334 lstd = ii->stdend; 1335 #ifdef DIAGNOSTIC 1336 if (lstd == NULL) { 1337 printf("uhci_check_intr: std==0\n"); 1338 return; 1339 } 1340 #endif 1341 /* 1342 * If the last TD is still active we need to check whether there 1343 * is an error somewhere in the middle, or whether there was a 1344 * short packet (SPD and not ACTIVE). 1345 */ 1346 if (le32toh(lstd->td.td_status) & UHCI_TD_ACTIVE) { 1347 DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii)); 1348 for (std = ii->stdstart; std != lstd; std = std->link.std) { 1349 status = le32toh(std->td.td_status); 1350 /* If there's an active TD the xfer isn't done. */ 1351 if (status & UHCI_TD_ACTIVE) 1352 break; 1353 /* Any kind of error makes the xfer done. */ 1354 if (status & UHCI_TD_STALLED) 1355 goto done; 1356 /* We want short packets, and it is short: it's done */ 1357 if ((status & UHCI_TD_SPD) && 1358 UHCI_TD_GET_ACTLEN(status) < 1359 UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token))) 1360 goto done; 1361 } 1362 DPRINTFN(12, ("uhci_check_intr: ii=%p std=%p still active\n", 1363 ii, ii->stdstart)); 1364 return; 1365 } 1366 done: 1367 DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii)); 1368 usb_uncallout(ii->xfer->timeout_handle, uhci_timeout, ii); 1369 uhci_idone(ii); 1370 } 1371 1372 /* Called at splusb() */ 1373 void 1374 uhci_idone(uhci_intr_info_t *ii) 1375 { 1376 usbd_xfer_handle xfer = ii->xfer; 1377 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 1378 uhci_soft_td_t *std; 1379 u_int32_t status = 0, nstatus; 1380 int actlen; 1381 1382 DPRINTFN(12, ("uhci_idone: ii=%p\n", ii)); 1383 #ifdef DIAGNOSTIC 1384 { 1385 int s = splhigh(); 1386 if (ii->isdone) { 1387 splx(s); 1388 #ifdef UHCI_DEBUG 1389 printf("uhci_idone: ii is done!\n "); 1390 uhci_dump_ii(ii); 1391 #else 1392 printf("uhci_idone: ii=%p is done!\n", ii); 1393 #endif 1394 return; 1395 } 1396 ii->isdone = 1; 1397 splx(s); 1398 } 1399 #endif 1400 1401 if (xfer->nframes != 0) { 1402 /* Isoc transfer, do things differently. */ 1403 uhci_soft_td_t **stds = upipe->u.iso.stds; 1404 int i, n, nframes, len; 1405 1406 DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii)); 1407 1408 nframes = xfer->nframes; 1409 actlen = 0; 1410 n = UXFER(xfer)->curframe; 1411 for (i = 0; i < nframes; i++) { 1412 std = stds[n]; 1413 #ifdef UHCI_DEBUG 1414 if (uhcidebug > 5) { 1415 DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i)); 1416 uhci_dump_td(std); 1417 } 1418 #endif 1419 if (++n >= UHCI_VFRAMELIST_COUNT) 1420 n = 0; 1421 status = le32toh(std->td.td_status); 1422 len = UHCI_TD_GET_ACTLEN(status); 1423 xfer->frlengths[i] = len; 1424 actlen += len; 1425 } 1426 upipe->u.iso.inuse -= nframes; 1427 xfer->actlen = actlen; 1428 xfer->status = USBD_NORMAL_COMPLETION; 1429 goto end; 1430 } 1431 1432 #ifdef UHCI_DEBUG 1433 DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n", 1434 ii, xfer, upipe)); 1435 if (uhcidebug > 10) 1436 uhci_dump_tds(ii->stdstart); 1437 #endif 1438 1439 /* The transfer is done, compute actual length and status. */ 1440 actlen = 0; 1441 for (std = ii->stdstart; std != NULL; std = std->link.std) { 1442 nstatus = le32toh(std->td.td_status); 1443 if (nstatus & UHCI_TD_ACTIVE) 1444 break; 1445 1446 status = nstatus; 1447 if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) != 1448 UHCI_TD_PID_SETUP) 1449 actlen += UHCI_TD_GET_ACTLEN(status); 1450 else { 1451 /* 1452 * UHCI will report CRCTO in addition to a STALL or NAK 1453 * for a SETUP transaction. See section 3.2.2, "TD 1454 * CONTROL AND STATUS". 1455 */ 1456 if (status & (UHCI_TD_STALLED | UHCI_TD_NAK)) 1457 status &= ~UHCI_TD_CRCTO; 1458 } 1459 } 1460 /* If there are left over TDs we need to update the toggle. */ 1461 if (std != NULL) 1462 upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token)); 1463 1464 status &= UHCI_TD_ERROR; 1465 DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n", 1466 actlen, status)); 1467 xfer->actlen = actlen; 1468 if (status != 0) { 1469 #ifdef UHCI_DEBUG 1470 char sbuf[128]; 1471 1472 bitmask_snprintf((u_int32_t)status, 1473 "\20\22BITSTUFF\23CRCTO\24NAK\25" 1474 "BABBLE\26DBUFFER\27STALLED\30ACTIVE", 1475 sbuf, sizeof(sbuf)); 1476 1477 DPRINTFN((status == UHCI_TD_STALLED)*10, 1478 ("uhci_idone: error, addr=%d, endpt=0x%02x, " 1479 "status 0x%s\n", 1480 xfer->pipe->device->address, 1481 xfer->pipe->endpoint->edesc->bEndpointAddress, 1482 sbuf)); 1483 #endif 1484 1485 if (status == UHCI_TD_STALLED) 1486 xfer->status = USBD_STALLED; 1487 else 1488 xfer->status = USBD_IOERROR; /* more info XXX */ 1489 } else { 1490 xfer->status = USBD_NORMAL_COMPLETION; 1491 } 1492 1493 end: 1494 usb_transfer_complete(xfer); 1495 DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii)); 1496 } 1497 1498 /* 1499 * Called when a request does not complete. 1500 */ 1501 void 1502 uhci_timeout(void *addr) 1503 { 1504 uhci_intr_info_t *ii = addr; 1505 struct uhci_xfer *uxfer = UXFER(ii->xfer); 1506 struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.pipe; 1507 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus; 1508 1509 DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer)); 1510 1511 if (sc->sc_dying) { 1512 uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT); 1513 return; 1514 } 1515 1516 /* Execute the abort in a process context. */ 1517 usb_init_task(&uxfer->abort_task, uhci_timeout_task, ii->xfer); 1518 usb_add_task(uxfer->xfer.pipe->device, &uxfer->abort_task, 1519 USB_TASKQ_HC); 1520 } 1521 1522 void 1523 uhci_timeout_task(void *addr) 1524 { 1525 usbd_xfer_handle xfer = addr; 1526 int s; 1527 1528 DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer)); 1529 1530 s = splusb(); 1531 uhci_abort_xfer(xfer, USBD_TIMEOUT); 1532 splx(s); 1533 } 1534 1535 /* 1536 * Wait here until controller claims to have an interrupt. 1537 * Then call uhci_intr and return. Use timeout to avoid waiting 1538 * too long. 1539 * Only used during boot when interrupts are not enabled yet. 1540 */ 1541 void 1542 uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer) 1543 { 1544 int timo = xfer->timeout; 1545 uhci_intr_info_t *ii; 1546 1547 DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo)); 1548 1549 xfer->status = USBD_IN_PROGRESS; 1550 for (; timo >= 0; timo--) { 1551 usb_delay_ms(&sc->sc_bus, 1); 1552 DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS))); 1553 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) { 1554 uhci_intr1(sc); 1555 if (xfer->status != USBD_IN_PROGRESS) 1556 return; 1557 } 1558 } 1559 1560 /* Timeout */ 1561 DPRINTF(("uhci_waitintr: timeout\n")); 1562 for (ii = LIST_FIRST(&sc->sc_intrhead); 1563 ii != NULL && ii->xfer != xfer; 1564 ii = LIST_NEXT(ii, list)) 1565 ; 1566 #ifdef DIAGNOSTIC 1567 if (ii == NULL) 1568 panic("uhci_waitintr: lost intr_info"); 1569 #endif 1570 uhci_idone(ii); 1571 } 1572 1573 void 1574 uhci_poll(struct usbd_bus *bus) 1575 { 1576 uhci_softc_t *sc = (uhci_softc_t *)bus; 1577 1578 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) 1579 uhci_intr1(sc); 1580 } 1581 1582 void 1583 uhci_reset(uhci_softc_t *sc) 1584 { 1585 int n; 1586 1587 UHCICMD(sc, UHCI_CMD_HCRESET); 1588 /* The reset bit goes low when the controller is done. */ 1589 for (n = 0; n < UHCI_RESET_TIMEOUT && 1590 (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++) 1591 usb_delay_ms(&sc->sc_bus, 1); 1592 if (n >= UHCI_RESET_TIMEOUT) 1593 printf("%s: controller did not reset\n", 1594 USBDEVNAME(sc->sc_bus.bdev)); 1595 } 1596 1597 usbd_status 1598 uhci_run(uhci_softc_t *sc, int run) 1599 { 1600 int s, n, running; 1601 u_int16_t cmd; 1602 1603 run = run != 0; 1604 s = splhardusb(); 1605 DPRINTF(("uhci_run: setting run=%d\n", run)); 1606 cmd = UREAD2(sc, UHCI_CMD); 1607 if (run) 1608 cmd |= UHCI_CMD_RS; 1609 else 1610 cmd &= ~UHCI_CMD_RS; 1611 UHCICMD(sc, cmd); 1612 for(n = 0; n < 10; n++) { 1613 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH); 1614 /* return when we've entered the state we want */ 1615 if (run == running) { 1616 splx(s); 1617 DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n", 1618 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS))); 1619 return (USBD_NORMAL_COMPLETION); 1620 } 1621 usb_delay_ms(&sc->sc_bus, 1); 1622 } 1623 splx(s); 1624 printf("%s: cannot %s\n", USBDEVNAME(sc->sc_bus.bdev), 1625 run ? "start" : "stop"); 1626 return (USBD_IOERROR); 1627 } 1628 1629 /* 1630 * Memory management routines. 1631 * uhci_alloc_std allocates TDs 1632 * uhci_alloc_sqh allocates QHs 1633 * These two routines do their own free list management, 1634 * partly for speed, partly because allocating DMAable memory 1635 * has page size granularaity so much memory would be wasted if 1636 * only one TD/QH (32 bytes) was placed in each allocated chunk. 1637 */ 1638 1639 uhci_soft_td_t * 1640 uhci_alloc_std(uhci_softc_t *sc) 1641 { 1642 uhci_soft_td_t *std; 1643 usbd_status err; 1644 int i, offs; 1645 usb_dma_t dma; 1646 1647 if (sc->sc_freetds == NULL) { 1648 DPRINTFN(2,("uhci_alloc_std: allocating chunk\n")); 1649 err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK, 1650 UHCI_TD_ALIGN, &dma); 1651 if (err) 1652 return (0); 1653 for(i = 0; i < UHCI_STD_CHUNK; i++) { 1654 offs = i * UHCI_STD_SIZE; 1655 std = KERNADDR(&dma, offs); 1656 std->physaddr = DMAADDR(&dma, offs); 1657 std->link.std = sc->sc_freetds; 1658 sc->sc_freetds = std; 1659 } 1660 } 1661 std = sc->sc_freetds; 1662 sc->sc_freetds = std->link.std; 1663 memset(&std->td, 0, sizeof(uhci_td_t)); 1664 return std; 1665 } 1666 1667 void 1668 uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std) 1669 { 1670 #ifdef DIAGNOSTIC 1671 #define TD_IS_FREE 0x12345678 1672 if (le32toh(std->td.td_token) == TD_IS_FREE) { 1673 printf("uhci_free_std: freeing free TD %p\n", std); 1674 return; 1675 } 1676 std->td.td_token = htole32(TD_IS_FREE); 1677 #endif 1678 std->link.std = sc->sc_freetds; 1679 sc->sc_freetds = std; 1680 } 1681 1682 uhci_soft_qh_t * 1683 uhci_alloc_sqh(uhci_softc_t *sc) 1684 { 1685 uhci_soft_qh_t *sqh; 1686 usbd_status err; 1687 int i, offs; 1688 usb_dma_t dma; 1689 1690 if (sc->sc_freeqhs == NULL) { 1691 DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n")); 1692 err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK, 1693 UHCI_QH_ALIGN, &dma); 1694 if (err) 1695 return (0); 1696 for(i = 0; i < UHCI_SQH_CHUNK; i++) { 1697 offs = i * UHCI_SQH_SIZE; 1698 sqh = KERNADDR(&dma, offs); 1699 sqh->physaddr = DMAADDR(&dma, offs); 1700 sqh->hlink = sc->sc_freeqhs; 1701 sc->sc_freeqhs = sqh; 1702 } 1703 } 1704 sqh = sc->sc_freeqhs; 1705 sc->sc_freeqhs = sqh->hlink; 1706 memset(&sqh->qh, 0, sizeof(uhci_qh_t)); 1707 return (sqh); 1708 } 1709 1710 void 1711 uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1712 { 1713 sqh->hlink = sc->sc_freeqhs; 1714 sc->sc_freeqhs = sqh; 1715 } 1716 1717 void 1718 uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std, 1719 uhci_soft_td_t *stdend) 1720 { 1721 uhci_soft_td_t *p; 1722 1723 for (; std != stdend; std = p) { 1724 p = std->link.std; 1725 uhci_free_std(sc, std); 1726 } 1727 } 1728 1729 usbd_status 1730 uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len, 1731 int rd, u_int16_t flags, usb_dma_t *dma, 1732 uhci_soft_td_t **sp, uhci_soft_td_t **ep) 1733 { 1734 uhci_soft_td_t *p, *lastp; 1735 uhci_physaddr_t lastlink; 1736 int i, ntd, l, tog, maxp; 1737 u_int32_t status; 1738 int addr = upipe->pipe.device->address; 1739 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 1740 1741 DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d speed=%d " 1742 "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len, 1743 upipe->pipe.device->speed, flags)); 1744 maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize); 1745 if (maxp == 0) { 1746 printf("uhci_alloc_std_chain: maxp=0\n"); 1747 return (USBD_INVAL); 1748 } 1749 ntd = (len + maxp - 1) / maxp; 1750 if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0) 1751 ntd++; 1752 DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd)); 1753 if (ntd == 0) { 1754 *sp = *ep = 0; 1755 DPRINTFN(-1,("uhci_alloc_std_chain: ntd=0\n")); 1756 return (USBD_NORMAL_COMPLETION); 1757 } 1758 tog = upipe->nexttoggle; 1759 if (ntd % 2 == 0) 1760 tog ^= 1; 1761 upipe->nexttoggle = tog ^ 1; 1762 lastp = NULL; 1763 lastlink = UHCI_PTR_T; 1764 ntd--; 1765 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE); 1766 if (upipe->pipe.device->speed == USB_SPEED_LOW) 1767 status |= UHCI_TD_LS; 1768 if (flags & USBD_SHORT_XFER_OK) 1769 status |= UHCI_TD_SPD; 1770 for (i = ntd; i >= 0; i--) { 1771 p = uhci_alloc_std(sc); 1772 if (p == NULL) { 1773 KASSERT(lastp != NULL); 1774 uhci_free_std_chain(sc, lastp, NULL); 1775 return (USBD_NOMEM); 1776 } 1777 p->link.std = lastp; 1778 p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD); 1779 lastp = p; 1780 lastlink = p->physaddr; 1781 p->td.td_status = htole32(status); 1782 if (i == ntd) { 1783 /* last TD */ 1784 l = len % maxp; 1785 if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER)) 1786 l = maxp; 1787 *ep = p; 1788 } else 1789 l = maxp; 1790 p->td.td_token = 1791 htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) : 1792 UHCI_TD_OUT(l, endpt, addr, tog)); 1793 p->td.td_buffer = htole32(DMAADDR(dma, i * maxp)); 1794 tog ^= 1; 1795 } 1796 *sp = lastp; 1797 DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n", 1798 upipe->nexttoggle)); 1799 return (USBD_NORMAL_COMPLETION); 1800 } 1801 1802 void 1803 uhci_device_clear_toggle(usbd_pipe_handle pipe) 1804 { 1805 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1806 upipe->nexttoggle = 0; 1807 } 1808 1809 void 1810 uhci_noop(usbd_pipe_handle pipe) 1811 { 1812 } 1813 1814 usbd_status 1815 uhci_device_bulk_transfer(usbd_xfer_handle xfer) 1816 { 1817 usbd_status err; 1818 1819 /* Insert last in queue. */ 1820 err = usb_insert_transfer(xfer); 1821 if (err) 1822 return (err); 1823 1824 /* 1825 * Pipe isn't running (otherwise err would be USBD_INPROG), 1826 * so start it first. 1827 */ 1828 return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1829 } 1830 1831 usbd_status 1832 uhci_device_bulk_start(usbd_xfer_handle xfer) 1833 { 1834 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 1835 usbd_device_handle dev = upipe->pipe.device; 1836 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1837 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 1838 uhci_soft_td_t *data, *dataend; 1839 uhci_soft_qh_t *sqh; 1840 usbd_status err; 1841 int len, isread, endpt; 1842 int s; 1843 1844 DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%d flags=%d ii=%p\n", 1845 xfer, xfer->length, xfer->flags, ii)); 1846 1847 if (sc->sc_dying) 1848 return (USBD_IOERROR); 1849 1850 #ifdef DIAGNOSTIC 1851 if (xfer->rqflags & URQ_REQUEST) 1852 panic("uhci_device_bulk_transfer: a request"); 1853 #endif 1854 1855 len = xfer->length; 1856 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 1857 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 1858 sqh = upipe->u.bulk.sqh; 1859 1860 upipe->u.bulk.isread = isread; 1861 upipe->u.bulk.length = len; 1862 1863 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags, 1864 &xfer->dmabuf, &data, &dataend); 1865 if (err) 1866 return (err); 1867 dataend->td.td_status |= htole32(UHCI_TD_IOC); 1868 1869 #ifdef UHCI_DEBUG 1870 if (uhcidebug > 8) { 1871 DPRINTF(("uhci_device_bulk_transfer: data(1)\n")); 1872 uhci_dump_tds(data); 1873 } 1874 #endif 1875 1876 /* Set up interrupt info. */ 1877 ii->xfer = xfer; 1878 ii->stdstart = data; 1879 ii->stdend = dataend; 1880 #ifdef DIAGNOSTIC 1881 if (!ii->isdone) { 1882 printf("uhci_device_bulk_transfer: not done, ii=%p\n", ii); 1883 } 1884 ii->isdone = 0; 1885 #endif 1886 1887 sqh->elink = data; 1888 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 1889 1890 s = splusb(); 1891 uhci_add_bulk(sc, sqh); 1892 uhci_add_intr_info(sc, ii); 1893 1894 if (xfer->timeout && !sc->sc_bus.use_polling) { 1895 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 1896 uhci_timeout, ii); 1897 } 1898 xfer->status = USBD_IN_PROGRESS; 1899 splx(s); 1900 1901 #ifdef UHCI_DEBUG 1902 if (uhcidebug > 10) { 1903 DPRINTF(("uhci_device_bulk_transfer: data(2)\n")); 1904 uhci_dump_tds(data); 1905 } 1906 #endif 1907 1908 if (sc->sc_bus.use_polling) 1909 uhci_waitintr(sc, xfer); 1910 1911 return (USBD_IN_PROGRESS); 1912 } 1913 1914 /* Abort a device bulk request. */ 1915 void 1916 uhci_device_bulk_abort(usbd_xfer_handle xfer) 1917 { 1918 DPRINTF(("uhci_device_bulk_abort:\n")); 1919 uhci_abort_xfer(xfer, USBD_CANCELLED); 1920 } 1921 1922 /* 1923 * Abort a device request. 1924 * If this routine is called at splusb() it guarantees that the request 1925 * will be removed from the hardware scheduling and that the callback 1926 * for it will be called with USBD_CANCELLED status. 1927 * It's impossible to guarantee that the requested transfer will not 1928 * have happened since the hardware runs concurrently. 1929 * If the transaction has already happened we rely on the ordinary 1930 * interrupt processing to process it. 1931 */ 1932 void 1933 uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 1934 { 1935 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 1936 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 1937 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus; 1938 uhci_soft_td_t *std; 1939 int s; 1940 int wake; 1941 1942 DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status)); 1943 1944 if (sc->sc_dying) { 1945 /* If we're dying, just do the software part. */ 1946 s = splusb(); 1947 xfer->status = status; /* make software ignore it */ 1948 usb_uncallout(xfer->timeout_handle, uhci_timeout, xfer); 1949 usb_transfer_complete(xfer); 1950 splx(s); 1951 return; 1952 } 1953 1954 if (xfer->device->bus->intr_context || !curproc) 1955 panic("uhci_abort_xfer: not in process context"); 1956 1957 /* 1958 * If an abort is already in progress then just wait for it to 1959 * complete and return. 1960 */ 1961 if (xfer->hcflags & UXFER_ABORTING) { 1962 DPRINTFN(2, ("uhci_abort_xfer: already aborting\n")); 1963 #ifdef DIAGNOSTIC 1964 if (status == USBD_TIMEOUT) 1965 printf("uhci_abort_xfer: TIMEOUT while aborting\n"); 1966 #endif 1967 /* Override the status which might be USBD_TIMEOUT. */ 1968 xfer->status = status; 1969 DPRINTFN(2, ("uhci_abort_xfer: waiting for abort to finish\n")); 1970 xfer->hcflags |= UXFER_ABORTWAIT; 1971 while (xfer->hcflags & UXFER_ABORTING) 1972 tsleep(&xfer->hcflags, PZERO, "uhciaw", 0); 1973 return; 1974 } 1975 xfer->hcflags |= UXFER_ABORTING; 1976 1977 /* 1978 * Step 1: Make interrupt routine and hardware ignore xfer. 1979 */ 1980 s = splusb(); 1981 xfer->status = status; /* make software ignore it */ 1982 usb_uncallout(xfer->timeout_handle, uhci_timeout, ii); 1983 DPRINTFN(1,("uhci_abort_xfer: stop ii=%p\n", ii)); 1984 for (std = ii->stdstart; std != NULL; std = std->link.std) 1985 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 1986 splx(s); 1987 1988 /* 1989 * Step 2: Wait until we know hardware has finished any possible 1990 * use of the xfer. Also make sure the soft interrupt routine 1991 * has run. 1992 */ 1993 usb_delay_ms(upipe->pipe.device->bus, 2); /* Hardware finishes in 1ms */ 1994 s = splusb(); 1995 #ifdef USB_USE_SOFTINTR 1996 sc->sc_softwake = 1; 1997 #endif /* USB_USE_SOFTINTR */ 1998 usb_schedsoftintr(&sc->sc_bus); 1999 #ifdef USB_USE_SOFTINTR 2000 DPRINTFN(1,("uhci_abort_xfer: tsleep\n")); 2001 tsleep(&sc->sc_softwake, PZERO, "uhciab", 0); 2002 #endif /* USB_USE_SOFTINTR */ 2003 splx(s); 2004 2005 /* 2006 * Step 3: Execute callback. 2007 */ 2008 DPRINTFN(1,("uhci_abort_xfer: callback\n")); 2009 s = splusb(); 2010 #ifdef DIAGNOSTIC 2011 ii->isdone = 1; 2012 #endif 2013 wake = xfer->hcflags & UXFER_ABORTWAIT; 2014 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2015 usb_transfer_complete(xfer); 2016 if (wake) 2017 wakeup(&xfer->hcflags); 2018 splx(s); 2019 } 2020 2021 /* Close a device bulk pipe. */ 2022 void 2023 uhci_device_bulk_close(usbd_pipe_handle pipe) 2024 { 2025 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2026 usbd_device_handle dev = upipe->pipe.device; 2027 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2028 2029 uhci_free_sqh(sc, upipe->u.bulk.sqh); 2030 } 2031 2032 usbd_status 2033 uhci_device_ctrl_transfer(usbd_xfer_handle xfer) 2034 { 2035 usbd_status err; 2036 2037 /* Insert last in queue. */ 2038 err = usb_insert_transfer(xfer); 2039 if (err) 2040 return (err); 2041 2042 /* 2043 * Pipe isn't running (otherwise err would be USBD_INPROG), 2044 * so start it first. 2045 */ 2046 return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2047 } 2048 2049 usbd_status 2050 uhci_device_ctrl_start(usbd_xfer_handle xfer) 2051 { 2052 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus; 2053 usbd_status err; 2054 2055 if (sc->sc_dying) 2056 return (USBD_IOERROR); 2057 2058 #ifdef DIAGNOSTIC 2059 if (!(xfer->rqflags & URQ_REQUEST)) 2060 panic("uhci_device_ctrl_transfer: not a request"); 2061 #endif 2062 2063 err = uhci_device_request(xfer); 2064 if (err) 2065 return (err); 2066 2067 if (sc->sc_bus.use_polling) 2068 uhci_waitintr(sc, xfer); 2069 return (USBD_IN_PROGRESS); 2070 } 2071 2072 usbd_status 2073 uhci_device_intr_transfer(usbd_xfer_handle xfer) 2074 { 2075 usbd_status err; 2076 2077 /* Insert last in queue. */ 2078 err = usb_insert_transfer(xfer); 2079 if (err) 2080 return (err); 2081 2082 /* 2083 * Pipe isn't running (otherwise err would be USBD_INPROG), 2084 * so start it first. 2085 */ 2086 return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2087 } 2088 2089 usbd_status 2090 uhci_device_intr_start(usbd_xfer_handle xfer) 2091 { 2092 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2093 usbd_device_handle dev = upipe->pipe.device; 2094 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2095 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2096 uhci_soft_td_t *data, *dataend; 2097 uhci_soft_qh_t *sqh; 2098 usbd_status err; 2099 int isread, endpt; 2100 int i, s; 2101 2102 if (sc->sc_dying) 2103 return (USBD_IOERROR); 2104 2105 DPRINTFN(3,("uhci_device_intr_transfer: xfer=%p len=%d flags=%d\n", 2106 xfer, xfer->length, xfer->flags)); 2107 2108 #ifdef DIAGNOSTIC 2109 if (xfer->rqflags & URQ_REQUEST) 2110 panic("uhci_device_intr_transfer: a request"); 2111 #endif 2112 2113 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2114 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2115 2116 upipe->u.intr.isread = isread; 2117 2118 err = uhci_alloc_std_chain(upipe, sc, xfer->length, isread, 2119 xfer->flags, &xfer->dmabuf, &data, 2120 &dataend); 2121 if (err) 2122 return (err); 2123 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2124 2125 #ifdef UHCI_DEBUG 2126 if (uhcidebug > 10) { 2127 DPRINTF(("uhci_device_intr_transfer: data(1)\n")); 2128 uhci_dump_tds(data); 2129 uhci_dump_qh(upipe->u.intr.qhs[0]); 2130 } 2131 #endif 2132 2133 s = splusb(); 2134 /* Set up interrupt info. */ 2135 ii->xfer = xfer; 2136 ii->stdstart = data; 2137 ii->stdend = dataend; 2138 #ifdef DIAGNOSTIC 2139 if (!ii->isdone) { 2140 printf("uhci_device_intr_transfer: not done, ii=%p\n", ii); 2141 } 2142 ii->isdone = 0; 2143 #endif 2144 2145 DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n", 2146 upipe->u.intr.qhs[0])); 2147 for (i = 0; i < upipe->u.intr.npoll; i++) { 2148 sqh = upipe->u.intr.qhs[i]; 2149 sqh->elink = data; 2150 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2151 } 2152 uhci_add_intr_info(sc, ii); 2153 xfer->status = USBD_IN_PROGRESS; 2154 splx(s); 2155 2156 #ifdef UHCI_DEBUG 2157 if (uhcidebug > 10) { 2158 DPRINTF(("uhci_device_intr_transfer: data(2)\n")); 2159 uhci_dump_tds(data); 2160 uhci_dump_qh(upipe->u.intr.qhs[0]); 2161 } 2162 #endif 2163 2164 return (USBD_IN_PROGRESS); 2165 } 2166 2167 /* Abort a device control request. */ 2168 void 2169 uhci_device_ctrl_abort(usbd_xfer_handle xfer) 2170 { 2171 DPRINTF(("uhci_device_ctrl_abort:\n")); 2172 uhci_abort_xfer(xfer, USBD_CANCELLED); 2173 } 2174 2175 /* Close a device control pipe. */ 2176 void 2177 uhci_device_ctrl_close(usbd_pipe_handle pipe) 2178 { 2179 } 2180 2181 /* Abort a device interrupt request. */ 2182 void 2183 uhci_device_intr_abort(usbd_xfer_handle xfer) 2184 { 2185 DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer)); 2186 if (xfer->pipe->intrxfer == xfer) { 2187 DPRINTFN(1,("uhci_device_intr_abort: remove\n")); 2188 xfer->pipe->intrxfer = NULL; 2189 } 2190 uhci_abort_xfer(xfer, USBD_CANCELLED); 2191 } 2192 2193 /* Close a device interrupt pipe. */ 2194 void 2195 uhci_device_intr_close(usbd_pipe_handle pipe) 2196 { 2197 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2198 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 2199 int i, npoll; 2200 int s; 2201 2202 /* Unlink descriptors from controller data structures. */ 2203 npoll = upipe->u.intr.npoll; 2204 s = splusb(); 2205 for (i = 0; i < npoll; i++) 2206 uhci_remove_intr(sc, upipe->u.intr.qhs[i]); 2207 splx(s); 2208 2209 /* 2210 * We now have to wait for any activity on the physical 2211 * descriptors to stop. 2212 */ 2213 usb_delay_ms(&sc->sc_bus, 2); 2214 2215 for(i = 0; i < npoll; i++) 2216 uhci_free_sqh(sc, upipe->u.intr.qhs[i]); 2217 free(upipe->u.intr.qhs, M_USBHC); 2218 2219 /* XXX free other resources */ 2220 } 2221 2222 usbd_status 2223 uhci_device_request(usbd_xfer_handle xfer) 2224 { 2225 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2226 usb_device_request_t *req = &xfer->request; 2227 usbd_device_handle dev = upipe->pipe.device; 2228 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2229 int addr = dev->address; 2230 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2231 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2232 uhci_soft_td_t *setup, *data, *stat, *next, *dataend; 2233 uhci_soft_qh_t *sqh; 2234 int len; 2235 u_int32_t ls; 2236 usbd_status err; 2237 int isread; 2238 int s; 2239 2240 DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, " 2241 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2242 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2243 UGETW(req->wIndex), UGETW(req->wLength), 2244 addr, endpt)); 2245 2246 ls = dev->speed == USB_SPEED_LOW ? UHCI_TD_LS : 0; 2247 isread = req->bmRequestType & UT_READ; 2248 len = UGETW(req->wLength); 2249 2250 setup = upipe->u.ctl.setup; 2251 stat = upipe->u.ctl.stat; 2252 sqh = upipe->u.ctl.sqh; 2253 2254 /* Set up data transaction */ 2255 if (len != 0) { 2256 upipe->nexttoggle = 1; 2257 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags, 2258 &xfer->dmabuf, &data, &dataend); 2259 if (err) 2260 return (err); 2261 next = data; 2262 dataend->link.std = stat; 2263 dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_VF | UHCI_PTR_TD); 2264 } else { 2265 next = stat; 2266 } 2267 upipe->u.ctl.length = len; 2268 2269 memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req); 2270 2271 setup->link.std = next; 2272 setup->td.td_link = htole32(next->physaddr | UHCI_PTR_VF | UHCI_PTR_TD); 2273 setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2274 UHCI_TD_ACTIVE); 2275 setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr)); 2276 setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0)); 2277 2278 stat->link.std = NULL; 2279 stat->td.td_link = htole32(UHCI_PTR_T); 2280 stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2281 UHCI_TD_ACTIVE | UHCI_TD_IOC); 2282 stat->td.td_token = 2283 htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) : 2284 UHCI_TD_IN (0, endpt, addr, 1)); 2285 stat->td.td_buffer = htole32(0); 2286 2287 #ifdef UHCI_DEBUG 2288 if (uhcidebug > 10) { 2289 DPRINTF(("uhci_device_request: before transfer\n")); 2290 uhci_dump_tds(setup); 2291 } 2292 #endif 2293 2294 /* Set up interrupt info. */ 2295 ii->xfer = xfer; 2296 ii->stdstart = setup; 2297 ii->stdend = stat; 2298 #ifdef DIAGNOSTIC 2299 if (!ii->isdone) { 2300 printf("uhci_device_request: not done, ii=%p\n", ii); 2301 } 2302 ii->isdone = 0; 2303 #endif 2304 2305 sqh->elink = setup; 2306 sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD); 2307 2308 s = splusb(); 2309 if (dev->speed == USB_SPEED_LOW) 2310 uhci_add_ls_ctrl(sc, sqh); 2311 else 2312 uhci_add_hs_ctrl(sc, sqh); 2313 uhci_add_intr_info(sc, ii); 2314 #ifdef UHCI_DEBUG 2315 if (uhcidebug > 12) { 2316 uhci_soft_td_t *std; 2317 uhci_soft_qh_t *xqh; 2318 uhci_soft_qh_t *sxqh; 2319 int maxqh = 0; 2320 uhci_physaddr_t link; 2321 DPRINTF(("uhci_enter_ctl_q: follow from [0]\n")); 2322 for (std = sc->sc_vframes[0].htd, link = 0; 2323 (link & UHCI_PTR_QH) == 0; 2324 std = std->link.std) { 2325 link = le32toh(std->td.td_link); 2326 uhci_dump_td(std); 2327 } 2328 sxqh = (uhci_soft_qh_t *)std; 2329 uhci_dump_qh(sxqh); 2330 for (xqh = sxqh; 2331 xqh != NULL; 2332 xqh = (maxqh++ == 5 || xqh->hlink == sxqh || 2333 xqh->hlink == xqh ? NULL : xqh->hlink)) { 2334 uhci_dump_qh(xqh); 2335 } 2336 DPRINTF(("Enqueued QH:\n")); 2337 uhci_dump_qh(sqh); 2338 uhci_dump_tds(sqh->elink); 2339 } 2340 #endif 2341 if (xfer->timeout && !sc->sc_bus.use_polling) { 2342 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2343 uhci_timeout, ii); 2344 } 2345 xfer->status = USBD_IN_PROGRESS; 2346 splx(s); 2347 2348 return (USBD_NORMAL_COMPLETION); 2349 } 2350 2351 usbd_status 2352 uhci_device_isoc_transfer(usbd_xfer_handle xfer) 2353 { 2354 usbd_status err; 2355 2356 DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer)); 2357 2358 /* Put it on our queue, */ 2359 err = usb_insert_transfer(xfer); 2360 2361 /* bail out on error, */ 2362 if (err && err != USBD_IN_PROGRESS) 2363 return (err); 2364 2365 /* XXX should check inuse here */ 2366 2367 /* insert into schedule, */ 2368 uhci_device_isoc_enter(xfer); 2369 2370 /* and start if the pipe wasn't running */ 2371 if (!err) 2372 uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 2373 2374 return (err); 2375 } 2376 2377 void 2378 uhci_device_isoc_enter(usbd_xfer_handle xfer) 2379 { 2380 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2381 usbd_device_handle dev = upipe->pipe.device; 2382 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2383 struct iso *iso = &upipe->u.iso; 2384 uhci_soft_td_t *std; 2385 u_int32_t buf, len, status; 2386 int s, i, next, nframes; 2387 2388 DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p " 2389 "nframes=%d\n", 2390 iso->inuse, iso->next, xfer, xfer->nframes)); 2391 2392 if (sc->sc_dying) 2393 return; 2394 2395 if (xfer->status == USBD_IN_PROGRESS) { 2396 /* This request has already been entered into the frame list */ 2397 printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer); 2398 /* XXX */ 2399 } 2400 2401 #ifdef DIAGNOSTIC 2402 if (iso->inuse >= UHCI_VFRAMELIST_COUNT) 2403 printf("uhci_device_isoc_enter: overflow!\n"); 2404 #endif 2405 2406 next = iso->next; 2407 if (next == -1) { 2408 /* Not in use yet, schedule it a few frames ahead. */ 2409 next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT; 2410 DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next)); 2411 } 2412 2413 xfer->status = USBD_IN_PROGRESS; 2414 UXFER(xfer)->curframe = next; 2415 2416 buf = DMAADDR(&xfer->dmabuf, 0); 2417 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) | 2418 UHCI_TD_ACTIVE | 2419 UHCI_TD_IOS); 2420 nframes = xfer->nframes; 2421 s = splusb(); 2422 for (i = 0; i < nframes; i++) { 2423 std = iso->stds[next]; 2424 if (++next >= UHCI_VFRAMELIST_COUNT) 2425 next = 0; 2426 len = xfer->frlengths[i]; 2427 std->td.td_buffer = htole32(buf); 2428 if (i == nframes - 1) 2429 status |= UHCI_TD_IOC; 2430 std->td.td_status = htole32(status); 2431 std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK); 2432 std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len)); 2433 #ifdef UHCI_DEBUG 2434 if (uhcidebug > 5) { 2435 DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i)); 2436 uhci_dump_td(std); 2437 } 2438 #endif 2439 buf += len; 2440 } 2441 iso->next = next; 2442 iso->inuse += xfer->nframes; 2443 2444 splx(s); 2445 } 2446 2447 usbd_status 2448 uhci_device_isoc_start(usbd_xfer_handle xfer) 2449 { 2450 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2451 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus; 2452 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2453 uhci_soft_td_t *end; 2454 int s, i; 2455 2456 DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer)); 2457 2458 if (sc->sc_dying) 2459 return (USBD_IOERROR); 2460 2461 #ifdef DIAGNOSTIC 2462 if (xfer->status != USBD_IN_PROGRESS) 2463 printf("uhci_device_isoc_start: not in progress %p\n", xfer); 2464 #endif 2465 2466 /* Find the last TD */ 2467 i = UXFER(xfer)->curframe + xfer->nframes; 2468 if (i >= UHCI_VFRAMELIST_COUNT) 2469 i -= UHCI_VFRAMELIST_COUNT; 2470 end = upipe->u.iso.stds[i]; 2471 2472 #ifdef DIAGNOSTIC 2473 if (end == NULL) { 2474 printf("uhci_device_isoc_start: end == NULL\n"); 2475 return (USBD_INVAL); 2476 } 2477 #endif 2478 2479 s = splusb(); 2480 2481 /* Set up interrupt info. */ 2482 ii->xfer = xfer; 2483 ii->stdstart = end; 2484 ii->stdend = end; 2485 #ifdef DIAGNOSTIC 2486 if (!ii->isdone) 2487 printf("uhci_device_isoc_start: not done, ii=%p\n", ii); 2488 ii->isdone = 0; 2489 #endif 2490 uhci_add_intr_info(sc, ii); 2491 2492 splx(s); 2493 2494 return (USBD_IN_PROGRESS); 2495 } 2496 2497 void 2498 uhci_device_isoc_abort(usbd_xfer_handle xfer) 2499 { 2500 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2501 uhci_soft_td_t **stds = upipe->u.iso.stds; 2502 uhci_soft_td_t *std; 2503 int i, n, s, nframes, maxlen, len; 2504 2505 s = splusb(); 2506 2507 /* Transfer is already done. */ 2508 if (xfer->status != USBD_NOT_STARTED && 2509 xfer->status != USBD_IN_PROGRESS) { 2510 splx(s); 2511 return; 2512 } 2513 2514 /* Give xfer the requested abort code. */ 2515 xfer->status = USBD_CANCELLED; 2516 2517 /* make hardware ignore it, */ 2518 nframes = xfer->nframes; 2519 n = UXFER(xfer)->curframe; 2520 maxlen = 0; 2521 for (i = 0; i < nframes; i++) { 2522 std = stds[n]; 2523 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 2524 len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token)); 2525 if (len > maxlen) 2526 maxlen = len; 2527 if (++n >= UHCI_VFRAMELIST_COUNT) 2528 n = 0; 2529 } 2530 2531 /* and wait until we are sure the hardware has finished. */ 2532 delay(maxlen); 2533 2534 #ifdef DIAGNOSTIC 2535 UXFER(xfer)->iinfo.isdone = 1; 2536 #endif 2537 /* Run callback and remove from interrupt list. */ 2538 usb_transfer_complete(xfer); 2539 2540 splx(s); 2541 } 2542 2543 void 2544 uhci_device_isoc_close(usbd_pipe_handle pipe) 2545 { 2546 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2547 usbd_device_handle dev = upipe->pipe.device; 2548 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2549 uhci_soft_td_t *std, *vstd; 2550 struct iso *iso; 2551 int i, s; 2552 2553 /* 2554 * Make sure all TDs are marked as inactive. 2555 * Wait for completion. 2556 * Unschedule. 2557 * Deallocate. 2558 */ 2559 iso = &upipe->u.iso; 2560 2561 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) 2562 iso->stds[i]->td.td_status &= htole32(~UHCI_TD_ACTIVE); 2563 usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */ 2564 2565 s = splusb(); 2566 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2567 std = iso->stds[i]; 2568 for (vstd = sc->sc_vframes[i].htd; 2569 vstd != NULL && vstd->link.std != std; 2570 vstd = vstd->link.std) 2571 ; 2572 if (vstd == NULL) { 2573 /*panic*/ 2574 printf("uhci_device_isoc_close: %p not found\n", std); 2575 splx(s); 2576 return; 2577 } 2578 vstd->link = std->link; 2579 vstd->td.td_link = std->td.td_link; 2580 uhci_free_std(sc, std); 2581 } 2582 splx(s); 2583 2584 free(iso->stds, M_USBHC); 2585 } 2586 2587 usbd_status 2588 uhci_setup_isoc(usbd_pipe_handle pipe) 2589 { 2590 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2591 usbd_device_handle dev = upipe->pipe.device; 2592 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2593 int addr = upipe->pipe.device->address; 2594 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2595 int rd = UE_GET_DIR(endpt) == UE_DIR_IN; 2596 uhci_soft_td_t *std, *vstd; 2597 u_int32_t token; 2598 struct iso *iso; 2599 int i, s; 2600 2601 iso = &upipe->u.iso; 2602 iso->stds = malloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *), 2603 M_USBHC, M_WAITOK); 2604 2605 token = rd ? UHCI_TD_IN (0, endpt, addr, 0) : 2606 UHCI_TD_OUT(0, endpt, addr, 0); 2607 2608 /* Allocate the TDs and mark as inactive; */ 2609 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2610 std = uhci_alloc_std(sc); 2611 if (std == 0) 2612 goto bad; 2613 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 2614 std->td.td_token = htole32(token); 2615 iso->stds[i] = std; 2616 } 2617 2618 /* Insert TDs into schedule. */ 2619 s = splusb(); 2620 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2621 std = iso->stds[i]; 2622 vstd = sc->sc_vframes[i].htd; 2623 std->link = vstd->link; 2624 std->td.td_link = vstd->td.td_link; 2625 vstd->link.std = std; 2626 vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD); 2627 } 2628 splx(s); 2629 2630 iso->next = -1; 2631 iso->inuse = 0; 2632 2633 return (USBD_NORMAL_COMPLETION); 2634 2635 bad: 2636 while (--i >= 0) 2637 uhci_free_std(sc, iso->stds[i]); 2638 free(iso->stds, M_USBHC); 2639 return (USBD_NOMEM); 2640 } 2641 2642 void 2643 uhci_device_isoc_done(usbd_xfer_handle xfer) 2644 { 2645 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2646 2647 DPRINTFN(4, ("uhci_isoc_done: length=%d, busy_free=0x%08x\n", 2648 xfer->actlen, xfer->busy_free)); 2649 2650 if (ii->xfer != xfer) 2651 /* Not on interrupt list, ignore it. */ 2652 return; 2653 2654 if (!uhci_active_intr_info(ii)) 2655 return; 2656 2657 #ifdef DIAGNOSTIC 2658 if (ii->stdend == NULL) { 2659 printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer); 2660 #ifdef UHCI_DEBUG 2661 uhci_dump_ii(ii); 2662 #endif 2663 return; 2664 } 2665 #endif 2666 2667 /* Turn off the interrupt since it is active even if the TD is not. */ 2668 ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC); 2669 2670 uhci_del_intr_info(ii); /* remove from active list */ 2671 } 2672 2673 void 2674 uhci_device_intr_done(usbd_xfer_handle xfer) 2675 { 2676 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2677 uhci_softc_t *sc = ii->sc; 2678 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2679 uhci_soft_qh_t *sqh; 2680 int i, npoll; 2681 2682 DPRINTFN(5, ("uhci_device_intr_done: length=%d\n", xfer->actlen)); 2683 2684 npoll = upipe->u.intr.npoll; 2685 for(i = 0; i < npoll; i++) { 2686 sqh = upipe->u.intr.qhs[i]; 2687 sqh->elink = NULL; 2688 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 2689 } 2690 uhci_free_std_chain(sc, ii->stdstart, NULL); 2691 2692 /* XXX Wasteful. */ 2693 if (xfer->pipe->repeat) { 2694 uhci_soft_td_t *data, *dataend; 2695 2696 DPRINTFN(5,("uhci_device_intr_done: requeing\n")); 2697 2698 /* This alloc cannot fail since we freed the chain above. */ 2699 uhci_alloc_std_chain(upipe, sc, xfer->length, 1, xfer->flags, 2700 &xfer->dmabuf, &data, &dataend); 2701 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2702 2703 #ifdef UHCI_DEBUG 2704 if (uhcidebug > 10) { 2705 DPRINTF(("uhci_device_intr_done: data(1)\n")); 2706 uhci_dump_tds(data); 2707 uhci_dump_qh(upipe->u.intr.qhs[0]); 2708 } 2709 #endif 2710 2711 ii->stdstart = data; 2712 ii->stdend = dataend; 2713 #ifdef DIAGNOSTIC 2714 if (!ii->isdone) { 2715 printf("uhci_device_intr_done: not done, ii=%p\n", ii); 2716 } 2717 ii->isdone = 0; 2718 #endif 2719 for (i = 0; i < npoll; i++) { 2720 sqh = upipe->u.intr.qhs[i]; 2721 sqh->elink = data; 2722 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2723 } 2724 xfer->status = USBD_IN_PROGRESS; 2725 /* The ii is already on the examined list, just leave it. */ 2726 } else { 2727 DPRINTFN(5,("uhci_device_intr_done: removing\n")); 2728 if (uhci_active_intr_info(ii)) 2729 uhci_del_intr_info(ii); 2730 } 2731 } 2732 2733 /* Deallocate request data structures */ 2734 void 2735 uhci_device_ctrl_done(usbd_xfer_handle xfer) 2736 { 2737 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2738 uhci_softc_t *sc = ii->sc; 2739 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2740 2741 #ifdef DIAGNOSTIC 2742 if (!(xfer->rqflags & URQ_REQUEST)) 2743 panic("uhci_device_ctrl_done: not a request"); 2744 #endif 2745 2746 if (!uhci_active_intr_info(ii)) 2747 return; 2748 2749 uhci_del_intr_info(ii); /* remove from active list */ 2750 2751 if (upipe->pipe.device->speed == USB_SPEED_LOW) 2752 uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh); 2753 else 2754 uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh); 2755 2756 if (upipe->u.ctl.length != 0) 2757 uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend); 2758 2759 DPRINTFN(5, ("uhci_device_ctrl_done: length=%d\n", xfer->actlen)); 2760 } 2761 2762 /* Deallocate request data structures */ 2763 void 2764 uhci_device_bulk_done(usbd_xfer_handle xfer) 2765 { 2766 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2767 uhci_softc_t *sc = ii->sc; 2768 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2769 2770 DPRINTFN(5,("uhci_device_bulk_done: xfer=%p ii=%p sc=%p upipe=%p\n", 2771 xfer, ii, sc, upipe)); 2772 2773 if (!uhci_active_intr_info(ii)) 2774 return; 2775 2776 uhci_del_intr_info(ii); /* remove from active list */ 2777 2778 uhci_remove_bulk(sc, upipe->u.bulk.sqh); 2779 2780 uhci_free_std_chain(sc, ii->stdstart, NULL); 2781 2782 DPRINTFN(5, ("uhci_device_bulk_done: length=%d\n", xfer->actlen)); 2783 } 2784 2785 /* Add interrupt QH, called with vflock. */ 2786 void 2787 uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 2788 { 2789 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 2790 uhci_soft_qh_t *eqh; 2791 2792 DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh)); 2793 2794 eqh = vf->eqh; 2795 sqh->hlink = eqh->hlink; 2796 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 2797 eqh->hlink = sqh; 2798 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 2799 vf->eqh = sqh; 2800 vf->bandwidth++; 2801 } 2802 2803 /* Remove interrupt QH. */ 2804 void 2805 uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 2806 { 2807 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 2808 uhci_soft_qh_t *pqh; 2809 2810 DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh)); 2811 2812 /* See comment in uhci_remove_ctrl() */ 2813 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 2814 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 2815 delay(UHCI_QH_REMOVE_DELAY); 2816 } 2817 2818 pqh = uhci_find_prev_qh(vf->hqh, sqh); 2819 pqh->hlink = sqh->hlink; 2820 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 2821 delay(UHCI_QH_REMOVE_DELAY); 2822 if (vf->eqh == sqh) 2823 vf->eqh = pqh; 2824 vf->bandwidth--; 2825 } 2826 2827 usbd_status 2828 uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival) 2829 { 2830 uhci_soft_qh_t *sqh; 2831 int i, npoll, s; 2832 u_int bestbw, bw, bestoffs, offs; 2833 2834 DPRINTFN(2, ("uhci_device_setintr: pipe=%p\n", upipe)); 2835 if (ival == 0) { 2836 printf("uhci_device_setintr: 0 interval\n"); 2837 return (USBD_INVAL); 2838 } 2839 2840 if (ival > UHCI_VFRAMELIST_COUNT) 2841 ival = UHCI_VFRAMELIST_COUNT; 2842 npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival; 2843 DPRINTFN(2, ("uhci_device_setintr: ival=%d npoll=%d\n", ival, npoll)); 2844 2845 upipe->u.intr.npoll = npoll; 2846 upipe->u.intr.qhs = 2847 malloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_WAITOK); 2848 2849 /* 2850 * Figure out which offset in the schedule that has most 2851 * bandwidth left over. 2852 */ 2853 #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1)) 2854 for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) { 2855 for (bw = i = 0; i < npoll; i++) 2856 bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth; 2857 if (bw < bestbw) { 2858 bestbw = bw; 2859 bestoffs = offs; 2860 } 2861 } 2862 DPRINTFN(1, ("uhci_device_setintr: bw=%d offs=%d\n", bestbw, bestoffs)); 2863 2864 for(i = 0; i < npoll; i++) { 2865 upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc); 2866 sqh->elink = NULL; 2867 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 2868 sqh->pos = MOD(i * ival + bestoffs); 2869 } 2870 #undef MOD 2871 2872 s = splusb(); 2873 /* Enter QHs into the controller data structures. */ 2874 for(i = 0; i < npoll; i++) 2875 uhci_add_intr(sc, upipe->u.intr.qhs[i]); 2876 splx(s); 2877 2878 DPRINTFN(5, ("uhci_device_setintr: returns %p\n", upipe)); 2879 return (USBD_NORMAL_COMPLETION); 2880 } 2881 2882 /* Open a new pipe. */ 2883 usbd_status 2884 uhci_open(usbd_pipe_handle pipe) 2885 { 2886 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 2887 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2888 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 2889 usbd_status err; 2890 int ival; 2891 2892 DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 2893 pipe, pipe->device->address, 2894 ed->bEndpointAddress, sc->sc_addr)); 2895 2896 upipe->aborting = 0; 2897 upipe->nexttoggle = 0; 2898 2899 if (pipe->device->address == sc->sc_addr) { 2900 switch (ed->bEndpointAddress) { 2901 case USB_CONTROL_ENDPOINT: 2902 pipe->methods = &uhci_root_ctrl_methods; 2903 break; 2904 case UE_DIR_IN | UHCI_INTR_ENDPT: 2905 pipe->methods = &uhci_root_intr_methods; 2906 break; 2907 default: 2908 return (USBD_INVAL); 2909 } 2910 } else { 2911 switch (ed->bmAttributes & UE_XFERTYPE) { 2912 case UE_CONTROL: 2913 pipe->methods = &uhci_device_ctrl_methods; 2914 upipe->u.ctl.sqh = uhci_alloc_sqh(sc); 2915 if (upipe->u.ctl.sqh == NULL) 2916 goto bad; 2917 upipe->u.ctl.setup = uhci_alloc_std(sc); 2918 if (upipe->u.ctl.setup == NULL) { 2919 uhci_free_sqh(sc, upipe->u.ctl.sqh); 2920 goto bad; 2921 } 2922 upipe->u.ctl.stat = uhci_alloc_std(sc); 2923 if (upipe->u.ctl.stat == NULL) { 2924 uhci_free_sqh(sc, upipe->u.ctl.sqh); 2925 uhci_free_std(sc, upipe->u.ctl.setup); 2926 goto bad; 2927 } 2928 err = usb_allocmem(&sc->sc_bus, 2929 sizeof(usb_device_request_t), 2930 0, &upipe->u.ctl.reqdma); 2931 if (err) { 2932 uhci_free_sqh(sc, upipe->u.ctl.sqh); 2933 uhci_free_std(sc, upipe->u.ctl.setup); 2934 uhci_free_std(sc, upipe->u.ctl.stat); 2935 goto bad; 2936 } 2937 break; 2938 case UE_INTERRUPT: 2939 pipe->methods = &uhci_device_intr_methods; 2940 ival = pipe->interval; 2941 if (ival == USBD_DEFAULT_INTERVAL) 2942 ival = ed->bInterval; 2943 return (uhci_device_setintr(sc, upipe, ival)); 2944 case UE_ISOCHRONOUS: 2945 pipe->methods = &uhci_device_isoc_methods; 2946 return (uhci_setup_isoc(pipe)); 2947 case UE_BULK: 2948 pipe->methods = &uhci_device_bulk_methods; 2949 upipe->u.bulk.sqh = uhci_alloc_sqh(sc); 2950 if (upipe->u.bulk.sqh == NULL) 2951 goto bad; 2952 break; 2953 } 2954 } 2955 return (USBD_NORMAL_COMPLETION); 2956 2957 bad: 2958 return (USBD_NOMEM); 2959 } 2960 2961 /* 2962 * Data structures and routines to emulate the root hub. 2963 */ 2964 usb_device_descriptor_t uhci_devd = { 2965 USB_DEVICE_DESCRIPTOR_SIZE, 2966 UDESC_DEVICE, /* type */ 2967 {0x00, 0x01}, /* USB version */ 2968 UDCLASS_HUB, /* class */ 2969 UDSUBCLASS_HUB, /* subclass */ 2970 UDPROTO_FSHUB, /* protocol */ 2971 64, /* max packet */ 2972 {0},{0},{0x00,0x01}, /* device id */ 2973 1,2,0, /* string indicies */ 2974 1 /* # of configurations */ 2975 }; 2976 2977 const usb_config_descriptor_t uhci_confd = { 2978 USB_CONFIG_DESCRIPTOR_SIZE, 2979 UDESC_CONFIG, 2980 {USB_CONFIG_DESCRIPTOR_SIZE + 2981 USB_INTERFACE_DESCRIPTOR_SIZE + 2982 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2983 1, 2984 1, 2985 0, 2986 UC_ATTR_MBO | UC_SELF_POWERED, 2987 0 /* max power */ 2988 }; 2989 2990 const usb_interface_descriptor_t uhci_ifcd = { 2991 USB_INTERFACE_DESCRIPTOR_SIZE, 2992 UDESC_INTERFACE, 2993 0, 2994 0, 2995 1, 2996 UICLASS_HUB, 2997 UISUBCLASS_HUB, 2998 UIPROTO_FSHUB, 2999 0 3000 }; 3001 3002 const usb_endpoint_descriptor_t uhci_endpd = { 3003 USB_ENDPOINT_DESCRIPTOR_SIZE, 3004 UDESC_ENDPOINT, 3005 UE_DIR_IN | UHCI_INTR_ENDPT, 3006 UE_INTERRUPT, 3007 {8}, 3008 255 3009 }; 3010 3011 const usb_hub_descriptor_t uhci_hubd_piix = { 3012 USB_HUB_DESCRIPTOR_SIZE, 3013 UDESC_HUB, 3014 2, 3015 { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 }, 3016 50, /* power on to power good */ 3017 0, 3018 { 0x00 }, /* both ports are removable */ 3019 { 0 }, 3020 }; 3021 3022 int 3023 uhci_str(usb_string_descriptor_t *p, int l, const char *s) 3024 { 3025 int i; 3026 3027 if (l == 0) 3028 return (0); 3029 p->bLength = 2 * strlen(s) + 2; 3030 if (l == 1) 3031 return (1); 3032 p->bDescriptorType = UDESC_STRING; 3033 l -= 2; 3034 for (i = 0; s[i] && l > 1; i++, l -= 2) 3035 USETW2(p->bString[i], 0, s[i]); 3036 return (2*i+2); 3037 } 3038 3039 /* 3040 * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also 3041 * enables the port, and also states that SET_FEATURE(PORT_ENABLE) 3042 * should not be used by the USB subsystem. As we cannot issue a 3043 * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port 3044 * will be enabled as part of the reset. 3045 * 3046 * On the VT83C572, the port cannot be successfully enabled until the 3047 * outstanding "port enable change" and "connection status change" 3048 * events have been reset. 3049 */ 3050 Static usbd_status 3051 uhci_portreset(uhci_softc_t *sc, int index) 3052 { 3053 int lim, port, x; 3054 3055 if (index == 1) 3056 port = UHCI_PORTSC1; 3057 else if (index == 2) 3058 port = UHCI_PORTSC2; 3059 else 3060 return (USBD_IOERROR); 3061 3062 x = URWMASK(UREAD2(sc, port)); 3063 UWRITE2(sc, port, x | UHCI_PORTSC_PR); 3064 3065 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 3066 3067 DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n", 3068 index, UREAD2(sc, port))); 3069 3070 x = URWMASK(UREAD2(sc, port)); 3071 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 3072 3073 delay(100); 3074 3075 DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n", 3076 index, UREAD2(sc, port))); 3077 3078 x = URWMASK(UREAD2(sc, port)); 3079 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3080 3081 for (lim = 10; --lim > 0;) { 3082 usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY); 3083 3084 x = UREAD2(sc, port); 3085 3086 DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n", 3087 index, lim, x)); 3088 3089 if (!(x & UHCI_PORTSC_CCS)) { 3090 /* 3091 * No device is connected (or was disconnected 3092 * during reset). Consider the port reset. 3093 * The delay must be long enough to ensure on 3094 * the initial iteration that the device 3095 * connection will have been registered. 50ms 3096 * appears to be sufficient, but 20ms is not. 3097 */ 3098 DPRINTFN(3,("uhci port %d loop %u, device detached\n", 3099 index, lim)); 3100 break; 3101 } 3102 3103 if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) { 3104 /* 3105 * Port enabled changed and/or connection 3106 * status changed were set. Reset either or 3107 * both raised flags (by writing a 1 to that 3108 * bit), and wait again for state to settle. 3109 */ 3110 UWRITE2(sc, port, URWMASK(x) | 3111 (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC))); 3112 continue; 3113 } 3114 3115 if (x & UHCI_PORTSC_PE) 3116 /* Port is enabled */ 3117 break; 3118 3119 UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE); 3120 } 3121 3122 DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n", 3123 index, UREAD2(sc, port))); 3124 3125 if (lim <= 0) { 3126 DPRINTFN(1,("uhci port %d reset timed out\n", index)); 3127 return (USBD_TIMEOUT); 3128 } 3129 3130 sc->sc_isreset = 1; 3131 return (USBD_NORMAL_COMPLETION); 3132 } 3133 3134 /* 3135 * Simulate a hardware hub by handling all the necessary requests. 3136 */ 3137 usbd_status 3138 uhci_root_ctrl_transfer(usbd_xfer_handle xfer) 3139 { 3140 usbd_status err; 3141 3142 /* Insert last in queue. */ 3143 err = usb_insert_transfer(xfer); 3144 if (err) 3145 return (err); 3146 3147 /* 3148 * Pipe isn't running (otherwise err would be USBD_INPROG), 3149 * so start it first. 3150 */ 3151 return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3152 } 3153 3154 usbd_status 3155 uhci_root_ctrl_start(usbd_xfer_handle xfer) 3156 { 3157 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus; 3158 usb_device_request_t *req; 3159 void *buf = NULL; 3160 int port, x; 3161 int s, len, value, index, status, change, l, totlen = 0; 3162 usb_port_status_t ps; 3163 usbd_status err; 3164 3165 if (sc->sc_dying) 3166 return (USBD_IOERROR); 3167 3168 #ifdef DIAGNOSTIC 3169 if (!(xfer->rqflags & URQ_REQUEST)) 3170 panic("uhci_root_ctrl_transfer: not a request"); 3171 #endif 3172 req = &xfer->request; 3173 3174 DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n", 3175 req->bmRequestType, req->bRequest)); 3176 3177 len = UGETW(req->wLength); 3178 value = UGETW(req->wValue); 3179 index = UGETW(req->wIndex); 3180 3181 if (len != 0) 3182 buf = KERNADDR(&xfer->dmabuf, 0); 3183 3184 #define C(x,y) ((x) | ((y) << 8)) 3185 switch(C(req->bRequest, req->bmRequestType)) { 3186 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 3187 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 3188 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 3189 /* 3190 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 3191 * for the integrated root hub. 3192 */ 3193 break; 3194 case C(UR_GET_CONFIG, UT_READ_DEVICE): 3195 if (len > 0) { 3196 *(u_int8_t *)buf = sc->sc_conf; 3197 totlen = 1; 3198 } 3199 break; 3200 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 3201 DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value)); 3202 if (len == 0) 3203 break; 3204 switch(value >> 8) { 3205 case UDESC_DEVICE: 3206 if ((value & 0xff) != 0) { 3207 err = USBD_IOERROR; 3208 goto ret; 3209 } 3210 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 3211 USETW(uhci_devd.idVendor, sc->sc_id_vendor); 3212 memcpy(buf, &uhci_devd, l); 3213 break; 3214 case UDESC_CONFIG: 3215 if ((value & 0xff) != 0) { 3216 err = USBD_IOERROR; 3217 goto ret; 3218 } 3219 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 3220 memcpy(buf, &uhci_confd, l); 3221 buf = (char *)buf + l; 3222 len -= l; 3223 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 3224 totlen += l; 3225 memcpy(buf, &uhci_ifcd, l); 3226 buf = (char *)buf + l; 3227 len -= l; 3228 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 3229 totlen += l; 3230 memcpy(buf, &uhci_endpd, l); 3231 break; 3232 case UDESC_STRING: 3233 *(u_int8_t *)buf = 0; 3234 totlen = 1; 3235 switch (value & 0xff) { 3236 case 0: /* Language table */ 3237 if (len > 0) 3238 *(u_int8_t *)buf = 4; 3239 if (len >= 4) { 3240 USETW(((usb_string_descriptor_t *)buf)->bString[0], 0x0409); 3241 totlen = 4; 3242 } 3243 break; 3244 case 1: /* Vendor */ 3245 totlen = uhci_str(buf, len, sc->sc_vendor); 3246 break; 3247 case 2: /* Product */ 3248 totlen = uhci_str(buf, len, "UHCI root hub"); 3249 break; 3250 } 3251 break; 3252 default: 3253 err = USBD_IOERROR; 3254 goto ret; 3255 } 3256 break; 3257 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 3258 if (len > 0) { 3259 *(u_int8_t *)buf = 0; 3260 totlen = 1; 3261 } 3262 break; 3263 case C(UR_GET_STATUS, UT_READ_DEVICE): 3264 if (len > 1) { 3265 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 3266 totlen = 2; 3267 } 3268 break; 3269 case C(UR_GET_STATUS, UT_READ_INTERFACE): 3270 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 3271 if (len > 1) { 3272 USETW(((usb_status_t *)buf)->wStatus, 0); 3273 totlen = 2; 3274 } 3275 break; 3276 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 3277 if (value >= USB_MAX_DEVICES) { 3278 err = USBD_IOERROR; 3279 goto ret; 3280 } 3281 sc->sc_addr = value; 3282 break; 3283 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 3284 if (value != 0 && value != 1) { 3285 err = USBD_IOERROR; 3286 goto ret; 3287 } 3288 sc->sc_conf = value; 3289 break; 3290 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 3291 break; 3292 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 3293 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 3294 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 3295 err = USBD_IOERROR; 3296 goto ret; 3297 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 3298 break; 3299 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 3300 break; 3301 /* Hub requests */ 3302 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 3303 break; 3304 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 3305 DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 3306 "port=%d feature=%d\n", 3307 index, value)); 3308 if (index == 1) 3309 port = UHCI_PORTSC1; 3310 else if (index == 2) 3311 port = UHCI_PORTSC2; 3312 else { 3313 err = USBD_IOERROR; 3314 goto ret; 3315 } 3316 switch(value) { 3317 case UHF_PORT_ENABLE: 3318 x = URWMASK(UREAD2(sc, port)); 3319 UWRITE2(sc, port, x & ~UHCI_PORTSC_PE); 3320 break; 3321 case UHF_PORT_SUSPEND: 3322 x = URWMASK(UREAD2(sc, port)); 3323 UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP); 3324 break; 3325 case UHF_PORT_RESET: 3326 x = URWMASK(UREAD2(sc, port)); 3327 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 3328 break; 3329 case UHF_C_PORT_CONNECTION: 3330 x = URWMASK(UREAD2(sc, port)); 3331 UWRITE2(sc, port, x | UHCI_PORTSC_CSC); 3332 break; 3333 case UHF_C_PORT_ENABLE: 3334 x = URWMASK(UREAD2(sc, port)); 3335 UWRITE2(sc, port, x | UHCI_PORTSC_POEDC); 3336 break; 3337 case UHF_C_PORT_OVER_CURRENT: 3338 x = URWMASK(UREAD2(sc, port)); 3339 UWRITE2(sc, port, x | UHCI_PORTSC_OCIC); 3340 break; 3341 case UHF_C_PORT_RESET: 3342 sc->sc_isreset = 0; 3343 err = USBD_NORMAL_COMPLETION; 3344 goto ret; 3345 case UHF_PORT_CONNECTION: 3346 case UHF_PORT_OVER_CURRENT: 3347 case UHF_PORT_POWER: 3348 case UHF_PORT_LOW_SPEED: 3349 case UHF_C_PORT_SUSPEND: 3350 default: 3351 err = USBD_IOERROR; 3352 goto ret; 3353 } 3354 break; 3355 case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER): 3356 if (index == 1) 3357 port = UHCI_PORTSC1; 3358 else if (index == 2) 3359 port = UHCI_PORTSC2; 3360 else { 3361 err = USBD_IOERROR; 3362 goto ret; 3363 } 3364 if (len > 0) { 3365 *(u_int8_t *)buf = 3366 (UREAD2(sc, port) & UHCI_PORTSC_LS) >> 3367 UHCI_PORTSC_LS_SHIFT; 3368 totlen = 1; 3369 } 3370 break; 3371 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 3372 if (len == 0) 3373 break; 3374 if ((value & 0xff) != 0) { 3375 err = USBD_IOERROR; 3376 goto ret; 3377 } 3378 l = min(len, USB_HUB_DESCRIPTOR_SIZE); 3379 totlen = l; 3380 memcpy(buf, &uhci_hubd_piix, l); 3381 break; 3382 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 3383 if (len != 4) { 3384 err = USBD_IOERROR; 3385 goto ret; 3386 } 3387 memset(buf, 0, len); 3388 totlen = len; 3389 break; 3390 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 3391 if (index == 1) 3392 port = UHCI_PORTSC1; 3393 else if (index == 2) 3394 port = UHCI_PORTSC2; 3395 else { 3396 err = USBD_IOERROR; 3397 goto ret; 3398 } 3399 if (len != 4) { 3400 err = USBD_IOERROR; 3401 goto ret; 3402 } 3403 x = UREAD2(sc, port); 3404 status = change = 0; 3405 if (x & UHCI_PORTSC_CCS) 3406 status |= UPS_CURRENT_CONNECT_STATUS; 3407 if (x & UHCI_PORTSC_CSC) 3408 change |= UPS_C_CONNECT_STATUS; 3409 if (x & UHCI_PORTSC_PE) 3410 status |= UPS_PORT_ENABLED; 3411 if (x & UHCI_PORTSC_POEDC) 3412 change |= UPS_C_PORT_ENABLED; 3413 if (x & UHCI_PORTSC_OCI) 3414 status |= UPS_OVERCURRENT_INDICATOR; 3415 if (x & UHCI_PORTSC_OCIC) 3416 change |= UPS_C_OVERCURRENT_INDICATOR; 3417 if (x & UHCI_PORTSC_SUSP) 3418 status |= UPS_SUSPEND; 3419 if (x & UHCI_PORTSC_LSDA) 3420 status |= UPS_LOW_SPEED; 3421 status |= UPS_PORT_POWER; 3422 if (sc->sc_isreset) 3423 change |= UPS_C_PORT_RESET; 3424 USETW(ps.wPortStatus, status); 3425 USETW(ps.wPortChange, change); 3426 l = min(len, sizeof ps); 3427 memcpy(buf, &ps, l); 3428 totlen = l; 3429 break; 3430 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 3431 err = USBD_IOERROR; 3432 goto ret; 3433 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 3434 break; 3435 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 3436 if (index == 1) 3437 port = UHCI_PORTSC1; 3438 else if (index == 2) 3439 port = UHCI_PORTSC2; 3440 else { 3441 err = USBD_IOERROR; 3442 goto ret; 3443 } 3444 switch(value) { 3445 case UHF_PORT_ENABLE: 3446 x = URWMASK(UREAD2(sc, port)); 3447 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3448 break; 3449 case UHF_PORT_SUSPEND: 3450 x = URWMASK(UREAD2(sc, port)); 3451 UWRITE2(sc, port, x | UHCI_PORTSC_SUSP); 3452 break; 3453 case UHF_PORT_RESET: 3454 err = uhci_portreset(sc, index); 3455 goto ret; 3456 case UHF_PORT_POWER: 3457 /* Pretend we turned on power */ 3458 err = USBD_NORMAL_COMPLETION; 3459 goto ret; 3460 case UHF_C_PORT_CONNECTION: 3461 case UHF_C_PORT_ENABLE: 3462 case UHF_C_PORT_OVER_CURRENT: 3463 case UHF_PORT_CONNECTION: 3464 case UHF_PORT_OVER_CURRENT: 3465 case UHF_PORT_LOW_SPEED: 3466 case UHF_C_PORT_SUSPEND: 3467 case UHF_C_PORT_RESET: 3468 default: 3469 err = USBD_IOERROR; 3470 goto ret; 3471 } 3472 break; 3473 default: 3474 err = USBD_IOERROR; 3475 goto ret; 3476 } 3477 xfer->actlen = totlen; 3478 err = USBD_NORMAL_COMPLETION; 3479 ret: 3480 xfer->status = err; 3481 s = splusb(); 3482 usb_transfer_complete(xfer); 3483 splx(s); 3484 return (USBD_IN_PROGRESS); 3485 } 3486 3487 /* Abort a root control request. */ 3488 void 3489 uhci_root_ctrl_abort(usbd_xfer_handle xfer) 3490 { 3491 /* Nothing to do, all transfers are synchronous. */ 3492 } 3493 3494 /* Close the root pipe. */ 3495 void 3496 uhci_root_ctrl_close(usbd_pipe_handle pipe) 3497 { 3498 DPRINTF(("uhci_root_ctrl_close\n")); 3499 } 3500 3501 /* Abort a root interrupt request. */ 3502 void 3503 uhci_root_intr_abort(usbd_xfer_handle xfer) 3504 { 3505 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus; 3506 3507 usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, xfer); 3508 sc->sc_intr_xfer = NULL; 3509 3510 if (xfer->pipe->intrxfer == xfer) { 3511 DPRINTF(("uhci_root_intr_abort: remove\n")); 3512 xfer->pipe->intrxfer = 0; 3513 } 3514 xfer->status = USBD_CANCELLED; 3515 #ifdef DIAGNOSTIC 3516 UXFER(xfer)->iinfo.isdone = 1; 3517 #endif 3518 usb_transfer_complete(xfer); 3519 } 3520 3521 usbd_status 3522 uhci_root_intr_transfer(usbd_xfer_handle xfer) 3523 { 3524 usbd_status err; 3525 3526 /* Insert last in queue. */ 3527 err = usb_insert_transfer(xfer); 3528 if (err) 3529 return (err); 3530 3531 /* 3532 * Pipe isn't running (otherwise err would be USBD_INPROG), 3533 * start first 3534 */ 3535 return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3536 } 3537 3538 /* Start a transfer on the root interrupt pipe */ 3539 usbd_status 3540 uhci_root_intr_start(usbd_xfer_handle xfer) 3541 { 3542 usbd_pipe_handle pipe = xfer->pipe; 3543 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 3544 unsigned int ival; 3545 3546 DPRINTFN(3, ("uhci_root_intr_start: xfer=%p len=%d flags=%d\n", 3547 xfer, xfer->length, xfer->flags)); 3548 3549 if (sc->sc_dying) 3550 return (USBD_IOERROR); 3551 3552 /* XXX temporary variable needed to avoid gcc3 warning */ 3553 ival = xfer->pipe->endpoint->edesc->bInterval; 3554 sc->sc_ival = mstohz(ival); 3555 usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer); 3556 sc->sc_intr_xfer = xfer; 3557 return (USBD_IN_PROGRESS); 3558 } 3559 3560 /* Close the root interrupt pipe. */ 3561 void 3562 uhci_root_intr_close(usbd_pipe_handle pipe) 3563 { 3564 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 3565 3566 usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, sc->sc_intr_xfer); 3567 sc->sc_intr_xfer = NULL; 3568 DPRINTF(("uhci_root_intr_close\n")); 3569 } 3570