1 /* $NetBSD: ohci.c,v 1.223 2012/03/11 00:34:46 mrg Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 2004, 2005 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart@augustsson.net) at 10 * Carlstedt Research & Technology. 11 * This code is derived from software contributed to The NetBSD Foundation 12 * by Charles M. Hannum. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 /* 37 * USB Open Host Controller driver. 38 * 39 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 40 * USB spec: http://www.usb.org/developers/docs/ 41 */ 42 43 #include <sys/cdefs.h> 44 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.223 2012/03/11 00:34:46 mrg Exp $"); 45 46 #include "opt_usb.h" 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/malloc.h> 51 #include <sys/kernel.h> 52 #include <sys/device.h> 53 #include <sys/select.h> 54 #include <sys/proc.h> 55 #include <sys/queue.h> 56 #include <sys/bus.h> 57 #include <sys/cpu.h> 58 59 #include <machine/endian.h> 60 61 #include <dev/usb/usb.h> 62 #include <dev/usb/usbdi.h> 63 #include <dev/usb/usbdivar.h> 64 #include <dev/usb/usb_mem.h> 65 #include <dev/usb/usb_quirks.h> 66 67 #include <dev/usb/ohcireg.h> 68 #include <dev/usb/ohcivar.h> 69 #include <dev/usb/usbroothub_subr.h> 70 71 72 73 #ifdef OHCI_DEBUG 74 #define DPRINTF(x) if (ohcidebug) printf x 75 #define DPRINTFN(n,x) if (ohcidebug>(n)) printf x 76 int ohcidebug = 0; 77 #else 78 #define DPRINTF(x) 79 #define DPRINTFN(n,x) 80 #endif 81 82 #if BYTE_ORDER == BIG_ENDIAN 83 #define SWAP_ENDIAN OHCI_LITTLE_ENDIAN 84 #else 85 #define SWAP_ENDIAN OHCI_BIG_ENDIAN 86 #endif 87 88 #define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val) 89 #define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val) 90 #define HTOO16(val) O16TOH(val) 91 #define HTOO32(val) O32TOH(val) 92 93 struct ohci_pipe; 94 95 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 96 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 97 98 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 99 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 100 101 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 102 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 103 104 #if 0 105 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 106 ohci_soft_td_t *); 107 #endif 108 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 109 ohci_softc_t *, int, int, usbd_xfer_handle, 110 ohci_soft_td_t *, ohci_soft_td_t **); 111 112 Static usbd_status ohci_open(usbd_pipe_handle); 113 Static void ohci_poll(struct usbd_bus *); 114 Static void ohci_softintr(void *); 115 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 116 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 117 118 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 119 Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *, 120 ohci_soft_ed_t *); 121 122 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 123 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 124 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 125 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 126 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 127 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 128 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 129 130 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 131 Static void ohci_device_isoc_enter(usbd_xfer_handle); 132 133 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 134 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 135 136 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 137 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 138 139 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 140 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 141 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 142 Static void ohci_root_ctrl_close(usbd_pipe_handle); 143 Static void ohci_root_ctrl_done(usbd_xfer_handle); 144 145 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 146 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 147 Static void ohci_root_intr_abort(usbd_xfer_handle); 148 Static void ohci_root_intr_close(usbd_pipe_handle); 149 Static void ohci_root_intr_done(usbd_xfer_handle); 150 151 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 152 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 153 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 154 Static void ohci_device_ctrl_close(usbd_pipe_handle); 155 Static void ohci_device_ctrl_done(usbd_xfer_handle); 156 157 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 158 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 159 Static void ohci_device_bulk_abort(usbd_xfer_handle); 160 Static void ohci_device_bulk_close(usbd_pipe_handle); 161 Static void ohci_device_bulk_done(usbd_xfer_handle); 162 163 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 164 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 165 Static void ohci_device_intr_abort(usbd_xfer_handle); 166 Static void ohci_device_intr_close(usbd_pipe_handle); 167 Static void ohci_device_intr_done(usbd_xfer_handle); 168 169 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 170 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 171 Static void ohci_device_isoc_abort(usbd_xfer_handle); 172 Static void ohci_device_isoc_close(usbd_pipe_handle); 173 Static void ohci_device_isoc_done(usbd_xfer_handle); 174 175 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 176 struct ohci_pipe *pipe, int ival); 177 178 Static void ohci_timeout(void *); 179 Static void ohci_timeout_task(void *); 180 Static void ohci_rhsc_enable(void *); 181 182 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 183 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 184 185 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 186 Static void ohci_noop(usbd_pipe_handle pipe); 187 188 #ifdef OHCI_DEBUG 189 Static void ohci_dumpregs(ohci_softc_t *); 190 Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *); 191 Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *); 192 Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *); 193 Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *); 194 Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *); 195 #endif 196 197 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 198 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 199 #define OWRITE1(sc, r, x) \ 200 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 201 #define OWRITE2(sc, r, x) \ 202 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 203 #define OWRITE4(sc, r, x) \ 204 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 205 static __inline uint8_t 206 OREAD1(ohci_softc_t *sc, bus_size_t r) 207 { 208 209 OBARR(sc); 210 return bus_space_read_1(sc->iot, sc->ioh, r); 211 } 212 213 static __inline uint16_t 214 OREAD2(ohci_softc_t *sc, bus_size_t r) 215 { 216 217 OBARR(sc); 218 return bus_space_read_2(sc->iot, sc->ioh, r); 219 } 220 221 static __inline uint32_t 222 OREAD4(ohci_softc_t *sc, bus_size_t r) 223 { 224 225 OBARR(sc); 226 return bus_space_read_4(sc->iot, sc->ioh, r); 227 } 228 229 /* Reverse the bits in a value 0 .. 31 */ 230 Static u_int8_t revbits[OHCI_NO_INTRS] = 231 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 232 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 233 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 234 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 235 236 struct ohci_pipe { 237 struct usbd_pipe pipe; 238 ohci_soft_ed_t *sed; 239 union { 240 ohci_soft_td_t *td; 241 ohci_soft_itd_t *itd; 242 } tail; 243 /* Info needed for different pipe kinds. */ 244 union { 245 /* Control pipe */ 246 struct { 247 usb_dma_t reqdma; 248 u_int length; 249 ohci_soft_td_t *setup, *data, *stat; 250 } ctl; 251 /* Interrupt pipe */ 252 struct { 253 int nslots; 254 int pos; 255 } intr; 256 /* Bulk pipe */ 257 struct { 258 u_int length; 259 int isread; 260 } bulk; 261 /* Iso pipe */ 262 struct iso { 263 int next, inuse; 264 } iso; 265 } u; 266 }; 267 268 #define OHCI_INTR_ENDPT 1 269 270 Static const struct usbd_bus_methods ohci_bus_methods = { 271 .open_pipe = ohci_open, 272 .soft_intr = ohci_softintr, 273 .do_poll = ohci_poll, 274 .allocm = ohci_allocm, 275 .freem = ohci_freem, 276 .allocx = ohci_allocx, 277 .freex = ohci_freex, 278 }; 279 280 Static const struct usbd_pipe_methods ohci_root_ctrl_methods = { 281 .transfer = ohci_root_ctrl_transfer, 282 .start = ohci_root_ctrl_start, 283 .abort = ohci_root_ctrl_abort, 284 .close = ohci_root_ctrl_close, 285 .cleartoggle = ohci_noop, 286 .done = ohci_root_ctrl_done, 287 }; 288 289 Static const struct usbd_pipe_methods ohci_root_intr_methods = { 290 .transfer = ohci_root_intr_transfer, 291 .start = ohci_root_intr_start, 292 .abort = ohci_root_intr_abort, 293 .close = ohci_root_intr_close, 294 .cleartoggle = ohci_noop, 295 .done = ohci_root_intr_done, 296 }; 297 298 Static const struct usbd_pipe_methods ohci_device_ctrl_methods = { 299 .transfer = ohci_device_ctrl_transfer, 300 .start = ohci_device_ctrl_start, 301 .abort = ohci_device_ctrl_abort, 302 .close = ohci_device_ctrl_close, 303 .cleartoggle = ohci_noop, 304 .done = ohci_device_ctrl_done, 305 }; 306 307 Static const struct usbd_pipe_methods ohci_device_intr_methods = { 308 .transfer = ohci_device_intr_transfer, 309 .start = ohci_device_intr_start, 310 .abort = ohci_device_intr_abort, 311 .close = ohci_device_intr_close, 312 .cleartoggle = ohci_device_clear_toggle, 313 .done = ohci_device_intr_done, 314 }; 315 316 Static const struct usbd_pipe_methods ohci_device_bulk_methods = { 317 .transfer = ohci_device_bulk_transfer, 318 .start = ohci_device_bulk_start, 319 .abort = ohci_device_bulk_abort, 320 .close = ohci_device_bulk_close, 321 .cleartoggle = ohci_device_clear_toggle, 322 .done = ohci_device_bulk_done, 323 }; 324 325 Static const struct usbd_pipe_methods ohci_device_isoc_methods = { 326 .transfer = ohci_device_isoc_transfer, 327 .start = ohci_device_isoc_start, 328 .abort = ohci_device_isoc_abort, 329 .close = ohci_device_isoc_close, 330 .cleartoggle = ohci_noop, 331 .done = ohci_device_isoc_done, 332 }; 333 334 int 335 ohci_activate(device_t self, enum devact act) 336 { 337 struct ohci_softc *sc = device_private(self); 338 339 switch (act) { 340 case DVACT_DEACTIVATE: 341 sc->sc_dying = 1; 342 return 0; 343 default: 344 return EOPNOTSUPP; 345 } 346 } 347 348 void 349 ohci_childdet(device_t self, device_t child) 350 { 351 struct ohci_softc *sc = device_private(self); 352 353 KASSERT(sc->sc_child == child); 354 sc->sc_child = NULL; 355 } 356 357 int 358 ohci_detach(struct ohci_softc *sc, int flags) 359 { 360 int rv = 0; 361 usbd_xfer_handle xfer; 362 363 if (sc->sc_child != NULL) 364 rv = config_detach(sc->sc_child, flags); 365 366 if (rv != 0) 367 return (rv); 368 369 callout_stop(&sc->sc_tmo_rhsc); 370 371 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 372 callout_destroy(&sc->sc_tmo_rhsc); 373 374 if (sc->sc_hcca != NULL) 375 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 376 while((xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers)) != NULL) { 377 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 378 free(xfer, M_USB); 379 } 380 381 return (rv); 382 } 383 384 ohci_soft_ed_t * 385 ohci_alloc_sed(ohci_softc_t *sc) 386 { 387 ohci_soft_ed_t *sed; 388 usbd_status err; 389 int i, offs; 390 usb_dma_t dma; 391 392 if (sc->sc_freeeds == NULL) { 393 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 394 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 395 OHCI_ED_ALIGN, &dma); 396 if (err) 397 return (0); 398 for(i = 0; i < OHCI_SED_CHUNK; i++) { 399 offs = i * OHCI_SED_SIZE; 400 sed = KERNADDR(&dma, offs); 401 sed->physaddr = DMAADDR(&dma, offs); 402 sed->dma = dma; 403 sed->offs = offs; 404 sed->next = sc->sc_freeeds; 405 sc->sc_freeeds = sed; 406 } 407 } 408 sed = sc->sc_freeeds; 409 sc->sc_freeeds = sed->next; 410 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 411 sed->next = 0; 412 return (sed); 413 } 414 415 void 416 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 417 { 418 sed->next = sc->sc_freeeds; 419 sc->sc_freeeds = sed; 420 } 421 422 ohci_soft_td_t * 423 ohci_alloc_std(ohci_softc_t *sc) 424 { 425 ohci_soft_td_t *std; 426 usbd_status err; 427 int i, offs; 428 usb_dma_t dma; 429 int s; 430 431 if (sc->sc_freetds == NULL) { 432 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 433 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 434 OHCI_TD_ALIGN, &dma); 435 if (err) 436 return (NULL); 437 s = splusb(); 438 for(i = 0; i < OHCI_STD_CHUNK; i++) { 439 offs = i * OHCI_STD_SIZE; 440 std = KERNADDR(&dma, offs); 441 std->physaddr = DMAADDR(&dma, offs); 442 std->dma = dma; 443 std->offs = offs; 444 std->nexttd = sc->sc_freetds; 445 sc->sc_freetds = std; 446 } 447 splx(s); 448 } 449 450 s = splusb(); 451 std = sc->sc_freetds; 452 sc->sc_freetds = std->nexttd; 453 memset(&std->td, 0, sizeof(ohci_td_t)); 454 std->nexttd = NULL; 455 std->xfer = NULL; 456 ohci_hash_add_td(sc, std); 457 splx(s); 458 459 return (std); 460 } 461 462 void 463 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 464 { 465 int s; 466 467 s = splusb(); 468 ohci_hash_rem_td(sc, std); 469 std->nexttd = sc->sc_freetds; 470 sc->sc_freetds = std; 471 splx(s); 472 } 473 474 usbd_status 475 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 476 int alen, int rd, usbd_xfer_handle xfer, 477 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 478 { 479 ohci_soft_td_t *next, *cur; 480 ohci_physaddr_t dataphys, dataphysend; 481 u_int32_t tdflags; 482 int len, curlen; 483 usb_dma_t *dma = &xfer->dmabuf; 484 u_int16_t flags = xfer->flags; 485 486 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 487 488 len = alen; 489 cur = sp; 490 dataphys = DMAADDR(dma, 0); 491 dataphysend = OHCI_PAGE(dataphys + len - 1); 492 usb_syncmem(dma, 0, len, 493 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 494 tdflags = HTOO32( 495 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 496 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 497 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 498 499 for (;;) { 500 next = ohci_alloc_std(sc); 501 if (next == NULL) 502 goto nomem; 503 504 /* The OHCI hardware can handle at most one page crossing. */ 505 if (OHCI_PAGE(dataphys) == dataphysend || 506 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 507 /* we can handle it in this TD */ 508 curlen = len; 509 } else { 510 /* must use multiple TDs, fill as much as possible. */ 511 curlen = 2 * OHCI_PAGE_SIZE - 512 (dataphys & (OHCI_PAGE_SIZE-1)); 513 /* the length must be a multiple of the max size */ 514 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 515 #ifdef DIAGNOSTIC 516 if (curlen == 0) 517 panic("ohci_alloc_std: curlen == 0"); 518 #endif 519 } 520 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 521 "dataphysend=0x%08x len=%d curlen=%d\n", 522 dataphys, dataphysend, 523 len, curlen)); 524 len -= curlen; 525 526 cur->td.td_flags = tdflags; 527 cur->td.td_cbp = HTOO32(dataphys); 528 cur->nexttd = next; 529 cur->td.td_nexttd = HTOO32(next->physaddr); 530 cur->td.td_be = HTOO32(dataphys + curlen - 1); 531 cur->len = curlen; 532 cur->flags = OHCI_ADD_LEN; 533 cur->xfer = xfer; 534 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 535 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 536 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 537 dataphys, dataphys + curlen - 1)); 538 if (len == 0) 539 break; 540 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 541 dataphys += curlen; 542 cur = next; 543 } 544 if (!rd && (flags & USBD_FORCE_SHORT_XFER) && 545 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 546 /* Force a 0 length transfer at the end. */ 547 548 cur = next; 549 next = ohci_alloc_std(sc); 550 if (next == NULL) 551 goto nomem; 552 553 cur->td.td_flags = tdflags; 554 cur->td.td_cbp = 0; /* indicate 0 length packet */ 555 cur->nexttd = next; 556 cur->td.td_nexttd = HTOO32(next->physaddr); 557 cur->td.td_be = ~0; 558 cur->len = 0; 559 cur->flags = 0; 560 cur->xfer = xfer; 561 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 562 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 563 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 564 } 565 *ep = cur; 566 567 return (USBD_NORMAL_COMPLETION); 568 569 nomem: 570 /* XXX free chain */ 571 return (USBD_NOMEM); 572 } 573 574 #if 0 575 Static void 576 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 577 ohci_soft_td_t *stdend) 578 { 579 ohci_soft_td_t *p; 580 581 for (; std != stdend; std = p) { 582 p = std->nexttd; 583 ohci_free_std(sc, std); 584 } 585 } 586 #endif 587 588 ohci_soft_itd_t * 589 ohci_alloc_sitd(ohci_softc_t *sc) 590 { 591 ohci_soft_itd_t *sitd; 592 usbd_status err; 593 int i, s, offs; 594 usb_dma_t dma; 595 596 if (sc->sc_freeitds == NULL) { 597 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 598 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 599 OHCI_ITD_ALIGN, &dma); 600 if (err) 601 return (NULL); 602 s = splusb(); 603 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 604 offs = i * OHCI_SITD_SIZE; 605 sitd = KERNADDR(&dma, offs); 606 sitd->physaddr = DMAADDR(&dma, offs); 607 sitd->dma = dma; 608 sitd->offs = offs; 609 sitd->nextitd = sc->sc_freeitds; 610 sc->sc_freeitds = sitd; 611 } 612 splx(s); 613 } 614 615 s = splusb(); 616 sitd = sc->sc_freeitds; 617 sc->sc_freeitds = sitd->nextitd; 618 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 619 sitd->nextitd = NULL; 620 sitd->xfer = NULL; 621 ohci_hash_add_itd(sc, sitd); 622 splx(s); 623 624 #ifdef DIAGNOSTIC 625 sitd->isdone = 0; 626 #endif 627 628 return (sitd); 629 } 630 631 void 632 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 633 { 634 int s; 635 636 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 637 638 #ifdef DIAGNOSTIC 639 if (!sitd->isdone) { 640 panic("ohci_free_sitd: sitd=%p not done", sitd); 641 return; 642 } 643 /* Warn double free */ 644 sitd->isdone = 0; 645 #endif 646 647 s = splusb(); 648 ohci_hash_rem_itd(sc, sitd); 649 sitd->nextitd = sc->sc_freeitds; 650 sc->sc_freeitds = sitd; 651 splx(s); 652 } 653 654 usbd_status 655 ohci_init(ohci_softc_t *sc) 656 { 657 ohci_soft_ed_t *sed, *psed; 658 usbd_status err; 659 int i; 660 u_int32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca, descb; 661 662 DPRINTF(("ohci_init: start\n")); 663 aprint_normal_dev(sc->sc_dev, ""); 664 665 sc->sc_hcca = NULL; 666 callout_init(&sc->sc_tmo_rhsc, 0); 667 668 for (i = 0; i < OHCI_HASH_SIZE; i++) 669 LIST_INIT(&sc->sc_hash_tds[i]); 670 for (i = 0; i < OHCI_HASH_SIZE; i++) 671 LIST_INIT(&sc->sc_hash_itds[i]); 672 673 SIMPLEQ_INIT(&sc->sc_free_xfers); 674 675 rev = OREAD4(sc, OHCI_REVISION); 676 aprint_normal("OHCI version %d.%d%s\n", 677 OHCI_REV_HI(rev), OHCI_REV_LO(rev), 678 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 679 680 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 681 aprint_error_dev(sc->sc_dev, "unsupported OHCI revision\n"); 682 sc->sc_bus.usbrev = USBREV_UNKNOWN; 683 return (USBD_INVAL); 684 } 685 sc->sc_bus.usbrev = USBREV_1_0; 686 687 usb_setup_reserve(sc->sc_dev, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 688 USB_MEM_RESERVE); 689 690 /* XXX determine alignment by R/W */ 691 /* Allocate the HCCA area. */ 692 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 693 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 694 if (err) { 695 sc->sc_hcca = NULL; 696 return err; 697 } 698 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 699 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 700 701 sc->sc_eintrs = OHCI_NORMAL_INTRS; 702 703 /* Allocate dummy ED that starts the control list. */ 704 sc->sc_ctrl_head = ohci_alloc_sed(sc); 705 if (sc->sc_ctrl_head == NULL) { 706 err = USBD_NOMEM; 707 goto bad1; 708 } 709 sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 710 711 /* Allocate dummy ED that starts the bulk list. */ 712 sc->sc_bulk_head = ohci_alloc_sed(sc); 713 if (sc->sc_bulk_head == NULL) { 714 err = USBD_NOMEM; 715 goto bad2; 716 } 717 sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 718 usb_syncmem(&sc->sc_bulk_head->dma, sc->sc_bulk_head->offs, 719 sizeof(sc->sc_bulk_head->ed), 720 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 721 722 /* Allocate dummy ED that starts the isochronous list. */ 723 sc->sc_isoc_head = ohci_alloc_sed(sc); 724 if (sc->sc_isoc_head == NULL) { 725 err = USBD_NOMEM; 726 goto bad3; 727 } 728 sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 729 usb_syncmem(&sc->sc_isoc_head->dma, sc->sc_isoc_head->offs, 730 sizeof(sc->sc_isoc_head->ed), 731 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 732 733 /* Allocate all the dummy EDs that make up the interrupt tree. */ 734 for (i = 0; i < OHCI_NO_EDS; i++) { 735 sed = ohci_alloc_sed(sc); 736 if (sed == NULL) { 737 while (--i >= 0) 738 ohci_free_sed(sc, sc->sc_eds[i]); 739 err = USBD_NOMEM; 740 goto bad4; 741 } 742 /* All ED fields are set to 0. */ 743 sc->sc_eds[i] = sed; 744 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 745 if (i != 0) 746 psed = sc->sc_eds[(i-1) / 2]; 747 else 748 psed= sc->sc_isoc_head; 749 sed->next = psed; 750 sed->ed.ed_nexted = HTOO32(psed->physaddr); 751 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 752 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 753 } 754 /* 755 * Fill HCCA interrupt table. The bit reversal is to get 756 * the tree set up properly to spread the interrupts. 757 */ 758 for (i = 0; i < OHCI_NO_INTRS; i++) 759 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 760 HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 761 usb_syncmem(&sc->sc_hccadma, 0, OHCI_HCCA_SIZE, 762 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 763 764 #ifdef OHCI_DEBUG 765 if (ohcidebug > 15) { 766 for (i = 0; i < OHCI_NO_EDS; i++) { 767 printf("ed#%d ", i); 768 ohci_dump_ed(sc, sc->sc_eds[i]); 769 } 770 printf("iso "); 771 ohci_dump_ed(sc, sc->sc_isoc_head); 772 } 773 #endif 774 775 /* Preserve values programmed by SMM/BIOS but lost over reset. */ 776 ctl = OREAD4(sc, OHCI_CONTROL); 777 rwc = ctl & OHCI_RWC; 778 fm = OREAD4(sc, OHCI_FM_INTERVAL); 779 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 780 descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 781 782 /* Determine in what context we are running. */ 783 if (ctl & OHCI_IR) { 784 /* SMM active, request change */ 785 DPRINTF(("ohci_init: SMM active, request owner change\n")); 786 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) == 787 (OHCI_OC | OHCI_MIE)) 788 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE); 789 s = OREAD4(sc, OHCI_COMMAND_STATUS); 790 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 791 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 792 usb_delay_ms(&sc->sc_bus, 1); 793 ctl = OREAD4(sc, OHCI_CONTROL); 794 } 795 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE); 796 if ((ctl & OHCI_IR) == 0) { 797 aprint_error_dev(sc->sc_dev, 798 "SMM does not respond, resetting\n"); 799 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 800 goto reset; 801 } 802 #if 0 803 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 804 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 805 /* BIOS started controller. */ 806 DPRINTF(("ohci_init: BIOS active\n")); 807 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 808 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc); 809 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 810 } 811 #endif 812 } else { 813 DPRINTF(("ohci_init: cold started\n")); 814 reset: 815 /* Controller was cold started. */ 816 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 817 } 818 819 /* 820 * This reset should not be necessary according to the OHCI spec, but 821 * without it some controllers do not start. 822 */ 823 DPRINTF(("%s: resetting\n", device_xname(sc->sc_dev))); 824 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 825 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 826 827 /* We now own the host controller and the bus has been reset. */ 828 829 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 830 /* Nominal time for a reset is 10 us. */ 831 for (i = 0; i < 10; i++) { 832 delay(10); 833 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 834 if (!hcr) 835 break; 836 } 837 if (hcr) { 838 aprint_error_dev(sc->sc_dev, "reset timeout\n"); 839 err = USBD_IOERROR; 840 goto bad5; 841 } 842 #ifdef OHCI_DEBUG 843 if (ohcidebug > 15) 844 ohci_dumpregs(sc); 845 #endif 846 847 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 848 849 /* Set up HC registers. */ 850 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 851 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 852 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 853 /* disable all interrupts and then switch on all desired interrupts */ 854 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 855 /* switch on desired functional features */ 856 ctl = OREAD4(sc, OHCI_CONTROL); 857 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 858 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 859 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc; 860 /* And finally start it! */ 861 OWRITE4(sc, OHCI_CONTROL, ctl); 862 863 /* 864 * The controller is now OPERATIONAL. Set a some final 865 * registers that should be set earlier, but that the 866 * controller ignores when in the SUSPEND state. 867 */ 868 ival = OHCI_GET_IVAL(fm); 869 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 870 fm |= OHCI_FSMPS(ival) | ival; 871 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 872 per = OHCI_PERIODIC(ival); /* 90% periodic */ 873 OWRITE4(sc, OHCI_PERIODIC_START, per); 874 875 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 876 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 877 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 878 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 879 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 880 881 /* 882 * The AMD756 requires a delay before re-reading the register, 883 * otherwise it will occasionally report 0 ports. 884 */ 885 sc->sc_noport = 0; 886 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 887 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 888 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 889 } 890 891 #ifdef OHCI_DEBUG 892 if (ohcidebug > 5) 893 ohci_dumpregs(sc); 894 #endif 895 896 /* Set up the bus struct. */ 897 sc->sc_bus.methods = &ohci_bus_methods; 898 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 899 900 sc->sc_control = sc->sc_intre = 0; 901 902 /* Finally, turn on interrupts. */ 903 DPRINTFN(1,("ohci_init: enabling %#x\n", sc->sc_eintrs | OHCI_MIE)); 904 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 905 906 return (USBD_NORMAL_COMPLETION); 907 908 bad5: 909 for (i = 0; i < OHCI_NO_EDS; i++) 910 ohci_free_sed(sc, sc->sc_eds[i]); 911 bad4: 912 ohci_free_sed(sc, sc->sc_isoc_head); 913 bad3: 914 ohci_free_sed(sc, sc->sc_bulk_head); 915 bad2: 916 ohci_free_sed(sc, sc->sc_ctrl_head); 917 bad1: 918 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 919 sc->sc_hcca = NULL; 920 return (err); 921 } 922 923 usbd_status 924 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 925 { 926 struct ohci_softc *sc = bus->hci_private; 927 usbd_status status; 928 929 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 930 if (status == USBD_NOMEM) 931 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 932 return status; 933 } 934 935 void 936 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 937 { 938 struct ohci_softc *sc = bus->hci_private; 939 if (dma->block->flags & USB_DMA_RESERVE) { 940 usb_reserve_freem(&sc->sc_dma_reserve, dma); 941 return; 942 } 943 usb_freemem(&sc->sc_bus, dma); 944 } 945 946 usbd_xfer_handle 947 ohci_allocx(struct usbd_bus *bus) 948 { 949 struct ohci_softc *sc = bus->hci_private; 950 usbd_xfer_handle xfer; 951 952 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 953 if (xfer != NULL) { 954 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 955 #ifdef DIAGNOSTIC 956 if (xfer->busy_free != XFER_FREE) { 957 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer, 958 xfer->busy_free); 959 } 960 #endif 961 } else { 962 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT); 963 } 964 if (xfer != NULL) { 965 memset(xfer, 0, sizeof (struct ohci_xfer)); 966 #ifdef DIAGNOSTIC 967 xfer->busy_free = XFER_BUSY; 968 #endif 969 } 970 return (xfer); 971 } 972 973 void 974 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 975 { 976 struct ohci_softc *sc = bus->hci_private; 977 978 #ifdef DIAGNOSTIC 979 if (xfer->busy_free != XFER_BUSY) { 980 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer, 981 xfer->busy_free); 982 } 983 xfer->busy_free = XFER_FREE; 984 #endif 985 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 986 } 987 988 /* 989 * Shut down the controller when the system is going down. 990 */ 991 bool 992 ohci_shutdown(device_t self, int flags) 993 { 994 ohci_softc_t *sc = device_private(self); 995 996 DPRINTF(("ohci_shutdown: stopping the HC\n")); 997 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 998 return true; 999 } 1000 1001 bool 1002 ohci_resume(device_t dv, const pmf_qual_t *qual) 1003 { 1004 ohci_softc_t *sc = device_private(dv); 1005 uint32_t ctl; 1006 int s; 1007 1008 s = splhardusb(); 1009 sc->sc_bus.use_polling++; 1010 /* Some broken BIOSes do not recover these values */ 1011 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1012 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, 1013 sc->sc_ctrl_head->physaddr); 1014 OWRITE4(sc, OHCI_BULK_HEAD_ED, 1015 sc->sc_bulk_head->physaddr); 1016 if (sc->sc_intre) 1017 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre & 1018 (OHCI_ALL_INTRS | OHCI_MIE)); 1019 if (sc->sc_control) 1020 ctl = sc->sc_control; 1021 else 1022 ctl = OREAD4(sc, OHCI_CONTROL); 1023 ctl |= OHCI_HCFS_RESUME; 1024 OWRITE4(sc, OHCI_CONTROL, ctl); 1025 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1026 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1027 OWRITE4(sc, OHCI_CONTROL, ctl); 1028 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1029 sc->sc_control = sc->sc_intre = 0; 1030 sc->sc_bus.use_polling--; 1031 splx(s); 1032 1033 return true; 1034 } 1035 1036 bool 1037 ohci_suspend(device_t dv, const pmf_qual_t *qual) 1038 { 1039 ohci_softc_t *sc = device_private(dv); 1040 uint32_t ctl; 1041 int s; 1042 1043 s = splhardusb(); 1044 sc->sc_bus.use_polling++; 1045 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 1046 if (sc->sc_control == 0) { 1047 /* 1048 * Preserve register values, in case that BIOS 1049 * does not recover them. 1050 */ 1051 sc->sc_control = ctl; 1052 sc->sc_intre = OREAD4(sc, 1053 OHCI_INTERRUPT_ENABLE); 1054 } 1055 ctl |= OHCI_HCFS_SUSPEND; 1056 OWRITE4(sc, OHCI_CONTROL, ctl); 1057 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1058 sc->sc_bus.use_polling--; 1059 splx(s); 1060 1061 return true; 1062 } 1063 1064 #ifdef OHCI_DEBUG 1065 void 1066 ohci_dumpregs(ohci_softc_t *sc) 1067 { 1068 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1069 OREAD4(sc, OHCI_REVISION), 1070 OREAD4(sc, OHCI_CONTROL), 1071 OREAD4(sc, OHCI_COMMAND_STATUS))); 1072 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1073 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1074 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1075 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1076 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1077 OREAD4(sc, OHCI_HCCA), 1078 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1079 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1080 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1081 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1082 OREAD4(sc, OHCI_BULK_HEAD_ED), 1083 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1084 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1085 OREAD4(sc, OHCI_DONE_HEAD), 1086 OREAD4(sc, OHCI_FM_INTERVAL), 1087 OREAD4(sc, OHCI_FM_REMAINING))); 1088 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1089 OREAD4(sc, OHCI_FM_NUMBER), 1090 OREAD4(sc, OHCI_PERIODIC_START), 1091 OREAD4(sc, OHCI_LS_THRESHOLD))); 1092 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1093 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1094 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1095 OREAD4(sc, OHCI_RH_STATUS))); 1096 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1097 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1098 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1099 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1100 O32TOH(sc->sc_hcca->hcca_frame_number), 1101 O32TOH(sc->sc_hcca->hcca_done_head))); 1102 } 1103 #endif 1104 1105 Static int ohci_intr1(ohci_softc_t *); 1106 1107 int 1108 ohci_intr(void *p) 1109 { 1110 ohci_softc_t *sc = p; 1111 1112 if (sc == NULL || sc->sc_dying || !device_has_power(sc->sc_dev)) 1113 return (0); 1114 1115 /* If we get an interrupt while polling, then just ignore it. */ 1116 if (sc->sc_bus.use_polling) { 1117 #ifdef DIAGNOSTIC 1118 DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n")); 1119 #endif 1120 /* for level triggered intrs, should do something to ack */ 1121 OWRITE4(sc, OHCI_INTERRUPT_STATUS, 1122 OREAD4(sc, OHCI_INTERRUPT_STATUS)); 1123 1124 return (0); 1125 } 1126 1127 return (ohci_intr1(sc)); 1128 } 1129 1130 Static int 1131 ohci_intr1(ohci_softc_t *sc) 1132 { 1133 u_int32_t intrs, eintrs; 1134 1135 DPRINTFN(14,("ohci_intr1: enter\n")); 1136 1137 /* In case the interrupt occurs before initialization has completed. */ 1138 if (sc == NULL || sc->sc_hcca == NULL) { 1139 #ifdef DIAGNOSTIC 1140 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1141 #endif 1142 return (0); 1143 } 1144 1145 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1146 if (!intrs) 1147 return (0); 1148 1149 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); /* Acknowledge */ 1150 eintrs = intrs & sc->sc_eintrs; 1151 DPRINTFN(7, ("ohci_intr: sc=%p intrs=%#x(%#x) eintrs=%#x(%#x)\n", 1152 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1153 (u_int)eintrs, sc->sc_eintrs)); 1154 1155 if (!eintrs) { 1156 return (0); 1157 } 1158 1159 sc->sc_bus.no_intrs++; 1160 if (eintrs & OHCI_SO) { 1161 sc->sc_overrun_cnt++; 1162 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1163 printf("%s: %u scheduling overruns\n", 1164 device_xname(sc->sc_dev), sc->sc_overrun_cnt); 1165 sc->sc_overrun_cnt = 0; 1166 } 1167 /* XXX do what */ 1168 eintrs &= ~OHCI_SO; 1169 } 1170 if (eintrs & OHCI_WDH) { 1171 /* 1172 * We block the interrupt below, and reenable it later from 1173 * ohci_softintr(). 1174 */ 1175 usb_schedsoftintr(&sc->sc_bus); 1176 } 1177 if (eintrs & OHCI_RD) { 1178 printf("%s: resume detect\n", device_xname(sc->sc_dev)); 1179 /* XXX process resume detect */ 1180 } 1181 if (eintrs & OHCI_UE) { 1182 printf("%s: unrecoverable error, controller halted\n", 1183 device_xname(sc->sc_dev)); 1184 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1185 /* XXX what else */ 1186 } 1187 if (eintrs & OHCI_RHSC) { 1188 /* 1189 * We block the interrupt below, and reenable it later from 1190 * a timeout. 1191 */ 1192 ohci_rhsc(sc, sc->sc_intrxfer); 1193 /* Do not allow RHSC interrupts > 1 per second */ 1194 callout_reset(&sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1195 } 1196 1197 if (eintrs != 0) { 1198 /* Block unprocessed interrupts. */ 1199 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1200 sc->sc_eintrs &= ~eintrs; 1201 DPRINTFN(1, ("%s: blocking intrs 0x%x\n", 1202 device_xname(sc->sc_dev), eintrs)); 1203 } 1204 1205 return (1); 1206 } 1207 1208 void 1209 ohci_rhsc_enable(void *v_sc) 1210 { 1211 ohci_softc_t *sc = v_sc; 1212 int s; 1213 1214 s = splhardusb(); 1215 sc->sc_eintrs |= OHCI_RHSC; 1216 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1217 splx(s); 1218 } 1219 1220 #ifdef OHCI_DEBUG 1221 const char *ohci_cc_strs[] = { 1222 "NO_ERROR", 1223 "CRC", 1224 "BIT_STUFFING", 1225 "DATA_TOGGLE_MISMATCH", 1226 "STALL", 1227 "DEVICE_NOT_RESPONDING", 1228 "PID_CHECK_FAILURE", 1229 "UNEXPECTED_PID", 1230 "DATA_OVERRUN", 1231 "DATA_UNDERRUN", 1232 "BUFFER_OVERRUN", 1233 "BUFFER_UNDERRUN", 1234 "reserved", 1235 "reserved", 1236 "NOT_ACCESSED", 1237 "NOT_ACCESSED", 1238 }; 1239 #endif 1240 1241 void 1242 ohci_softintr(void *v) 1243 { 1244 struct usbd_bus *bus = v; 1245 ohci_softc_t *sc = bus->hci_private; 1246 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1247 ohci_soft_td_t *std, *sdone, *stdnext; 1248 usbd_xfer_handle xfer; 1249 struct ohci_pipe *opipe; 1250 int len, cc, s; 1251 int i, j, actlen, iframes, uedir; 1252 ohci_physaddr_t done; 1253 1254 DPRINTFN(10,("ohci_softintr: enter\n")); 1255 1256 s = splhardusb(); 1257 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1258 sizeof(sc->sc_hcca->hcca_done_head), 1259 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1260 done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS; 1261 sc->sc_hcca->hcca_done_head = 0; 1262 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1263 sizeof(sc->sc_hcca->hcca_done_head), 1264 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1265 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH); 1266 sc->sc_eintrs |= OHCI_WDH; 1267 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH); 1268 splx(s); 1269 1270 /* Reverse the done list. */ 1271 for (sdone = NULL, sidone = NULL; done != 0; ) { 1272 std = ohci_hash_find_td(sc, done); 1273 if (std != NULL) { 1274 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1275 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1276 std->dnext = sdone; 1277 done = O32TOH(std->td.td_nexttd); 1278 sdone = std; 1279 DPRINTFN(10,("add TD %p\n", std)); 1280 continue; 1281 } 1282 sitd = ohci_hash_find_itd(sc, done); 1283 if (sitd != NULL) { 1284 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 1285 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1286 sitd->dnext = sidone; 1287 done = O32TOH(sitd->itd.itd_nextitd); 1288 sidone = sitd; 1289 DPRINTFN(5,("add ITD %p\n", sitd)); 1290 continue; 1291 } 1292 device_printf(sc->sc_dev, "WARNING: addr 0x%08lx not found\n", 1293 (u_long)done); 1294 break; 1295 } 1296 1297 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1298 1299 #ifdef OHCI_DEBUG 1300 if (ohcidebug > 10) { 1301 DPRINTF(("ohci_process_done: TD done:\n")); 1302 ohci_dump_tds(sc, sdone); 1303 } 1304 #endif 1305 1306 for (std = sdone; std; std = stdnext) { 1307 xfer = std->xfer; 1308 stdnext = std->dnext; 1309 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1310 std, xfer, xfer ? xfer->hcpriv : 0)); 1311 if (xfer == NULL) { 1312 /* 1313 * xfer == NULL: There seems to be no xfer associated 1314 * with this TD. It is tailp that happened to end up on 1315 * the done queue. 1316 * Shouldn't happen, but some chips are broken(?). 1317 */ 1318 continue; 1319 } 1320 if (xfer->status == USBD_CANCELLED || 1321 xfer->status == USBD_TIMEOUT) { 1322 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1323 xfer)); 1324 /* Handled by abort routine. */ 1325 continue; 1326 } 1327 callout_stop(&xfer->timeout_handle); 1328 1329 len = std->len; 1330 if (std->td.td_cbp != 0) 1331 len -= O32TOH(std->td.td_be) - 1332 O32TOH(std->td.td_cbp) + 1; 1333 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len, 1334 std->flags)); 1335 if (std->flags & OHCI_ADD_LEN) 1336 xfer->actlen += len; 1337 1338 cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags)); 1339 if (cc == OHCI_CC_NO_ERROR) { 1340 if (std->flags & OHCI_CALL_DONE) { 1341 xfer->status = USBD_NORMAL_COMPLETION; 1342 s = splusb(); 1343 usb_transfer_complete(xfer); 1344 splx(s); 1345 } 1346 ohci_free_std(sc, std); 1347 } else { 1348 /* 1349 * Endpoint is halted. First unlink all the TDs 1350 * belonging to the failed transfer, and then restart 1351 * the endpoint. 1352 */ 1353 ohci_soft_td_t *p, *n; 1354 opipe = (struct ohci_pipe *)xfer->pipe; 1355 1356 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1357 OHCI_TD_GET_CC(O32TOH(std->td.td_flags)), 1358 ohci_cc_strs[OHCI_TD_GET_CC(O32TOH(std->td.td_flags))])); 1359 1360 /* remove TDs */ 1361 for (p = std; p->xfer == xfer; p = n) { 1362 n = p->nexttd; 1363 ohci_free_std(sc, p); 1364 } 1365 1366 /* clear halt */ 1367 opipe->sed->ed.ed_headp = HTOO32(p->physaddr); 1368 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1369 1370 if (cc == OHCI_CC_STALL) 1371 xfer->status = USBD_STALLED; 1372 else 1373 xfer->status = USBD_IOERROR; 1374 s = splusb(); 1375 usb_transfer_complete(xfer); 1376 splx(s); 1377 } 1378 } 1379 1380 #ifdef OHCI_DEBUG 1381 if (ohcidebug > 10) { 1382 DPRINTF(("ohci_softintr: ITD done:\n")); 1383 ohci_dump_itds(sc, sidone); 1384 } 1385 #endif 1386 1387 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1388 xfer = sitd->xfer; 1389 sitdnext = sitd->dnext; 1390 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1391 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1392 if (xfer == NULL) 1393 continue; 1394 if (xfer->status == USBD_CANCELLED || 1395 xfer->status == USBD_TIMEOUT) { 1396 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1397 xfer)); 1398 /* Handled by abort routine. */ 1399 continue; 1400 } 1401 #ifdef DIAGNOSTIC 1402 if (sitd->isdone) 1403 printf("ohci_softintr: sitd=%p is done\n", sitd); 1404 sitd->isdone = 1; 1405 #endif 1406 if (sitd->flags & OHCI_CALL_DONE) { 1407 ohci_soft_itd_t *next; 1408 1409 opipe = (struct ohci_pipe *)xfer->pipe; 1410 opipe->u.iso.inuse -= xfer->nframes; 1411 uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc-> 1412 bEndpointAddress); 1413 xfer->status = USBD_NORMAL_COMPLETION; 1414 actlen = 0; 1415 for (i = 0, sitd = xfer->hcpriv;; 1416 sitd = next) { 1417 next = sitd->nextitd; 1418 if (OHCI_ITD_GET_CC(O32TOH(sitd-> 1419 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1420 xfer->status = USBD_IOERROR; 1421 /* For input, update frlengths with actual */ 1422 /* XXX anything necessary for output? */ 1423 if (uedir == UE_DIR_IN && 1424 xfer->status == USBD_NORMAL_COMPLETION) { 1425 iframes = OHCI_ITD_GET_FC(O32TOH( 1426 sitd->itd.itd_flags)); 1427 for (j = 0; j < iframes; i++, j++) { 1428 len = O16TOH(sitd-> 1429 itd.itd_offset[j]); 1430 if ((OHCI_ITD_PSW_GET_CC(len) & 1431 OHCI_CC_NOT_ACCESSED_MASK) 1432 == OHCI_CC_NOT_ACCESSED) 1433 len = 0; 1434 else 1435 len = OHCI_ITD_PSW_LENGTH(len); 1436 xfer->frlengths[i] = len; 1437 actlen += len; 1438 } 1439 } 1440 if (sitd->flags & OHCI_CALL_DONE) 1441 break; 1442 ohci_free_sitd(sc, sitd); 1443 } 1444 ohci_free_sitd(sc, sitd); 1445 if (uedir == UE_DIR_IN && 1446 xfer->status == USBD_NORMAL_COMPLETION) 1447 xfer->actlen = actlen; 1448 xfer->hcpriv = NULL; 1449 1450 s = splusb(); 1451 usb_transfer_complete(xfer); 1452 splx(s); 1453 } 1454 } 1455 1456 if (sc->sc_softwake) { 1457 sc->sc_softwake = 0; 1458 wakeup(&sc->sc_softwake); 1459 } 1460 1461 DPRINTFN(10,("ohci_softintr: done:\n")); 1462 } 1463 1464 void 1465 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1466 { 1467 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1468 int len = UGETW(xfer->request.wLength); 1469 int isread = (xfer->request.bmRequestType & UT_READ); 1470 1471 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer)); 1472 1473 #ifdef DIAGNOSTIC 1474 if (!(xfer->rqflags & URQ_REQUEST)) { 1475 panic("ohci_device_ctrl_done: not a request"); 1476 } 1477 #endif 1478 if (len) 1479 usb_syncmem(&xfer->dmabuf, 0, len, 1480 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1481 usb_syncmem(&opipe->u.ctl.reqdma, 0, 1482 sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE); 1483 } 1484 1485 void 1486 ohci_device_intr_done(usbd_xfer_handle xfer) 1487 { 1488 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1489 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 1490 ohci_soft_ed_t *sed = opipe->sed; 1491 ohci_soft_td_t *data, *tail; 1492 int isread = 1493 (UE_GET_DIR(xfer->pipe->endpoint->edesc->bEndpointAddress) == UE_DIR_IN); 1494 1495 1496 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n", 1497 xfer, xfer->actlen)); 1498 1499 usb_syncmem(&xfer->dmabuf, 0, xfer->length, 1500 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1501 if (xfer->pipe->repeat) { 1502 data = opipe->tail.td; 1503 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1504 if (tail == NULL) { 1505 xfer->status = USBD_NOMEM; 1506 return; 1507 } 1508 tail->xfer = NULL; 1509 1510 data->td.td_flags = HTOO32( 1511 OHCI_TD_IN | OHCI_TD_NOCC | 1512 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1513 if (xfer->flags & USBD_SHORT_XFER_OK) 1514 data->td.td_flags |= HTOO32(OHCI_TD_R); 1515 data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0)); 1516 data->nexttd = tail; 1517 data->td.td_nexttd = HTOO32(tail->physaddr); 1518 data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + 1519 xfer->length - 1); 1520 data->len = xfer->length; 1521 data->xfer = xfer; 1522 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1523 usb_syncmem(&data->dma, data->offs, sizeof(data->td), 1524 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1525 xfer->hcpriv = data; 1526 xfer->actlen = 0; 1527 1528 sed->ed.ed_tailp = HTOO32(tail->physaddr); 1529 usb_syncmem(&sed->dma, 1530 sed->offs + offsetof(ohci_ed_t, ed_tailp), 1531 sizeof(sed->ed.ed_tailp), 1532 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1533 opipe->tail.td = tail; 1534 } 1535 } 1536 1537 void 1538 ohci_device_bulk_done(usbd_xfer_handle xfer) 1539 { 1540 int isread = 1541 (UE_GET_DIR(xfer->pipe->endpoint->edesc->bEndpointAddress) == UE_DIR_IN); 1542 1543 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n", 1544 xfer, xfer->actlen)); 1545 usb_syncmem(&xfer->dmabuf, 0, xfer->length, 1546 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1547 } 1548 1549 void 1550 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1551 { 1552 usbd_pipe_handle pipe; 1553 u_char *p; 1554 int i, m; 1555 int hstatus; 1556 1557 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1558 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1559 sc, xfer, hstatus)); 1560 1561 if (xfer == NULL) { 1562 /* Just ignore the change. */ 1563 return; 1564 } 1565 1566 pipe = xfer->pipe; 1567 1568 p = KERNADDR(&xfer->dmabuf, 0); 1569 m = min(sc->sc_noport, xfer->length * 8 - 1); 1570 memset(p, 0, xfer->length); 1571 for (i = 1; i <= m; i++) { 1572 /* Pick out CHANGE bits from the status reg. */ 1573 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1574 p[i/8] |= 1 << (i%8); 1575 } 1576 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1577 xfer->actlen = xfer->length; 1578 xfer->status = USBD_NORMAL_COMPLETION; 1579 1580 usb_transfer_complete(xfer); 1581 } 1582 1583 void 1584 ohci_root_intr_done(usbd_xfer_handle xfer) 1585 { 1586 } 1587 1588 void 1589 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1590 { 1591 } 1592 1593 /* 1594 * Wait here until controller claims to have an interrupt. 1595 * Then call ohci_intr and return. Use timeout to avoid waiting 1596 * too long. 1597 */ 1598 void 1599 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1600 { 1601 int timo; 1602 u_int32_t intrs; 1603 1604 xfer->status = USBD_IN_PROGRESS; 1605 for (timo = xfer->timeout; timo >= 0; timo--) { 1606 usb_delay_ms(&sc->sc_bus, 1); 1607 if (sc->sc_dying) 1608 break; 1609 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1610 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1611 #ifdef OHCI_DEBUG 1612 if (ohcidebug > 15) 1613 ohci_dumpregs(sc); 1614 #endif 1615 if (intrs) { 1616 ohci_intr1(sc); 1617 if (xfer->status != USBD_IN_PROGRESS) 1618 return; 1619 } 1620 } 1621 1622 /* Timeout */ 1623 DPRINTF(("ohci_waitintr: timeout\n")); 1624 xfer->status = USBD_TIMEOUT; 1625 usb_transfer_complete(xfer); 1626 /* XXX should free TD */ 1627 } 1628 1629 void 1630 ohci_poll(struct usbd_bus *bus) 1631 { 1632 ohci_softc_t *sc = bus->hci_private; 1633 #ifdef OHCI_DEBUG 1634 static int last; 1635 int new; 1636 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1637 if (new != last) { 1638 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1639 last = new; 1640 } 1641 #endif 1642 1643 sc->sc_eintrs |= OHCI_WDH; 1644 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1645 ohci_intr1(sc); 1646 } 1647 1648 usbd_status 1649 ohci_device_request(usbd_xfer_handle xfer) 1650 { 1651 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1652 usb_device_request_t *req = &xfer->request; 1653 usbd_device_handle dev = opipe->pipe.device; 1654 ohci_softc_t *sc = dev->bus->hci_private; 1655 int addr = dev->address; 1656 ohci_soft_td_t *setup, *stat, *next, *tail; 1657 ohci_soft_ed_t *sed; 1658 int isread; 1659 int len; 1660 usbd_status err; 1661 int s; 1662 1663 isread = req->bmRequestType & UT_READ; 1664 len = UGETW(req->wLength); 1665 1666 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1667 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1668 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1669 UGETW(req->wIndex), len, addr, 1670 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1671 1672 setup = opipe->tail.td; 1673 stat = ohci_alloc_std(sc); 1674 if (stat == NULL) { 1675 err = USBD_NOMEM; 1676 goto bad1; 1677 } 1678 tail = ohci_alloc_std(sc); 1679 if (tail == NULL) { 1680 err = USBD_NOMEM; 1681 goto bad2; 1682 } 1683 tail->xfer = NULL; 1684 1685 sed = opipe->sed; 1686 opipe->u.ctl.length = len; 1687 1688 /* Update device address and length since they may have changed 1689 during the setup of the control pipe in usbd_new_device(). */ 1690 /* XXX This only needs to be done once, but it's too early in open. */ 1691 /* XXXX Should not touch ED here! */ 1692 1693 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 1694 sizeof(sed->ed.ed_flags), 1695 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1696 sed->ed.ed_flags = HTOO32( 1697 (O32TOH(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1698 OHCI_ED_SET_FA(addr) | 1699 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1700 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 1701 sizeof(sed->ed.ed_flags), 1702 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1703 1704 next = stat; 1705 1706 /* Set up data transaction */ 1707 if (len != 0) { 1708 ohci_soft_td_t *std = stat; 1709 1710 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1711 std, &stat); 1712 stat = stat->nexttd; /* point at free TD */ 1713 if (err) 1714 goto bad3; 1715 /* Start toggle at 1 and then use the carried toggle. */ 1716 std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK); 1717 std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1); 1718 usb_syncmem(&std->dma, 1719 std->offs + offsetof(ohci_td_t, td_flags), 1720 sizeof(std->td.td_flags), 1721 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1722 } 1723 1724 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req); 1725 usb_syncmem(&opipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE); 1726 1727 setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1728 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1729 setup->td.td_cbp = HTOO32(DMAADDR(&opipe->u.ctl.reqdma, 0)); 1730 setup->nexttd = next; 1731 setup->td.td_nexttd = HTOO32(next->physaddr); 1732 setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof *req - 1); 1733 setup->len = 0; 1734 setup->xfer = xfer; 1735 setup->flags = 0; 1736 xfer->hcpriv = setup; 1737 usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td), 1738 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1739 1740 stat->td.td_flags = HTOO32( 1741 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1742 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1743 stat->td.td_cbp = 0; 1744 stat->nexttd = tail; 1745 stat->td.td_nexttd = HTOO32(tail->physaddr); 1746 stat->td.td_be = 0; 1747 stat->flags = OHCI_CALL_DONE; 1748 stat->len = 0; 1749 stat->xfer = xfer; 1750 usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td), 1751 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1752 1753 #ifdef OHCI_DEBUG 1754 if (ohcidebug > 5) { 1755 DPRINTF(("ohci_device_request:\n")); 1756 ohci_dump_ed(sc, sed); 1757 ohci_dump_tds(sc, setup); 1758 } 1759 #endif 1760 1761 /* Insert ED in schedule */ 1762 s = splusb(); 1763 sed->ed.ed_tailp = HTOO32(tail->physaddr); 1764 usb_syncmem(&sed->dma, 1765 sed->offs + offsetof(ohci_ed_t, ed_tailp), 1766 sizeof(sed->ed.ed_tailp), 1767 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1768 opipe->tail.td = tail; 1769 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1770 if (xfer->timeout && !sc->sc_bus.use_polling) { 1771 callout_reset(&xfer->timeout_handle, mstohz(xfer->timeout), 1772 ohci_timeout, xfer); 1773 } 1774 splx(s); 1775 1776 #ifdef OHCI_DEBUG 1777 if (ohcidebug > 20) { 1778 delay(10000); 1779 DPRINTF(("ohci_device_request: status=%x\n", 1780 OREAD4(sc, OHCI_COMMAND_STATUS))); 1781 ohci_dumpregs(sc); 1782 printf("ctrl head:\n"); 1783 ohci_dump_ed(sc, sc->sc_ctrl_head); 1784 printf("sed:\n"); 1785 ohci_dump_ed(sc, sed); 1786 ohci_dump_tds(sc, setup); 1787 } 1788 #endif 1789 1790 return (USBD_NORMAL_COMPLETION); 1791 1792 bad3: 1793 ohci_free_std(sc, tail); 1794 bad2: 1795 ohci_free_std(sc, stat); 1796 bad1: 1797 return (err); 1798 } 1799 1800 /* 1801 * Add an ED to the schedule. Called at splusb(). 1802 */ 1803 void 1804 ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1805 { 1806 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1807 1808 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1809 sizeof(head->ed.ed_nexted), 1810 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1811 sed->next = head->next; 1812 sed->ed.ed_nexted = head->ed.ed_nexted; 1813 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1814 sizeof(sed->ed.ed_nexted), 1815 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1816 head->next = sed; 1817 head->ed.ed_nexted = HTOO32(sed->physaddr); 1818 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1819 sizeof(head->ed.ed_nexted), 1820 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1821 } 1822 1823 /* 1824 * Remove an ED from the schedule. Called at splusb(). 1825 */ 1826 void 1827 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1828 { 1829 ohci_soft_ed_t *p; 1830 1831 /* XXX */ 1832 for (p = head; p != NULL && p->next != sed; p = p->next) 1833 ; 1834 if (p == NULL) 1835 panic("ohci_rem_ed: ED not found"); 1836 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1837 sizeof(sed->ed.ed_nexted), 1838 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1839 p->next = sed->next; 1840 p->ed.ed_nexted = sed->ed.ed_nexted; 1841 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 1842 sizeof(p->ed.ed_nexted), 1843 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1844 } 1845 1846 /* 1847 * When a transfer is completed the TD is added to the done queue by 1848 * the host controller. This queue is the processed by software. 1849 * Unfortunately the queue contains the physical address of the TD 1850 * and we have no simple way to translate this back to a kernel address. 1851 * To make the translation possible (and fast) we use a hash table of 1852 * TDs currently in the schedule. The physical address is used as the 1853 * hash value. 1854 */ 1855 1856 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1857 /* Called at splusb() */ 1858 void 1859 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1860 { 1861 int h = HASH(std->physaddr); 1862 1863 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1864 } 1865 1866 /* Called at splusb() */ 1867 void 1868 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1869 { 1870 1871 LIST_REMOVE(std, hnext); 1872 } 1873 1874 ohci_soft_td_t * 1875 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1876 { 1877 int h = HASH(a); 1878 ohci_soft_td_t *std; 1879 1880 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1881 std != NULL; 1882 std = LIST_NEXT(std, hnext)) 1883 if (std->physaddr == a) 1884 return (std); 1885 return (NULL); 1886 } 1887 1888 /* Called at splusb() */ 1889 void 1890 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1891 { 1892 int h = HASH(sitd->physaddr); 1893 1894 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1895 sitd, (u_long)sitd->physaddr)); 1896 1897 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1898 } 1899 1900 /* Called at splusb() */ 1901 void 1902 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1903 { 1904 1905 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1906 sitd, (u_long)sitd->physaddr)); 1907 1908 LIST_REMOVE(sitd, hnext); 1909 } 1910 1911 ohci_soft_itd_t * 1912 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1913 { 1914 int h = HASH(a); 1915 ohci_soft_itd_t *sitd; 1916 1917 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1918 sitd != NULL; 1919 sitd = LIST_NEXT(sitd, hnext)) 1920 if (sitd->physaddr == a) 1921 return (sitd); 1922 return (NULL); 1923 } 1924 1925 void 1926 ohci_timeout(void *addr) 1927 { 1928 struct ohci_xfer *oxfer = addr; 1929 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe; 1930 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 1931 1932 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer)); 1933 1934 if (sc->sc_dying) { 1935 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT); 1936 return; 1937 } 1938 1939 /* Execute the abort in a process context. */ 1940 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr); 1941 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task, 1942 USB_TASKQ_HC); 1943 } 1944 1945 void 1946 ohci_timeout_task(void *addr) 1947 { 1948 usbd_xfer_handle xfer = addr; 1949 int s; 1950 1951 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer)); 1952 1953 s = splusb(); 1954 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1955 splx(s); 1956 } 1957 1958 #ifdef OHCI_DEBUG 1959 void 1960 ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std) 1961 { 1962 for (; std; std = std->nexttd) 1963 ohci_dump_td(sc, std); 1964 } 1965 1966 void 1967 ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1968 { 1969 char sbuf[128]; 1970 1971 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1972 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1973 snprintb(sbuf, sizeof(sbuf), 1974 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1975 (u_int32_t)O32TOH(std->td.td_flags)); 1976 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1977 "nexttd=0x%08lx be=0x%08lx\n", 1978 std, (u_long)std->physaddr, sbuf, 1979 OHCI_TD_GET_DI(O32TOH(std->td.td_flags)), 1980 OHCI_TD_GET_EC(O32TOH(std->td.td_flags)), 1981 OHCI_TD_GET_CC(O32TOH(std->td.td_flags)), 1982 (u_long)O32TOH(std->td.td_cbp), 1983 (u_long)O32TOH(std->td.td_nexttd), 1984 (u_long)O32TOH(std->td.td_be)); 1985 } 1986 1987 void 1988 ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1989 { 1990 int i; 1991 1992 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 1993 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1994 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1995 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1996 sitd, (u_long)sitd->physaddr, 1997 OHCI_ITD_GET_SF(O32TOH(sitd->itd.itd_flags)), 1998 OHCI_ITD_GET_DI(O32TOH(sitd->itd.itd_flags)), 1999 OHCI_ITD_GET_FC(O32TOH(sitd->itd.itd_flags)), 2000 OHCI_ITD_GET_CC(O32TOH(sitd->itd.itd_flags)), 2001 (u_long)O32TOH(sitd->itd.itd_bp0), 2002 (u_long)O32TOH(sitd->itd.itd_nextitd), 2003 (u_long)O32TOH(sitd->itd.itd_be)); 2004 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 2005 printf("offs[%d]=0x%04x ", i, 2006 (u_int)O16TOH(sitd->itd.itd_offset[i])); 2007 printf("\n"); 2008 } 2009 2010 void 2011 ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 2012 { 2013 for (; sitd; sitd = sitd->nextitd) 2014 ohci_dump_itd(sc, sitd); 2015 } 2016 2017 void 2018 ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 2019 { 2020 char sbuf[128], sbuf2[128]; 2021 2022 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2023 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2024 snprintb(sbuf, sizeof(sbuf), 2025 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 2026 (u_int32_t)O32TOH(sed->ed.ed_flags)); 2027 snprintb(sbuf2, sizeof(sbuf2), "\20\1HALT\2CARRY", 2028 (u_int32_t)O32TOH(sed->ed.ed_headp)); 2029 2030 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx " 2031 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 2032 sed, (u_long)sed->physaddr, 2033 OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)), 2034 OHCI_ED_GET_EN(O32TOH(sed->ed.ed_flags)), 2035 OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), sbuf, 2036 (u_long)O32TOH(sed->ed.ed_tailp), sbuf2, 2037 (u_long)O32TOH(sed->ed.ed_headp), 2038 (u_long)O32TOH(sed->ed.ed_nexted)); 2039 } 2040 #endif 2041 2042 usbd_status 2043 ohci_open(usbd_pipe_handle pipe) 2044 { 2045 usbd_device_handle dev = pipe->device; 2046 ohci_softc_t *sc = dev->bus->hci_private; 2047 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 2048 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2049 u_int8_t addr = dev->address; 2050 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 2051 ohci_soft_ed_t *sed; 2052 ohci_soft_td_t *std; 2053 ohci_soft_itd_t *sitd; 2054 ohci_physaddr_t tdphys; 2055 u_int32_t fmt; 2056 usbd_status err; 2057 int s; 2058 int ival; 2059 2060 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 2061 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 2062 2063 if (sc->sc_dying) 2064 return (USBD_IOERROR); 2065 2066 std = NULL; 2067 sed = NULL; 2068 2069 if (addr == sc->sc_addr) { 2070 switch (ed->bEndpointAddress) { 2071 case USB_CONTROL_ENDPOINT: 2072 pipe->methods = &ohci_root_ctrl_methods; 2073 break; 2074 case UE_DIR_IN | OHCI_INTR_ENDPT: 2075 pipe->methods = &ohci_root_intr_methods; 2076 break; 2077 default: 2078 return (USBD_INVAL); 2079 } 2080 } else { 2081 sed = ohci_alloc_sed(sc); 2082 if (sed == NULL) 2083 goto bad0; 2084 opipe->sed = sed; 2085 if (xfertype == UE_ISOCHRONOUS) { 2086 sitd = ohci_alloc_sitd(sc); 2087 if (sitd == NULL) 2088 goto bad1; 2089 opipe->tail.itd = sitd; 2090 tdphys = sitd->physaddr; 2091 fmt = OHCI_ED_FORMAT_ISO; 2092 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2093 fmt |= OHCI_ED_DIR_IN; 2094 else 2095 fmt |= OHCI_ED_DIR_OUT; 2096 } else { 2097 std = ohci_alloc_std(sc); 2098 if (std == NULL) 2099 goto bad1; 2100 opipe->tail.td = std; 2101 tdphys = std->physaddr; 2102 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2103 } 2104 sed->ed.ed_flags = HTOO32( 2105 OHCI_ED_SET_FA(addr) | 2106 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2107 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2108 fmt | 2109 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2110 sed->ed.ed_headp = HTOO32(tdphys | 2111 (pipe->endpoint->datatoggle ? OHCI_TOGGLECARRY : 0)); 2112 sed->ed.ed_tailp = HTOO32(tdphys); 2113 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2114 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2115 2116 switch (xfertype) { 2117 case UE_CONTROL: 2118 pipe->methods = &ohci_device_ctrl_methods; 2119 err = usb_allocmem(&sc->sc_bus, 2120 sizeof(usb_device_request_t), 2121 0, &opipe->u.ctl.reqdma); 2122 if (err) 2123 goto bad; 2124 s = splusb(); 2125 ohci_add_ed(sc, sed, sc->sc_ctrl_head); 2126 splx(s); 2127 break; 2128 case UE_INTERRUPT: 2129 pipe->methods = &ohci_device_intr_methods; 2130 ival = pipe->interval; 2131 if (ival == USBD_DEFAULT_INTERVAL) 2132 ival = ed->bInterval; 2133 return (ohci_device_setintr(sc, opipe, ival)); 2134 case UE_ISOCHRONOUS: 2135 pipe->methods = &ohci_device_isoc_methods; 2136 return (ohci_setup_isoc(pipe)); 2137 case UE_BULK: 2138 pipe->methods = &ohci_device_bulk_methods; 2139 s = splusb(); 2140 ohci_add_ed(sc, sed, sc->sc_bulk_head); 2141 splx(s); 2142 break; 2143 } 2144 } 2145 return (USBD_NORMAL_COMPLETION); 2146 2147 bad: 2148 if (std != NULL) 2149 ohci_free_std(sc, std); 2150 bad1: 2151 if (sed != NULL) 2152 ohci_free_sed(sc, sed); 2153 bad0: 2154 return (USBD_NOMEM); 2155 2156 } 2157 2158 /* 2159 * Close a reqular pipe. 2160 * Assumes that there are no pending transactions. 2161 */ 2162 void 2163 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2164 { 2165 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2166 ohci_softc_t *sc = pipe->device->bus->hci_private; 2167 ohci_soft_ed_t *sed = opipe->sed; 2168 int s; 2169 2170 s = splusb(); 2171 #ifdef DIAGNOSTIC 2172 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 2173 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2174 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2175 ohci_soft_td_t *std; 2176 std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp)); 2177 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2178 "tl=0x%x pipe=%p, std=%p\n", sed, 2179 (int)O32TOH(sed->ed.ed_headp), 2180 (int)O32TOH(sed->ed.ed_tailp), 2181 pipe, std); 2182 #ifdef USB_DEBUG 2183 usbd_dump_pipe(&opipe->pipe); 2184 #endif 2185 #ifdef OHCI_DEBUG 2186 ohci_dump_ed(sc, sed); 2187 if (std) 2188 ohci_dump_td(sc, std); 2189 #endif 2190 usb_delay_ms(&sc->sc_bus, 2); 2191 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2192 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 2193 printf("ohci_close_pipe: pipe still not empty\n"); 2194 } 2195 #endif 2196 ohci_rem_ed(sed, head); 2197 /* Make sure the host controller is not touching this ED */ 2198 usb_delay_ms(&sc->sc_bus, 1); 2199 pipe->endpoint->datatoggle = 2200 (O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY) ? 1 : 0; 2201 splx(s); 2202 ohci_free_sed(sc, opipe->sed); 2203 } 2204 2205 /* 2206 * Abort a device request. 2207 * If this routine is called at splusb() it guarantees that the request 2208 * will be removed from the hardware scheduling and that the callback 2209 * for it will be called with USBD_CANCELLED status. 2210 * It's impossible to guarantee that the requested transfer will not 2211 * have happened since the hardware runs concurrently. 2212 * If the transaction has already happened we rely on the ordinary 2213 * interrupt processing to process it. 2214 */ 2215 void 2216 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2217 { 2218 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2219 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 2220 ohci_soft_ed_t *sed = opipe->sed; 2221 ohci_soft_td_t *p, *n; 2222 ohci_physaddr_t headp; 2223 int s, hit; 2224 int wake; 2225 2226 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed)); 2227 2228 if (sc->sc_dying) { 2229 /* If we're dying, just do the software part. */ 2230 s = splusb(); 2231 xfer->status = status; /* make software ignore it */ 2232 callout_stop(&xfer->timeout_handle); 2233 usb_transfer_complete(xfer); 2234 splx(s); 2235 return; 2236 } 2237 2238 if (cpu_intr_p() || cpu_softintr_p()) 2239 panic("ohci_abort_xfer: not in process context"); 2240 2241 /* 2242 * If an abort is already in progress then just wait for it to 2243 * complete and return. 2244 */ 2245 if (xfer->hcflags & UXFER_ABORTING) { 2246 DPRINTFN(2, ("ohci_abort_xfer: already aborting\n")); 2247 #ifdef DIAGNOSTIC 2248 if (status == USBD_TIMEOUT) 2249 printf("0hci_abort_xfer: TIMEOUT while aborting\n"); 2250 #endif 2251 /* Override the status which might be USBD_TIMEOUT. */ 2252 xfer->status = status; 2253 DPRINTFN(2, ("ohci_abort_xfer: waiting for abort to finish\n")); 2254 xfer->hcflags |= UXFER_ABORTWAIT; 2255 while (xfer->hcflags & UXFER_ABORTING) 2256 tsleep(&xfer->hcflags, PZERO, "ohciaw", 0); 2257 return; 2258 } 2259 xfer->hcflags |= UXFER_ABORTING; 2260 2261 /* 2262 * Step 1: Make interrupt routine and hardware ignore xfer. 2263 */ 2264 s = splusb(); 2265 xfer->status = status; /* make software ignore it */ 2266 callout_stop(&xfer->timeout_handle); 2267 splx(s); 2268 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2269 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2270 sizeof(sed->ed.ed_flags), 2271 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2272 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 2273 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2274 sizeof(sed->ed.ed_flags), 2275 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2276 2277 /* 2278 * Step 2: Wait until we know hardware has finished any possible 2279 * use of the xfer. Also make sure the soft interrupt routine 2280 * has run. 2281 */ 2282 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */ 2283 s = splusb(); 2284 sc->sc_softwake = 1; 2285 usb_schedsoftintr(&sc->sc_bus); 2286 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0); 2287 splx(s); 2288 2289 /* 2290 * Step 3: Remove any vestiges of the xfer from the hardware. 2291 * The complication here is that the hardware may have executed 2292 * beyond the xfer we're trying to abort. So as we're scanning 2293 * the TDs of this xfer we check if the hardware points to 2294 * any of them. 2295 */ 2296 s = splusb(); /* XXX why? */ 2297 p = xfer->hcpriv; 2298 #ifdef DIAGNOSTIC 2299 if (p == NULL) { 2300 xfer->hcflags &= ~UXFER_ABORTING; /* XXX */ 2301 splx(s); 2302 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2303 return; 2304 } 2305 #endif 2306 #ifdef OHCI_DEBUG 2307 if (ohcidebug > 1) { 2308 DPRINTF(("ohci_abort_xfer: sed=\n")); 2309 ohci_dump_ed(sc, sed); 2310 ohci_dump_tds(sc, p); 2311 } 2312 #endif 2313 headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK; 2314 hit = 0; 2315 for (; p->xfer == xfer; p = n) { 2316 hit |= headp == p->physaddr; 2317 n = p->nexttd; 2318 ohci_free_std(sc, p); 2319 } 2320 /* Zap headp register if hardware pointed inside the xfer. */ 2321 if (hit) { 2322 DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n", 2323 (int)p->physaddr, (int)O32TOH(sed->ed.ed_tailp))); 2324 sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */ 2325 usb_syncmem(&sed->dma, 2326 sed->offs + offsetof(ohci_ed_t, ed_headp), 2327 sizeof(sed->ed.ed_headp), 2328 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2329 } else { 2330 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2331 } 2332 2333 /* 2334 * Step 4: Turn on hardware again. 2335 */ 2336 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2337 sizeof(sed->ed.ed_flags), 2338 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2339 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 2340 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2341 sizeof(sed->ed.ed_flags), 2342 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2343 2344 /* 2345 * Step 5: Execute callback. 2346 */ 2347 wake = xfer->hcflags & UXFER_ABORTWAIT; 2348 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2349 usb_transfer_complete(xfer); 2350 if (wake) 2351 wakeup(&xfer->hcflags); 2352 2353 splx(s); 2354 } 2355 2356 /* 2357 * Data structures and routines to emulate the root hub. 2358 */ 2359 Static usb_device_descriptor_t ohci_devd = { 2360 USB_DEVICE_DESCRIPTOR_SIZE, 2361 UDESC_DEVICE, /* type */ 2362 {0x00, 0x01}, /* USB version */ 2363 UDCLASS_HUB, /* class */ 2364 UDSUBCLASS_HUB, /* subclass */ 2365 UDPROTO_FSHUB, /* protocol */ 2366 64, /* max packet */ 2367 {0},{0},{0x00,0x01}, /* device id */ 2368 1,2,0, /* string indicies */ 2369 1 /* # of configurations */ 2370 }; 2371 2372 Static const usb_config_descriptor_t ohci_confd = { 2373 USB_CONFIG_DESCRIPTOR_SIZE, 2374 UDESC_CONFIG, 2375 {USB_CONFIG_DESCRIPTOR_SIZE + 2376 USB_INTERFACE_DESCRIPTOR_SIZE + 2377 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2378 1, 2379 1, 2380 0, 2381 UC_ATTR_MBO | UC_SELF_POWERED, 2382 0 /* max power */ 2383 }; 2384 2385 Static const usb_interface_descriptor_t ohci_ifcd = { 2386 USB_INTERFACE_DESCRIPTOR_SIZE, 2387 UDESC_INTERFACE, 2388 0, 2389 0, 2390 1, 2391 UICLASS_HUB, 2392 UISUBCLASS_HUB, 2393 UIPROTO_FSHUB, 2394 0 2395 }; 2396 2397 Static const usb_endpoint_descriptor_t ohci_endpd = { 2398 .bLength = USB_ENDPOINT_DESCRIPTOR_SIZE, 2399 .bDescriptorType = UDESC_ENDPOINT, 2400 .bEndpointAddress = UE_DIR_IN | OHCI_INTR_ENDPT, 2401 .bmAttributes = UE_INTERRUPT, 2402 .wMaxPacketSize = {8, 0}, /* max packet */ 2403 .bInterval = 255, 2404 }; 2405 2406 Static const usb_hub_descriptor_t ohci_hubd = { 2407 .bDescLength = USB_HUB_DESCRIPTOR_SIZE, 2408 .bDescriptorType = UDESC_HUB, 2409 }; 2410 2411 /* 2412 * Simulate a hardware hub by handling all the necessary requests. 2413 */ 2414 Static usbd_status 2415 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2416 { 2417 usbd_status err; 2418 2419 /* Insert last in queue. */ 2420 err = usb_insert_transfer(xfer); 2421 if (err) 2422 return (err); 2423 2424 /* Pipe isn't running, start first */ 2425 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2426 } 2427 2428 Static usbd_status 2429 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2430 { 2431 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2432 usb_device_request_t *req; 2433 void *buf = NULL; 2434 int port, i; 2435 int s, len, value, index, l, totlen = 0; 2436 usb_port_status_t ps; 2437 usb_hub_descriptor_t hubd; 2438 usbd_status err; 2439 u_int32_t v; 2440 2441 if (sc->sc_dying) 2442 return (USBD_IOERROR); 2443 2444 #ifdef DIAGNOSTIC 2445 if (!(xfer->rqflags & URQ_REQUEST)) 2446 /* XXX panic */ 2447 return (USBD_INVAL); 2448 #endif 2449 req = &xfer->request; 2450 2451 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2452 req->bmRequestType, req->bRequest)); 2453 2454 len = UGETW(req->wLength); 2455 value = UGETW(req->wValue); 2456 index = UGETW(req->wIndex); 2457 2458 if (len != 0) 2459 buf = KERNADDR(&xfer->dmabuf, 0); 2460 2461 #define C(x,y) ((x) | ((y) << 8)) 2462 switch(C(req->bRequest, req->bmRequestType)) { 2463 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2464 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2465 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2466 /* 2467 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2468 * for the integrated root hub. 2469 */ 2470 break; 2471 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2472 if (len > 0) { 2473 *(u_int8_t *)buf = sc->sc_conf; 2474 totlen = 1; 2475 } 2476 break; 2477 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2478 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2479 if (len == 0) 2480 break; 2481 switch(value >> 8) { 2482 case UDESC_DEVICE: 2483 if ((value & 0xff) != 0) { 2484 err = USBD_IOERROR; 2485 goto ret; 2486 } 2487 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2488 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2489 memcpy(buf, &ohci_devd, l); 2490 break; 2491 case UDESC_CONFIG: 2492 if ((value & 0xff) != 0) { 2493 err = USBD_IOERROR; 2494 goto ret; 2495 } 2496 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2497 memcpy(buf, &ohci_confd, l); 2498 buf = (char *)buf + l; 2499 len -= l; 2500 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2501 totlen += l; 2502 memcpy(buf, &ohci_ifcd, l); 2503 buf = (char *)buf + l; 2504 len -= l; 2505 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2506 totlen += l; 2507 memcpy(buf, &ohci_endpd, l); 2508 break; 2509 case UDESC_STRING: 2510 #define sd ((usb_string_descriptor_t *)buf) 2511 switch (value & 0xff) { 2512 case 0: /* Language table */ 2513 totlen = usb_makelangtbl(sd, len); 2514 break; 2515 case 1: /* Vendor */ 2516 totlen = usb_makestrdesc(sd, len, 2517 sc->sc_vendor); 2518 break; 2519 case 2: /* Product */ 2520 totlen = usb_makestrdesc(sd, len, 2521 "OHCI root hub"); 2522 break; 2523 } 2524 #undef sd 2525 break; 2526 default: 2527 err = USBD_IOERROR; 2528 goto ret; 2529 } 2530 break; 2531 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2532 if (len > 0) { 2533 *(u_int8_t *)buf = 0; 2534 totlen = 1; 2535 } 2536 break; 2537 case C(UR_GET_STATUS, UT_READ_DEVICE): 2538 if (len > 1) { 2539 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2540 totlen = 2; 2541 } 2542 break; 2543 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2544 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2545 if (len > 1) { 2546 USETW(((usb_status_t *)buf)->wStatus, 0); 2547 totlen = 2; 2548 } 2549 break; 2550 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2551 if (value >= USB_MAX_DEVICES) { 2552 err = USBD_IOERROR; 2553 goto ret; 2554 } 2555 sc->sc_addr = value; 2556 break; 2557 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2558 if (value != 0 && value != 1) { 2559 err = USBD_IOERROR; 2560 goto ret; 2561 } 2562 sc->sc_conf = value; 2563 break; 2564 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2565 break; 2566 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2567 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2568 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2569 err = USBD_IOERROR; 2570 goto ret; 2571 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2572 break; 2573 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2574 break; 2575 /* Hub requests */ 2576 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2577 break; 2578 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2579 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2580 "port=%d feature=%d\n", 2581 index, value)); 2582 if (index < 1 || index > sc->sc_noport) { 2583 err = USBD_IOERROR; 2584 goto ret; 2585 } 2586 port = OHCI_RH_PORT_STATUS(index); 2587 switch(value) { 2588 case UHF_PORT_ENABLE: 2589 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2590 break; 2591 case UHF_PORT_SUSPEND: 2592 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2593 break; 2594 case UHF_PORT_POWER: 2595 /* Yes, writing to the LOW_SPEED bit clears power. */ 2596 OWRITE4(sc, port, UPS_LOW_SPEED); 2597 break; 2598 case UHF_C_PORT_CONNECTION: 2599 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2600 break; 2601 case UHF_C_PORT_ENABLE: 2602 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2603 break; 2604 case UHF_C_PORT_SUSPEND: 2605 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2606 break; 2607 case UHF_C_PORT_OVER_CURRENT: 2608 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2609 break; 2610 case UHF_C_PORT_RESET: 2611 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2612 break; 2613 default: 2614 err = USBD_IOERROR; 2615 goto ret; 2616 } 2617 switch(value) { 2618 case UHF_C_PORT_CONNECTION: 2619 case UHF_C_PORT_ENABLE: 2620 case UHF_C_PORT_SUSPEND: 2621 case UHF_C_PORT_OVER_CURRENT: 2622 case UHF_C_PORT_RESET: 2623 /* Enable RHSC interrupt if condition is cleared. */ 2624 if ((OREAD4(sc, port) >> 16) == 0) 2625 ohci_rhsc_enable(sc); 2626 break; 2627 default: 2628 break; 2629 } 2630 break; 2631 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2632 if (len == 0) 2633 break; 2634 if ((value & 0xff) != 0) { 2635 err = USBD_IOERROR; 2636 goto ret; 2637 } 2638 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2639 hubd = ohci_hubd; 2640 hubd.bNbrPorts = sc->sc_noport; 2641 USETW(hubd.wHubCharacteristics, 2642 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2643 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2644 /* XXX overcurrent */ 2645 ); 2646 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2647 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2648 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2649 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2650 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2651 l = min(len, hubd.bDescLength); 2652 totlen = l; 2653 memcpy(buf, &hubd, l); 2654 break; 2655 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2656 if (len != 4) { 2657 err = USBD_IOERROR; 2658 goto ret; 2659 } 2660 memset(buf, 0, len); /* ? XXX */ 2661 totlen = len; 2662 break; 2663 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2664 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2665 index)); 2666 if (index < 1 || index > sc->sc_noport) { 2667 err = USBD_IOERROR; 2668 goto ret; 2669 } 2670 if (len != 4) { 2671 err = USBD_IOERROR; 2672 goto ret; 2673 } 2674 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2675 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2676 v)); 2677 USETW(ps.wPortStatus, v); 2678 USETW(ps.wPortChange, v >> 16); 2679 l = min(len, sizeof ps); 2680 memcpy(buf, &ps, l); 2681 totlen = l; 2682 break; 2683 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2684 err = USBD_IOERROR; 2685 goto ret; 2686 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2687 break; 2688 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2689 if (index < 1 || index > sc->sc_noport) { 2690 err = USBD_IOERROR; 2691 goto ret; 2692 } 2693 port = OHCI_RH_PORT_STATUS(index); 2694 switch(value) { 2695 case UHF_PORT_ENABLE: 2696 OWRITE4(sc, port, UPS_PORT_ENABLED); 2697 break; 2698 case UHF_PORT_SUSPEND: 2699 OWRITE4(sc, port, UPS_SUSPEND); 2700 break; 2701 case UHF_PORT_RESET: 2702 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2703 index)); 2704 OWRITE4(sc, port, UPS_RESET); 2705 for (i = 0; i < 5; i++) { 2706 usb_delay_ms(&sc->sc_bus, 2707 USB_PORT_ROOT_RESET_DELAY); 2708 if (sc->sc_dying) { 2709 err = USBD_IOERROR; 2710 goto ret; 2711 } 2712 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2713 break; 2714 } 2715 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2716 index, OREAD4(sc, port))); 2717 break; 2718 case UHF_PORT_POWER: 2719 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2720 "%d\n", index)); 2721 OWRITE4(sc, port, UPS_PORT_POWER); 2722 break; 2723 default: 2724 err = USBD_IOERROR; 2725 goto ret; 2726 } 2727 break; 2728 default: 2729 err = USBD_IOERROR; 2730 goto ret; 2731 } 2732 xfer->actlen = totlen; 2733 err = USBD_NORMAL_COMPLETION; 2734 ret: 2735 xfer->status = err; 2736 s = splusb(); 2737 usb_transfer_complete(xfer); 2738 splx(s); 2739 return (USBD_IN_PROGRESS); 2740 } 2741 2742 /* Abort a root control request. */ 2743 Static void 2744 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2745 { 2746 /* Nothing to do, all transfers are synchronous. */ 2747 } 2748 2749 /* Close the root pipe. */ 2750 Static void 2751 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2752 { 2753 DPRINTF(("ohci_root_ctrl_close\n")); 2754 /* Nothing to do. */ 2755 } 2756 2757 Static usbd_status 2758 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2759 { 2760 usbd_status err; 2761 2762 /* Insert last in queue. */ 2763 err = usb_insert_transfer(xfer); 2764 if (err) 2765 return (err); 2766 2767 /* Pipe isn't running, start first */ 2768 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2769 } 2770 2771 Static usbd_status 2772 ohci_root_intr_start(usbd_xfer_handle xfer) 2773 { 2774 usbd_pipe_handle pipe = xfer->pipe; 2775 ohci_softc_t *sc = pipe->device->bus->hci_private; 2776 2777 if (sc->sc_dying) 2778 return (USBD_IOERROR); 2779 2780 sc->sc_intrxfer = xfer; 2781 2782 return (USBD_IN_PROGRESS); 2783 } 2784 2785 /* Abort a root interrupt request. */ 2786 Static void 2787 ohci_root_intr_abort(usbd_xfer_handle xfer) 2788 { 2789 int s; 2790 2791 if (xfer->pipe->intrxfer == xfer) { 2792 DPRINTF(("ohci_root_intr_abort: remove\n")); 2793 xfer->pipe->intrxfer = NULL; 2794 } 2795 xfer->status = USBD_CANCELLED; 2796 s = splusb(); 2797 usb_transfer_complete(xfer); 2798 splx(s); 2799 } 2800 2801 /* Close the root pipe. */ 2802 Static void 2803 ohci_root_intr_close(usbd_pipe_handle pipe) 2804 { 2805 ohci_softc_t *sc = pipe->device->bus->hci_private; 2806 2807 DPRINTF(("ohci_root_intr_close\n")); 2808 2809 sc->sc_intrxfer = NULL; 2810 } 2811 2812 /************************/ 2813 2814 Static usbd_status 2815 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2816 { 2817 usbd_status err; 2818 2819 /* Insert last in queue. */ 2820 err = usb_insert_transfer(xfer); 2821 if (err) 2822 return (err); 2823 2824 /* Pipe isn't running, start first */ 2825 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2826 } 2827 2828 Static usbd_status 2829 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2830 { 2831 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2832 usbd_status err; 2833 2834 if (sc->sc_dying) 2835 return (USBD_IOERROR); 2836 2837 #ifdef DIAGNOSTIC 2838 if (!(xfer->rqflags & URQ_REQUEST)) { 2839 /* XXX panic */ 2840 printf("ohci_device_ctrl_transfer: not a request\n"); 2841 return (USBD_INVAL); 2842 } 2843 #endif 2844 2845 err = ohci_device_request(xfer); 2846 if (err) 2847 return (err); 2848 2849 if (sc->sc_bus.use_polling) 2850 ohci_waitintr(sc, xfer); 2851 return (USBD_IN_PROGRESS); 2852 } 2853 2854 /* Abort a device control request. */ 2855 Static void 2856 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2857 { 2858 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2859 ohci_abort_xfer(xfer, USBD_CANCELLED); 2860 } 2861 2862 /* Close a device control pipe. */ 2863 Static void 2864 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2865 { 2866 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2867 ohci_softc_t *sc = pipe->device->bus->hci_private; 2868 2869 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2870 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2871 ohci_free_std(sc, opipe->tail.td); 2872 } 2873 2874 /************************/ 2875 2876 Static void 2877 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2878 { 2879 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2880 ohci_softc_t *sc = pipe->device->bus->hci_private; 2881 2882 opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY); 2883 } 2884 2885 Static void 2886 ohci_noop(usbd_pipe_handle pipe) 2887 { 2888 } 2889 2890 Static usbd_status 2891 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2892 { 2893 usbd_status err; 2894 2895 /* Insert last in queue. */ 2896 err = usb_insert_transfer(xfer); 2897 if (err) 2898 return (err); 2899 2900 /* Pipe isn't running, start first */ 2901 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2902 } 2903 2904 Static usbd_status 2905 ohci_device_bulk_start(usbd_xfer_handle xfer) 2906 { 2907 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2908 usbd_device_handle dev = opipe->pipe.device; 2909 ohci_softc_t *sc = dev->bus->hci_private; 2910 int addr = dev->address; 2911 ohci_soft_td_t *data, *tail, *tdp; 2912 ohci_soft_ed_t *sed; 2913 int s, len, isread, endpt; 2914 usbd_status err; 2915 2916 if (sc->sc_dying) 2917 return (USBD_IOERROR); 2918 2919 #ifdef DIAGNOSTIC 2920 if (xfer->rqflags & URQ_REQUEST) { 2921 /* XXX panic */ 2922 printf("ohci_device_bulk_start: a request\n"); 2923 return (USBD_INVAL); 2924 } 2925 #endif 2926 2927 len = xfer->length; 2928 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2929 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2930 sed = opipe->sed; 2931 2932 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2933 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2934 endpt)); 2935 2936 opipe->u.bulk.isread = isread; 2937 opipe->u.bulk.length = len; 2938 2939 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2940 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2941 /* Update device address */ 2942 sed->ed.ed_flags = HTOO32( 2943 (O32TOH(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2944 OHCI_ED_SET_FA(addr)); 2945 2946 /* Allocate a chain of new TDs (including a new tail). */ 2947 data = opipe->tail.td; 2948 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2949 data, &tail); 2950 /* We want interrupt at the end of the transfer. */ 2951 tail->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 2952 tail->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 2953 tail->flags |= OHCI_CALL_DONE; 2954 tail = tail->nexttd; /* point at sentinel */ 2955 usb_syncmem(&tail->dma, tail->offs + offsetof(ohci_td_t, td_flags), 2956 sizeof(tail->td.td_flags), 2957 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2958 if (err) 2959 return (err); 2960 2961 tail->xfer = NULL; 2962 xfer->hcpriv = data; 2963 2964 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2965 "td_cbp=0x%08x td_be=0x%08x\n", 2966 (int)O32TOH(sed->ed.ed_flags), 2967 (int)O32TOH(data->td.td_flags), 2968 (int)O32TOH(data->td.td_cbp), 2969 (int)O32TOH(data->td.td_be))); 2970 2971 #ifdef OHCI_DEBUG 2972 if (ohcidebug > 5) { 2973 ohci_dump_ed(sc, sed); 2974 ohci_dump_tds(sc, data); 2975 } 2976 #endif 2977 2978 /* Insert ED in schedule */ 2979 s = splusb(); 2980 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2981 tdp->xfer = xfer; 2982 } 2983 sed->ed.ed_tailp = HTOO32(tail->physaddr); 2984 opipe->tail.td = tail; 2985 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 2986 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2987 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2988 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2989 if (xfer->timeout && !sc->sc_bus.use_polling) { 2990 callout_reset(&xfer->timeout_handle, mstohz(xfer->timeout), 2991 ohci_timeout, xfer); 2992 } 2993 2994 #if 0 2995 /* This goes wrong if we are too slow. */ 2996 if (ohcidebug > 10) { 2997 delay(10000); 2998 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2999 OREAD4(sc, OHCI_COMMAND_STATUS))); 3000 ohci_dump_ed(sc, sed); 3001 ohci_dump_tds(sc, data); 3002 } 3003 #endif 3004 3005 splx(s); 3006 3007 return (USBD_IN_PROGRESS); 3008 } 3009 3010 Static void 3011 ohci_device_bulk_abort(usbd_xfer_handle xfer) 3012 { 3013 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 3014 ohci_abort_xfer(xfer, USBD_CANCELLED); 3015 } 3016 3017 /* 3018 * Close a device bulk pipe. 3019 */ 3020 Static void 3021 ohci_device_bulk_close(usbd_pipe_handle pipe) 3022 { 3023 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3024 ohci_softc_t *sc = pipe->device->bus->hci_private; 3025 3026 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 3027 ohci_close_pipe(pipe, sc->sc_bulk_head); 3028 ohci_free_std(sc, opipe->tail.td); 3029 } 3030 3031 /************************/ 3032 3033 Static usbd_status 3034 ohci_device_intr_transfer(usbd_xfer_handle xfer) 3035 { 3036 usbd_status err; 3037 3038 /* Insert last in queue. */ 3039 err = usb_insert_transfer(xfer); 3040 if (err) 3041 return (err); 3042 3043 /* Pipe isn't running, start first */ 3044 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3045 } 3046 3047 Static usbd_status 3048 ohci_device_intr_start(usbd_xfer_handle xfer) 3049 { 3050 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3051 usbd_device_handle dev = opipe->pipe.device; 3052 ohci_softc_t *sc = dev->bus->hci_private; 3053 ohci_soft_ed_t *sed = opipe->sed; 3054 ohci_soft_td_t *data, *tail; 3055 int s, len, isread, endpt; 3056 3057 if (sc->sc_dying) 3058 return (USBD_IOERROR); 3059 3060 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 3061 "flags=%d priv=%p\n", 3062 xfer, xfer->length, xfer->flags, xfer->priv)); 3063 3064 #ifdef DIAGNOSTIC 3065 if (xfer->rqflags & URQ_REQUEST) 3066 panic("ohci_device_intr_transfer: a request"); 3067 #endif 3068 3069 len = xfer->length; 3070 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 3071 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3072 3073 data = opipe->tail.td; 3074 tail = ohci_alloc_std(sc); 3075 if (tail == NULL) 3076 return (USBD_NOMEM); 3077 tail->xfer = NULL; 3078 3079 data->td.td_flags = HTOO32( 3080 isread ? OHCI_TD_IN : OHCI_TD_OUT | 3081 OHCI_TD_NOCC | 3082 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 3083 if (xfer->flags & USBD_SHORT_XFER_OK) 3084 data->td.td_flags |= HTOO32(OHCI_TD_R); 3085 data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0)); 3086 data->nexttd = tail; 3087 data->td.td_nexttd = HTOO32(tail->physaddr); 3088 data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + len - 1); 3089 data->len = len; 3090 data->xfer = xfer; 3091 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 3092 usb_syncmem(&data->dma, data->offs, sizeof(data->td), 3093 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3094 xfer->hcpriv = data; 3095 3096 #ifdef OHCI_DEBUG 3097 if (ohcidebug > 5) { 3098 DPRINTF(("ohci_device_intr_transfer:\n")); 3099 ohci_dump_ed(sc, sed); 3100 ohci_dump_tds(sc, data); 3101 } 3102 #endif 3103 3104 /* Insert ED in schedule */ 3105 s = splusb(); 3106 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3107 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3108 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3109 opipe->tail.td = tail; 3110 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3111 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3112 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3113 3114 #if 0 3115 /* 3116 * This goes horribly wrong, printing thousands of descriptors, 3117 * because false references are followed due to the fact that the 3118 * TD is gone. 3119 */ 3120 if (ohcidebug > 5) { 3121 usb_delay_ms(&sc->sc_bus, 5); 3122 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 3123 OREAD4(sc, OHCI_COMMAND_STATUS))); 3124 ohci_dump_ed(sc, sed); 3125 ohci_dump_tds(sc, data); 3126 } 3127 #endif 3128 splx(s); 3129 3130 return (USBD_IN_PROGRESS); 3131 } 3132 3133 /* Abort a device control request. */ 3134 Static void 3135 ohci_device_intr_abort(usbd_xfer_handle xfer) 3136 { 3137 if (xfer->pipe->intrxfer == xfer) { 3138 DPRINTF(("ohci_device_intr_abort: remove\n")); 3139 xfer->pipe->intrxfer = NULL; 3140 } 3141 ohci_abort_xfer(xfer, USBD_CANCELLED); 3142 } 3143 3144 /* Close a device interrupt pipe. */ 3145 Static void 3146 ohci_device_intr_close(usbd_pipe_handle pipe) 3147 { 3148 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3149 ohci_softc_t *sc = pipe->device->bus->hci_private; 3150 int nslots = opipe->u.intr.nslots; 3151 int pos = opipe->u.intr.pos; 3152 int j; 3153 ohci_soft_ed_t *p, *sed = opipe->sed; 3154 int s; 3155 3156 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 3157 pipe, nslots, pos)); 3158 s = splusb(); 3159 usb_syncmem(&sed->dma, sed->offs, 3160 sizeof(sed->ed), BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3161 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 3162 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3163 sizeof(sed->ed.ed_flags), 3164 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3165 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3166 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 3167 usb_delay_ms(&sc->sc_bus, 2); 3168 3169 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3170 continue; 3171 #ifdef DIAGNOSTIC 3172 if (p == NULL) 3173 panic("ohci_device_intr_close: ED not found"); 3174 #endif 3175 p->next = sed->next; 3176 p->ed.ed_nexted = sed->ed.ed_nexted; 3177 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 3178 sizeof(p->ed.ed_nexted), 3179 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3180 splx(s); 3181 3182 for (j = 0; j < nslots; j++) 3183 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3184 3185 ohci_free_std(sc, opipe->tail.td); 3186 ohci_free_sed(sc, opipe->sed); 3187 } 3188 3189 Static usbd_status 3190 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3191 { 3192 int i, j, s, best; 3193 u_int npoll, slow, shigh, nslots; 3194 u_int bestbw, bw; 3195 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3196 3197 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 3198 if (ival == 0) { 3199 printf("ohci_setintr: 0 interval\n"); 3200 return (USBD_INVAL); 3201 } 3202 3203 npoll = OHCI_NO_INTRS; 3204 while (npoll > ival) 3205 npoll /= 2; 3206 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 3207 3208 /* 3209 * We now know which level in the tree the ED must go into. 3210 * Figure out which slot has most bandwidth left over. 3211 * Slots to examine: 3212 * npoll 3213 * 1 0 3214 * 2 1 2 3215 * 4 3 4 5 6 3216 * 8 7 8 9 10 11 12 13 14 3217 * N (N-1) .. (N-1+N-1) 3218 */ 3219 slow = npoll-1; 3220 shigh = slow + npoll; 3221 nslots = OHCI_NO_INTRS / npoll; 3222 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3223 bw = 0; 3224 for (j = 0; j < nslots; j++) 3225 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3226 if (bw < bestbw) { 3227 best = i; 3228 bestbw = bw; 3229 } 3230 } 3231 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3232 best, slow, shigh, bestbw)); 3233 3234 s = splusb(); 3235 hsed = sc->sc_eds[best]; 3236 sed->next = hsed->next; 3237 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3238 sizeof(hsed->ed.ed_flags), 3239 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3240 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3241 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3242 sizeof(sed->ed.ed_flags), 3243 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3244 hsed->next = sed; 3245 hsed->ed.ed_nexted = HTOO32(sed->physaddr); 3246 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3247 sizeof(hsed->ed.ed_flags), 3248 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3249 splx(s); 3250 3251 for (j = 0; j < nslots; j++) 3252 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3253 opipe->u.intr.nslots = nslots; 3254 opipe->u.intr.pos = best; 3255 3256 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3257 return (USBD_NORMAL_COMPLETION); 3258 } 3259 3260 /***********************/ 3261 3262 usbd_status 3263 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3264 { 3265 usbd_status err; 3266 3267 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3268 3269 /* Put it on our queue, */ 3270 err = usb_insert_transfer(xfer); 3271 3272 /* bail out on error, */ 3273 if (err && err != USBD_IN_PROGRESS) 3274 return (err); 3275 3276 /* XXX should check inuse here */ 3277 3278 /* insert into schedule, */ 3279 ohci_device_isoc_enter(xfer); 3280 3281 /* and start if the pipe wasn't running */ 3282 if (!err) 3283 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3284 3285 return (err); 3286 } 3287 3288 void 3289 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3290 { 3291 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3292 usbd_device_handle dev = opipe->pipe.device; 3293 ohci_softc_t *sc = dev->bus->hci_private; 3294 ohci_soft_ed_t *sed = opipe->sed; 3295 struct iso *iso = &opipe->u.iso; 3296 ohci_soft_itd_t *sitd, *nsitd; 3297 ohci_physaddr_t buf, offs, noffs, bp0; 3298 int i, ncur, nframes; 3299 int s; 3300 3301 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3302 "nframes=%d\n", 3303 iso->inuse, iso->next, xfer, xfer->nframes)); 3304 3305 if (sc->sc_dying) 3306 return; 3307 3308 if (iso->next == -1) { 3309 /* Not in use yet, schedule it a few frames ahead. */ 3310 iso->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5; 3311 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3312 iso->next)); 3313 } 3314 3315 sitd = opipe->tail.itd; 3316 buf = DMAADDR(&xfer->dmabuf, 0); 3317 bp0 = OHCI_PAGE(buf); 3318 offs = OHCI_PAGE_OFFSET(buf); 3319 nframes = xfer->nframes; 3320 xfer->hcpriv = sitd; 3321 for (i = ncur = 0; i < nframes; i++, ncur++) { 3322 noffs = offs + xfer->frlengths[i]; 3323 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3324 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3325 3326 /* Allocate next ITD */ 3327 nsitd = ohci_alloc_sitd(sc); 3328 if (nsitd == NULL) { 3329 /* XXX what now? */ 3330 printf("%s: isoc TD alloc failed\n", 3331 device_xname(sc->sc_dev)); 3332 return; 3333 } 3334 3335 /* Fill current ITD */ 3336 sitd->itd.itd_flags = HTOO32( 3337 OHCI_ITD_NOCC | 3338 OHCI_ITD_SET_SF(iso->next) | 3339 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3340 OHCI_ITD_SET_FC(ncur)); 3341 sitd->itd.itd_bp0 = HTOO32(bp0); 3342 sitd->nextitd = nsitd; 3343 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3344 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3345 sitd->xfer = xfer; 3346 sitd->flags = 0; 3347 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3348 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3349 3350 sitd = nsitd; 3351 iso->next = iso->next + ncur; 3352 bp0 = OHCI_PAGE(buf + offs); 3353 ncur = 0; 3354 } 3355 sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs)); 3356 offs = noffs; 3357 } 3358 nsitd = ohci_alloc_sitd(sc); 3359 if (nsitd == NULL) { 3360 /* XXX what now? */ 3361 printf("%s: isoc TD alloc failed\n", 3362 device_xname(sc->sc_dev)); 3363 return; 3364 } 3365 /* Fixup last used ITD */ 3366 sitd->itd.itd_flags = HTOO32( 3367 OHCI_ITD_NOCC | 3368 OHCI_ITD_SET_SF(iso->next) | 3369 OHCI_ITD_SET_DI(0) | 3370 OHCI_ITD_SET_FC(ncur)); 3371 sitd->itd.itd_bp0 = HTOO32(bp0); 3372 sitd->nextitd = nsitd; 3373 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3374 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3375 sitd->xfer = xfer; 3376 sitd->flags = OHCI_CALL_DONE; 3377 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3378 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3379 3380 iso->next = iso->next + ncur; 3381 iso->inuse += nframes; 3382 3383 xfer->actlen = offs; /* XXX pretend we did it all */ 3384 3385 xfer->status = USBD_IN_PROGRESS; 3386 3387 #ifdef OHCI_DEBUG 3388 if (ohcidebug > 5) { 3389 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3390 O32TOH(sc->sc_hcca->hcca_frame_number))); 3391 ohci_dump_itds(sc, xfer->hcpriv); 3392 ohci_dump_ed(sc, sed); 3393 } 3394 #endif 3395 3396 s = splusb(); 3397 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3398 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3399 sed->ed.ed_tailp = HTOO32(nsitd->physaddr); 3400 opipe->tail.itd = nsitd; 3401 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3402 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3403 sizeof(sed->ed.ed_flags), 3404 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3405 splx(s); 3406 3407 #ifdef OHCI_DEBUG 3408 if (ohcidebug > 5) { 3409 delay(150000); 3410 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3411 O32TOH(sc->sc_hcca->hcca_frame_number))); 3412 ohci_dump_itds(sc, xfer->hcpriv); 3413 ohci_dump_ed(sc, sed); 3414 } 3415 #endif 3416 } 3417 3418 usbd_status 3419 ohci_device_isoc_start(usbd_xfer_handle xfer) 3420 { 3421 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3422 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 3423 3424 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3425 3426 if (sc->sc_dying) 3427 return (USBD_IOERROR); 3428 3429 #ifdef DIAGNOSTIC 3430 if (xfer->status != USBD_IN_PROGRESS) 3431 printf("ohci_device_isoc_start: not in progress %p\n", xfer); 3432 #endif 3433 3434 /* XXX anything to do? */ 3435 3436 return (USBD_IN_PROGRESS); 3437 } 3438 3439 void 3440 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3441 { 3442 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3443 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 3444 ohci_soft_ed_t *sed; 3445 ohci_soft_itd_t *sitd; 3446 int s; 3447 3448 s = splusb(); 3449 3450 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3451 3452 /* Transfer is already done. */ 3453 if (xfer->status != USBD_NOT_STARTED && 3454 xfer->status != USBD_IN_PROGRESS) { 3455 splx(s); 3456 printf("ohci_device_isoc_abort: early return\n"); 3457 return; 3458 } 3459 3460 /* Give xfer the requested abort code. */ 3461 xfer->status = USBD_CANCELLED; 3462 3463 sed = opipe->sed; 3464 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3465 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3466 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 3467 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3468 sizeof(sed->ed.ed_flags), 3469 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3470 3471 sitd = xfer->hcpriv; 3472 #ifdef DIAGNOSTIC 3473 if (sitd == NULL) { 3474 splx(s); 3475 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3476 return; 3477 } 3478 #endif 3479 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3480 #ifdef DIAGNOSTIC 3481 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3482 sitd->isdone = 1; 3483 #endif 3484 } 3485 3486 splx(s); 3487 3488 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3489 3490 s = splusb(); 3491 3492 /* Run callback. */ 3493 usb_transfer_complete(xfer); 3494 3495 sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */ 3496 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 3497 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3498 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3499 3500 splx(s); 3501 } 3502 3503 void 3504 ohci_device_isoc_done(usbd_xfer_handle xfer) 3505 { 3506 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3507 } 3508 3509 usbd_status 3510 ohci_setup_isoc(usbd_pipe_handle pipe) 3511 { 3512 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3513 ohci_softc_t *sc = pipe->device->bus->hci_private; 3514 struct iso *iso = &opipe->u.iso; 3515 int s; 3516 3517 iso->next = -1; 3518 iso->inuse = 0; 3519 3520 s = splusb(); 3521 ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head); 3522 splx(s); 3523 3524 return (USBD_NORMAL_COMPLETION); 3525 } 3526 3527 void 3528 ohci_device_isoc_close(usbd_pipe_handle pipe) 3529 { 3530 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3531 ohci_softc_t *sc = pipe->device->bus->hci_private; 3532 3533 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3534 ohci_close_pipe(pipe, sc->sc_isoc_head); 3535 #ifdef DIAGNOSTIC 3536 opipe->tail.itd->isdone = 1; 3537 #endif 3538 ohci_free_sitd(sc, opipe->tail.itd); 3539 } 3540