xref: /netbsd-src/sys/dev/usb/ohci.c (revision 8b0f9554ff8762542c4defc4f70e1eb76fb508fa)
1 /*	$NetBSD: ohci.c,v 1.185 2007/12/09 20:28:23 jmcneill Exp $	*/
2 /*	$FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $	*/
3 
4 /*
5  * Copyright (c) 1998, 2004, 2005 The NetBSD Foundation, Inc.
6  * All rights reserved.
7  *
8  * This code is derived from software contributed to The NetBSD Foundation
9  * by Lennart Augustsson (lennart@augustsson.net) at
10  * Carlstedt Research & Technology.
11  * This code is derived from software contributed to The NetBSD Foundation
12  * by Charles M. Hannum.
13  *
14  * Redistribution and use in source and binary forms, with or without
15  * modification, are permitted provided that the following conditions
16  * are met:
17  * 1. Redistributions of source code must retain the above copyright
18  *    notice, this list of conditions and the following disclaimer.
19  * 2. Redistributions in binary form must reproduce the above copyright
20  *    notice, this list of conditions and the following disclaimer in the
21  *    documentation and/or other materials provided with the distribution.
22  * 3. All advertising materials mentioning features or use of this software
23  *    must display the following acknowledgement:
24  *        This product includes software developed by the NetBSD
25  *        Foundation, Inc. and its contributors.
26  * 4. Neither the name of The NetBSD Foundation nor the names of its
27  *    contributors may be used to endorse or promote products derived
28  *    from this software without specific prior written permission.
29  *
30  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
31  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
32  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
33  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
34  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
35  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
36  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
37  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
38  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
39  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
40  * POSSIBILITY OF SUCH DAMAGE.
41  */
42 
43 /*
44  * USB Open Host Controller driver.
45  *
46  * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
47  * USB spec: http://www.usb.org/developers/docs/usbspec.zip
48  */
49 
50 #include <sys/cdefs.h>
51 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.185 2007/12/09 20:28:23 jmcneill Exp $");
52 
53 #include <sys/param.h>
54 #include <sys/systm.h>
55 #include <sys/malloc.h>
56 #if defined(__NetBSD__) || defined(__OpenBSD__)
57 #include <sys/kernel.h>
58 #include <sys/device.h>
59 #include <sys/select.h>
60 #include <uvm/uvm_extern.h>
61 #elif defined(__FreeBSD__)
62 #include <sys/module.h>
63 #include <sys/bus.h>
64 #include <machine/bus_pio.h>
65 #include <machine/bus_memio.h>
66 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__)
67 #include <sys/cpu.h>
68 #endif
69 #endif
70 #include <sys/proc.h>
71 #include <sys/queue.h>
72 
73 #include <sys/bus.h>
74 #include <machine/endian.h>
75 
76 #include <dev/usb/usb.h>
77 #include <dev/usb/usbdi.h>
78 #include <dev/usb/usbdivar.h>
79 #include <dev/usb/usb_mem.h>
80 #include <dev/usb/usb_quirks.h>
81 
82 #include <dev/usb/ohcireg.h>
83 #include <dev/usb/ohcivar.h>
84 
85 #if defined(__FreeBSD__)
86 #include <machine/clock.h>
87 
88 #define delay(d)                DELAY(d)
89 #endif
90 
91 #if defined(__OpenBSD__)
92 struct cfdriver ohci_cd = {
93 	NULL, "ohci", DV_DULL
94 };
95 #endif
96 
97 #ifdef OHCI_DEBUG
98 #define DPRINTF(x)	if (ohcidebug) logprintf x
99 #define DPRINTFN(n,x)	if (ohcidebug>(n)) logprintf x
100 int ohcidebug = 0;
101 #ifndef __NetBSD__
102 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
103 #endif
104 #else
105 #define DPRINTF(x)
106 #define DPRINTFN(n,x)
107 #endif
108 
109 #if BYTE_ORDER == BIG_ENDIAN
110 #define	SWAP_ENDIAN	OHCI_LITTLE_ENDIAN
111 #else
112 #define	SWAP_ENDIAN	OHCI_BIG_ENDIAN
113 #endif
114 
115 #define	O16TOH(val)	(sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val)
116 #define	O32TOH(val)	(sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val)
117 #define	HTOO16(val)	O16TOH(val)
118 #define	HTOO32(val)	O32TOH(val)
119 
120 struct ohci_pipe;
121 
122 Static ohci_soft_ed_t  *ohci_alloc_sed(ohci_softc_t *);
123 Static void		ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *);
124 
125 Static ohci_soft_td_t  *ohci_alloc_std(ohci_softc_t *);
126 Static void		ohci_free_std(ohci_softc_t *, ohci_soft_td_t *);
127 
128 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *);
129 Static void		ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *);
130 
131 #if 0
132 Static void		ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *,
133 					    ohci_soft_td_t *);
134 #endif
135 Static usbd_status	ohci_alloc_std_chain(struct ohci_pipe *,
136 			    ohci_softc_t *, int, int, usbd_xfer_handle,
137 			    ohci_soft_td_t *, ohci_soft_td_t **);
138 
139 Static void		ohci_shutdown(void *v);
140 Static usbd_status	ohci_open(usbd_pipe_handle);
141 Static void		ohci_poll(struct usbd_bus *);
142 Static void		ohci_softintr(void *);
143 Static void		ohci_waitintr(ohci_softc_t *, usbd_xfer_handle);
144 Static void		ohci_rhsc(ohci_softc_t *, usbd_xfer_handle);
145 
146 Static usbd_status	ohci_device_request(usbd_xfer_handle xfer);
147 Static void		ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *,
148 			    ohci_soft_ed_t *);
149 
150 Static void		ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *);
151 Static void		ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *);
152 Static void		ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *);
153 Static ohci_soft_td_t  *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t);
154 Static void		ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *);
155 Static void		ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *);
156 Static ohci_soft_itd_t  *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t);
157 
158 Static usbd_status	ohci_setup_isoc(usbd_pipe_handle pipe);
159 Static void		ohci_device_isoc_enter(usbd_xfer_handle);
160 
161 Static usbd_status	ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
162 Static void		ohci_freem(struct usbd_bus *, usb_dma_t *);
163 
164 Static usbd_xfer_handle	ohci_allocx(struct usbd_bus *);
165 Static void		ohci_freex(struct usbd_bus *, usbd_xfer_handle);
166 
167 Static usbd_status	ohci_root_ctrl_transfer(usbd_xfer_handle);
168 Static usbd_status	ohci_root_ctrl_start(usbd_xfer_handle);
169 Static void		ohci_root_ctrl_abort(usbd_xfer_handle);
170 Static void		ohci_root_ctrl_close(usbd_pipe_handle);
171 Static void		ohci_root_ctrl_done(usbd_xfer_handle);
172 
173 Static usbd_status	ohci_root_intr_transfer(usbd_xfer_handle);
174 Static usbd_status	ohci_root_intr_start(usbd_xfer_handle);
175 Static void		ohci_root_intr_abort(usbd_xfer_handle);
176 Static void		ohci_root_intr_close(usbd_pipe_handle);
177 Static void		ohci_root_intr_done(usbd_xfer_handle);
178 
179 Static usbd_status	ohci_device_ctrl_transfer(usbd_xfer_handle);
180 Static usbd_status	ohci_device_ctrl_start(usbd_xfer_handle);
181 Static void		ohci_device_ctrl_abort(usbd_xfer_handle);
182 Static void		ohci_device_ctrl_close(usbd_pipe_handle);
183 Static void		ohci_device_ctrl_done(usbd_xfer_handle);
184 
185 Static usbd_status	ohci_device_bulk_transfer(usbd_xfer_handle);
186 Static usbd_status	ohci_device_bulk_start(usbd_xfer_handle);
187 Static void		ohci_device_bulk_abort(usbd_xfer_handle);
188 Static void		ohci_device_bulk_close(usbd_pipe_handle);
189 Static void		ohci_device_bulk_done(usbd_xfer_handle);
190 
191 Static usbd_status	ohci_device_intr_transfer(usbd_xfer_handle);
192 Static usbd_status	ohci_device_intr_start(usbd_xfer_handle);
193 Static void		ohci_device_intr_abort(usbd_xfer_handle);
194 Static void		ohci_device_intr_close(usbd_pipe_handle);
195 Static void		ohci_device_intr_done(usbd_xfer_handle);
196 
197 Static usbd_status	ohci_device_isoc_transfer(usbd_xfer_handle);
198 Static usbd_status	ohci_device_isoc_start(usbd_xfer_handle);
199 Static void		ohci_device_isoc_abort(usbd_xfer_handle);
200 Static void		ohci_device_isoc_close(usbd_pipe_handle);
201 Static void		ohci_device_isoc_done(usbd_xfer_handle);
202 
203 Static usbd_status	ohci_device_setintr(ohci_softc_t *sc,
204 			    struct ohci_pipe *pipe, int ival);
205 
206 Static int		ohci_str(usb_string_descriptor_t *, int, const char *);
207 
208 Static void		ohci_timeout(void *);
209 Static void		ohci_timeout_task(void *);
210 Static void		ohci_rhsc_enable(void *);
211 
212 Static void		ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *);
213 Static void		ohci_abort_xfer(usbd_xfer_handle, usbd_status);
214 
215 Static void		ohci_device_clear_toggle(usbd_pipe_handle pipe);
216 Static void		ohci_noop(usbd_pipe_handle pipe);
217 
218 #ifdef OHCI_DEBUG
219 Static void		ohci_dumpregs(ohci_softc_t *);
220 Static void		ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *);
221 Static void		ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *);
222 Static void		ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *);
223 Static void		ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *);
224 Static void		ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *);
225 #endif
226 
227 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
228 			BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
229 #define OWRITE1(sc, r, x) \
230  do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
231 #define OWRITE2(sc, r, x) \
232  do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
233 #define OWRITE4(sc, r, x) \
234  do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
235 static __inline uint8_t
236 OREAD1(ohci_softc_t *sc, bus_size_t r)
237 {
238 
239 	OBARR(sc);
240 	return bus_space_read_1(sc->iot, sc->ioh, r);
241 }
242 
243 static __inline uint16_t
244 OREAD2(ohci_softc_t *sc, bus_size_t r)
245 {
246 
247 	OBARR(sc);
248 	return bus_space_read_2(sc->iot, sc->ioh, r);
249 }
250 
251 static __inline uint32_t
252 OREAD4(ohci_softc_t *sc, bus_size_t r)
253 {
254 
255 	OBARR(sc);
256 	return bus_space_read_4(sc->iot, sc->ioh, r);
257 }
258 
259 /* Reverse the bits in a value 0 .. 31 */
260 Static u_int8_t revbits[OHCI_NO_INTRS] =
261   { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
262     0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
263     0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
264     0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
265 
266 struct ohci_pipe {
267 	struct usbd_pipe pipe;
268 	ohci_soft_ed_t *sed;
269 	union {
270 		ohci_soft_td_t *td;
271 		ohci_soft_itd_t *itd;
272 	} tail;
273 	/* Info needed for different pipe kinds. */
274 	union {
275 		/* Control pipe */
276 		struct {
277 			usb_dma_t reqdma;
278 			u_int length;
279 			ohci_soft_td_t *setup, *data, *stat;
280 		} ctl;
281 		/* Interrupt pipe */
282 		struct {
283 			int nslots;
284 			int pos;
285 		} intr;
286 		/* Bulk pipe */
287 		struct {
288 			u_int length;
289 			int isread;
290 		} bulk;
291 		/* Iso pipe */
292 		struct iso {
293 			int next, inuse;
294 		} iso;
295 	} u;
296 };
297 
298 #define OHCI_INTR_ENDPT 1
299 
300 Static const struct usbd_bus_methods ohci_bus_methods = {
301 	ohci_open,
302 	ohci_softintr,
303 	ohci_poll,
304 	ohci_allocm,
305 	ohci_freem,
306 	ohci_allocx,
307 	ohci_freex,
308 };
309 
310 Static const struct usbd_pipe_methods ohci_root_ctrl_methods = {
311 	ohci_root_ctrl_transfer,
312 	ohci_root_ctrl_start,
313 	ohci_root_ctrl_abort,
314 	ohci_root_ctrl_close,
315 	ohci_noop,
316 	ohci_root_ctrl_done,
317 };
318 
319 Static const struct usbd_pipe_methods ohci_root_intr_methods = {
320 	ohci_root_intr_transfer,
321 	ohci_root_intr_start,
322 	ohci_root_intr_abort,
323 	ohci_root_intr_close,
324 	ohci_noop,
325 	ohci_root_intr_done,
326 };
327 
328 Static const struct usbd_pipe_methods ohci_device_ctrl_methods = {
329 	ohci_device_ctrl_transfer,
330 	ohci_device_ctrl_start,
331 	ohci_device_ctrl_abort,
332 	ohci_device_ctrl_close,
333 	ohci_noop,
334 	ohci_device_ctrl_done,
335 };
336 
337 Static const struct usbd_pipe_methods ohci_device_intr_methods = {
338 	ohci_device_intr_transfer,
339 	ohci_device_intr_start,
340 	ohci_device_intr_abort,
341 	ohci_device_intr_close,
342 	ohci_device_clear_toggle,
343 	ohci_device_intr_done,
344 };
345 
346 Static const struct usbd_pipe_methods ohci_device_bulk_methods = {
347 	ohci_device_bulk_transfer,
348 	ohci_device_bulk_start,
349 	ohci_device_bulk_abort,
350 	ohci_device_bulk_close,
351 	ohci_device_clear_toggle,
352 	ohci_device_bulk_done,
353 };
354 
355 Static const struct usbd_pipe_methods ohci_device_isoc_methods = {
356 	ohci_device_isoc_transfer,
357 	ohci_device_isoc_start,
358 	ohci_device_isoc_abort,
359 	ohci_device_isoc_close,
360 	ohci_noop,
361 	ohci_device_isoc_done,
362 };
363 
364 #if defined(__NetBSD__) || defined(__OpenBSD__)
365 int
366 ohci_activate(device_ptr_t self, enum devact act)
367 {
368 	struct ohci_softc *sc = (struct ohci_softc *)self;
369 	int rv = 0;
370 
371 	switch (act) {
372 	case DVACT_ACTIVATE:
373 		return (EOPNOTSUPP);
374 
375 	case DVACT_DEACTIVATE:
376 		sc->sc_dying = 1;
377 		if (sc->sc_child != NULL)
378 			rv = config_deactivate(sc->sc_child);
379 		break;
380 	}
381 	return (rv);
382 }
383 
384 int
385 ohci_detach(struct ohci_softc *sc, int flags)
386 {
387 	int rv = 0;
388 
389 	if (sc->sc_child != NULL)
390 		rv = config_detach(sc->sc_child, flags);
391 
392 	if (rv != 0)
393 		return (rv);
394 
395 	usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc);
396 
397 #if defined(__NetBSD__) || defined(__OpenBSD__)
398 	shutdownhook_disestablish(sc->sc_shutdownhook);
399 #endif
400 
401 	usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
402 
403 	/* free data structures XXX */
404 
405 	return (rv);
406 }
407 #endif
408 
409 ohci_soft_ed_t *
410 ohci_alloc_sed(ohci_softc_t *sc)
411 {
412 	ohci_soft_ed_t *sed;
413 	usbd_status err;
414 	int i, offs;
415 	usb_dma_t dma;
416 
417 	if (sc->sc_freeeds == NULL) {
418 		DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
419 		err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
420 			  OHCI_ED_ALIGN, &dma);
421 		if (err)
422 			return (0);
423 		for(i = 0; i < OHCI_SED_CHUNK; i++) {
424 			offs = i * OHCI_SED_SIZE;
425 			sed = KERNADDR(&dma, offs);
426 			sed->physaddr = DMAADDR(&dma, offs);
427 			sed->next = sc->sc_freeeds;
428 			sc->sc_freeeds = sed;
429 		}
430 	}
431 	sed = sc->sc_freeeds;
432 	sc->sc_freeeds = sed->next;
433 	memset(&sed->ed, 0, sizeof(ohci_ed_t));
434 	sed->next = 0;
435 	return (sed);
436 }
437 
438 void
439 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
440 {
441 	sed->next = sc->sc_freeeds;
442 	sc->sc_freeeds = sed;
443 }
444 
445 ohci_soft_td_t *
446 ohci_alloc_std(ohci_softc_t *sc)
447 {
448 	ohci_soft_td_t *std;
449 	usbd_status err;
450 	int i, offs;
451 	usb_dma_t dma;
452 	int s;
453 
454 	if (sc->sc_freetds == NULL) {
455 		DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
456 		err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
457 			  OHCI_TD_ALIGN, &dma);
458 		if (err)
459 			return (NULL);
460 		s = splusb();
461 		for(i = 0; i < OHCI_STD_CHUNK; i++) {
462 			offs = i * OHCI_STD_SIZE;
463 			std = KERNADDR(&dma, offs);
464 			std->physaddr = DMAADDR(&dma, offs);
465 			std->nexttd = sc->sc_freetds;
466 			sc->sc_freetds = std;
467 		}
468 		splx(s);
469 	}
470 
471 	s = splusb();
472 	std = sc->sc_freetds;
473 	sc->sc_freetds = std->nexttd;
474 	memset(&std->td, 0, sizeof(ohci_td_t));
475 	std->nexttd = NULL;
476 	std->xfer = NULL;
477 	ohci_hash_add_td(sc, std);
478 	splx(s);
479 
480 	return (std);
481 }
482 
483 void
484 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std)
485 {
486 	int s;
487 
488 	s = splusb();
489 	ohci_hash_rem_td(sc, std);
490 	std->nexttd = sc->sc_freetds;
491 	sc->sc_freetds = std;
492 	splx(s);
493 }
494 
495 usbd_status
496 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc,
497 		     int alen, int rd, usbd_xfer_handle xfer,
498 		     ohci_soft_td_t *sp, ohci_soft_td_t **ep)
499 {
500 	ohci_soft_td_t *next, *cur;
501 	ohci_physaddr_t dataphys, dataphysend;
502 	u_int32_t tdflags;
503 	int len, curlen;
504 	usb_dma_t *dma = &xfer->dmabuf;
505 	u_int16_t flags = xfer->flags;
506 
507 	DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen));
508 
509 	len = alen;
510 	cur = sp;
511 	dataphys = DMAADDR(dma, 0);
512 	dataphysend = OHCI_PAGE(dataphys + len - 1);
513 	tdflags = HTOO32(
514 	    (rd ? OHCI_TD_IN : OHCI_TD_OUT) |
515 	    (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) |
516 	    OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR);
517 
518 	for (;;) {
519 		next = ohci_alloc_std(sc);
520 		if (next == NULL)
521 			goto nomem;
522 
523 		/* The OHCI hardware can handle at most one page crossing. */
524 		if (OHCI_PAGE(dataphys) == dataphysend ||
525 		    OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) {
526 			/* we can handle it in this TD */
527 			curlen = len;
528 		} else {
529 			/* must use multiple TDs, fill as much as possible. */
530 			curlen = 2 * OHCI_PAGE_SIZE -
531 				 (dataphys & (OHCI_PAGE_SIZE-1));
532 			/* the length must be a multiple of the max size */
533 			curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize);
534 #ifdef DIAGNOSTIC
535 			if (curlen == 0)
536 				panic("ohci_alloc_std: curlen == 0");
537 #endif
538 		}
539 		DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x "
540 			    "dataphysend=0x%08x len=%d curlen=%d\n",
541 			    dataphys, dataphysend,
542 			    len, curlen));
543 		len -= curlen;
544 
545 		cur->td.td_flags = tdflags;
546 		cur->td.td_cbp = HTOO32(dataphys);
547 		cur->nexttd = next;
548 		cur->td.td_nexttd = HTOO32(next->physaddr);
549 		cur->td.td_be = HTOO32(dataphys + curlen - 1);
550 		cur->len = curlen;
551 		cur->flags = OHCI_ADD_LEN;
552 		cur->xfer = xfer;
553 		DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n",
554 			    dataphys, dataphys + curlen - 1));
555 		if (len == 0)
556 			break;
557 		DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n"));
558 		dataphys += curlen;
559 		cur = next;
560 	}
561 	if (!rd && (flags & USBD_FORCE_SHORT_XFER) &&
562 	    alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) {
563 		/* Force a 0 length transfer at the end. */
564 
565 		cur = next;
566 		next = ohci_alloc_std(sc);
567 		if (next == NULL)
568 			goto nomem;
569 
570 		cur->td.td_flags = tdflags;
571 		cur->td.td_cbp = 0; /* indicate 0 length packet */
572 		cur->nexttd = next;
573 		cur->td.td_nexttd = HTOO32(next->physaddr);
574 		cur->td.td_be = ~0;
575 		cur->len = 0;
576 		cur->flags = 0;
577 		cur->xfer = xfer;
578 		DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n"));
579 	}
580 	*ep = cur;
581 
582 	return (USBD_NORMAL_COMPLETION);
583 
584  nomem:
585 	/* XXX free chain */
586 	return (USBD_NOMEM);
587 }
588 
589 #if 0
590 Static void
591 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std,
592 		    ohci_soft_td_t *stdend)
593 {
594 	ohci_soft_td_t *p;
595 
596 	for (; std != stdend; std = p) {
597 		p = std->nexttd;
598 		ohci_free_std(sc, std);
599 	}
600 }
601 #endif
602 
603 ohci_soft_itd_t *
604 ohci_alloc_sitd(ohci_softc_t *sc)
605 {
606 	ohci_soft_itd_t *sitd;
607 	usbd_status err;
608 	int i, s, offs;
609 	usb_dma_t dma;
610 
611 	if (sc->sc_freeitds == NULL) {
612 		DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n"));
613 		err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK,
614 			  OHCI_ITD_ALIGN, &dma);
615 		if (err)
616 			return (NULL);
617 		s = splusb();
618 		for(i = 0; i < OHCI_SITD_CHUNK; i++) {
619 			offs = i * OHCI_SITD_SIZE;
620 			sitd = KERNADDR(&dma, offs);
621 			sitd->physaddr = DMAADDR(&dma, offs);
622 			sitd->nextitd = sc->sc_freeitds;
623 			sc->sc_freeitds = sitd;
624 		}
625 		splx(s);
626 	}
627 
628 	s = splusb();
629 	sitd = sc->sc_freeitds;
630 	sc->sc_freeitds = sitd->nextitd;
631 	memset(&sitd->itd, 0, sizeof(ohci_itd_t));
632 	sitd->nextitd = NULL;
633 	sitd->xfer = NULL;
634 	ohci_hash_add_itd(sc, sitd);
635 	splx(s);
636 
637 #ifdef DIAGNOSTIC
638 	sitd->isdone = 0;
639 #endif
640 
641 	return (sitd);
642 }
643 
644 void
645 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
646 {
647 	int s;
648 
649 	DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd));
650 
651 #ifdef DIAGNOSTIC
652 	if (!sitd->isdone) {
653 		panic("ohci_free_sitd: sitd=%p not done", sitd);
654 		return;
655 	}
656 	/* Warn double free */
657 	sitd->isdone = 0;
658 #endif
659 
660 	s = splusb();
661 	ohci_hash_rem_itd(sc, sitd);
662 	sitd->nextitd = sc->sc_freeitds;
663 	sc->sc_freeitds = sitd;
664 	splx(s);
665 }
666 
667 usbd_status
668 ohci_init(ohci_softc_t *sc)
669 {
670 	ohci_soft_ed_t *sed, *psed;
671 	usbd_status err;
672 	int i;
673 	u_int32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca, descb;
674 
675 	DPRINTF(("ohci_init: start\n"));
676 #if defined(__OpenBSD__)
677 	printf(",");
678 #else
679 	printf("%s:", USBDEVNAME(sc->sc_bus.bdev));
680 #endif
681 	rev = OREAD4(sc, OHCI_REVISION);
682 	printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev),
683 	       OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
684 
685 	if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
686 		printf("%s: unsupported OHCI revision\n",
687 		       USBDEVNAME(sc->sc_bus.bdev));
688 		sc->sc_bus.usbrev = USBREV_UNKNOWN;
689 		return (USBD_INVAL);
690 	}
691 	sc->sc_bus.usbrev = USBREV_1_0;
692 
693 	for (i = 0; i < OHCI_HASH_SIZE; i++)
694 		LIST_INIT(&sc->sc_hash_tds[i]);
695 	for (i = 0; i < OHCI_HASH_SIZE; i++)
696 		LIST_INIT(&sc->sc_hash_itds[i]);
697 
698 	SIMPLEQ_INIT(&sc->sc_free_xfers);
699 
700 #ifdef __NetBSD__
701 	usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag,
702 	    USB_MEM_RESERVE);
703 #endif
704 
705 	/* XXX determine alignment by R/W */
706 	/* Allocate the HCCA area. */
707 	err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
708 			 OHCI_HCCA_ALIGN, &sc->sc_hccadma);
709 	if (err)
710 		return (err);
711 	sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0);
712 	memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
713 
714 	sc->sc_eintrs = OHCI_NORMAL_INTRS;
715 
716 	/* Allocate dummy ED that starts the control list. */
717 	sc->sc_ctrl_head = ohci_alloc_sed(sc);
718 	if (sc->sc_ctrl_head == NULL) {
719 		err = USBD_NOMEM;
720 		goto bad1;
721 	}
722 	sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
723 
724 	/* Allocate dummy ED that starts the bulk list. */
725 	sc->sc_bulk_head = ohci_alloc_sed(sc);
726 	if (sc->sc_bulk_head == NULL) {
727 		err = USBD_NOMEM;
728 		goto bad2;
729 	}
730 	sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
731 
732 	/* Allocate dummy ED that starts the isochronous list. */
733 	sc->sc_isoc_head = ohci_alloc_sed(sc);
734 	if (sc->sc_isoc_head == NULL) {
735 		err = USBD_NOMEM;
736 		goto bad3;
737 	}
738 	sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
739 
740 	/* Allocate all the dummy EDs that make up the interrupt tree. */
741 	for (i = 0; i < OHCI_NO_EDS; i++) {
742 		sed = ohci_alloc_sed(sc);
743 		if (sed == NULL) {
744 			while (--i >= 0)
745 				ohci_free_sed(sc, sc->sc_eds[i]);
746 			err = USBD_NOMEM;
747 			goto bad4;
748 		}
749 		/* All ED fields are set to 0. */
750 		sc->sc_eds[i] = sed;
751 		sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
752 		if (i != 0)
753 			psed = sc->sc_eds[(i-1) / 2];
754 		else
755 			psed= sc->sc_isoc_head;
756 		sed->next = psed;
757 		sed->ed.ed_nexted = HTOO32(psed->physaddr);
758 	}
759 	/*
760 	 * Fill HCCA interrupt table.  The bit reversal is to get
761 	 * the tree set up properly to spread the interrupts.
762 	 */
763 	for (i = 0; i < OHCI_NO_INTRS; i++)
764 		sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
765 		    HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
766 
767 #ifdef OHCI_DEBUG
768 	if (ohcidebug > 15) {
769 		for (i = 0; i < OHCI_NO_EDS; i++) {
770 			printf("ed#%d ", i);
771 			ohci_dump_ed(sc, sc->sc_eds[i]);
772 		}
773 		printf("iso ");
774 		ohci_dump_ed(sc, sc->sc_isoc_head);
775 	}
776 #endif
777 
778 	/* Preserve values programmed by SMM/BIOS but lost over reset. */
779 	ctl = OREAD4(sc, OHCI_CONTROL);
780 	rwc = ctl & OHCI_RWC;
781 	fm = OREAD4(sc, OHCI_FM_INTERVAL);
782 	desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
783 	descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
784 
785 	/* Determine in what context we are running. */
786 	if (ctl & OHCI_IR) {
787 		/* SMM active, request change */
788 		DPRINTF(("ohci_init: SMM active, request owner change\n"));
789 		if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) ==
790 		    (OHCI_OC | OHCI_MIE))
791 			OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE);
792 		s = OREAD4(sc, OHCI_COMMAND_STATUS);
793 		OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
794 		for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
795 			usb_delay_ms(&sc->sc_bus, 1);
796 			ctl = OREAD4(sc, OHCI_CONTROL);
797 		}
798 		OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE);
799 		if ((ctl & OHCI_IR) == 0) {
800 			printf("%s: SMM does not respond, resetting\n",
801 			       USBDEVNAME(sc->sc_bus.bdev));
802 			OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
803 			goto reset;
804 		}
805 #if 0
806 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */
807 	} else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
808 		/* BIOS started controller. */
809 		DPRINTF(("ohci_init: BIOS active\n"));
810 		if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
811 			OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc);
812 			usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
813 		}
814 #endif
815 	} else {
816 		DPRINTF(("ohci_init: cold started\n"));
817 	reset:
818 		/* Controller was cold started. */
819 		usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
820 	}
821 
822 	/*
823 	 * This reset should not be necessary according to the OHCI spec, but
824 	 * without it some controllers do not start.
825 	 */
826 	DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
827 	OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
828 	usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
829 
830 	/* We now own the host controller and the bus has been reset. */
831 
832 	OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
833 	/* Nominal time for a reset is 10 us. */
834 	for (i = 0; i < 10; i++) {
835 		delay(10);
836 		hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
837 		if (!hcr)
838 			break;
839 	}
840 	if (hcr) {
841 		printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
842 		err = USBD_IOERROR;
843 		goto bad5;
844 	}
845 #ifdef OHCI_DEBUG
846 	if (ohcidebug > 15)
847 		ohci_dumpregs(sc);
848 #endif
849 
850 	/* The controller is now in SUSPEND state, we have 2ms to finish. */
851 
852 	/* Set up HC registers. */
853 	OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
854 	OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
855 	OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
856 	/* disable all interrupts and then switch on all desired interrupts */
857 	OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
858 	/* switch on desired functional features */
859 	ctl = OREAD4(sc, OHCI_CONTROL);
860 	ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
861 	ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
862 		OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc;
863 	/* And finally start it! */
864 	OWRITE4(sc, OHCI_CONTROL, ctl);
865 
866 	/*
867 	 * The controller is now OPERATIONAL.  Set a some final
868 	 * registers that should be set earlier, but that the
869 	 * controller ignores when in the SUSPEND state.
870 	 */
871 	ival = OHCI_GET_IVAL(fm);
872 	fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
873 	fm |= OHCI_FSMPS(ival) | ival;
874 	OWRITE4(sc, OHCI_FM_INTERVAL, fm);
875 	per = OHCI_PERIODIC(ival); /* 90% periodic */
876 	OWRITE4(sc, OHCI_PERIODIC_START, per);
877 
878 	/* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
879 	OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
880 	OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
881 	usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY);
882 	OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
883 
884 	/*
885 	 * The AMD756 requires a delay before re-reading the register,
886 	 * otherwise it will occasionally report 0 ports.
887 	 */
888 	sc->sc_noport = 0;
889 	for (i = 0; i < 10 && sc->sc_noport == 0; i++) {
890 		usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY);
891 		sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
892 	}
893 
894 #ifdef OHCI_DEBUG
895 	if (ohcidebug > 5)
896 		ohci_dumpregs(sc);
897 #endif
898 
899 	/* Set up the bus struct. */
900 	sc->sc_bus.methods = &ohci_bus_methods;
901 	sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
902 
903 #if defined(__NetBSD__) || defined(__OpenBSD__)
904 	sc->sc_control = sc->sc_intre = 0;
905 	sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc);
906 #endif
907 
908 	usb_callout_init(sc->sc_tmo_rhsc);
909 
910 	/* Finally, turn on interrupts. */
911 	DPRINTFN(1,("ohci_init: enabling\n"));
912 	OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
913 
914 	return (USBD_NORMAL_COMPLETION);
915 
916  bad5:
917 	for (i = 0; i < OHCI_NO_EDS; i++)
918 		ohci_free_sed(sc, sc->sc_eds[i]);
919  bad4:
920 	ohci_free_sed(sc, sc->sc_isoc_head);
921  bad3:
922 	ohci_free_sed(sc, sc->sc_bulk_head);
923  bad2:
924 	ohci_free_sed(sc, sc->sc_ctrl_head);
925  bad1:
926 	usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
927 	return (err);
928 }
929 
930 usbd_status
931 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
932 {
933 #if defined(__NetBSD__) || defined(__OpenBSD__)
934 	struct ohci_softc *sc = (struct ohci_softc *)bus;
935 #endif
936 	usbd_status status;
937 
938 	status = usb_allocmem(&sc->sc_bus, size, 0, dma);
939 #ifdef __NetBSD__
940 	if (status == USBD_NOMEM)
941 		status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size);
942 #endif
943 	return status;
944 }
945 
946 void
947 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma)
948 {
949 #if defined(__NetBSD__) || defined(__OpenBSD__)
950 	struct ohci_softc *sc = (struct ohci_softc *)bus;
951 #endif
952 #ifdef __NetBSD__
953 	if (dma->block->flags & USB_DMA_RESERVE) {
954 		usb_reserve_freem(&((struct ohci_softc *)bus)->sc_dma_reserve,
955 		    dma);
956 		return;
957 	}
958 #endif
959 	usb_freemem(&sc->sc_bus, dma);
960 }
961 
962 usbd_xfer_handle
963 ohci_allocx(struct usbd_bus *bus)
964 {
965 	struct ohci_softc *sc = (struct ohci_softc *)bus;
966 	usbd_xfer_handle xfer;
967 
968 	xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
969 	if (xfer != NULL) {
970 		SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
971 #ifdef DIAGNOSTIC
972 		if (xfer->busy_free != XFER_FREE) {
973 			printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer,
974 			       xfer->busy_free);
975 		}
976 #endif
977 	} else {
978 		xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT);
979 	}
980 	if (xfer != NULL) {
981 		memset(xfer, 0, sizeof (struct ohci_xfer));
982 #ifdef DIAGNOSTIC
983 		xfer->busy_free = XFER_BUSY;
984 #endif
985 	}
986 	return (xfer);
987 }
988 
989 void
990 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
991 {
992 	struct ohci_softc *sc = (struct ohci_softc *)bus;
993 
994 #ifdef DIAGNOSTIC
995 	if (xfer->busy_free != XFER_BUSY) {
996 		printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer,
997 		       xfer->busy_free);
998 	}
999 	xfer->busy_free = XFER_FREE;
1000 #endif
1001 	SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
1002 }
1003 
1004 /*
1005  * Shut down the controller when the system is going down.
1006  */
1007 void
1008 ohci_shutdown(void *v)
1009 {
1010 	ohci_softc_t *sc = v;
1011 
1012 	DPRINTF(("ohci_shutdown: stopping the HC\n"));
1013 	OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1014 }
1015 
1016 bool
1017 ohci_resume(device_t dv)
1018 {
1019 	ohci_softc_t *sc = device_private(dv);
1020 	uint32_t ctl;
1021 	int s;
1022 
1023 	s = splhardusb();
1024 	sc->sc_bus.use_polling++;
1025 	/* Some broken BIOSes do not recover these values */
1026 	OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
1027 	OWRITE4(sc, OHCI_CONTROL_HEAD_ED,
1028 	    sc->sc_ctrl_head->physaddr);
1029 	OWRITE4(sc, OHCI_BULK_HEAD_ED,
1030 	    sc->sc_bulk_head->physaddr);
1031 	if (sc->sc_intre)
1032 		OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre &
1033 		    (OHCI_ALL_INTRS | OHCI_MIE));
1034 	if (sc->sc_control)
1035 		ctl = sc->sc_control;
1036 	else
1037 		ctl = OREAD4(sc, OHCI_CONTROL);
1038 	ctl |= OHCI_HCFS_RESUME;
1039 	OWRITE4(sc, OHCI_CONTROL, ctl);
1040 	usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
1041 	ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL;
1042 	OWRITE4(sc, OHCI_CONTROL, ctl);
1043 	usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
1044 	sc->sc_control = sc->sc_intre = 0;
1045 	sc->sc_bus.use_polling--;
1046 
1047 	return true;
1048 }
1049 
1050 bool
1051 ohci_suspend(device_t dv)
1052 {
1053 	ohci_softc_t *sc = device_private(dv);
1054 	uint32_t ctl;
1055 	int s;
1056 
1057 	s = splhardusb();
1058 	sc->sc_bus.use_polling++;
1059 	ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK;
1060 	if (sc->sc_control == 0) {
1061 		/*
1062 		 * Preserve register values, in case that BIOS
1063 		 * does not recover them.
1064 		 */
1065 		sc->sc_control = ctl;
1066 		sc->sc_intre = OREAD4(sc,
1067 		    OHCI_INTERRUPT_ENABLE);
1068 	}
1069 	ctl |= OHCI_HCFS_SUSPEND;
1070 	OWRITE4(sc, OHCI_CONTROL, ctl);
1071 	usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
1072 	sc->sc_bus.use_polling--;
1073 	splx(s);
1074 
1075 	return true;
1076 }
1077 
1078 #ifdef OHCI_DEBUG
1079 void
1080 ohci_dumpregs(ohci_softc_t *sc)
1081 {
1082 	DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
1083 		 OREAD4(sc, OHCI_REVISION),
1084 		 OREAD4(sc, OHCI_CONTROL),
1085 		 OREAD4(sc, OHCI_COMMAND_STATUS)));
1086 	DPRINTF(("               intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
1087 		 OREAD4(sc, OHCI_INTERRUPT_STATUS),
1088 		 OREAD4(sc, OHCI_INTERRUPT_ENABLE),
1089 		 OREAD4(sc, OHCI_INTERRUPT_DISABLE)));
1090 	DPRINTF(("               hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
1091 		 OREAD4(sc, OHCI_HCCA),
1092 		 OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
1093 		 OREAD4(sc, OHCI_CONTROL_HEAD_ED)));
1094 	DPRINTF(("               ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
1095 		 OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
1096 		 OREAD4(sc, OHCI_BULK_HEAD_ED),
1097 		 OREAD4(sc, OHCI_BULK_CURRENT_ED)));
1098 	DPRINTF(("               done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
1099 		 OREAD4(sc, OHCI_DONE_HEAD),
1100 		 OREAD4(sc, OHCI_FM_INTERVAL),
1101 		 OREAD4(sc, OHCI_FM_REMAINING)));
1102 	DPRINTF(("               fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
1103 		 OREAD4(sc, OHCI_FM_NUMBER),
1104 		 OREAD4(sc, OHCI_PERIODIC_START),
1105 		 OREAD4(sc, OHCI_LS_THRESHOLD)));
1106 	DPRINTF(("               desca=0x%08x descb=0x%08x stat=0x%08x\n",
1107 		 OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
1108 		 OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
1109 		 OREAD4(sc, OHCI_RH_STATUS)));
1110 	DPRINTF(("               port1=0x%08x port2=0x%08x\n",
1111 		 OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
1112 		 OREAD4(sc, OHCI_RH_PORT_STATUS(2))));
1113 	DPRINTF(("         HCCA: frame_number=0x%04x done_head=0x%08x\n",
1114 		 O32TOH(sc->sc_hcca->hcca_frame_number),
1115 		 O32TOH(sc->sc_hcca->hcca_done_head)));
1116 }
1117 #endif
1118 
1119 Static int ohci_intr1(ohci_softc_t *);
1120 
1121 int
1122 ohci_intr(void *p)
1123 {
1124 	ohci_softc_t *sc = p;
1125 
1126 	if (sc == NULL || sc->sc_dying || !device_has_power(&sc->sc_bus.bdev))
1127 		return (0);
1128 
1129 	/* If we get an interrupt while polling, then just ignore it. */
1130 	if (sc->sc_bus.use_polling) {
1131 #ifdef DIAGNOSTIC
1132 		DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n"));
1133 #endif
1134 		/* for level triggered intrs, should do something to ack */
1135 		OWRITE4(sc, OHCI_INTERRUPT_STATUS,
1136 			OREAD4(sc, OHCI_INTERRUPT_STATUS));
1137 
1138 		return (0);
1139 	}
1140 
1141 	return (ohci_intr1(sc));
1142 }
1143 
1144 Static int
1145 ohci_intr1(ohci_softc_t *sc)
1146 {
1147 	u_int32_t intrs, eintrs;
1148 
1149 	DPRINTFN(14,("ohci_intr1: enter\n"));
1150 
1151 	/* In case the interrupt occurs before initialization has completed. */
1152 	if (sc == NULL || sc->sc_hcca == NULL) {
1153 #ifdef DIAGNOSTIC
1154 		printf("ohci_intr: sc->sc_hcca == NULL\n");
1155 #endif
1156 		return (0);
1157 	}
1158 
1159 	intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1160 	if (!intrs)
1161 		return (0);
1162 
1163 	OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); /* Acknowledge */
1164 	eintrs = intrs & sc->sc_eintrs;
1165 	if (!eintrs)
1166 		return (0);
1167 
1168 	sc->sc_bus.intr_context++;
1169 	sc->sc_bus.no_intrs++;
1170 	DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
1171 		     sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
1172 		     (u_int)eintrs));
1173 
1174 	if (eintrs & OHCI_SO) {
1175 		sc->sc_overrun_cnt++;
1176 		if (usbd_ratecheck(&sc->sc_overrun_ntc)) {
1177 			printf("%s: %u scheduling overruns\n",
1178 			    USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt);
1179 			sc->sc_overrun_cnt = 0;
1180 		}
1181 		/* XXX do what */
1182 		eintrs &= ~OHCI_SO;
1183 	}
1184 	if (eintrs & OHCI_WDH) {
1185 		/*
1186 		 * We block the interrupt below, and reenable it later from
1187 		 * ohci_softintr().
1188 		 */
1189 		usb_schedsoftintr(&sc->sc_bus);
1190 	}
1191 	if (eintrs & OHCI_RD) {
1192 		printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
1193 		/* XXX process resume detect */
1194 	}
1195 	if (eintrs & OHCI_UE) {
1196 		printf("%s: unrecoverable error, controller halted\n",
1197 		       USBDEVNAME(sc->sc_bus.bdev));
1198 		OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1199 		/* XXX what else */
1200 	}
1201 	if (eintrs & OHCI_RHSC) {
1202 		/*
1203 		 * We block the interrupt below, and reenable it later from
1204 		 * a timeout.
1205 		 */
1206 		ohci_rhsc(sc, sc->sc_intrxfer);
1207 		/* Do not allow RHSC interrupts > 1 per second */
1208                 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc);
1209 	}
1210 
1211 	sc->sc_bus.intr_context--;
1212 
1213 	if (eintrs != 0) {
1214 		/* Block unprocessed interrupts. */
1215 		OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs);
1216 		sc->sc_eintrs &= ~eintrs;
1217 		DPRINTFN(1, ("%s: blocking intrs 0x%x\n",
1218 		    USBDEVNAME(sc->sc_bus.bdev), eintrs));
1219 	}
1220 
1221 	return (1);
1222 }
1223 
1224 void
1225 ohci_rhsc_enable(void *v_sc)
1226 {
1227 	ohci_softc_t *sc = v_sc;
1228 	int s;
1229 
1230 	s = splhardusb();
1231 	sc->sc_eintrs |= OHCI_RHSC;
1232 	OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1233 	splx(s);
1234 }
1235 
1236 #ifdef OHCI_DEBUG
1237 const char *ohci_cc_strs[] = {
1238 	"NO_ERROR",
1239 	"CRC",
1240 	"BIT_STUFFING",
1241 	"DATA_TOGGLE_MISMATCH",
1242 	"STALL",
1243 	"DEVICE_NOT_RESPONDING",
1244 	"PID_CHECK_FAILURE",
1245 	"UNEXPECTED_PID",
1246 	"DATA_OVERRUN",
1247 	"DATA_UNDERRUN",
1248 	"BUFFER_OVERRUN",
1249 	"BUFFER_UNDERRUN",
1250 	"reserved",
1251 	"reserved",
1252 	"NOT_ACCESSED",
1253 	"NOT_ACCESSED",
1254 };
1255 #endif
1256 
1257 void
1258 ohci_softintr(void *v)
1259 {
1260 	ohci_softc_t *sc = v;
1261 	ohci_soft_itd_t *sitd, *sidone, *sitdnext;
1262 	ohci_soft_td_t  *std,  *sdone,  *stdnext;
1263 	usbd_xfer_handle xfer;
1264 	struct ohci_pipe *opipe;
1265 	int len, cc, s;
1266 	int i, j, actlen, iframes, uedir;
1267 	ohci_physaddr_t done;
1268 
1269 	DPRINTFN(10,("ohci_softintr: enter\n"));
1270 
1271 	sc->sc_bus.intr_context++;
1272 
1273 	s = splhardusb();
1274 	done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS;
1275 	sc->sc_hcca->hcca_done_head = 0;
1276 	OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH);
1277 	sc->sc_eintrs |= OHCI_WDH;
1278 	OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH);
1279 	splx(s);
1280 
1281 	/* Reverse the done list. */
1282 	for (sdone = NULL, sidone = NULL; done != 0; ) {
1283 		std = ohci_hash_find_td(sc, done);
1284 		if (std != NULL) {
1285 			std->dnext = sdone;
1286 			done = O32TOH(std->td.td_nexttd);
1287 			sdone = std;
1288 			DPRINTFN(10,("add TD %p\n", std));
1289 			continue;
1290 		}
1291 		sitd = ohci_hash_find_itd(sc, done);
1292 		if (sitd != NULL) {
1293 			sitd->dnext = sidone;
1294 			done = O32TOH(sitd->itd.itd_nextitd);
1295 			sidone = sitd;
1296 			DPRINTFN(5,("add ITD %p\n", sitd));
1297 			continue;
1298 		}
1299 		panic("ohci_softintr: addr 0x%08lx not found", (u_long)done);
1300 	}
1301 
1302 	DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone));
1303 
1304 #ifdef OHCI_DEBUG
1305 	if (ohcidebug > 10) {
1306 		DPRINTF(("ohci_process_done: TD done:\n"));
1307 		ohci_dump_tds(sc, sdone);
1308 	}
1309 #endif
1310 
1311 	for (std = sdone; std; std = stdnext) {
1312 		xfer = std->xfer;
1313 		stdnext = std->dnext;
1314 		DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n",
1315 				std, xfer, xfer ? xfer->hcpriv : 0));
1316 		if (xfer == NULL) {
1317 			/*
1318 			 * xfer == NULL: There seems to be no xfer associated
1319 			 * with this TD. It is tailp that happened to end up on
1320 			 * the done queue.
1321 			 * Shouldn't happen, but some chips are broken(?).
1322 			 */
1323 			continue;
1324 		}
1325 		if (xfer->status == USBD_CANCELLED ||
1326 		    xfer->status == USBD_TIMEOUT) {
1327 			DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1328 				 xfer));
1329 			/* Handled by abort routine. */
1330 			continue;
1331 		}
1332 		usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
1333 
1334 		len = std->len;
1335 		if (std->td.td_cbp != 0)
1336 			len -= O32TOH(std->td.td_be) -
1337 			       O32TOH(std->td.td_cbp) + 1;
1338 		DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len,
1339 		    std->flags));
1340 		if (std->flags & OHCI_ADD_LEN)
1341 			xfer->actlen += len;
1342 
1343 		cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags));
1344 		if (cc == OHCI_CC_NO_ERROR) {
1345 			if (std->flags & OHCI_CALL_DONE) {
1346 				xfer->status = USBD_NORMAL_COMPLETION;
1347 				s = splusb();
1348 				usb_transfer_complete(xfer);
1349 				splx(s);
1350 			}
1351 			ohci_free_std(sc, std);
1352 		} else {
1353 			/*
1354 			 * Endpoint is halted.  First unlink all the TDs
1355 			 * belonging to the failed transfer, and then restart
1356 			 * the endpoint.
1357 			 */
1358 			ohci_soft_td_t *p, *n;
1359 			opipe = (struct ohci_pipe *)xfer->pipe;
1360 
1361 			DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n",
1362 			  OHCI_TD_GET_CC(O32TOH(std->td.td_flags)),
1363 			  ohci_cc_strs[OHCI_TD_GET_CC(O32TOH(std->td.td_flags))]));
1364 
1365 			/* remove TDs */
1366 			for (p = std; p->xfer == xfer; p = n) {
1367 				n = p->nexttd;
1368 				ohci_free_std(sc, p);
1369 			}
1370 
1371 			/* clear halt */
1372 			opipe->sed->ed.ed_headp = HTOO32(p->physaddr);
1373 			OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1374 
1375 			if (cc == OHCI_CC_STALL)
1376 				xfer->status = USBD_STALLED;
1377 			else
1378 				xfer->status = USBD_IOERROR;
1379 			s = splusb();
1380 			usb_transfer_complete(xfer);
1381 			splx(s);
1382 		}
1383 	}
1384 
1385 #ifdef OHCI_DEBUG
1386 	if (ohcidebug > 10) {
1387 		DPRINTF(("ohci_softintr: ITD done:\n"));
1388 		ohci_dump_itds(sc, sidone);
1389 	}
1390 #endif
1391 
1392 	for (sitd = sidone; sitd != NULL; sitd = sitdnext) {
1393 		xfer = sitd->xfer;
1394 		sitdnext = sitd->dnext;
1395 		DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n",
1396 			     sitd, xfer, xfer ? xfer->hcpriv : 0));
1397 		if (xfer == NULL)
1398 			continue;
1399 		if (xfer->status == USBD_CANCELLED ||
1400 		    xfer->status == USBD_TIMEOUT) {
1401 			DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1402 				 xfer));
1403 			/* Handled by abort routine. */
1404 			continue;
1405 		}
1406 #ifdef DIAGNOSTIC
1407 		if (sitd->isdone)
1408 			printf("ohci_softintr: sitd=%p is done\n", sitd);
1409 		sitd->isdone = 1;
1410 #endif
1411 		if (sitd->flags & OHCI_CALL_DONE) {
1412 			ohci_soft_itd_t *next;
1413 
1414 			opipe = (struct ohci_pipe *)xfer->pipe;
1415 			opipe->u.iso.inuse -= xfer->nframes;
1416 			uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc->
1417 			    bEndpointAddress);
1418 			xfer->status = USBD_NORMAL_COMPLETION;
1419 			actlen = 0;
1420 			for (i = 0, sitd = xfer->hcpriv;;
1421 			    sitd = next) {
1422 				next = sitd->nextitd;
1423 				if (OHCI_ITD_GET_CC(O32TOH(sitd->
1424 				    itd.itd_flags)) != OHCI_CC_NO_ERROR)
1425 					xfer->status = USBD_IOERROR;
1426 				/* For input, update frlengths with actual */
1427 				/* XXX anything necessary for output? */
1428 				if (uedir == UE_DIR_IN &&
1429 				    xfer->status == USBD_NORMAL_COMPLETION) {
1430 					iframes = OHCI_ITD_GET_FC(O32TOH(
1431 					    sitd->itd.itd_flags));
1432 					for (j = 0; j < iframes; i++, j++) {
1433 						len = O16TOH(sitd->
1434 						    itd.itd_offset[j]);
1435 						if ((OHCI_ITD_PSW_GET_CC(len) &
1436 						    OHCI_CC_NOT_ACCESSED_MASK)
1437 						    == OHCI_CC_NOT_ACCESSED)
1438 							len = 0;
1439 						else
1440 							len = OHCI_ITD_PSW_LENGTH(len);
1441 						xfer->frlengths[i] = len;
1442 						actlen += len;
1443 					}
1444 				}
1445 				if (sitd->flags & OHCI_CALL_DONE)
1446 					break;
1447 				ohci_free_sitd(sc, sitd);
1448 			}
1449 			ohci_free_sitd(sc, sitd);
1450 			if (uedir == UE_DIR_IN &&
1451 			    xfer->status == USBD_NORMAL_COMPLETION)
1452 				xfer->actlen = actlen;
1453 			xfer->hcpriv = NULL;
1454 
1455 			s = splusb();
1456 			usb_transfer_complete(xfer);
1457 			splx(s);
1458 		}
1459 	}
1460 
1461 #ifdef USB_USE_SOFTINTR
1462 	if (sc->sc_softwake) {
1463 		sc->sc_softwake = 0;
1464 		wakeup(&sc->sc_softwake);
1465 	}
1466 #endif /* USB_USE_SOFTINTR */
1467 
1468 	sc->sc_bus.intr_context--;
1469 	DPRINTFN(10,("ohci_softintr: done:\n"));
1470 }
1471 
1472 void
1473 ohci_device_ctrl_done(usbd_xfer_handle xfer)
1474 {
1475 	DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer));
1476 
1477 #ifdef DIAGNOSTIC
1478 	if (!(xfer->rqflags & URQ_REQUEST)) {
1479 		panic("ohci_device_ctrl_done: not a request");
1480 	}
1481 #endif
1482 }
1483 
1484 void
1485 ohci_device_intr_done(usbd_xfer_handle xfer)
1486 {
1487 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1488 	ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1489 	ohci_soft_ed_t *sed = opipe->sed;
1490 	ohci_soft_td_t *data, *tail;
1491 
1492 
1493 	DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n",
1494 		     xfer, xfer->actlen));
1495 
1496 	if (xfer->pipe->repeat) {
1497 		data = opipe->tail.td;
1498 		tail = ohci_alloc_std(sc); /* XXX should reuse TD */
1499 		if (tail == NULL) {
1500 			xfer->status = USBD_NOMEM;
1501 			return;
1502 		}
1503 		tail->xfer = NULL;
1504 
1505 		data->td.td_flags = HTOO32(
1506 			OHCI_TD_IN | OHCI_TD_NOCC |
1507 			OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
1508 		if (xfer->flags & USBD_SHORT_XFER_OK)
1509 			data->td.td_flags |= HTOO32(OHCI_TD_R);
1510 		data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0));
1511 		data->nexttd = tail;
1512 		data->td.td_nexttd = HTOO32(tail->physaddr);
1513 		data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) +
1514 			xfer->length - 1);
1515 		data->len = xfer->length;
1516 		data->xfer = xfer;
1517 		data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
1518 		xfer->hcpriv = data;
1519 		xfer->actlen = 0;
1520 
1521 		sed->ed.ed_tailp = HTOO32(tail->physaddr);
1522 		opipe->tail.td = tail;
1523 	}
1524 }
1525 
1526 void
1527 ohci_device_bulk_done(usbd_xfer_handle xfer)
1528 {
1529 	DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n",
1530 		     xfer, xfer->actlen));
1531 }
1532 
1533 void
1534 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer)
1535 {
1536 	usbd_pipe_handle pipe;
1537 	u_char *p;
1538 	int i, m;
1539 	int hstatus;
1540 
1541 	hstatus = OREAD4(sc, OHCI_RH_STATUS);
1542 	DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n",
1543 		 sc, xfer, hstatus));
1544 
1545 	if (xfer == NULL) {
1546 		/* Just ignore the change. */
1547 		return;
1548 	}
1549 
1550 	pipe = xfer->pipe;
1551 
1552 	p = KERNADDR(&xfer->dmabuf, 0);
1553 	m = min(sc->sc_noport, xfer->length * 8 - 1);
1554 	memset(p, 0, xfer->length);
1555 	for (i = 1; i <= m; i++) {
1556 		/* Pick out CHANGE bits from the status reg. */
1557 		if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
1558 			p[i/8] |= 1 << (i%8);
1559 	}
1560 	DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
1561 	xfer->actlen = xfer->length;
1562 	xfer->status = USBD_NORMAL_COMPLETION;
1563 
1564 	usb_transfer_complete(xfer);
1565 }
1566 
1567 void
1568 ohci_root_intr_done(usbd_xfer_handle xfer)
1569 {
1570 }
1571 
1572 void
1573 ohci_root_ctrl_done(usbd_xfer_handle xfer)
1574 {
1575 }
1576 
1577 /*
1578  * Wait here until controller claims to have an interrupt.
1579  * Then call ohci_intr and return.  Use timeout to avoid waiting
1580  * too long.
1581  */
1582 void
1583 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer)
1584 {
1585 	int timo;
1586 	u_int32_t intrs;
1587 
1588 	xfer->status = USBD_IN_PROGRESS;
1589 	for (timo = xfer->timeout; timo >= 0; timo--) {
1590 		usb_delay_ms(&sc->sc_bus, 1);
1591 		if (sc->sc_dying)
1592 			break;
1593 		intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
1594 		DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs));
1595 #ifdef OHCI_DEBUG
1596 		if (ohcidebug > 15)
1597 			ohci_dumpregs(sc);
1598 #endif
1599 		if (intrs) {
1600 			ohci_intr1(sc);
1601 			if (xfer->status != USBD_IN_PROGRESS)
1602 				return;
1603 		}
1604 	}
1605 
1606 	/* Timeout */
1607 	DPRINTF(("ohci_waitintr: timeout\n"));
1608 	xfer->status = USBD_TIMEOUT;
1609 	usb_transfer_complete(xfer);
1610 	/* XXX should free TD */
1611 }
1612 
1613 void
1614 ohci_poll(struct usbd_bus *bus)
1615 {
1616 	ohci_softc_t *sc = (ohci_softc_t *)bus;
1617 #ifdef OHCI_DEBUG
1618 	static int last;
1619 	int new;
1620 	new = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1621 	if (new != last) {
1622 		DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new));
1623 		last = new;
1624 	}
1625 #endif
1626 
1627 	if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs)
1628 		ohci_intr1(sc);
1629 }
1630 
1631 usbd_status
1632 ohci_device_request(usbd_xfer_handle xfer)
1633 {
1634 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1635 	usb_device_request_t *req = &xfer->request;
1636 	usbd_device_handle dev = opipe->pipe.device;
1637 	ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1638 	int addr = dev->address;
1639 	ohci_soft_td_t *setup, *stat, *next, *tail;
1640 	ohci_soft_ed_t *sed;
1641 	int isread;
1642 	int len;
1643 	usbd_status err;
1644 	int s;
1645 
1646 	isread = req->bmRequestType & UT_READ;
1647 	len = UGETW(req->wLength);
1648 
1649 	DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
1650 		    "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1651 		    req->bmRequestType, req->bRequest, UGETW(req->wValue),
1652 		    UGETW(req->wIndex), len, addr,
1653 		    opipe->pipe.endpoint->edesc->bEndpointAddress));
1654 
1655 	setup = opipe->tail.td;
1656 	stat = ohci_alloc_std(sc);
1657 	if (stat == NULL) {
1658 		err = USBD_NOMEM;
1659 		goto bad1;
1660 	}
1661 	tail = ohci_alloc_std(sc);
1662 	if (tail == NULL) {
1663 		err = USBD_NOMEM;
1664 		goto bad2;
1665 	}
1666 	tail->xfer = NULL;
1667 
1668 	sed = opipe->sed;
1669 	opipe->u.ctl.length = len;
1670 
1671 	/* Update device address and length since they may have changed
1672 	   during the setup of the control pipe in usbd_new_device(). */
1673 	/* XXX This only needs to be done once, but it's too early in open. */
1674 	/* XXXX Should not touch ED here! */
1675 	sed->ed.ed_flags = HTOO32(
1676 	 (O32TOH(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) |
1677 	 OHCI_ED_SET_FA(addr) |
1678 	 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)));
1679 
1680 	next = stat;
1681 
1682 	/* Set up data transaction */
1683 	if (len != 0) {
1684 		ohci_soft_td_t *std = stat;
1685 
1686 		err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
1687 			  std, &stat);
1688 		stat = stat->nexttd; /* point at free TD */
1689 		if (err)
1690 			goto bad3;
1691 		/* Start toggle at 1 and then use the carried toggle. */
1692 		std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK);
1693 		std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1);
1694 	}
1695 
1696 	memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req);
1697 
1698 	setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC |
1699 				     OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1700 	setup->td.td_cbp = HTOO32(DMAADDR(&opipe->u.ctl.reqdma, 0));
1701 	setup->nexttd = next;
1702 	setup->td.td_nexttd = HTOO32(next->physaddr);
1703 	setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof *req - 1);
1704 	setup->len = 0;
1705 	setup->xfer = xfer;
1706 	setup->flags = 0;
1707 	xfer->hcpriv = setup;
1708 
1709 	stat->td.td_flags = HTOO32(
1710 		(isread ? OHCI_TD_OUT : OHCI_TD_IN) |
1711 		OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1712 	stat->td.td_cbp = 0;
1713 	stat->nexttd = tail;
1714 	stat->td.td_nexttd = HTOO32(tail->physaddr);
1715 	stat->td.td_be = 0;
1716 	stat->flags = OHCI_CALL_DONE;
1717 	stat->len = 0;
1718 	stat->xfer = xfer;
1719 
1720 #ifdef OHCI_DEBUG
1721 	if (ohcidebug > 5) {
1722 		DPRINTF(("ohci_device_request:\n"));
1723 		ohci_dump_ed(sc, sed);
1724 		ohci_dump_tds(sc, setup);
1725 	}
1726 #endif
1727 
1728 	/* Insert ED in schedule */
1729 	s = splusb();
1730 	sed->ed.ed_tailp = HTOO32(tail->physaddr);
1731 	opipe->tail.td = tail;
1732 	OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1733 	if (xfer->timeout && !sc->sc_bus.use_polling) {
1734                 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
1735 			    ohci_timeout, xfer);
1736 	}
1737 	splx(s);
1738 
1739 #ifdef OHCI_DEBUG
1740 	if (ohcidebug > 20) {
1741 		delay(10000);
1742 		DPRINTF(("ohci_device_request: status=%x\n",
1743 			 OREAD4(sc, OHCI_COMMAND_STATUS)));
1744 		ohci_dumpregs(sc);
1745 		printf("ctrl head:\n");
1746 		ohci_dump_ed(sc, sc->sc_ctrl_head);
1747 		printf("sed:\n");
1748 		ohci_dump_ed(sc, sed);
1749 		ohci_dump_tds(sc, setup);
1750 	}
1751 #endif
1752 
1753 	return (USBD_NORMAL_COMPLETION);
1754 
1755  bad3:
1756 	ohci_free_std(sc, tail);
1757  bad2:
1758 	ohci_free_std(sc, stat);
1759  bad1:
1760 	return (err);
1761 }
1762 
1763 /*
1764  * Add an ED to the schedule.  Called at splusb().
1765  */
1766 void
1767 ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1768 {
1769 	DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head));
1770 
1771 	SPLUSBCHECK;
1772 	sed->next = head->next;
1773 	sed->ed.ed_nexted = head->ed.ed_nexted;
1774 	head->next = sed;
1775 	head->ed.ed_nexted = HTOO32(sed->physaddr);
1776 }
1777 
1778 /*
1779  * Remove an ED from the schedule.  Called at splusb().
1780  */
1781 void
1782 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1783 {
1784 	ohci_soft_ed_t *p;
1785 
1786 	SPLUSBCHECK;
1787 
1788 	/* XXX */
1789 	for (p = head; p != NULL && p->next != sed; p = p->next)
1790 		;
1791 	if (p == NULL)
1792 		panic("ohci_rem_ed: ED not found");
1793 	p->next = sed->next;
1794 	p->ed.ed_nexted = sed->ed.ed_nexted;
1795 }
1796 
1797 /*
1798  * When a transfer is completed the TD is added to the done queue by
1799  * the host controller.  This queue is the processed by software.
1800  * Unfortunately the queue contains the physical address of the TD
1801  * and we have no simple way to translate this back to a kernel address.
1802  * To make the translation possible (and fast) we use a hash table of
1803  * TDs currently in the schedule.  The physical address is used as the
1804  * hash value.
1805  */
1806 
1807 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1808 /* Called at splusb() */
1809 void
1810 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1811 {
1812 	int h = HASH(std->physaddr);
1813 
1814 	SPLUSBCHECK;
1815 
1816 	LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1817 }
1818 
1819 /* Called at splusb() */
1820 void
1821 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1822 {
1823 	SPLUSBCHECK;
1824 
1825 	LIST_REMOVE(std, hnext);
1826 }
1827 
1828 ohci_soft_td_t *
1829 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a)
1830 {
1831 	int h = HASH(a);
1832 	ohci_soft_td_t *std;
1833 
1834 	for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1835 	     std != NULL;
1836 	     std = LIST_NEXT(std, hnext))
1837 		if (std->physaddr == a)
1838 			return (std);
1839 	return (NULL);
1840 }
1841 
1842 /* Called at splusb() */
1843 void
1844 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1845 {
1846 	int h = HASH(sitd->physaddr);
1847 
1848 	SPLUSBCHECK;
1849 
1850 	DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n",
1851 		    sitd, (u_long)sitd->physaddr));
1852 
1853 	LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext);
1854 }
1855 
1856 /* Called at splusb() */
1857 void
1858 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1859 {
1860 	SPLUSBCHECK;
1861 
1862 	DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n",
1863 		    sitd, (u_long)sitd->physaddr));
1864 
1865 	LIST_REMOVE(sitd, hnext);
1866 }
1867 
1868 ohci_soft_itd_t *
1869 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a)
1870 {
1871 	int h = HASH(a);
1872 	ohci_soft_itd_t *sitd;
1873 
1874 	for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]);
1875 	     sitd != NULL;
1876 	     sitd = LIST_NEXT(sitd, hnext))
1877 		if (sitd->physaddr == a)
1878 			return (sitd);
1879 	return (NULL);
1880 }
1881 
1882 void
1883 ohci_timeout(void *addr)
1884 {
1885 	struct ohci_xfer *oxfer = addr;
1886 	struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe;
1887 	ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1888 
1889 	DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer));
1890 
1891 	if (sc->sc_dying) {
1892 		ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT);
1893 		return;
1894 	}
1895 
1896 	/* Execute the abort in a process context. */
1897 	usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr);
1898 	usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task,
1899 	    USB_TASKQ_HC);
1900 }
1901 
1902 void
1903 ohci_timeout_task(void *addr)
1904 {
1905 	usbd_xfer_handle xfer = addr;
1906 	int s;
1907 
1908 	DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer));
1909 
1910 	s = splusb();
1911 	ohci_abort_xfer(xfer, USBD_TIMEOUT);
1912 	splx(s);
1913 }
1914 
1915 #ifdef OHCI_DEBUG
1916 void
1917 ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std)
1918 {
1919 	for (; std; std = std->nexttd)
1920 		ohci_dump_td(sc, std);
1921 }
1922 
1923 void
1924 ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1925 {
1926 	char sbuf[128];
1927 
1928 	bitmask_snprintf((u_int32_t)O32TOH(std->td.td_flags),
1929 			 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
1930 			 sbuf, sizeof(sbuf));
1931 
1932 	printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx "
1933 	       "nexttd=0x%08lx be=0x%08lx\n",
1934 	       std, (u_long)std->physaddr, sbuf,
1935 	       OHCI_TD_GET_DI(O32TOH(std->td.td_flags)),
1936 	       OHCI_TD_GET_EC(O32TOH(std->td.td_flags)),
1937 	       OHCI_TD_GET_CC(O32TOH(std->td.td_flags)),
1938 	       (u_long)O32TOH(std->td.td_cbp),
1939 	       (u_long)O32TOH(std->td.td_nexttd),
1940 	       (u_long)O32TOH(std->td.td_be));
1941 }
1942 
1943 void
1944 ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1945 {
1946 	int i;
1947 
1948 	printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n"
1949 	       "bp0=0x%08lx next=0x%08lx be=0x%08lx\n",
1950 	       sitd, (u_long)sitd->physaddr,
1951 	       OHCI_ITD_GET_SF(O32TOH(sitd->itd.itd_flags)),
1952 	       OHCI_ITD_GET_DI(O32TOH(sitd->itd.itd_flags)),
1953 	       OHCI_ITD_GET_FC(O32TOH(sitd->itd.itd_flags)),
1954 	       OHCI_ITD_GET_CC(O32TOH(sitd->itd.itd_flags)),
1955 	       (u_long)O32TOH(sitd->itd.itd_bp0),
1956 	       (u_long)O32TOH(sitd->itd.itd_nextitd),
1957 	       (u_long)O32TOH(sitd->itd.itd_be));
1958 	for (i = 0; i < OHCI_ITD_NOFFSET; i++)
1959 		printf("offs[%d]=0x%04x ", i,
1960 		       (u_int)O16TOH(sitd->itd.itd_offset[i]));
1961 	printf("\n");
1962 }
1963 
1964 void
1965 ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1966 {
1967 	for (; sitd; sitd = sitd->nextitd)
1968 		ohci_dump_itd(sc, sitd);
1969 }
1970 
1971 void
1972 ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
1973 {
1974 	char sbuf[128], sbuf2[128];
1975 
1976 	bitmask_snprintf((u_int32_t)O32TOH(sed->ed.ed_flags),
1977 			 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO",
1978 			 sbuf, sizeof(sbuf));
1979 	bitmask_snprintf((u_int32_t)O32TOH(sed->ed.ed_headp),
1980 			 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2));
1981 
1982 	printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx "
1983 		 "headflags=%s headp=0x%08lx nexted=0x%08lx\n",
1984 		 sed, (u_long)sed->physaddr,
1985 		 OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)),
1986 		 OHCI_ED_GET_EN(O32TOH(sed->ed.ed_flags)),
1987 		 OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), sbuf,
1988 		 (u_long)O32TOH(sed->ed.ed_tailp), sbuf2,
1989 		 (u_long)O32TOH(sed->ed.ed_headp),
1990 		 (u_long)O32TOH(sed->ed.ed_nexted));
1991 }
1992 #endif
1993 
1994 usbd_status
1995 ohci_open(usbd_pipe_handle pipe)
1996 {
1997 	usbd_device_handle dev = pipe->device;
1998 	ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1999 	usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
2000 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2001 	u_int8_t addr = dev->address;
2002 	u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
2003 	ohci_soft_ed_t *sed;
2004 	ohci_soft_td_t *std;
2005 	ohci_soft_itd_t *sitd;
2006 	ohci_physaddr_t tdphys;
2007 	u_int32_t fmt;
2008 	usbd_status err;
2009 	int s;
2010 	int ival;
2011 
2012 	DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
2013 		     pipe, addr, ed->bEndpointAddress, sc->sc_addr));
2014 
2015 	if (sc->sc_dying)
2016 		return (USBD_IOERROR);
2017 
2018 	std = NULL;
2019 	sed = NULL;
2020 
2021 	if (addr == sc->sc_addr) {
2022 		switch (ed->bEndpointAddress) {
2023 		case USB_CONTROL_ENDPOINT:
2024 			pipe->methods = &ohci_root_ctrl_methods;
2025 			break;
2026 		case UE_DIR_IN | OHCI_INTR_ENDPT:
2027 			pipe->methods = &ohci_root_intr_methods;
2028 			break;
2029 		default:
2030 			return (USBD_INVAL);
2031 		}
2032 	} else {
2033 		sed = ohci_alloc_sed(sc);
2034 		if (sed == NULL)
2035 			goto bad0;
2036 		opipe->sed = sed;
2037 		if (xfertype == UE_ISOCHRONOUS) {
2038 			sitd = ohci_alloc_sitd(sc);
2039 			if (sitd == NULL)
2040 				goto bad1;
2041 			opipe->tail.itd = sitd;
2042 			tdphys = sitd->physaddr;
2043 			fmt = OHCI_ED_FORMAT_ISO;
2044 			if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
2045 				fmt |= OHCI_ED_DIR_IN;
2046 			else
2047 				fmt |= OHCI_ED_DIR_OUT;
2048 		} else {
2049 			std = ohci_alloc_std(sc);
2050 			if (std == NULL)
2051 				goto bad1;
2052 			opipe->tail.td = std;
2053 			tdphys = std->physaddr;
2054 			fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD;
2055 		}
2056 		sed->ed.ed_flags = HTOO32(
2057 			OHCI_ED_SET_FA(addr) |
2058 			OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) |
2059 			(dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) |
2060 			fmt |
2061 			OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
2062 		sed->ed.ed_headp = sed->ed.ed_tailp = HTOO32(tdphys);
2063 
2064 		switch (xfertype) {
2065 		case UE_CONTROL:
2066 			pipe->methods = &ohci_device_ctrl_methods;
2067 			err = usb_allocmem(&sc->sc_bus,
2068 				  sizeof(usb_device_request_t),
2069 				  0, &opipe->u.ctl.reqdma);
2070 			if (err)
2071 				goto bad;
2072 			s = splusb();
2073 			ohci_add_ed(sc, sed, sc->sc_ctrl_head);
2074 			splx(s);
2075 			break;
2076 		case UE_INTERRUPT:
2077 			pipe->methods = &ohci_device_intr_methods;
2078 			ival = pipe->interval;
2079 			if (ival == USBD_DEFAULT_INTERVAL)
2080 				ival = ed->bInterval;
2081 			return (ohci_device_setintr(sc, opipe, ival));
2082 		case UE_ISOCHRONOUS:
2083 			pipe->methods = &ohci_device_isoc_methods;
2084 			return (ohci_setup_isoc(pipe));
2085 		case UE_BULK:
2086 			pipe->methods = &ohci_device_bulk_methods;
2087 			s = splusb();
2088 			ohci_add_ed(sc, sed, sc->sc_bulk_head);
2089 			splx(s);
2090 			break;
2091 		}
2092 	}
2093 	return (USBD_NORMAL_COMPLETION);
2094 
2095  bad:
2096 	if (std != NULL)
2097 		ohci_free_std(sc, std);
2098  bad1:
2099 	if (sed != NULL)
2100 		ohci_free_sed(sc, sed);
2101  bad0:
2102 	return (USBD_NOMEM);
2103 
2104 }
2105 
2106 /*
2107  * Close a reqular pipe.
2108  * Assumes that there are no pending transactions.
2109  */
2110 void
2111 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head)
2112 {
2113 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2114 	ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2115 	ohci_soft_ed_t *sed = opipe->sed;
2116 	int s;
2117 
2118 	s = splusb();
2119 #ifdef DIAGNOSTIC
2120 	sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
2121 	if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2122 	    (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) {
2123 		ohci_soft_td_t *std;
2124 		std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp));
2125 		printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
2126 		       "tl=0x%x pipe=%p, std=%p\n", sed,
2127 		       (int)O32TOH(sed->ed.ed_headp),
2128 		       (int)O32TOH(sed->ed.ed_tailp),
2129 		       pipe, std);
2130 #ifdef USB_DEBUG
2131 		usbd_dump_pipe(&opipe->pipe);
2132 #endif
2133 #ifdef OHCI_DEBUG
2134 		ohci_dump_ed(sc, sed);
2135 		if (std)
2136 			ohci_dump_td(sc, std);
2137 #endif
2138 		usb_delay_ms(&sc->sc_bus, 2);
2139 		if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2140 		    (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK))
2141 			printf("ohci_close_pipe: pipe still not empty\n");
2142 	}
2143 #endif
2144 	ohci_rem_ed(sed, head);
2145 	/* Make sure the host controller is not touching this ED */
2146 	usb_delay_ms(&sc->sc_bus, 1);
2147 	splx(s);
2148 	ohci_free_sed(sc, opipe->sed);
2149 }
2150 
2151 /*
2152  * Abort a device request.
2153  * If this routine is called at splusb() it guarantees that the request
2154  * will be removed from the hardware scheduling and that the callback
2155  * for it will be called with USBD_CANCELLED status.
2156  * It's impossible to guarantee that the requested transfer will not
2157  * have happened since the hardware runs concurrently.
2158  * If the transaction has already happened we rely on the ordinary
2159  * interrupt processing to process it.
2160  */
2161 void
2162 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2163 {
2164 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2165 	ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
2166 	ohci_soft_ed_t *sed = opipe->sed;
2167 	ohci_soft_td_t *p, *n;
2168 	ohci_physaddr_t headp;
2169 	int s, hit;
2170 	int wake;
2171 
2172 	DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed));
2173 
2174 	if (sc->sc_dying) {
2175 		/* If we're dying, just do the software part. */
2176 		s = splusb();
2177 		xfer->status = status;	/* make software ignore it */
2178 		usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
2179 		usb_transfer_complete(xfer);
2180 		splx(s);
2181 		return;
2182 	}
2183 
2184 	if (xfer->device->bus->intr_context || !curproc)
2185 		panic("ohci_abort_xfer: not in process context");
2186 
2187 	/*
2188 	 * If an abort is already in progress then just wait for it to
2189 	 * complete and return.
2190 	 */
2191 	if (xfer->hcflags & UXFER_ABORTING) {
2192 		DPRINTFN(2, ("ohci_abort_xfer: already aborting\n"));
2193 #ifdef DIAGNOSTIC
2194 		if (status == USBD_TIMEOUT)
2195 			printf("0hci_abort_xfer: TIMEOUT while aborting\n");
2196 #endif
2197 		/* Override the status which might be USBD_TIMEOUT. */
2198 		xfer->status = status;
2199 		DPRINTFN(2, ("ohci_abort_xfer: waiting for abort to finish\n"));
2200 		xfer->hcflags |= UXFER_ABORTWAIT;
2201 		while (xfer->hcflags & UXFER_ABORTING)
2202 			tsleep(&xfer->hcflags, PZERO, "ohciaw", 0);
2203 		return;
2204 	}
2205 	xfer->hcflags |= UXFER_ABORTING;
2206 
2207 	/*
2208 	 * Step 1: Make interrupt routine and hardware ignore xfer.
2209 	 */
2210 	s = splusb();
2211 	xfer->status = status;	/* make software ignore it */
2212 	usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
2213 	splx(s);
2214 	DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed));
2215 	sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */
2216 
2217 	/*
2218 	 * Step 2: Wait until we know hardware has finished any possible
2219 	 * use of the xfer.  Also make sure the soft interrupt routine
2220 	 * has run.
2221 	 */
2222 	usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */
2223 	s = splusb();
2224 #ifdef USB_USE_SOFTINTR
2225 	sc->sc_softwake = 1;
2226 #endif /* USB_USE_SOFTINTR */
2227 	usb_schedsoftintr(&sc->sc_bus);
2228 #ifdef USB_USE_SOFTINTR
2229 	tsleep(&sc->sc_softwake, PZERO, "ohciab", 0);
2230 #endif /* USB_USE_SOFTINTR */
2231 	splx(s);
2232 
2233 	/*
2234 	 * Step 3: Remove any vestiges of the xfer from the hardware.
2235 	 * The complication here is that the hardware may have executed
2236 	 * beyond the xfer we're trying to abort.  So as we're scanning
2237 	 * the TDs of this xfer we check if the hardware points to
2238 	 * any of them.
2239 	 */
2240 	s = splusb();		/* XXX why? */
2241 	p = xfer->hcpriv;
2242 #ifdef DIAGNOSTIC
2243 	if (p == NULL) {
2244 		xfer->hcflags &= ~UXFER_ABORTING; /* XXX */
2245 		splx(s);
2246 		printf("ohci_abort_xfer: hcpriv is NULL\n");
2247 		return;
2248 	}
2249 #endif
2250 #ifdef OHCI_DEBUG
2251 	if (ohcidebug > 1) {
2252 		DPRINTF(("ohci_abort_xfer: sed=\n"));
2253 		ohci_dump_ed(sc, sed);
2254 		ohci_dump_tds(sc, p);
2255 	}
2256 #endif
2257 	headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK;
2258 	hit = 0;
2259 	for (; p->xfer == xfer; p = n) {
2260 		hit |= headp == p->physaddr;
2261 		n = p->nexttd;
2262 		ohci_free_std(sc, p);
2263 	}
2264 	/* Zap headp register if hardware pointed inside the xfer. */
2265 	if (hit) {
2266 		DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n",
2267 			    (int)p->physaddr, (int)O32TOH(sed->ed.ed_tailp)));
2268 		sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */
2269 	} else {
2270 		DPRINTFN(1,("ohci_abort_xfer: no hit\n"));
2271 	}
2272 
2273 	/*
2274 	 * Step 4: Turn on hardware again.
2275 	 */
2276 	sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */
2277 
2278 	/*
2279 	 * Step 5: Execute callback.
2280 	 */
2281 	wake = xfer->hcflags & UXFER_ABORTWAIT;
2282 	xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT);
2283 	usb_transfer_complete(xfer);
2284 	if (wake)
2285 		wakeup(&xfer->hcflags);
2286 
2287 	splx(s);
2288 }
2289 
2290 /*
2291  * Data structures and routines to emulate the root hub.
2292  */
2293 Static usb_device_descriptor_t ohci_devd = {
2294 	USB_DEVICE_DESCRIPTOR_SIZE,
2295 	UDESC_DEVICE,		/* type */
2296 	{0x00, 0x01},		/* USB version */
2297 	UDCLASS_HUB,		/* class */
2298 	UDSUBCLASS_HUB,		/* subclass */
2299 	UDPROTO_FSHUB,
2300 	64,			/* max packet */
2301 	{0},{0},{0x00,0x01},	/* device id */
2302 	1,2,0,			/* string indicies */
2303 	1			/* # of configurations */
2304 };
2305 
2306 Static const usb_config_descriptor_t ohci_confd = {
2307 	USB_CONFIG_DESCRIPTOR_SIZE,
2308 	UDESC_CONFIG,
2309 	{USB_CONFIG_DESCRIPTOR_SIZE +
2310 	 USB_INTERFACE_DESCRIPTOR_SIZE +
2311 	 USB_ENDPOINT_DESCRIPTOR_SIZE},
2312 	1,
2313 	1,
2314 	0,
2315 	UC_ATTR_MBO | UC_SELF_POWERED,
2316 	0			/* max power */
2317 };
2318 
2319 Static const usb_interface_descriptor_t ohci_ifcd = {
2320 	USB_INTERFACE_DESCRIPTOR_SIZE,
2321 	UDESC_INTERFACE,
2322 	0,
2323 	0,
2324 	1,
2325 	UICLASS_HUB,
2326 	UISUBCLASS_HUB,
2327 	UIPROTO_FSHUB,
2328 	0
2329 };
2330 
2331 Static const usb_endpoint_descriptor_t ohci_endpd = {
2332 	.bLength = USB_ENDPOINT_DESCRIPTOR_SIZE,
2333 	.bDescriptorType = UDESC_ENDPOINT,
2334 	.bEndpointAddress = UE_DIR_IN | OHCI_INTR_ENDPT,
2335 	.bmAttributes = UE_INTERRUPT,
2336 	.wMaxPacketSize = {8, 0},			/* max packet */
2337 	.bInterval = 255,
2338 };
2339 
2340 Static const usb_hub_descriptor_t ohci_hubd = {
2341 	.bDescLength = USB_HUB_DESCRIPTOR_SIZE,
2342 	.bDescriptorType = UDESC_HUB,
2343 };
2344 
2345 Static int
2346 ohci_str(usb_string_descriptor_t *p, int l, const char *s)
2347 {
2348 	int i;
2349 
2350 	if (l == 0)
2351 		return (0);
2352 	p->bLength = 2 * strlen(s) + 2;
2353 	if (l == 1)
2354 		return (1);
2355 	p->bDescriptorType = UDESC_STRING;
2356 	l -= 2;
2357 	for (i = 0; s[i] && l > 1; i++, l -= 2)
2358 		USETW2(p->bString[i], 0, s[i]);
2359 	return (2*i+2);
2360 }
2361 
2362 /*
2363  * Simulate a hardware hub by handling all the necessary requests.
2364  */
2365 Static usbd_status
2366 ohci_root_ctrl_transfer(usbd_xfer_handle xfer)
2367 {
2368 	usbd_status err;
2369 
2370 	/* Insert last in queue. */
2371 	err = usb_insert_transfer(xfer);
2372 	if (err)
2373 		return (err);
2374 
2375 	/* Pipe isn't running, start first */
2376 	return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2377 }
2378 
2379 Static usbd_status
2380 ohci_root_ctrl_start(usbd_xfer_handle xfer)
2381 {
2382 	ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2383 	usb_device_request_t *req;
2384 	void *buf = NULL;
2385 	int port, i;
2386 	int s, len, value, index, l, totlen = 0;
2387 	usb_port_status_t ps;
2388 	usb_hub_descriptor_t hubd;
2389 	usbd_status err;
2390 	u_int32_t v;
2391 
2392 	if (sc->sc_dying)
2393 		return (USBD_IOERROR);
2394 
2395 #ifdef DIAGNOSTIC
2396 	if (!(xfer->rqflags & URQ_REQUEST))
2397 		/* XXX panic */
2398 		return (USBD_INVAL);
2399 #endif
2400 	req = &xfer->request;
2401 
2402 	DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
2403 		    req->bmRequestType, req->bRequest));
2404 
2405 	len = UGETW(req->wLength);
2406 	value = UGETW(req->wValue);
2407 	index = UGETW(req->wIndex);
2408 
2409 	if (len != 0)
2410 		buf = KERNADDR(&xfer->dmabuf, 0);
2411 
2412 #define C(x,y) ((x) | ((y) << 8))
2413 	switch(C(req->bRequest, req->bmRequestType)) {
2414 	case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2415 	case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2416 	case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2417 		/*
2418 		 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2419 		 * for the integrated root hub.
2420 		 */
2421 		break;
2422 	case C(UR_GET_CONFIG, UT_READ_DEVICE):
2423 		if (len > 0) {
2424 			*(u_int8_t *)buf = sc->sc_conf;
2425 			totlen = 1;
2426 		}
2427 		break;
2428 	case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2429 		DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
2430 		if (len == 0)
2431 			break;
2432 		switch(value >> 8) {
2433 		case UDESC_DEVICE:
2434 			if ((value & 0xff) != 0) {
2435 				err = USBD_IOERROR;
2436 				goto ret;
2437 			}
2438 			totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
2439 			USETW(ohci_devd.idVendor, sc->sc_id_vendor);
2440 			memcpy(buf, &ohci_devd, l);
2441 			break;
2442 		case UDESC_CONFIG:
2443 			if ((value & 0xff) != 0) {
2444 				err = USBD_IOERROR;
2445 				goto ret;
2446 			}
2447 			totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
2448 			memcpy(buf, &ohci_confd, l);
2449 			buf = (char *)buf + l;
2450 			len -= l;
2451 			l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
2452 			totlen += l;
2453 			memcpy(buf, &ohci_ifcd, l);
2454 			buf = (char *)buf + l;
2455 			len -= l;
2456 			l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
2457 			totlen += l;
2458 			memcpy(buf, &ohci_endpd, l);
2459 			break;
2460 		case UDESC_STRING:
2461 			*(u_int8_t *)buf = 0;
2462 			totlen = 1;
2463 			switch (value & 0xff) {
2464 			case 0: /* Language table */
2465 				if (len > 0)
2466 					*(u_int8_t *)buf = 4;
2467 				if (len >=  4) {
2468 		USETW(((usb_string_descriptor_t *)buf)->bString[0], 0x0409);
2469 					totlen = 4;
2470 				}
2471 				break;
2472 			case 1: /* Vendor */
2473 				totlen = ohci_str(buf, len, sc->sc_vendor);
2474 				break;
2475 			case 2: /* Product */
2476 				totlen = ohci_str(buf, len, "OHCI root hub");
2477 				break;
2478 			}
2479 			break;
2480 		default:
2481 			err = USBD_IOERROR;
2482 			goto ret;
2483 		}
2484 		break;
2485 	case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2486 		if (len > 0) {
2487 			*(u_int8_t *)buf = 0;
2488 			totlen = 1;
2489 		}
2490 		break;
2491 	case C(UR_GET_STATUS, UT_READ_DEVICE):
2492 		if (len > 1) {
2493 			USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
2494 			totlen = 2;
2495 		}
2496 		break;
2497 	case C(UR_GET_STATUS, UT_READ_INTERFACE):
2498 	case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2499 		if (len > 1) {
2500 			USETW(((usb_status_t *)buf)->wStatus, 0);
2501 			totlen = 2;
2502 		}
2503 		break;
2504 	case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2505 		if (value >= USB_MAX_DEVICES) {
2506 			err = USBD_IOERROR;
2507 			goto ret;
2508 		}
2509 		sc->sc_addr = value;
2510 		break;
2511 	case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2512 		if (value != 0 && value != 1) {
2513 			err = USBD_IOERROR;
2514 			goto ret;
2515 		}
2516 		sc->sc_conf = value;
2517 		break;
2518 	case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2519 		break;
2520 	case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2521 	case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2522 	case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2523 		err = USBD_IOERROR;
2524 		goto ret;
2525 	case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2526 		break;
2527 	case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2528 		break;
2529 	/* Hub requests */
2530 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2531 		break;
2532 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2533 		DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
2534 			     "port=%d feature=%d\n",
2535 			     index, value));
2536 		if (index < 1 || index > sc->sc_noport) {
2537 			err = USBD_IOERROR;
2538 			goto ret;
2539 		}
2540 		port = OHCI_RH_PORT_STATUS(index);
2541 		switch(value) {
2542 		case UHF_PORT_ENABLE:
2543 			OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
2544 			break;
2545 		case UHF_PORT_SUSPEND:
2546 			OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
2547 			break;
2548 		case UHF_PORT_POWER:
2549 			/* Yes, writing to the LOW_SPEED bit clears power. */
2550 			OWRITE4(sc, port, UPS_LOW_SPEED);
2551 			break;
2552 		case UHF_C_PORT_CONNECTION:
2553 			OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
2554 			break;
2555 		case UHF_C_PORT_ENABLE:
2556 			OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
2557 			break;
2558 		case UHF_C_PORT_SUSPEND:
2559 			OWRITE4(sc, port, UPS_C_SUSPEND << 16);
2560 			break;
2561 		case UHF_C_PORT_OVER_CURRENT:
2562 			OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
2563 			break;
2564 		case UHF_C_PORT_RESET:
2565 			OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
2566 			break;
2567 		default:
2568 			err = USBD_IOERROR;
2569 			goto ret;
2570 		}
2571 		switch(value) {
2572 		case UHF_C_PORT_CONNECTION:
2573 		case UHF_C_PORT_ENABLE:
2574 		case UHF_C_PORT_SUSPEND:
2575 		case UHF_C_PORT_OVER_CURRENT:
2576 		case UHF_C_PORT_RESET:
2577 			/* Enable RHSC interrupt if condition is cleared. */
2578 			if ((OREAD4(sc, port) >> 16) == 0)
2579 				ohci_rhsc_enable(sc);
2580 			break;
2581 		default:
2582 			break;
2583 		}
2584 		break;
2585 	case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2586 		if (len == 0)
2587 			break;
2588 		if ((value & 0xff) != 0) {
2589 			err = USBD_IOERROR;
2590 			goto ret;
2591 		}
2592 		v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
2593 		hubd = ohci_hubd;
2594 		hubd.bNbrPorts = sc->sc_noport;
2595 		USETW(hubd.wHubCharacteristics,
2596 		      (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
2597 		       v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
2598 		      /* XXX overcurrent */
2599 		      );
2600 		hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
2601 		v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
2602 		for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
2603 			hubd.DeviceRemovable[i++] = (u_int8_t)v;
2604 		hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
2605 		l = min(len, hubd.bDescLength);
2606 		totlen = l;
2607 		memcpy(buf, &hubd, l);
2608 		break;
2609 	case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2610 		if (len != 4) {
2611 			err = USBD_IOERROR;
2612 			goto ret;
2613 		}
2614 		memset(buf, 0, len); /* ? XXX */
2615 		totlen = len;
2616 		break;
2617 	case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2618 		DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
2619 			    index));
2620 		if (index < 1 || index > sc->sc_noport) {
2621 			err = USBD_IOERROR;
2622 			goto ret;
2623 		}
2624 		if (len != 4) {
2625 			err = USBD_IOERROR;
2626 			goto ret;
2627 		}
2628 		v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2629 		DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
2630 			    v));
2631 		USETW(ps.wPortStatus, v);
2632 		USETW(ps.wPortChange, v >> 16);
2633 		l = min(len, sizeof ps);
2634 		memcpy(buf, &ps, l);
2635 		totlen = l;
2636 		break;
2637 	case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2638 		err = USBD_IOERROR;
2639 		goto ret;
2640 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2641 		break;
2642 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2643 		if (index < 1 || index > sc->sc_noport) {
2644 			err = USBD_IOERROR;
2645 			goto ret;
2646 		}
2647 		port = OHCI_RH_PORT_STATUS(index);
2648 		switch(value) {
2649 		case UHF_PORT_ENABLE:
2650 			OWRITE4(sc, port, UPS_PORT_ENABLED);
2651 			break;
2652 		case UHF_PORT_SUSPEND:
2653 			OWRITE4(sc, port, UPS_SUSPEND);
2654 			break;
2655 		case UHF_PORT_RESET:
2656 			DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
2657 				    index));
2658 			OWRITE4(sc, port, UPS_RESET);
2659 			for (i = 0; i < 5; i++) {
2660 				usb_delay_ms(&sc->sc_bus,
2661 					     USB_PORT_ROOT_RESET_DELAY);
2662 				if (sc->sc_dying) {
2663 					err = USBD_IOERROR;
2664 					goto ret;
2665 				}
2666 				if ((OREAD4(sc, port) & UPS_RESET) == 0)
2667 					break;
2668 			}
2669 			DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
2670 				    index, OREAD4(sc, port)));
2671 			break;
2672 		case UHF_PORT_POWER:
2673 			DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
2674 				    "%d\n", index));
2675 			OWRITE4(sc, port, UPS_PORT_POWER);
2676 			break;
2677 		default:
2678 			err = USBD_IOERROR;
2679 			goto ret;
2680 		}
2681 		break;
2682 	default:
2683 		err = USBD_IOERROR;
2684 		goto ret;
2685 	}
2686 	xfer->actlen = totlen;
2687 	err = USBD_NORMAL_COMPLETION;
2688  ret:
2689 	xfer->status = err;
2690 	s = splusb();
2691 	usb_transfer_complete(xfer);
2692 	splx(s);
2693 	return (USBD_IN_PROGRESS);
2694 }
2695 
2696 /* Abort a root control request. */
2697 Static void
2698 ohci_root_ctrl_abort(usbd_xfer_handle xfer)
2699 {
2700 	/* Nothing to do, all transfers are synchronous. */
2701 }
2702 
2703 /* Close the root pipe. */
2704 Static void
2705 ohci_root_ctrl_close(usbd_pipe_handle pipe)
2706 {
2707 	DPRINTF(("ohci_root_ctrl_close\n"));
2708 	/* Nothing to do. */
2709 }
2710 
2711 Static usbd_status
2712 ohci_root_intr_transfer(usbd_xfer_handle xfer)
2713 {
2714 	usbd_status err;
2715 
2716 	/* Insert last in queue. */
2717 	err = usb_insert_transfer(xfer);
2718 	if (err)
2719 		return (err);
2720 
2721 	/* Pipe isn't running, start first */
2722 	return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2723 }
2724 
2725 Static usbd_status
2726 ohci_root_intr_start(usbd_xfer_handle xfer)
2727 {
2728 	usbd_pipe_handle pipe = xfer->pipe;
2729 	ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2730 
2731 	if (sc->sc_dying)
2732 		return (USBD_IOERROR);
2733 
2734 	sc->sc_intrxfer = xfer;
2735 
2736 	return (USBD_IN_PROGRESS);
2737 }
2738 
2739 /* Abort a root interrupt request. */
2740 Static void
2741 ohci_root_intr_abort(usbd_xfer_handle xfer)
2742 {
2743 	int s;
2744 
2745 	if (xfer->pipe->intrxfer == xfer) {
2746 		DPRINTF(("ohci_root_intr_abort: remove\n"));
2747 		xfer->pipe->intrxfer = NULL;
2748 	}
2749 	xfer->status = USBD_CANCELLED;
2750 	s = splusb();
2751 	usb_transfer_complete(xfer);
2752 	splx(s);
2753 }
2754 
2755 /* Close the root pipe. */
2756 Static void
2757 ohci_root_intr_close(usbd_pipe_handle pipe)
2758 {
2759 	ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2760 
2761 	DPRINTF(("ohci_root_intr_close\n"));
2762 
2763 	sc->sc_intrxfer = NULL;
2764 }
2765 
2766 /************************/
2767 
2768 Static usbd_status
2769 ohci_device_ctrl_transfer(usbd_xfer_handle xfer)
2770 {
2771 	usbd_status err;
2772 
2773 	/* Insert last in queue. */
2774 	err = usb_insert_transfer(xfer);
2775 	if (err)
2776 		return (err);
2777 
2778 	/* Pipe isn't running, start first */
2779 	return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2780 }
2781 
2782 Static usbd_status
2783 ohci_device_ctrl_start(usbd_xfer_handle xfer)
2784 {
2785 	ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2786 	usbd_status err;
2787 
2788 	if (sc->sc_dying)
2789 		return (USBD_IOERROR);
2790 
2791 #ifdef DIAGNOSTIC
2792 	if (!(xfer->rqflags & URQ_REQUEST)) {
2793 		/* XXX panic */
2794 		printf("ohci_device_ctrl_transfer: not a request\n");
2795 		return (USBD_INVAL);
2796 	}
2797 #endif
2798 
2799 	err = ohci_device_request(xfer);
2800 	if (err)
2801 		return (err);
2802 
2803 	if (sc->sc_bus.use_polling)
2804 		ohci_waitintr(sc, xfer);
2805 	return (USBD_IN_PROGRESS);
2806 }
2807 
2808 /* Abort a device control request. */
2809 Static void
2810 ohci_device_ctrl_abort(usbd_xfer_handle xfer)
2811 {
2812 	DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer));
2813 	ohci_abort_xfer(xfer, USBD_CANCELLED);
2814 }
2815 
2816 /* Close a device control pipe. */
2817 Static void
2818 ohci_device_ctrl_close(usbd_pipe_handle pipe)
2819 {
2820 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2821 	ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2822 
2823 	DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe));
2824 	ohci_close_pipe(pipe, sc->sc_ctrl_head);
2825 	ohci_free_std(sc, opipe->tail.td);
2826 }
2827 
2828 /************************/
2829 
2830 Static void
2831 ohci_device_clear_toggle(usbd_pipe_handle pipe)
2832 {
2833 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2834 	ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2835 
2836 	opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY);
2837 }
2838 
2839 Static void
2840 ohci_noop(usbd_pipe_handle pipe)
2841 {
2842 }
2843 
2844 Static usbd_status
2845 ohci_device_bulk_transfer(usbd_xfer_handle xfer)
2846 {
2847 	usbd_status err;
2848 
2849 	/* Insert last in queue. */
2850 	err = usb_insert_transfer(xfer);
2851 	if (err)
2852 		return (err);
2853 
2854 	/* Pipe isn't running, start first */
2855 	return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2856 }
2857 
2858 Static usbd_status
2859 ohci_device_bulk_start(usbd_xfer_handle xfer)
2860 {
2861 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2862 	usbd_device_handle dev = opipe->pipe.device;
2863 	ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2864 	int addr = dev->address;
2865 	ohci_soft_td_t *data, *tail, *tdp;
2866 	ohci_soft_ed_t *sed;
2867 	int s, len, isread, endpt;
2868 	usbd_status err;
2869 
2870 	if (sc->sc_dying)
2871 		return (USBD_IOERROR);
2872 
2873 #ifdef DIAGNOSTIC
2874 	if (xfer->rqflags & URQ_REQUEST) {
2875 		/* XXX panic */
2876 		printf("ohci_device_bulk_start: a request\n");
2877 		return (USBD_INVAL);
2878 	}
2879 #endif
2880 
2881 	len = xfer->length;
2882 	endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
2883 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2884 	sed = opipe->sed;
2885 
2886 	DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d "
2887 		    "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags,
2888 		    endpt));
2889 
2890 	opipe->u.bulk.isread = isread;
2891 	opipe->u.bulk.length = len;
2892 
2893 	/* Update device address */
2894 	sed->ed.ed_flags = HTOO32(
2895 		(O32TOH(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) |
2896 		OHCI_ED_SET_FA(addr));
2897 
2898 	/* Allocate a chain of new TDs (including a new tail). */
2899 	data = opipe->tail.td;
2900 	err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
2901 		  data, &tail);
2902 	/* We want interrupt at the end of the transfer. */
2903 	tail->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK);
2904 	tail->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1));
2905 	tail->flags |= OHCI_CALL_DONE;
2906 	tail = tail->nexttd;	/* point at sentinel */
2907 	if (err)
2908 		return (err);
2909 
2910 	tail->xfer = NULL;
2911 	xfer->hcpriv = data;
2912 
2913 	DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
2914 		    "td_cbp=0x%08x td_be=0x%08x\n",
2915 		    (int)O32TOH(sed->ed.ed_flags),
2916 		    (int)O32TOH(data->td.td_flags),
2917 		    (int)O32TOH(data->td.td_cbp),
2918 		    (int)O32TOH(data->td.td_be)));
2919 
2920 #ifdef OHCI_DEBUG
2921 	if (ohcidebug > 5) {
2922 		ohci_dump_ed(sc, sed);
2923 		ohci_dump_tds(sc, data);
2924 	}
2925 #endif
2926 
2927 	/* Insert ED in schedule */
2928 	s = splusb();
2929 	for (tdp = data; tdp != tail; tdp = tdp->nexttd) {
2930 		tdp->xfer = xfer;
2931 	}
2932 	sed->ed.ed_tailp = HTOO32(tail->physaddr);
2933 	opipe->tail.td = tail;
2934 	sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
2935 	OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
2936 	if (xfer->timeout && !sc->sc_bus.use_polling) {
2937                 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
2938 			    ohci_timeout, xfer);
2939 	}
2940 
2941 #if 0
2942 /* This goes wrong if we are too slow. */
2943 	if (ohcidebug > 10) {
2944 		delay(10000);
2945 		DPRINTF(("ohci_device_intr_transfer: status=%x\n",
2946 			 OREAD4(sc, OHCI_COMMAND_STATUS)));
2947 		ohci_dump_ed(sc, sed);
2948 		ohci_dump_tds(sc, data);
2949 	}
2950 #endif
2951 
2952 	splx(s);
2953 
2954 	return (USBD_IN_PROGRESS);
2955 }
2956 
2957 Static void
2958 ohci_device_bulk_abort(usbd_xfer_handle xfer)
2959 {
2960 	DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer));
2961 	ohci_abort_xfer(xfer, USBD_CANCELLED);
2962 }
2963 
2964 /*
2965  * Close a device bulk pipe.
2966  */
2967 Static void
2968 ohci_device_bulk_close(usbd_pipe_handle pipe)
2969 {
2970 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2971 	ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2972 
2973 	DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe));
2974 	ohci_close_pipe(pipe, sc->sc_bulk_head);
2975 	ohci_free_std(sc, opipe->tail.td);
2976 }
2977 
2978 /************************/
2979 
2980 Static usbd_status
2981 ohci_device_intr_transfer(usbd_xfer_handle xfer)
2982 {
2983 	usbd_status err;
2984 
2985 	/* Insert last in queue. */
2986 	err = usb_insert_transfer(xfer);
2987 	if (err)
2988 		return (err);
2989 
2990 	/* Pipe isn't running, start first */
2991 	return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2992 }
2993 
2994 Static usbd_status
2995 ohci_device_intr_start(usbd_xfer_handle xfer)
2996 {
2997 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2998 	usbd_device_handle dev = opipe->pipe.device;
2999 	ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
3000 	ohci_soft_ed_t *sed = opipe->sed;
3001 	ohci_soft_td_t *data, *tail;
3002 	int s, len, isread, endpt;
3003 
3004 	if (sc->sc_dying)
3005 		return (USBD_IOERROR);
3006 
3007 	DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d "
3008 		     "flags=%d priv=%p\n",
3009 		     xfer, xfer->length, xfer->flags, xfer->priv));
3010 
3011 #ifdef DIAGNOSTIC
3012 	if (xfer->rqflags & URQ_REQUEST)
3013 		panic("ohci_device_intr_transfer: a request");
3014 #endif
3015 
3016 	len = xfer->length;
3017 	endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
3018 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
3019 
3020 	data = opipe->tail.td;
3021 	tail = ohci_alloc_std(sc);
3022 	if (tail == NULL)
3023 		return (USBD_NOMEM);
3024 	tail->xfer = NULL;
3025 
3026 	data->td.td_flags = HTOO32(
3027 		isread ? OHCI_TD_IN : OHCI_TD_OUT |
3028 		OHCI_TD_NOCC |
3029 		OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
3030 	if (xfer->flags & USBD_SHORT_XFER_OK)
3031 		data->td.td_flags |= HTOO32(OHCI_TD_R);
3032 	data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0));
3033 	data->nexttd = tail;
3034 	data->td.td_nexttd = HTOO32(tail->physaddr);
3035 	data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + len - 1);
3036 	data->len = len;
3037 	data->xfer = xfer;
3038 	data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
3039 	xfer->hcpriv = data;
3040 
3041 #ifdef OHCI_DEBUG
3042 	if (ohcidebug > 5) {
3043 		DPRINTF(("ohci_device_intr_transfer:\n"));
3044 		ohci_dump_ed(sc, sed);
3045 		ohci_dump_tds(sc, data);
3046 	}
3047 #endif
3048 
3049 	/* Insert ED in schedule */
3050 	s = splusb();
3051 	sed->ed.ed_tailp = HTOO32(tail->physaddr);
3052 	opipe->tail.td = tail;
3053 	sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
3054 
3055 #if 0
3056 /*
3057  * This goes horribly wrong, printing thousands of descriptors,
3058  * because false references are followed due to the fact that the
3059  * TD is gone.
3060  */
3061 	if (ohcidebug > 5) {
3062 		usb_delay_ms(&sc->sc_bus, 5);
3063 		DPRINTF(("ohci_device_intr_transfer: status=%x\n",
3064 			 OREAD4(sc, OHCI_COMMAND_STATUS)));
3065 		ohci_dump_ed(sc, sed);
3066 		ohci_dump_tds(sc, data);
3067 	}
3068 #endif
3069 	splx(s);
3070 
3071 	return (USBD_IN_PROGRESS);
3072 }
3073 
3074 /* Abort a device control request. */
3075 Static void
3076 ohci_device_intr_abort(usbd_xfer_handle xfer)
3077 {
3078 	if (xfer->pipe->intrxfer == xfer) {
3079 		DPRINTF(("ohci_device_intr_abort: remove\n"));
3080 		xfer->pipe->intrxfer = NULL;
3081 	}
3082 	ohci_abort_xfer(xfer, USBD_CANCELLED);
3083 }
3084 
3085 /* Close a device interrupt pipe. */
3086 Static void
3087 ohci_device_intr_close(usbd_pipe_handle pipe)
3088 {
3089 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3090 	ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3091 	int nslots = opipe->u.intr.nslots;
3092 	int pos = opipe->u.intr.pos;
3093 	int j;
3094 	ohci_soft_ed_t *p, *sed = opipe->sed;
3095 	int s;
3096 
3097 	DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
3098 		    pipe, nslots, pos));
3099 	s = splusb();
3100 	sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
3101 	if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
3102 	    (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK))
3103 		usb_delay_ms(&sc->sc_bus, 2);
3104 
3105 	for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
3106 		continue;
3107 #ifdef DIAGNOSTIC
3108 	if (p == NULL)
3109 		panic("ohci_device_intr_close: ED not found");
3110 #endif
3111 	p->next = sed->next;
3112 	p->ed.ed_nexted = sed->ed.ed_nexted;
3113 	splx(s);
3114 
3115 	for (j = 0; j < nslots; j++)
3116 		--sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
3117 
3118 	ohci_free_std(sc, opipe->tail.td);
3119 	ohci_free_sed(sc, opipe->sed);
3120 }
3121 
3122 Static usbd_status
3123 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival)
3124 {
3125 	int i, j, s, best;
3126 	u_int npoll, slow, shigh, nslots;
3127 	u_int bestbw, bw;
3128 	ohci_soft_ed_t *hsed, *sed = opipe->sed;
3129 
3130 	DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
3131 	if (ival == 0) {
3132 		printf("ohci_setintr: 0 interval\n");
3133 		return (USBD_INVAL);
3134 	}
3135 
3136 	npoll = OHCI_NO_INTRS;
3137 	while (npoll > ival)
3138 		npoll /= 2;
3139 	DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
3140 
3141 	/*
3142 	 * We now know which level in the tree the ED must go into.
3143 	 * Figure out which slot has most bandwidth left over.
3144 	 * Slots to examine:
3145 	 * npoll
3146 	 * 1	0
3147 	 * 2	1 2
3148 	 * 4	3 4 5 6
3149 	 * 8	7 8 9 10 11 12 13 14
3150 	 * N    (N-1) .. (N-1+N-1)
3151 	 */
3152 	slow = npoll-1;
3153 	shigh = slow + npoll;
3154 	nslots = OHCI_NO_INTRS / npoll;
3155 	for (best = i = slow, bestbw = ~0; i < shigh; i++) {
3156 		bw = 0;
3157 		for (j = 0; j < nslots; j++)
3158 			bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
3159 		if (bw < bestbw) {
3160 			best = i;
3161 			bestbw = bw;
3162 		}
3163 	}
3164 	DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
3165 		     best, slow, shigh, bestbw));
3166 
3167 	s = splusb();
3168 	hsed = sc->sc_eds[best];
3169 	sed->next = hsed->next;
3170 	sed->ed.ed_nexted = hsed->ed.ed_nexted;
3171 	hsed->next = sed;
3172 	hsed->ed.ed_nexted = HTOO32(sed->physaddr);
3173 	splx(s);
3174 
3175 	for (j = 0; j < nslots; j++)
3176 		++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
3177 	opipe->u.intr.nslots = nslots;
3178 	opipe->u.intr.pos = best;
3179 
3180 	DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
3181 	return (USBD_NORMAL_COMPLETION);
3182 }
3183 
3184 /***********************/
3185 
3186 usbd_status
3187 ohci_device_isoc_transfer(usbd_xfer_handle xfer)
3188 {
3189 	usbd_status err;
3190 
3191 	DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer));
3192 
3193 	/* Put it on our queue, */
3194 	err = usb_insert_transfer(xfer);
3195 
3196 	/* bail out on error, */
3197 	if (err && err != USBD_IN_PROGRESS)
3198 		return (err);
3199 
3200 	/* XXX should check inuse here */
3201 
3202 	/* insert into schedule, */
3203 	ohci_device_isoc_enter(xfer);
3204 
3205 	/* and start if the pipe wasn't running */
3206 	if (!err)
3207 		ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
3208 
3209 	return (err);
3210 }
3211 
3212 void
3213 ohci_device_isoc_enter(usbd_xfer_handle xfer)
3214 {
3215 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3216 	usbd_device_handle dev = opipe->pipe.device;
3217 	ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
3218 	ohci_soft_ed_t *sed = opipe->sed;
3219 	struct iso *iso = &opipe->u.iso;
3220 	ohci_soft_itd_t *sitd, *nsitd;
3221 	ohci_physaddr_t buf, offs, noffs, bp0;
3222 	int i, ncur, nframes;
3223 	int s;
3224 
3225 	DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p "
3226 		    "nframes=%d\n",
3227 		    iso->inuse, iso->next, xfer, xfer->nframes));
3228 
3229 	if (sc->sc_dying)
3230 		return;
3231 
3232 	if (iso->next == -1) {
3233 		/* Not in use yet, schedule it a few frames ahead. */
3234 		iso->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5;
3235 		DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n",
3236 			    iso->next));
3237 	}
3238 
3239 	sitd = opipe->tail.itd;
3240 	buf = DMAADDR(&xfer->dmabuf, 0);
3241 	bp0 = OHCI_PAGE(buf);
3242 	offs = OHCI_PAGE_OFFSET(buf);
3243 	nframes = xfer->nframes;
3244 	xfer->hcpriv = sitd;
3245 	for (i = ncur = 0; i < nframes; i++, ncur++) {
3246 		noffs = offs + xfer->frlengths[i];
3247 		if (ncur == OHCI_ITD_NOFFSET ||	/* all offsets used */
3248 		    OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */
3249 
3250 			/* Allocate next ITD */
3251 			nsitd = ohci_alloc_sitd(sc);
3252 			if (nsitd == NULL) {
3253 				/* XXX what now? */
3254 				printf("%s: isoc TD alloc failed\n",
3255 				       USBDEVNAME(sc->sc_bus.bdev));
3256 				return;
3257 			}
3258 
3259 			/* Fill current ITD */
3260 			sitd->itd.itd_flags = HTOO32(
3261 				OHCI_ITD_NOCC |
3262 				OHCI_ITD_SET_SF(iso->next) |
3263 				OHCI_ITD_SET_DI(6) | /* delay intr a little */
3264 				OHCI_ITD_SET_FC(ncur));
3265 			sitd->itd.itd_bp0 = HTOO32(bp0);
3266 			sitd->nextitd = nsitd;
3267 			sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr);
3268 			sitd->itd.itd_be = HTOO32(bp0 + offs - 1);
3269 			sitd->xfer = xfer;
3270 			sitd->flags = 0;
3271 
3272 			sitd = nsitd;
3273 			iso->next = iso->next + ncur;
3274 			bp0 = OHCI_PAGE(buf + offs);
3275 			ncur = 0;
3276 		}
3277 		sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs));
3278 		offs = noffs;
3279 	}
3280 	nsitd = ohci_alloc_sitd(sc);
3281 	if (nsitd == NULL) {
3282 		/* XXX what now? */
3283 		printf("%s: isoc TD alloc failed\n",
3284 		       USBDEVNAME(sc->sc_bus.bdev));
3285 		return;
3286 	}
3287 	/* Fixup last used ITD */
3288 	sitd->itd.itd_flags = HTOO32(
3289 		OHCI_ITD_NOCC |
3290 		OHCI_ITD_SET_SF(iso->next) |
3291 		OHCI_ITD_SET_DI(0) |
3292 		OHCI_ITD_SET_FC(ncur));
3293 	sitd->itd.itd_bp0 = HTOO32(bp0);
3294 	sitd->nextitd = nsitd;
3295 	sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr);
3296 	sitd->itd.itd_be = HTOO32(bp0 + offs - 1);
3297 	sitd->xfer = xfer;
3298 	sitd->flags = OHCI_CALL_DONE;
3299 
3300 	iso->next = iso->next + ncur;
3301 	iso->inuse += nframes;
3302 
3303 	xfer->actlen = offs;	/* XXX pretend we did it all */
3304 
3305 	xfer->status = USBD_IN_PROGRESS;
3306 
3307 #ifdef OHCI_DEBUG
3308 	if (ohcidebug > 5) {
3309 		DPRINTF(("ohci_device_isoc_enter: frame=%d\n",
3310 			 O32TOH(sc->sc_hcca->hcca_frame_number)));
3311 		ohci_dump_itds(sc, xfer->hcpriv);
3312 		ohci_dump_ed(sc, sed);
3313 	}
3314 #endif
3315 
3316 	s = splusb();
3317 	sed->ed.ed_tailp = HTOO32(nsitd->physaddr);
3318 	opipe->tail.itd = nsitd;
3319 	sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
3320 	splx(s);
3321 
3322 #ifdef OHCI_DEBUG
3323 	if (ohcidebug > 5) {
3324 		delay(150000);
3325 		DPRINTF(("ohci_device_isoc_enter: after frame=%d\n",
3326 			 O32TOH(sc->sc_hcca->hcca_frame_number)));
3327 		ohci_dump_itds(sc, xfer->hcpriv);
3328 		ohci_dump_ed(sc, sed);
3329 	}
3330 #endif
3331 }
3332 
3333 usbd_status
3334 ohci_device_isoc_start(usbd_xfer_handle xfer)
3335 {
3336 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3337 	ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3338 
3339 	DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer));
3340 
3341 	if (sc->sc_dying)
3342 		return (USBD_IOERROR);
3343 
3344 #ifdef DIAGNOSTIC
3345 	if (xfer->status != USBD_IN_PROGRESS)
3346 		printf("ohci_device_isoc_start: not in progress %p\n", xfer);
3347 #endif
3348 
3349 	/* XXX anything to do? */
3350 
3351 	return (USBD_IN_PROGRESS);
3352 }
3353 
3354 void
3355 ohci_device_isoc_abort(usbd_xfer_handle xfer)
3356 {
3357 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3358 	ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3359 	ohci_soft_ed_t *sed;
3360 	ohci_soft_itd_t *sitd;
3361 	int s;
3362 
3363 	s = splusb();
3364 
3365 	DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer));
3366 
3367 	/* Transfer is already done. */
3368 	if (xfer->status != USBD_NOT_STARTED &&
3369 	    xfer->status != USBD_IN_PROGRESS) {
3370 		splx(s);
3371 		printf("ohci_device_isoc_abort: early return\n");
3372 		return;
3373 	}
3374 
3375 	/* Give xfer the requested abort code. */
3376 	xfer->status = USBD_CANCELLED;
3377 
3378 	sed = opipe->sed;
3379 	sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */
3380 
3381 	sitd = xfer->hcpriv;
3382 #ifdef DIAGNOSTIC
3383 	if (sitd == NULL) {
3384 		splx(s);
3385 		printf("ohci_device_isoc_abort: hcpriv==0\n");
3386 		return;
3387 	}
3388 #endif
3389 	for (; sitd->xfer == xfer; sitd = sitd->nextitd) {
3390 #ifdef DIAGNOSTIC
3391 		DPRINTFN(1,("abort sets done sitd=%p\n", sitd));
3392 		sitd->isdone = 1;
3393 #endif
3394 	}
3395 
3396 	splx(s);
3397 
3398 	usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET);
3399 
3400 	s = splusb();
3401 
3402 	/* Run callback. */
3403 	usb_transfer_complete(xfer);
3404 
3405 	sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */
3406 	sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */
3407 
3408 	splx(s);
3409 }
3410 
3411 void
3412 ohci_device_isoc_done(usbd_xfer_handle xfer)
3413 {
3414 	DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer));
3415 }
3416 
3417 usbd_status
3418 ohci_setup_isoc(usbd_pipe_handle pipe)
3419 {
3420 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3421 	ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3422 	struct iso *iso = &opipe->u.iso;
3423 	int s;
3424 
3425 	iso->next = -1;
3426 	iso->inuse = 0;
3427 
3428 	s = splusb();
3429 	ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head);
3430 	splx(s);
3431 
3432 	return (USBD_NORMAL_COMPLETION);
3433 }
3434 
3435 void
3436 ohci_device_isoc_close(usbd_pipe_handle pipe)
3437 {
3438 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3439 	ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3440 
3441 	DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe));
3442 	ohci_close_pipe(pipe, sc->sc_isoc_head);
3443 #ifdef DIAGNOSTIC
3444 	opipe->tail.itd->isdone = 1;
3445 #endif
3446 	ohci_free_sitd(sc, opipe->tail.itd);
3447 }
3448