1 /* $NetBSD: ohci.c,v 1.191 2008/03/29 02:20:41 nakayama Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 2004, 2005 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart@augustsson.net) at 10 * Carlstedt Research & Technology. 11 * This code is derived from software contributed to The NetBSD Foundation 12 * by Charles M. Hannum. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 3. All advertising materials mentioning features or use of this software 23 * must display the following acknowledgement: 24 * This product includes software developed by the NetBSD 25 * Foundation, Inc. and its contributors. 26 * 4. Neither the name of The NetBSD Foundation nor the names of its 27 * contributors may be used to endorse or promote products derived 28 * from this software without specific prior written permission. 29 * 30 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 31 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 32 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 33 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 34 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 35 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 36 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 37 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 38 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 39 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 40 * POSSIBILITY OF SUCH DAMAGE. 41 */ 42 43 /* 44 * USB Open Host Controller driver. 45 * 46 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 47 * USB spec: http://www.usb.org/developers/docs/usbspec.zip 48 */ 49 50 #include <sys/cdefs.h> 51 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.191 2008/03/29 02:20:41 nakayama Exp $"); 52 53 #include <sys/param.h> 54 #include <sys/systm.h> 55 #include <sys/malloc.h> 56 #if defined(__NetBSD__) || defined(__OpenBSD__) 57 #include <sys/kernel.h> 58 #include <sys/device.h> 59 #include <sys/select.h> 60 #include <uvm/uvm_extern.h> 61 #elif defined(__FreeBSD__) 62 #include <sys/module.h> 63 #include <sys/bus.h> 64 #include <machine/bus_pio.h> 65 #include <machine/bus_memio.h> 66 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 67 #include <sys/cpu.h> 68 #endif 69 #endif 70 #include <sys/proc.h> 71 #include <sys/queue.h> 72 73 #include <sys/bus.h> 74 #include <machine/endian.h> 75 76 #include <dev/usb/usb.h> 77 #include <dev/usb/usbdi.h> 78 #include <dev/usb/usbdivar.h> 79 #include <dev/usb/usb_mem.h> 80 #include <dev/usb/usb_quirks.h> 81 82 #include <dev/usb/ohcireg.h> 83 #include <dev/usb/ohcivar.h> 84 #include <dev/usb/usbroothub_subr.h> 85 86 #if defined(__FreeBSD__) 87 #include <machine/clock.h> 88 89 #define delay(d) DELAY(d) 90 #endif 91 92 #if defined(__OpenBSD__) 93 struct cfdriver ohci_cd = { 94 NULL, "ohci", DV_DULL 95 }; 96 #endif 97 98 #ifdef OHCI_DEBUG 99 #define DPRINTF(x) if (ohcidebug) logprintf x 100 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 101 int ohcidebug = 0; 102 #ifndef __NetBSD__ 103 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 104 #endif 105 #else 106 #define DPRINTF(x) 107 #define DPRINTFN(n,x) 108 #endif 109 110 #if BYTE_ORDER == BIG_ENDIAN 111 #define SWAP_ENDIAN OHCI_LITTLE_ENDIAN 112 #else 113 #define SWAP_ENDIAN OHCI_BIG_ENDIAN 114 #endif 115 116 #define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val) 117 #define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val) 118 #define HTOO16(val) O16TOH(val) 119 #define HTOO32(val) O32TOH(val) 120 121 struct ohci_pipe; 122 123 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 124 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 125 126 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 127 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 128 129 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 130 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 131 132 #if 0 133 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 134 ohci_soft_td_t *); 135 #endif 136 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 137 ohci_softc_t *, int, int, usbd_xfer_handle, 138 ohci_soft_td_t *, ohci_soft_td_t **); 139 140 Static usbd_status ohci_open(usbd_pipe_handle); 141 Static void ohci_poll(struct usbd_bus *); 142 Static void ohci_softintr(void *); 143 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 144 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 145 146 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 147 Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *, 148 ohci_soft_ed_t *); 149 150 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 151 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 152 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 153 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 154 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 155 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 156 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 157 158 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 159 Static void ohci_device_isoc_enter(usbd_xfer_handle); 160 161 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 162 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 163 164 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 165 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 166 167 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 168 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 169 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 170 Static void ohci_root_ctrl_close(usbd_pipe_handle); 171 Static void ohci_root_ctrl_done(usbd_xfer_handle); 172 173 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 174 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 175 Static void ohci_root_intr_abort(usbd_xfer_handle); 176 Static void ohci_root_intr_close(usbd_pipe_handle); 177 Static void ohci_root_intr_done(usbd_xfer_handle); 178 179 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 180 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 181 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 182 Static void ohci_device_ctrl_close(usbd_pipe_handle); 183 Static void ohci_device_ctrl_done(usbd_xfer_handle); 184 185 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 186 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 187 Static void ohci_device_bulk_abort(usbd_xfer_handle); 188 Static void ohci_device_bulk_close(usbd_pipe_handle); 189 Static void ohci_device_bulk_done(usbd_xfer_handle); 190 191 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 192 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 193 Static void ohci_device_intr_abort(usbd_xfer_handle); 194 Static void ohci_device_intr_close(usbd_pipe_handle); 195 Static void ohci_device_intr_done(usbd_xfer_handle); 196 197 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 198 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 199 Static void ohci_device_isoc_abort(usbd_xfer_handle); 200 Static void ohci_device_isoc_close(usbd_pipe_handle); 201 Static void ohci_device_isoc_done(usbd_xfer_handle); 202 203 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 204 struct ohci_pipe *pipe, int ival); 205 206 Static void ohci_timeout(void *); 207 Static void ohci_timeout_task(void *); 208 Static void ohci_rhsc_enable(void *); 209 210 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 211 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 212 213 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 214 Static void ohci_noop(usbd_pipe_handle pipe); 215 216 #ifdef OHCI_DEBUG 217 Static void ohci_dumpregs(ohci_softc_t *); 218 Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *); 219 Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *); 220 Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *); 221 Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *); 222 Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *); 223 #endif 224 225 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 226 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 227 #define OWRITE1(sc, r, x) \ 228 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 229 #define OWRITE2(sc, r, x) \ 230 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 231 #define OWRITE4(sc, r, x) \ 232 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 233 static __inline uint8_t 234 OREAD1(ohci_softc_t *sc, bus_size_t r) 235 { 236 237 OBARR(sc); 238 return bus_space_read_1(sc->iot, sc->ioh, r); 239 } 240 241 static __inline uint16_t 242 OREAD2(ohci_softc_t *sc, bus_size_t r) 243 { 244 245 OBARR(sc); 246 return bus_space_read_2(sc->iot, sc->ioh, r); 247 } 248 249 static __inline uint32_t 250 OREAD4(ohci_softc_t *sc, bus_size_t r) 251 { 252 253 OBARR(sc); 254 return bus_space_read_4(sc->iot, sc->ioh, r); 255 } 256 257 /* Reverse the bits in a value 0 .. 31 */ 258 Static u_int8_t revbits[OHCI_NO_INTRS] = 259 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 260 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 261 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 262 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 263 264 struct ohci_pipe { 265 struct usbd_pipe pipe; 266 ohci_soft_ed_t *sed; 267 union { 268 ohci_soft_td_t *td; 269 ohci_soft_itd_t *itd; 270 } tail; 271 /* Info needed for different pipe kinds. */ 272 union { 273 /* Control pipe */ 274 struct { 275 usb_dma_t reqdma; 276 u_int length; 277 ohci_soft_td_t *setup, *data, *stat; 278 } ctl; 279 /* Interrupt pipe */ 280 struct { 281 int nslots; 282 int pos; 283 } intr; 284 /* Bulk pipe */ 285 struct { 286 u_int length; 287 int isread; 288 } bulk; 289 /* Iso pipe */ 290 struct iso { 291 int next, inuse; 292 } iso; 293 } u; 294 }; 295 296 #define OHCI_INTR_ENDPT 1 297 298 Static const struct usbd_bus_methods ohci_bus_methods = { 299 ohci_open, 300 ohci_softintr, 301 ohci_poll, 302 ohci_allocm, 303 ohci_freem, 304 ohci_allocx, 305 ohci_freex, 306 }; 307 308 Static const struct usbd_pipe_methods ohci_root_ctrl_methods = { 309 ohci_root_ctrl_transfer, 310 ohci_root_ctrl_start, 311 ohci_root_ctrl_abort, 312 ohci_root_ctrl_close, 313 ohci_noop, 314 ohci_root_ctrl_done, 315 }; 316 317 Static const struct usbd_pipe_methods ohci_root_intr_methods = { 318 ohci_root_intr_transfer, 319 ohci_root_intr_start, 320 ohci_root_intr_abort, 321 ohci_root_intr_close, 322 ohci_noop, 323 ohci_root_intr_done, 324 }; 325 326 Static const struct usbd_pipe_methods ohci_device_ctrl_methods = { 327 ohci_device_ctrl_transfer, 328 ohci_device_ctrl_start, 329 ohci_device_ctrl_abort, 330 ohci_device_ctrl_close, 331 ohci_noop, 332 ohci_device_ctrl_done, 333 }; 334 335 Static const struct usbd_pipe_methods ohci_device_intr_methods = { 336 ohci_device_intr_transfer, 337 ohci_device_intr_start, 338 ohci_device_intr_abort, 339 ohci_device_intr_close, 340 ohci_device_clear_toggle, 341 ohci_device_intr_done, 342 }; 343 344 Static const struct usbd_pipe_methods ohci_device_bulk_methods = { 345 ohci_device_bulk_transfer, 346 ohci_device_bulk_start, 347 ohci_device_bulk_abort, 348 ohci_device_bulk_close, 349 ohci_device_clear_toggle, 350 ohci_device_bulk_done, 351 }; 352 353 Static const struct usbd_pipe_methods ohci_device_isoc_methods = { 354 ohci_device_isoc_transfer, 355 ohci_device_isoc_start, 356 ohci_device_isoc_abort, 357 ohci_device_isoc_close, 358 ohci_noop, 359 ohci_device_isoc_done, 360 }; 361 362 #if defined(__NetBSD__) || defined(__OpenBSD__) 363 int 364 ohci_activate(device_t self, enum devact act) 365 { 366 struct ohci_softc *sc = device_private(self); 367 int rv = 0; 368 369 switch (act) { 370 case DVACT_ACTIVATE: 371 return (EOPNOTSUPP); 372 373 case DVACT_DEACTIVATE: 374 sc->sc_dying = 1; 375 if (sc->sc_child != NULL) 376 rv = config_deactivate(sc->sc_child); 377 break; 378 } 379 return (rv); 380 } 381 382 void 383 ohci_childdet(device_t self, device_t child) 384 { 385 struct ohci_softc *sc = device_private(self); 386 387 KASSERT(sc->sc_child == child); 388 sc->sc_child = NULL; 389 } 390 391 int 392 ohci_detach(struct ohci_softc *sc, int flags) 393 { 394 int rv = 0; 395 396 if (sc->sc_child != NULL) 397 rv = config_detach(sc->sc_child, flags); 398 399 if (rv != 0) 400 return (rv); 401 402 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 403 404 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 405 406 /* free data structures XXX */ 407 408 return (rv); 409 } 410 #endif 411 412 ohci_soft_ed_t * 413 ohci_alloc_sed(ohci_softc_t *sc) 414 { 415 ohci_soft_ed_t *sed; 416 usbd_status err; 417 int i, offs; 418 usb_dma_t dma; 419 420 if (sc->sc_freeeds == NULL) { 421 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 422 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 423 OHCI_ED_ALIGN, &dma); 424 if (err) 425 return (0); 426 for(i = 0; i < OHCI_SED_CHUNK; i++) { 427 offs = i * OHCI_SED_SIZE; 428 sed = KERNADDR(&dma, offs); 429 sed->physaddr = DMAADDR(&dma, offs); 430 sed->next = sc->sc_freeeds; 431 sc->sc_freeeds = sed; 432 } 433 } 434 sed = sc->sc_freeeds; 435 sc->sc_freeeds = sed->next; 436 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 437 sed->next = 0; 438 return (sed); 439 } 440 441 void 442 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 443 { 444 sed->next = sc->sc_freeeds; 445 sc->sc_freeeds = sed; 446 } 447 448 ohci_soft_td_t * 449 ohci_alloc_std(ohci_softc_t *sc) 450 { 451 ohci_soft_td_t *std; 452 usbd_status err; 453 int i, offs; 454 usb_dma_t dma; 455 int s; 456 457 if (sc->sc_freetds == NULL) { 458 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 459 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 460 OHCI_TD_ALIGN, &dma); 461 if (err) 462 return (NULL); 463 s = splusb(); 464 for(i = 0; i < OHCI_STD_CHUNK; i++) { 465 offs = i * OHCI_STD_SIZE; 466 std = KERNADDR(&dma, offs); 467 std->physaddr = DMAADDR(&dma, offs); 468 std->nexttd = sc->sc_freetds; 469 sc->sc_freetds = std; 470 } 471 splx(s); 472 } 473 474 s = splusb(); 475 std = sc->sc_freetds; 476 sc->sc_freetds = std->nexttd; 477 memset(&std->td, 0, sizeof(ohci_td_t)); 478 std->nexttd = NULL; 479 std->xfer = NULL; 480 ohci_hash_add_td(sc, std); 481 splx(s); 482 483 return (std); 484 } 485 486 void 487 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 488 { 489 int s; 490 491 s = splusb(); 492 ohci_hash_rem_td(sc, std); 493 std->nexttd = sc->sc_freetds; 494 sc->sc_freetds = std; 495 splx(s); 496 } 497 498 usbd_status 499 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 500 int alen, int rd, usbd_xfer_handle xfer, 501 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 502 { 503 ohci_soft_td_t *next, *cur; 504 ohci_physaddr_t dataphys, dataphysend; 505 u_int32_t tdflags; 506 int len, curlen; 507 usb_dma_t *dma = &xfer->dmabuf; 508 u_int16_t flags = xfer->flags; 509 510 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 511 512 len = alen; 513 cur = sp; 514 dataphys = DMAADDR(dma, 0); 515 dataphysend = OHCI_PAGE(dataphys + len - 1); 516 tdflags = HTOO32( 517 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 518 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 519 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 520 521 for (;;) { 522 next = ohci_alloc_std(sc); 523 if (next == NULL) 524 goto nomem; 525 526 /* The OHCI hardware can handle at most one page crossing. */ 527 if (OHCI_PAGE(dataphys) == dataphysend || 528 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 529 /* we can handle it in this TD */ 530 curlen = len; 531 } else { 532 /* must use multiple TDs, fill as much as possible. */ 533 curlen = 2 * OHCI_PAGE_SIZE - 534 (dataphys & (OHCI_PAGE_SIZE-1)); 535 /* the length must be a multiple of the max size */ 536 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 537 #ifdef DIAGNOSTIC 538 if (curlen == 0) 539 panic("ohci_alloc_std: curlen == 0"); 540 #endif 541 } 542 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 543 "dataphysend=0x%08x len=%d curlen=%d\n", 544 dataphys, dataphysend, 545 len, curlen)); 546 len -= curlen; 547 548 cur->td.td_flags = tdflags; 549 cur->td.td_cbp = HTOO32(dataphys); 550 cur->nexttd = next; 551 cur->td.td_nexttd = HTOO32(next->physaddr); 552 cur->td.td_be = HTOO32(dataphys + curlen - 1); 553 cur->len = curlen; 554 cur->flags = OHCI_ADD_LEN; 555 cur->xfer = xfer; 556 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 557 dataphys, dataphys + curlen - 1)); 558 if (len == 0) 559 break; 560 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 561 dataphys += curlen; 562 cur = next; 563 } 564 if (!rd && (flags & USBD_FORCE_SHORT_XFER) && 565 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 566 /* Force a 0 length transfer at the end. */ 567 568 cur = next; 569 next = ohci_alloc_std(sc); 570 if (next == NULL) 571 goto nomem; 572 573 cur->td.td_flags = tdflags; 574 cur->td.td_cbp = 0; /* indicate 0 length packet */ 575 cur->nexttd = next; 576 cur->td.td_nexttd = HTOO32(next->physaddr); 577 cur->td.td_be = ~0; 578 cur->len = 0; 579 cur->flags = 0; 580 cur->xfer = xfer; 581 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 582 } 583 *ep = cur; 584 585 return (USBD_NORMAL_COMPLETION); 586 587 nomem: 588 /* XXX free chain */ 589 return (USBD_NOMEM); 590 } 591 592 #if 0 593 Static void 594 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 595 ohci_soft_td_t *stdend) 596 { 597 ohci_soft_td_t *p; 598 599 for (; std != stdend; std = p) { 600 p = std->nexttd; 601 ohci_free_std(sc, std); 602 } 603 } 604 #endif 605 606 ohci_soft_itd_t * 607 ohci_alloc_sitd(ohci_softc_t *sc) 608 { 609 ohci_soft_itd_t *sitd; 610 usbd_status err; 611 int i, s, offs; 612 usb_dma_t dma; 613 614 if (sc->sc_freeitds == NULL) { 615 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 616 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 617 OHCI_ITD_ALIGN, &dma); 618 if (err) 619 return (NULL); 620 s = splusb(); 621 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 622 offs = i * OHCI_SITD_SIZE; 623 sitd = KERNADDR(&dma, offs); 624 sitd->physaddr = DMAADDR(&dma, offs); 625 sitd->nextitd = sc->sc_freeitds; 626 sc->sc_freeitds = sitd; 627 } 628 splx(s); 629 } 630 631 s = splusb(); 632 sitd = sc->sc_freeitds; 633 sc->sc_freeitds = sitd->nextitd; 634 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 635 sitd->nextitd = NULL; 636 sitd->xfer = NULL; 637 ohci_hash_add_itd(sc, sitd); 638 splx(s); 639 640 #ifdef DIAGNOSTIC 641 sitd->isdone = 0; 642 #endif 643 644 return (sitd); 645 } 646 647 void 648 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 649 { 650 int s; 651 652 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 653 654 #ifdef DIAGNOSTIC 655 if (!sitd->isdone) { 656 panic("ohci_free_sitd: sitd=%p not done", sitd); 657 return; 658 } 659 /* Warn double free */ 660 sitd->isdone = 0; 661 #endif 662 663 s = splusb(); 664 ohci_hash_rem_itd(sc, sitd); 665 sitd->nextitd = sc->sc_freeitds; 666 sc->sc_freeitds = sitd; 667 splx(s); 668 } 669 670 usbd_status 671 ohci_init(ohci_softc_t *sc) 672 { 673 ohci_soft_ed_t *sed, *psed; 674 usbd_status err; 675 int i; 676 u_int32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca, descb; 677 678 DPRINTF(("ohci_init: start\n")); 679 #if defined(__OpenBSD__) 680 printf(","); 681 #else 682 printf("%s:", device_xname(sc->sc_dev)); 683 #endif 684 rev = OREAD4(sc, OHCI_REVISION); 685 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 686 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 687 688 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 689 printf("%s: unsupported OHCI revision\n", 690 device_xname(sc->sc_dev)); 691 sc->sc_bus.usbrev = USBREV_UNKNOWN; 692 return (USBD_INVAL); 693 } 694 sc->sc_bus.usbrev = USBREV_1_0; 695 696 for (i = 0; i < OHCI_HASH_SIZE; i++) 697 LIST_INIT(&sc->sc_hash_tds[i]); 698 for (i = 0; i < OHCI_HASH_SIZE; i++) 699 LIST_INIT(&sc->sc_hash_itds[i]); 700 701 SIMPLEQ_INIT(&sc->sc_free_xfers); 702 703 #ifdef __NetBSD__ 704 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 705 USB_MEM_RESERVE); 706 #endif 707 708 /* XXX determine alignment by R/W */ 709 /* Allocate the HCCA area. */ 710 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 711 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 712 if (err) 713 return (err); 714 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 715 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 716 717 sc->sc_eintrs = OHCI_NORMAL_INTRS; 718 719 /* Allocate dummy ED that starts the control list. */ 720 sc->sc_ctrl_head = ohci_alloc_sed(sc); 721 if (sc->sc_ctrl_head == NULL) { 722 err = USBD_NOMEM; 723 goto bad1; 724 } 725 sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 726 727 /* Allocate dummy ED that starts the bulk list. */ 728 sc->sc_bulk_head = ohci_alloc_sed(sc); 729 if (sc->sc_bulk_head == NULL) { 730 err = USBD_NOMEM; 731 goto bad2; 732 } 733 sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 734 735 /* Allocate dummy ED that starts the isochronous list. */ 736 sc->sc_isoc_head = ohci_alloc_sed(sc); 737 if (sc->sc_isoc_head == NULL) { 738 err = USBD_NOMEM; 739 goto bad3; 740 } 741 sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 742 743 /* Allocate all the dummy EDs that make up the interrupt tree. */ 744 for (i = 0; i < OHCI_NO_EDS; i++) { 745 sed = ohci_alloc_sed(sc); 746 if (sed == NULL) { 747 while (--i >= 0) 748 ohci_free_sed(sc, sc->sc_eds[i]); 749 err = USBD_NOMEM; 750 goto bad4; 751 } 752 /* All ED fields are set to 0. */ 753 sc->sc_eds[i] = sed; 754 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 755 if (i != 0) 756 psed = sc->sc_eds[(i-1) / 2]; 757 else 758 psed= sc->sc_isoc_head; 759 sed->next = psed; 760 sed->ed.ed_nexted = HTOO32(psed->physaddr); 761 } 762 /* 763 * Fill HCCA interrupt table. The bit reversal is to get 764 * the tree set up properly to spread the interrupts. 765 */ 766 for (i = 0; i < OHCI_NO_INTRS; i++) 767 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 768 HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 769 770 #ifdef OHCI_DEBUG 771 if (ohcidebug > 15) { 772 for (i = 0; i < OHCI_NO_EDS; i++) { 773 printf("ed#%d ", i); 774 ohci_dump_ed(sc, sc->sc_eds[i]); 775 } 776 printf("iso "); 777 ohci_dump_ed(sc, sc->sc_isoc_head); 778 } 779 #endif 780 781 /* Preserve values programmed by SMM/BIOS but lost over reset. */ 782 ctl = OREAD4(sc, OHCI_CONTROL); 783 rwc = ctl & OHCI_RWC; 784 fm = OREAD4(sc, OHCI_FM_INTERVAL); 785 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 786 descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 787 788 /* Determine in what context we are running. */ 789 if (ctl & OHCI_IR) { 790 /* SMM active, request change */ 791 DPRINTF(("ohci_init: SMM active, request owner change\n")); 792 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) == 793 (OHCI_OC | OHCI_MIE)) 794 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE); 795 s = OREAD4(sc, OHCI_COMMAND_STATUS); 796 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 797 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 798 usb_delay_ms(&sc->sc_bus, 1); 799 ctl = OREAD4(sc, OHCI_CONTROL); 800 } 801 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE); 802 if ((ctl & OHCI_IR) == 0) { 803 printf("%s: SMM does not respond, resetting\n", 804 device_xname(sc->sc_dev)); 805 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 806 goto reset; 807 } 808 #if 0 809 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 810 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 811 /* BIOS started controller. */ 812 DPRINTF(("ohci_init: BIOS active\n")); 813 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 814 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc); 815 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 816 } 817 #endif 818 } else { 819 DPRINTF(("ohci_init: cold started\n")); 820 reset: 821 /* Controller was cold started. */ 822 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 823 } 824 825 /* 826 * This reset should not be necessary according to the OHCI spec, but 827 * without it some controllers do not start. 828 */ 829 DPRINTF(("%s: resetting\n", device_xname(sc->sc_dev))); 830 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 831 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 832 833 /* We now own the host controller and the bus has been reset. */ 834 835 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 836 /* Nominal time for a reset is 10 us. */ 837 for (i = 0; i < 10; i++) { 838 delay(10); 839 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 840 if (!hcr) 841 break; 842 } 843 if (hcr) { 844 printf("%s: reset timeout\n", device_xname(sc->sc_dev)); 845 err = USBD_IOERROR; 846 goto bad5; 847 } 848 #ifdef OHCI_DEBUG 849 if (ohcidebug > 15) 850 ohci_dumpregs(sc); 851 #endif 852 853 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 854 855 /* Set up HC registers. */ 856 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 857 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 858 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 859 /* disable all interrupts and then switch on all desired interrupts */ 860 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 861 /* switch on desired functional features */ 862 ctl = OREAD4(sc, OHCI_CONTROL); 863 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 864 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 865 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc; 866 /* And finally start it! */ 867 OWRITE4(sc, OHCI_CONTROL, ctl); 868 869 /* 870 * The controller is now OPERATIONAL. Set a some final 871 * registers that should be set earlier, but that the 872 * controller ignores when in the SUSPEND state. 873 */ 874 ival = OHCI_GET_IVAL(fm); 875 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 876 fm |= OHCI_FSMPS(ival) | ival; 877 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 878 per = OHCI_PERIODIC(ival); /* 90% periodic */ 879 OWRITE4(sc, OHCI_PERIODIC_START, per); 880 881 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 882 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 883 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 884 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 885 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 886 887 /* 888 * The AMD756 requires a delay before re-reading the register, 889 * otherwise it will occasionally report 0 ports. 890 */ 891 sc->sc_noport = 0; 892 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 893 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 894 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 895 } 896 897 #ifdef OHCI_DEBUG 898 if (ohcidebug > 5) 899 ohci_dumpregs(sc); 900 #endif 901 902 /* Set up the bus struct. */ 903 sc->sc_bus.methods = &ohci_bus_methods; 904 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 905 906 #if defined(__NetBSD__) || defined(__OpenBSD__) 907 sc->sc_control = sc->sc_intre = 0; 908 #endif 909 910 usb_callout_init(sc->sc_tmo_rhsc); 911 912 /* Finally, turn on interrupts. */ 913 DPRINTFN(1,("ohci_init: enabling\n")); 914 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 915 916 return (USBD_NORMAL_COMPLETION); 917 918 bad5: 919 for (i = 0; i < OHCI_NO_EDS; i++) 920 ohci_free_sed(sc, sc->sc_eds[i]); 921 bad4: 922 ohci_free_sed(sc, sc->sc_isoc_head); 923 bad3: 924 ohci_free_sed(sc, sc->sc_bulk_head); 925 bad2: 926 ohci_free_sed(sc, sc->sc_ctrl_head); 927 bad1: 928 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 929 return (err); 930 } 931 932 usbd_status 933 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 934 { 935 #if defined(__NetBSD__) || defined(__OpenBSD__) 936 struct ohci_softc *sc = bus->hci_private; 937 #endif 938 usbd_status status; 939 940 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 941 #ifdef __NetBSD__ 942 if (status == USBD_NOMEM) 943 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 944 #endif 945 return status; 946 } 947 948 void 949 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 950 { 951 #if defined(__NetBSD__) || defined(__OpenBSD__) 952 struct ohci_softc *sc = bus->hci_private; 953 #endif 954 #ifdef __NetBSD__ 955 if (dma->block->flags & USB_DMA_RESERVE) { 956 usb_reserve_freem(&sc->sc_dma_reserve, dma); 957 return; 958 } 959 #endif 960 usb_freemem(&sc->sc_bus, dma); 961 } 962 963 usbd_xfer_handle 964 ohci_allocx(struct usbd_bus *bus) 965 { 966 struct ohci_softc *sc = bus->hci_private; 967 usbd_xfer_handle xfer; 968 969 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 970 if (xfer != NULL) { 971 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 972 #ifdef DIAGNOSTIC 973 if (xfer->busy_free != XFER_FREE) { 974 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer, 975 xfer->busy_free); 976 } 977 #endif 978 } else { 979 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT); 980 } 981 if (xfer != NULL) { 982 memset(xfer, 0, sizeof (struct ohci_xfer)); 983 #ifdef DIAGNOSTIC 984 xfer->busy_free = XFER_BUSY; 985 #endif 986 } 987 return (xfer); 988 } 989 990 void 991 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 992 { 993 struct ohci_softc *sc = bus->hci_private; 994 995 #ifdef DIAGNOSTIC 996 if (xfer->busy_free != XFER_BUSY) { 997 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer, 998 xfer->busy_free); 999 } 1000 xfer->busy_free = XFER_FREE; 1001 #endif 1002 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1003 } 1004 1005 /* 1006 * Shut down the controller when the system is going down. 1007 */ 1008 bool 1009 ohci_shutdown(device_t self, int flags) 1010 { 1011 ohci_softc_t *sc = device_private(self); 1012 1013 DPRINTF(("ohci_shutdown: stopping the HC\n")); 1014 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1015 return true; 1016 } 1017 1018 bool 1019 ohci_resume(device_t dv PMF_FN_ARGS) 1020 { 1021 ohci_softc_t *sc = device_private(dv); 1022 uint32_t ctl; 1023 int s; 1024 1025 s = splhardusb(); 1026 sc->sc_bus.use_polling++; 1027 /* Some broken BIOSes do not recover these values */ 1028 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1029 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, 1030 sc->sc_ctrl_head->physaddr); 1031 OWRITE4(sc, OHCI_BULK_HEAD_ED, 1032 sc->sc_bulk_head->physaddr); 1033 if (sc->sc_intre) 1034 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre & 1035 (OHCI_ALL_INTRS | OHCI_MIE)); 1036 if (sc->sc_control) 1037 ctl = sc->sc_control; 1038 else 1039 ctl = OREAD4(sc, OHCI_CONTROL); 1040 ctl |= OHCI_HCFS_RESUME; 1041 OWRITE4(sc, OHCI_CONTROL, ctl); 1042 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1043 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1044 OWRITE4(sc, OHCI_CONTROL, ctl); 1045 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1046 sc->sc_control = sc->sc_intre = 0; 1047 sc->sc_bus.use_polling--; 1048 1049 return true; 1050 } 1051 1052 bool 1053 ohci_suspend(device_t dv PMF_FN_ARGS) 1054 { 1055 ohci_softc_t *sc = device_private(dv); 1056 uint32_t ctl; 1057 int s; 1058 1059 s = splhardusb(); 1060 sc->sc_bus.use_polling++; 1061 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 1062 if (sc->sc_control == 0) { 1063 /* 1064 * Preserve register values, in case that BIOS 1065 * does not recover them. 1066 */ 1067 sc->sc_control = ctl; 1068 sc->sc_intre = OREAD4(sc, 1069 OHCI_INTERRUPT_ENABLE); 1070 } 1071 ctl |= OHCI_HCFS_SUSPEND; 1072 OWRITE4(sc, OHCI_CONTROL, ctl); 1073 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1074 sc->sc_bus.use_polling--; 1075 splx(s); 1076 1077 return true; 1078 } 1079 1080 #ifdef OHCI_DEBUG 1081 void 1082 ohci_dumpregs(ohci_softc_t *sc) 1083 { 1084 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1085 OREAD4(sc, OHCI_REVISION), 1086 OREAD4(sc, OHCI_CONTROL), 1087 OREAD4(sc, OHCI_COMMAND_STATUS))); 1088 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1089 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1090 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1091 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1092 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1093 OREAD4(sc, OHCI_HCCA), 1094 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1095 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1096 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1097 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1098 OREAD4(sc, OHCI_BULK_HEAD_ED), 1099 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1100 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1101 OREAD4(sc, OHCI_DONE_HEAD), 1102 OREAD4(sc, OHCI_FM_INTERVAL), 1103 OREAD4(sc, OHCI_FM_REMAINING))); 1104 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1105 OREAD4(sc, OHCI_FM_NUMBER), 1106 OREAD4(sc, OHCI_PERIODIC_START), 1107 OREAD4(sc, OHCI_LS_THRESHOLD))); 1108 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1109 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1110 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1111 OREAD4(sc, OHCI_RH_STATUS))); 1112 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1113 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1114 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1115 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1116 O32TOH(sc->sc_hcca->hcca_frame_number), 1117 O32TOH(sc->sc_hcca->hcca_done_head))); 1118 } 1119 #endif 1120 1121 Static int ohci_intr1(ohci_softc_t *); 1122 1123 int 1124 ohci_intr(void *p) 1125 { 1126 ohci_softc_t *sc = p; 1127 1128 if (sc == NULL || sc->sc_dying || !device_has_power(sc->sc_dev)) 1129 return (0); 1130 1131 /* If we get an interrupt while polling, then just ignore it. */ 1132 if (sc->sc_bus.use_polling) { 1133 #ifdef DIAGNOSTIC 1134 DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n")); 1135 #endif 1136 /* for level triggered intrs, should do something to ack */ 1137 OWRITE4(sc, OHCI_INTERRUPT_STATUS, 1138 OREAD4(sc, OHCI_INTERRUPT_STATUS)); 1139 1140 return (0); 1141 } 1142 1143 return (ohci_intr1(sc)); 1144 } 1145 1146 Static int 1147 ohci_intr1(ohci_softc_t *sc) 1148 { 1149 u_int32_t intrs, eintrs; 1150 1151 DPRINTFN(14,("ohci_intr1: enter\n")); 1152 1153 /* In case the interrupt occurs before initialization has completed. */ 1154 if (sc == NULL || sc->sc_hcca == NULL) { 1155 #ifdef DIAGNOSTIC 1156 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1157 #endif 1158 return (0); 1159 } 1160 1161 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1162 if (!intrs) 1163 return (0); 1164 1165 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); /* Acknowledge */ 1166 eintrs = intrs & sc->sc_eintrs; 1167 if (!eintrs) 1168 return (0); 1169 1170 sc->sc_bus.intr_context++; 1171 sc->sc_bus.no_intrs++; 1172 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1173 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1174 (u_int)eintrs)); 1175 1176 if (eintrs & OHCI_SO) { 1177 sc->sc_overrun_cnt++; 1178 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1179 printf("%s: %u scheduling overruns\n", 1180 device_xname(sc->sc_dev), sc->sc_overrun_cnt); 1181 sc->sc_overrun_cnt = 0; 1182 } 1183 /* XXX do what */ 1184 eintrs &= ~OHCI_SO; 1185 } 1186 if (eintrs & OHCI_WDH) { 1187 /* 1188 * We block the interrupt below, and reenable it later from 1189 * ohci_softintr(). 1190 */ 1191 usb_schedsoftintr(&sc->sc_bus); 1192 } 1193 if (eintrs & OHCI_RD) { 1194 printf("%s: resume detect\n", device_xname(sc->sc_dev)); 1195 /* XXX process resume detect */ 1196 } 1197 if (eintrs & OHCI_UE) { 1198 printf("%s: unrecoverable error, controller halted\n", 1199 device_xname(sc->sc_dev)); 1200 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1201 /* XXX what else */ 1202 } 1203 if (eintrs & OHCI_RHSC) { 1204 /* 1205 * We block the interrupt below, and reenable it later from 1206 * a timeout. 1207 */ 1208 ohci_rhsc(sc, sc->sc_intrxfer); 1209 /* Do not allow RHSC interrupts > 1 per second */ 1210 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1211 } 1212 1213 sc->sc_bus.intr_context--; 1214 1215 if (eintrs != 0) { 1216 /* Block unprocessed interrupts. */ 1217 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1218 sc->sc_eintrs &= ~eintrs; 1219 DPRINTFN(1, ("%s: blocking intrs 0x%x\n", 1220 device_xname(sc->sc_dev), eintrs)); 1221 } 1222 1223 return (1); 1224 } 1225 1226 void 1227 ohci_rhsc_enable(void *v_sc) 1228 { 1229 ohci_softc_t *sc = v_sc; 1230 int s; 1231 1232 s = splhardusb(); 1233 sc->sc_eintrs |= OHCI_RHSC; 1234 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1235 splx(s); 1236 } 1237 1238 #ifdef OHCI_DEBUG 1239 const char *ohci_cc_strs[] = { 1240 "NO_ERROR", 1241 "CRC", 1242 "BIT_STUFFING", 1243 "DATA_TOGGLE_MISMATCH", 1244 "STALL", 1245 "DEVICE_NOT_RESPONDING", 1246 "PID_CHECK_FAILURE", 1247 "UNEXPECTED_PID", 1248 "DATA_OVERRUN", 1249 "DATA_UNDERRUN", 1250 "BUFFER_OVERRUN", 1251 "BUFFER_UNDERRUN", 1252 "reserved", 1253 "reserved", 1254 "NOT_ACCESSED", 1255 "NOT_ACCESSED", 1256 }; 1257 #endif 1258 1259 void 1260 ohci_softintr(void *v) 1261 { 1262 struct usbd_bus *bus = v; 1263 ohci_softc_t *sc = bus->hci_private; 1264 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1265 ohci_soft_td_t *std, *sdone, *stdnext; 1266 usbd_xfer_handle xfer; 1267 struct ohci_pipe *opipe; 1268 int len, cc, s; 1269 int i, j, actlen, iframes, uedir; 1270 ohci_physaddr_t done; 1271 1272 DPRINTFN(10,("ohci_softintr: enter\n")); 1273 1274 sc->sc_bus.intr_context++; 1275 1276 s = splhardusb(); 1277 done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS; 1278 sc->sc_hcca->hcca_done_head = 0; 1279 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH); 1280 sc->sc_eintrs |= OHCI_WDH; 1281 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH); 1282 splx(s); 1283 1284 /* Reverse the done list. */ 1285 for (sdone = NULL, sidone = NULL; done != 0; ) { 1286 std = ohci_hash_find_td(sc, done); 1287 if (std != NULL) { 1288 std->dnext = sdone; 1289 done = O32TOH(std->td.td_nexttd); 1290 sdone = std; 1291 DPRINTFN(10,("add TD %p\n", std)); 1292 continue; 1293 } 1294 sitd = ohci_hash_find_itd(sc, done); 1295 if (sitd != NULL) { 1296 sitd->dnext = sidone; 1297 done = O32TOH(sitd->itd.itd_nextitd); 1298 sidone = sitd; 1299 DPRINTFN(5,("add ITD %p\n", sitd)); 1300 continue; 1301 } 1302 panic("ohci_softintr: addr 0x%08lx not found", (u_long)done); 1303 } 1304 1305 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1306 1307 #ifdef OHCI_DEBUG 1308 if (ohcidebug > 10) { 1309 DPRINTF(("ohci_process_done: TD done:\n")); 1310 ohci_dump_tds(sc, sdone); 1311 } 1312 #endif 1313 1314 for (std = sdone; std; std = stdnext) { 1315 xfer = std->xfer; 1316 stdnext = std->dnext; 1317 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1318 std, xfer, xfer ? xfer->hcpriv : 0)); 1319 if (xfer == NULL) { 1320 /* 1321 * xfer == NULL: There seems to be no xfer associated 1322 * with this TD. It is tailp that happened to end up on 1323 * the done queue. 1324 * Shouldn't happen, but some chips are broken(?). 1325 */ 1326 continue; 1327 } 1328 if (xfer->status == USBD_CANCELLED || 1329 xfer->status == USBD_TIMEOUT) { 1330 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1331 xfer)); 1332 /* Handled by abort routine. */ 1333 continue; 1334 } 1335 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1336 1337 len = std->len; 1338 if (std->td.td_cbp != 0) 1339 len -= O32TOH(std->td.td_be) - 1340 O32TOH(std->td.td_cbp) + 1; 1341 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len, 1342 std->flags)); 1343 if (std->flags & OHCI_ADD_LEN) 1344 xfer->actlen += len; 1345 1346 cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags)); 1347 if (cc == OHCI_CC_NO_ERROR) { 1348 if (std->flags & OHCI_CALL_DONE) { 1349 xfer->status = USBD_NORMAL_COMPLETION; 1350 s = splusb(); 1351 usb_transfer_complete(xfer); 1352 splx(s); 1353 } 1354 ohci_free_std(sc, std); 1355 } else { 1356 /* 1357 * Endpoint is halted. First unlink all the TDs 1358 * belonging to the failed transfer, and then restart 1359 * the endpoint. 1360 */ 1361 ohci_soft_td_t *p, *n; 1362 opipe = (struct ohci_pipe *)xfer->pipe; 1363 1364 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1365 OHCI_TD_GET_CC(O32TOH(std->td.td_flags)), 1366 ohci_cc_strs[OHCI_TD_GET_CC(O32TOH(std->td.td_flags))])); 1367 1368 /* remove TDs */ 1369 for (p = std; p->xfer == xfer; p = n) { 1370 n = p->nexttd; 1371 ohci_free_std(sc, p); 1372 } 1373 1374 /* clear halt */ 1375 opipe->sed->ed.ed_headp = HTOO32(p->physaddr); 1376 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1377 1378 if (cc == OHCI_CC_STALL) 1379 xfer->status = USBD_STALLED; 1380 else 1381 xfer->status = USBD_IOERROR; 1382 s = splusb(); 1383 usb_transfer_complete(xfer); 1384 splx(s); 1385 } 1386 } 1387 1388 #ifdef OHCI_DEBUG 1389 if (ohcidebug > 10) { 1390 DPRINTF(("ohci_softintr: ITD done:\n")); 1391 ohci_dump_itds(sc, sidone); 1392 } 1393 #endif 1394 1395 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1396 xfer = sitd->xfer; 1397 sitdnext = sitd->dnext; 1398 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1399 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1400 if (xfer == NULL) 1401 continue; 1402 if (xfer->status == USBD_CANCELLED || 1403 xfer->status == USBD_TIMEOUT) { 1404 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1405 xfer)); 1406 /* Handled by abort routine. */ 1407 continue; 1408 } 1409 #ifdef DIAGNOSTIC 1410 if (sitd->isdone) 1411 printf("ohci_softintr: sitd=%p is done\n", sitd); 1412 sitd->isdone = 1; 1413 #endif 1414 if (sitd->flags & OHCI_CALL_DONE) { 1415 ohci_soft_itd_t *next; 1416 1417 opipe = (struct ohci_pipe *)xfer->pipe; 1418 opipe->u.iso.inuse -= xfer->nframes; 1419 uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc-> 1420 bEndpointAddress); 1421 xfer->status = USBD_NORMAL_COMPLETION; 1422 actlen = 0; 1423 for (i = 0, sitd = xfer->hcpriv;; 1424 sitd = next) { 1425 next = sitd->nextitd; 1426 if (OHCI_ITD_GET_CC(O32TOH(sitd-> 1427 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1428 xfer->status = USBD_IOERROR; 1429 /* For input, update frlengths with actual */ 1430 /* XXX anything necessary for output? */ 1431 if (uedir == UE_DIR_IN && 1432 xfer->status == USBD_NORMAL_COMPLETION) { 1433 iframes = OHCI_ITD_GET_FC(O32TOH( 1434 sitd->itd.itd_flags)); 1435 for (j = 0; j < iframes; i++, j++) { 1436 len = O16TOH(sitd-> 1437 itd.itd_offset[j]); 1438 if ((OHCI_ITD_PSW_GET_CC(len) & 1439 OHCI_CC_NOT_ACCESSED_MASK) 1440 == OHCI_CC_NOT_ACCESSED) 1441 len = 0; 1442 else 1443 len = OHCI_ITD_PSW_LENGTH(len); 1444 xfer->frlengths[i] = len; 1445 actlen += len; 1446 } 1447 } 1448 if (sitd->flags & OHCI_CALL_DONE) 1449 break; 1450 ohci_free_sitd(sc, sitd); 1451 } 1452 ohci_free_sitd(sc, sitd); 1453 if (uedir == UE_DIR_IN && 1454 xfer->status == USBD_NORMAL_COMPLETION) 1455 xfer->actlen = actlen; 1456 xfer->hcpriv = NULL; 1457 1458 s = splusb(); 1459 usb_transfer_complete(xfer); 1460 splx(s); 1461 } 1462 } 1463 1464 #ifdef USB_USE_SOFTINTR 1465 if (sc->sc_softwake) { 1466 sc->sc_softwake = 0; 1467 wakeup(&sc->sc_softwake); 1468 } 1469 #endif /* USB_USE_SOFTINTR */ 1470 1471 sc->sc_bus.intr_context--; 1472 DPRINTFN(10,("ohci_softintr: done:\n")); 1473 } 1474 1475 void 1476 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1477 { 1478 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer)); 1479 1480 #ifdef DIAGNOSTIC 1481 if (!(xfer->rqflags & URQ_REQUEST)) { 1482 panic("ohci_device_ctrl_done: not a request"); 1483 } 1484 #endif 1485 } 1486 1487 void 1488 ohci_device_intr_done(usbd_xfer_handle xfer) 1489 { 1490 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1491 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 1492 ohci_soft_ed_t *sed = opipe->sed; 1493 ohci_soft_td_t *data, *tail; 1494 1495 1496 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n", 1497 xfer, xfer->actlen)); 1498 1499 if (xfer->pipe->repeat) { 1500 data = opipe->tail.td; 1501 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1502 if (tail == NULL) { 1503 xfer->status = USBD_NOMEM; 1504 return; 1505 } 1506 tail->xfer = NULL; 1507 1508 data->td.td_flags = HTOO32( 1509 OHCI_TD_IN | OHCI_TD_NOCC | 1510 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1511 if (xfer->flags & USBD_SHORT_XFER_OK) 1512 data->td.td_flags |= HTOO32(OHCI_TD_R); 1513 data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0)); 1514 data->nexttd = tail; 1515 data->td.td_nexttd = HTOO32(tail->physaddr); 1516 data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + 1517 xfer->length - 1); 1518 data->len = xfer->length; 1519 data->xfer = xfer; 1520 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1521 xfer->hcpriv = data; 1522 xfer->actlen = 0; 1523 1524 sed->ed.ed_tailp = HTOO32(tail->physaddr); 1525 opipe->tail.td = tail; 1526 } 1527 } 1528 1529 void 1530 ohci_device_bulk_done(usbd_xfer_handle xfer) 1531 { 1532 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n", 1533 xfer, xfer->actlen)); 1534 } 1535 1536 void 1537 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1538 { 1539 usbd_pipe_handle pipe; 1540 u_char *p; 1541 int i, m; 1542 int hstatus; 1543 1544 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1545 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1546 sc, xfer, hstatus)); 1547 1548 if (xfer == NULL) { 1549 /* Just ignore the change. */ 1550 return; 1551 } 1552 1553 pipe = xfer->pipe; 1554 1555 p = KERNADDR(&xfer->dmabuf, 0); 1556 m = min(sc->sc_noport, xfer->length * 8 - 1); 1557 memset(p, 0, xfer->length); 1558 for (i = 1; i <= m; i++) { 1559 /* Pick out CHANGE bits from the status reg. */ 1560 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1561 p[i/8] |= 1 << (i%8); 1562 } 1563 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1564 xfer->actlen = xfer->length; 1565 xfer->status = USBD_NORMAL_COMPLETION; 1566 1567 usb_transfer_complete(xfer); 1568 } 1569 1570 void 1571 ohci_root_intr_done(usbd_xfer_handle xfer) 1572 { 1573 } 1574 1575 void 1576 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1577 { 1578 } 1579 1580 /* 1581 * Wait here until controller claims to have an interrupt. 1582 * Then call ohci_intr and return. Use timeout to avoid waiting 1583 * too long. 1584 */ 1585 void 1586 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1587 { 1588 int timo; 1589 u_int32_t intrs; 1590 1591 xfer->status = USBD_IN_PROGRESS; 1592 for (timo = xfer->timeout; timo >= 0; timo--) { 1593 usb_delay_ms(&sc->sc_bus, 1); 1594 if (sc->sc_dying) 1595 break; 1596 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1597 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1598 #ifdef OHCI_DEBUG 1599 if (ohcidebug > 15) 1600 ohci_dumpregs(sc); 1601 #endif 1602 if (intrs) { 1603 ohci_intr1(sc); 1604 if (xfer->status != USBD_IN_PROGRESS) 1605 return; 1606 } 1607 } 1608 1609 /* Timeout */ 1610 DPRINTF(("ohci_waitintr: timeout\n")); 1611 xfer->status = USBD_TIMEOUT; 1612 usb_transfer_complete(xfer); 1613 /* XXX should free TD */ 1614 } 1615 1616 void 1617 ohci_poll(struct usbd_bus *bus) 1618 { 1619 ohci_softc_t *sc = bus->hci_private; 1620 #ifdef OHCI_DEBUG 1621 static int last; 1622 int new; 1623 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1624 if (new != last) { 1625 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1626 last = new; 1627 } 1628 #endif 1629 1630 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1631 ohci_intr1(sc); 1632 } 1633 1634 usbd_status 1635 ohci_device_request(usbd_xfer_handle xfer) 1636 { 1637 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1638 usb_device_request_t *req = &xfer->request; 1639 usbd_device_handle dev = opipe->pipe.device; 1640 ohci_softc_t *sc = dev->bus->hci_private; 1641 int addr = dev->address; 1642 ohci_soft_td_t *setup, *stat, *next, *tail; 1643 ohci_soft_ed_t *sed; 1644 int isread; 1645 int len; 1646 usbd_status err; 1647 int s; 1648 1649 isread = req->bmRequestType & UT_READ; 1650 len = UGETW(req->wLength); 1651 1652 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1653 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1654 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1655 UGETW(req->wIndex), len, addr, 1656 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1657 1658 setup = opipe->tail.td; 1659 stat = ohci_alloc_std(sc); 1660 if (stat == NULL) { 1661 err = USBD_NOMEM; 1662 goto bad1; 1663 } 1664 tail = ohci_alloc_std(sc); 1665 if (tail == NULL) { 1666 err = USBD_NOMEM; 1667 goto bad2; 1668 } 1669 tail->xfer = NULL; 1670 1671 sed = opipe->sed; 1672 opipe->u.ctl.length = len; 1673 1674 /* Update device address and length since they may have changed 1675 during the setup of the control pipe in usbd_new_device(). */ 1676 /* XXX This only needs to be done once, but it's too early in open. */ 1677 /* XXXX Should not touch ED here! */ 1678 sed->ed.ed_flags = HTOO32( 1679 (O32TOH(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1680 OHCI_ED_SET_FA(addr) | 1681 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1682 1683 next = stat; 1684 1685 /* Set up data transaction */ 1686 if (len != 0) { 1687 ohci_soft_td_t *std = stat; 1688 1689 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1690 std, &stat); 1691 stat = stat->nexttd; /* point at free TD */ 1692 if (err) 1693 goto bad3; 1694 /* Start toggle at 1 and then use the carried toggle. */ 1695 std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK); 1696 std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1); 1697 } 1698 1699 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req); 1700 1701 setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1702 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1703 setup->td.td_cbp = HTOO32(DMAADDR(&opipe->u.ctl.reqdma, 0)); 1704 setup->nexttd = next; 1705 setup->td.td_nexttd = HTOO32(next->physaddr); 1706 setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof *req - 1); 1707 setup->len = 0; 1708 setup->xfer = xfer; 1709 setup->flags = 0; 1710 xfer->hcpriv = setup; 1711 1712 stat->td.td_flags = HTOO32( 1713 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1714 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1715 stat->td.td_cbp = 0; 1716 stat->nexttd = tail; 1717 stat->td.td_nexttd = HTOO32(tail->physaddr); 1718 stat->td.td_be = 0; 1719 stat->flags = OHCI_CALL_DONE; 1720 stat->len = 0; 1721 stat->xfer = xfer; 1722 1723 #ifdef OHCI_DEBUG 1724 if (ohcidebug > 5) { 1725 DPRINTF(("ohci_device_request:\n")); 1726 ohci_dump_ed(sc, sed); 1727 ohci_dump_tds(sc, setup); 1728 } 1729 #endif 1730 1731 /* Insert ED in schedule */ 1732 s = splusb(); 1733 sed->ed.ed_tailp = HTOO32(tail->physaddr); 1734 opipe->tail.td = tail; 1735 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1736 if (xfer->timeout && !sc->sc_bus.use_polling) { 1737 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 1738 ohci_timeout, xfer); 1739 } 1740 splx(s); 1741 1742 #ifdef OHCI_DEBUG 1743 if (ohcidebug > 20) { 1744 delay(10000); 1745 DPRINTF(("ohci_device_request: status=%x\n", 1746 OREAD4(sc, OHCI_COMMAND_STATUS))); 1747 ohci_dumpregs(sc); 1748 printf("ctrl head:\n"); 1749 ohci_dump_ed(sc, sc->sc_ctrl_head); 1750 printf("sed:\n"); 1751 ohci_dump_ed(sc, sed); 1752 ohci_dump_tds(sc, setup); 1753 } 1754 #endif 1755 1756 return (USBD_NORMAL_COMPLETION); 1757 1758 bad3: 1759 ohci_free_std(sc, tail); 1760 bad2: 1761 ohci_free_std(sc, stat); 1762 bad1: 1763 return (err); 1764 } 1765 1766 /* 1767 * Add an ED to the schedule. Called at splusb(). 1768 */ 1769 void 1770 ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1771 { 1772 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1773 1774 SPLUSBCHECK; 1775 sed->next = head->next; 1776 sed->ed.ed_nexted = head->ed.ed_nexted; 1777 head->next = sed; 1778 head->ed.ed_nexted = HTOO32(sed->physaddr); 1779 } 1780 1781 /* 1782 * Remove an ED from the schedule. Called at splusb(). 1783 */ 1784 void 1785 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1786 { 1787 ohci_soft_ed_t *p; 1788 1789 SPLUSBCHECK; 1790 1791 /* XXX */ 1792 for (p = head; p != NULL && p->next != sed; p = p->next) 1793 ; 1794 if (p == NULL) 1795 panic("ohci_rem_ed: ED not found"); 1796 p->next = sed->next; 1797 p->ed.ed_nexted = sed->ed.ed_nexted; 1798 } 1799 1800 /* 1801 * When a transfer is completed the TD is added to the done queue by 1802 * the host controller. This queue is the processed by software. 1803 * Unfortunately the queue contains the physical address of the TD 1804 * and we have no simple way to translate this back to a kernel address. 1805 * To make the translation possible (and fast) we use a hash table of 1806 * TDs currently in the schedule. The physical address is used as the 1807 * hash value. 1808 */ 1809 1810 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1811 /* Called at splusb() */ 1812 void 1813 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1814 { 1815 int h = HASH(std->physaddr); 1816 1817 SPLUSBCHECK; 1818 1819 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1820 } 1821 1822 /* Called at splusb() */ 1823 void 1824 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1825 { 1826 SPLUSBCHECK; 1827 1828 LIST_REMOVE(std, hnext); 1829 } 1830 1831 ohci_soft_td_t * 1832 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1833 { 1834 int h = HASH(a); 1835 ohci_soft_td_t *std; 1836 1837 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1838 std != NULL; 1839 std = LIST_NEXT(std, hnext)) 1840 if (std->physaddr == a) 1841 return (std); 1842 return (NULL); 1843 } 1844 1845 /* Called at splusb() */ 1846 void 1847 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1848 { 1849 int h = HASH(sitd->physaddr); 1850 1851 SPLUSBCHECK; 1852 1853 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1854 sitd, (u_long)sitd->physaddr)); 1855 1856 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1857 } 1858 1859 /* Called at splusb() */ 1860 void 1861 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1862 { 1863 SPLUSBCHECK; 1864 1865 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1866 sitd, (u_long)sitd->physaddr)); 1867 1868 LIST_REMOVE(sitd, hnext); 1869 } 1870 1871 ohci_soft_itd_t * 1872 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1873 { 1874 int h = HASH(a); 1875 ohci_soft_itd_t *sitd; 1876 1877 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1878 sitd != NULL; 1879 sitd = LIST_NEXT(sitd, hnext)) 1880 if (sitd->physaddr == a) 1881 return (sitd); 1882 return (NULL); 1883 } 1884 1885 void 1886 ohci_timeout(void *addr) 1887 { 1888 struct ohci_xfer *oxfer = addr; 1889 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe; 1890 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 1891 1892 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer)); 1893 1894 if (sc->sc_dying) { 1895 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT); 1896 return; 1897 } 1898 1899 /* Execute the abort in a process context. */ 1900 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr); 1901 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task, 1902 USB_TASKQ_HC); 1903 } 1904 1905 void 1906 ohci_timeout_task(void *addr) 1907 { 1908 usbd_xfer_handle xfer = addr; 1909 int s; 1910 1911 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer)); 1912 1913 s = splusb(); 1914 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1915 splx(s); 1916 } 1917 1918 #ifdef OHCI_DEBUG 1919 void 1920 ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std) 1921 { 1922 for (; std; std = std->nexttd) 1923 ohci_dump_td(sc, std); 1924 } 1925 1926 void 1927 ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1928 { 1929 char sbuf[128]; 1930 1931 bitmask_snprintf((u_int32_t)O32TOH(std->td.td_flags), 1932 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1933 sbuf, sizeof(sbuf)); 1934 1935 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1936 "nexttd=0x%08lx be=0x%08lx\n", 1937 std, (u_long)std->physaddr, sbuf, 1938 OHCI_TD_GET_DI(O32TOH(std->td.td_flags)), 1939 OHCI_TD_GET_EC(O32TOH(std->td.td_flags)), 1940 OHCI_TD_GET_CC(O32TOH(std->td.td_flags)), 1941 (u_long)O32TOH(std->td.td_cbp), 1942 (u_long)O32TOH(std->td.td_nexttd), 1943 (u_long)O32TOH(std->td.td_be)); 1944 } 1945 1946 void 1947 ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1948 { 1949 int i; 1950 1951 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1952 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1953 sitd, (u_long)sitd->physaddr, 1954 OHCI_ITD_GET_SF(O32TOH(sitd->itd.itd_flags)), 1955 OHCI_ITD_GET_DI(O32TOH(sitd->itd.itd_flags)), 1956 OHCI_ITD_GET_FC(O32TOH(sitd->itd.itd_flags)), 1957 OHCI_ITD_GET_CC(O32TOH(sitd->itd.itd_flags)), 1958 (u_long)O32TOH(sitd->itd.itd_bp0), 1959 (u_long)O32TOH(sitd->itd.itd_nextitd), 1960 (u_long)O32TOH(sitd->itd.itd_be)); 1961 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1962 printf("offs[%d]=0x%04x ", i, 1963 (u_int)O16TOH(sitd->itd.itd_offset[i])); 1964 printf("\n"); 1965 } 1966 1967 void 1968 ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1969 { 1970 for (; sitd; sitd = sitd->nextitd) 1971 ohci_dump_itd(sc, sitd); 1972 } 1973 1974 void 1975 ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 1976 { 1977 char sbuf[128], sbuf2[128]; 1978 1979 bitmask_snprintf((u_int32_t)O32TOH(sed->ed.ed_flags), 1980 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1981 sbuf, sizeof(sbuf)); 1982 bitmask_snprintf((u_int32_t)O32TOH(sed->ed.ed_headp), 1983 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 1984 1985 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx " 1986 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 1987 sed, (u_long)sed->physaddr, 1988 OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)), 1989 OHCI_ED_GET_EN(O32TOH(sed->ed.ed_flags)), 1990 OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), sbuf, 1991 (u_long)O32TOH(sed->ed.ed_tailp), sbuf2, 1992 (u_long)O32TOH(sed->ed.ed_headp), 1993 (u_long)O32TOH(sed->ed.ed_nexted)); 1994 } 1995 #endif 1996 1997 usbd_status 1998 ohci_open(usbd_pipe_handle pipe) 1999 { 2000 usbd_device_handle dev = pipe->device; 2001 ohci_softc_t *sc = dev->bus->hci_private; 2002 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 2003 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2004 u_int8_t addr = dev->address; 2005 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 2006 ohci_soft_ed_t *sed; 2007 ohci_soft_td_t *std; 2008 ohci_soft_itd_t *sitd; 2009 ohci_physaddr_t tdphys; 2010 u_int32_t fmt; 2011 usbd_status err; 2012 int s; 2013 int ival; 2014 2015 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 2016 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 2017 2018 if (sc->sc_dying) 2019 return (USBD_IOERROR); 2020 2021 std = NULL; 2022 sed = NULL; 2023 2024 if (addr == sc->sc_addr) { 2025 switch (ed->bEndpointAddress) { 2026 case USB_CONTROL_ENDPOINT: 2027 pipe->methods = &ohci_root_ctrl_methods; 2028 break; 2029 case UE_DIR_IN | OHCI_INTR_ENDPT: 2030 pipe->methods = &ohci_root_intr_methods; 2031 break; 2032 default: 2033 return (USBD_INVAL); 2034 } 2035 } else { 2036 sed = ohci_alloc_sed(sc); 2037 if (sed == NULL) 2038 goto bad0; 2039 opipe->sed = sed; 2040 if (xfertype == UE_ISOCHRONOUS) { 2041 sitd = ohci_alloc_sitd(sc); 2042 if (sitd == NULL) 2043 goto bad1; 2044 opipe->tail.itd = sitd; 2045 tdphys = sitd->physaddr; 2046 fmt = OHCI_ED_FORMAT_ISO; 2047 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2048 fmt |= OHCI_ED_DIR_IN; 2049 else 2050 fmt |= OHCI_ED_DIR_OUT; 2051 } else { 2052 std = ohci_alloc_std(sc); 2053 if (std == NULL) 2054 goto bad1; 2055 opipe->tail.td = std; 2056 tdphys = std->physaddr; 2057 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2058 } 2059 sed->ed.ed_flags = HTOO32( 2060 OHCI_ED_SET_FA(addr) | 2061 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2062 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2063 fmt | 2064 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2065 sed->ed.ed_headp = sed->ed.ed_tailp = HTOO32(tdphys); 2066 2067 switch (xfertype) { 2068 case UE_CONTROL: 2069 pipe->methods = &ohci_device_ctrl_methods; 2070 err = usb_allocmem(&sc->sc_bus, 2071 sizeof(usb_device_request_t), 2072 0, &opipe->u.ctl.reqdma); 2073 if (err) 2074 goto bad; 2075 s = splusb(); 2076 ohci_add_ed(sc, sed, sc->sc_ctrl_head); 2077 splx(s); 2078 break; 2079 case UE_INTERRUPT: 2080 pipe->methods = &ohci_device_intr_methods; 2081 ival = pipe->interval; 2082 if (ival == USBD_DEFAULT_INTERVAL) 2083 ival = ed->bInterval; 2084 return (ohci_device_setintr(sc, opipe, ival)); 2085 case UE_ISOCHRONOUS: 2086 pipe->methods = &ohci_device_isoc_methods; 2087 return (ohci_setup_isoc(pipe)); 2088 case UE_BULK: 2089 pipe->methods = &ohci_device_bulk_methods; 2090 s = splusb(); 2091 ohci_add_ed(sc, sed, sc->sc_bulk_head); 2092 splx(s); 2093 break; 2094 } 2095 } 2096 return (USBD_NORMAL_COMPLETION); 2097 2098 bad: 2099 if (std != NULL) 2100 ohci_free_std(sc, std); 2101 bad1: 2102 if (sed != NULL) 2103 ohci_free_sed(sc, sed); 2104 bad0: 2105 return (USBD_NOMEM); 2106 2107 } 2108 2109 /* 2110 * Close a reqular pipe. 2111 * Assumes that there are no pending transactions. 2112 */ 2113 void 2114 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2115 { 2116 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2117 ohci_softc_t *sc = pipe->device->bus->hci_private; 2118 ohci_soft_ed_t *sed = opipe->sed; 2119 int s; 2120 2121 s = splusb(); 2122 #ifdef DIAGNOSTIC 2123 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 2124 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2125 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2126 ohci_soft_td_t *std; 2127 std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp)); 2128 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2129 "tl=0x%x pipe=%p, std=%p\n", sed, 2130 (int)O32TOH(sed->ed.ed_headp), 2131 (int)O32TOH(sed->ed.ed_tailp), 2132 pipe, std); 2133 #ifdef USB_DEBUG 2134 usbd_dump_pipe(&opipe->pipe); 2135 #endif 2136 #ifdef OHCI_DEBUG 2137 ohci_dump_ed(sc, sed); 2138 if (std) 2139 ohci_dump_td(sc, std); 2140 #endif 2141 usb_delay_ms(&sc->sc_bus, 2); 2142 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2143 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 2144 printf("ohci_close_pipe: pipe still not empty\n"); 2145 } 2146 #endif 2147 ohci_rem_ed(sed, head); 2148 /* Make sure the host controller is not touching this ED */ 2149 usb_delay_ms(&sc->sc_bus, 1); 2150 splx(s); 2151 ohci_free_sed(sc, opipe->sed); 2152 } 2153 2154 /* 2155 * Abort a device request. 2156 * If this routine is called at splusb() it guarantees that the request 2157 * will be removed from the hardware scheduling and that the callback 2158 * for it will be called with USBD_CANCELLED status. 2159 * It's impossible to guarantee that the requested transfer will not 2160 * have happened since the hardware runs concurrently. 2161 * If the transaction has already happened we rely on the ordinary 2162 * interrupt processing to process it. 2163 */ 2164 void 2165 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2166 { 2167 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2168 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 2169 ohci_soft_ed_t *sed = opipe->sed; 2170 ohci_soft_td_t *p, *n; 2171 ohci_physaddr_t headp; 2172 int s, hit; 2173 int wake; 2174 2175 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed)); 2176 2177 if (sc->sc_dying) { 2178 /* If we're dying, just do the software part. */ 2179 s = splusb(); 2180 xfer->status = status; /* make software ignore it */ 2181 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2182 usb_transfer_complete(xfer); 2183 splx(s); 2184 return; 2185 } 2186 2187 if (xfer->device->bus->intr_context || !curproc) 2188 panic("ohci_abort_xfer: not in process context"); 2189 2190 /* 2191 * If an abort is already in progress then just wait for it to 2192 * complete and return. 2193 */ 2194 if (xfer->hcflags & UXFER_ABORTING) { 2195 DPRINTFN(2, ("ohci_abort_xfer: already aborting\n")); 2196 #ifdef DIAGNOSTIC 2197 if (status == USBD_TIMEOUT) 2198 printf("0hci_abort_xfer: TIMEOUT while aborting\n"); 2199 #endif 2200 /* Override the status which might be USBD_TIMEOUT. */ 2201 xfer->status = status; 2202 DPRINTFN(2, ("ohci_abort_xfer: waiting for abort to finish\n")); 2203 xfer->hcflags |= UXFER_ABORTWAIT; 2204 while (xfer->hcflags & UXFER_ABORTING) 2205 tsleep(&xfer->hcflags, PZERO, "ohciaw", 0); 2206 return; 2207 } 2208 xfer->hcflags |= UXFER_ABORTING; 2209 2210 /* 2211 * Step 1: Make interrupt routine and hardware ignore xfer. 2212 */ 2213 s = splusb(); 2214 xfer->status = status; /* make software ignore it */ 2215 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2216 splx(s); 2217 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2218 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 2219 2220 /* 2221 * Step 2: Wait until we know hardware has finished any possible 2222 * use of the xfer. Also make sure the soft interrupt routine 2223 * has run. 2224 */ 2225 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */ 2226 s = splusb(); 2227 #ifdef USB_USE_SOFTINTR 2228 sc->sc_softwake = 1; 2229 #endif /* USB_USE_SOFTINTR */ 2230 usb_schedsoftintr(&sc->sc_bus); 2231 #ifdef USB_USE_SOFTINTR 2232 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0); 2233 #endif /* USB_USE_SOFTINTR */ 2234 splx(s); 2235 2236 /* 2237 * Step 3: Remove any vestiges of the xfer from the hardware. 2238 * The complication here is that the hardware may have executed 2239 * beyond the xfer we're trying to abort. So as we're scanning 2240 * the TDs of this xfer we check if the hardware points to 2241 * any of them. 2242 */ 2243 s = splusb(); /* XXX why? */ 2244 p = xfer->hcpriv; 2245 #ifdef DIAGNOSTIC 2246 if (p == NULL) { 2247 xfer->hcflags &= ~UXFER_ABORTING; /* XXX */ 2248 splx(s); 2249 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2250 return; 2251 } 2252 #endif 2253 #ifdef OHCI_DEBUG 2254 if (ohcidebug > 1) { 2255 DPRINTF(("ohci_abort_xfer: sed=\n")); 2256 ohci_dump_ed(sc, sed); 2257 ohci_dump_tds(sc, p); 2258 } 2259 #endif 2260 headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK; 2261 hit = 0; 2262 for (; p->xfer == xfer; p = n) { 2263 hit |= headp == p->physaddr; 2264 n = p->nexttd; 2265 ohci_free_std(sc, p); 2266 } 2267 /* Zap headp register if hardware pointed inside the xfer. */ 2268 if (hit) { 2269 DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n", 2270 (int)p->physaddr, (int)O32TOH(sed->ed.ed_tailp))); 2271 sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */ 2272 } else { 2273 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2274 } 2275 2276 /* 2277 * Step 4: Turn on hardware again. 2278 */ 2279 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 2280 2281 /* 2282 * Step 5: Execute callback. 2283 */ 2284 wake = xfer->hcflags & UXFER_ABORTWAIT; 2285 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2286 usb_transfer_complete(xfer); 2287 if (wake) 2288 wakeup(&xfer->hcflags); 2289 2290 splx(s); 2291 } 2292 2293 /* 2294 * Data structures and routines to emulate the root hub. 2295 */ 2296 Static usb_device_descriptor_t ohci_devd = { 2297 USB_DEVICE_DESCRIPTOR_SIZE, 2298 UDESC_DEVICE, /* type */ 2299 {0x00, 0x01}, /* USB version */ 2300 UDCLASS_HUB, /* class */ 2301 UDSUBCLASS_HUB, /* subclass */ 2302 UDPROTO_FSHUB, 2303 64, /* max packet */ 2304 {0},{0},{0x00,0x01}, /* device id */ 2305 1,2,0, /* string indicies */ 2306 1 /* # of configurations */ 2307 }; 2308 2309 Static const usb_config_descriptor_t ohci_confd = { 2310 USB_CONFIG_DESCRIPTOR_SIZE, 2311 UDESC_CONFIG, 2312 {USB_CONFIG_DESCRIPTOR_SIZE + 2313 USB_INTERFACE_DESCRIPTOR_SIZE + 2314 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2315 1, 2316 1, 2317 0, 2318 UC_ATTR_MBO | UC_SELF_POWERED, 2319 0 /* max power */ 2320 }; 2321 2322 Static const usb_interface_descriptor_t ohci_ifcd = { 2323 USB_INTERFACE_DESCRIPTOR_SIZE, 2324 UDESC_INTERFACE, 2325 0, 2326 0, 2327 1, 2328 UICLASS_HUB, 2329 UISUBCLASS_HUB, 2330 UIPROTO_FSHUB, 2331 0 2332 }; 2333 2334 Static const usb_endpoint_descriptor_t ohci_endpd = { 2335 .bLength = USB_ENDPOINT_DESCRIPTOR_SIZE, 2336 .bDescriptorType = UDESC_ENDPOINT, 2337 .bEndpointAddress = UE_DIR_IN | OHCI_INTR_ENDPT, 2338 .bmAttributes = UE_INTERRUPT, 2339 .wMaxPacketSize = {8, 0}, /* max packet */ 2340 .bInterval = 255, 2341 }; 2342 2343 Static const usb_hub_descriptor_t ohci_hubd = { 2344 .bDescLength = USB_HUB_DESCRIPTOR_SIZE, 2345 .bDescriptorType = UDESC_HUB, 2346 }; 2347 2348 /* 2349 * Simulate a hardware hub by handling all the necessary requests. 2350 */ 2351 Static usbd_status 2352 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2353 { 2354 usbd_status err; 2355 2356 /* Insert last in queue. */ 2357 err = usb_insert_transfer(xfer); 2358 if (err) 2359 return (err); 2360 2361 /* Pipe isn't running, start first */ 2362 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2363 } 2364 2365 Static usbd_status 2366 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2367 { 2368 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2369 usb_device_request_t *req; 2370 void *buf = NULL; 2371 int port, i; 2372 int s, len, value, index, l, totlen = 0; 2373 usb_port_status_t ps; 2374 usb_hub_descriptor_t hubd; 2375 usbd_status err; 2376 u_int32_t v; 2377 2378 if (sc->sc_dying) 2379 return (USBD_IOERROR); 2380 2381 #ifdef DIAGNOSTIC 2382 if (!(xfer->rqflags & URQ_REQUEST)) 2383 /* XXX panic */ 2384 return (USBD_INVAL); 2385 #endif 2386 req = &xfer->request; 2387 2388 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2389 req->bmRequestType, req->bRequest)); 2390 2391 len = UGETW(req->wLength); 2392 value = UGETW(req->wValue); 2393 index = UGETW(req->wIndex); 2394 2395 if (len != 0) 2396 buf = KERNADDR(&xfer->dmabuf, 0); 2397 2398 #define C(x,y) ((x) | ((y) << 8)) 2399 switch(C(req->bRequest, req->bmRequestType)) { 2400 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2401 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2402 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2403 /* 2404 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2405 * for the integrated root hub. 2406 */ 2407 break; 2408 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2409 if (len > 0) { 2410 *(u_int8_t *)buf = sc->sc_conf; 2411 totlen = 1; 2412 } 2413 break; 2414 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2415 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2416 if (len == 0) 2417 break; 2418 switch(value >> 8) { 2419 case UDESC_DEVICE: 2420 if ((value & 0xff) != 0) { 2421 err = USBD_IOERROR; 2422 goto ret; 2423 } 2424 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2425 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2426 memcpy(buf, &ohci_devd, l); 2427 break; 2428 case UDESC_CONFIG: 2429 if ((value & 0xff) != 0) { 2430 err = USBD_IOERROR; 2431 goto ret; 2432 } 2433 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2434 memcpy(buf, &ohci_confd, l); 2435 buf = (char *)buf + l; 2436 len -= l; 2437 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2438 totlen += l; 2439 memcpy(buf, &ohci_ifcd, l); 2440 buf = (char *)buf + l; 2441 len -= l; 2442 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2443 totlen += l; 2444 memcpy(buf, &ohci_endpd, l); 2445 break; 2446 case UDESC_STRING: 2447 #define sd ((usb_string_descriptor_t *)buf) 2448 switch (value & 0xff) { 2449 case 0: /* Language table */ 2450 totlen = usb_makelangtbl(sd, len); 2451 break; 2452 case 1: /* Vendor */ 2453 totlen = usb_makestrdesc(sd, len, 2454 sc->sc_vendor); 2455 break; 2456 case 2: /* Product */ 2457 totlen = usb_makestrdesc(sd, len, 2458 "OHCI root hub"); 2459 break; 2460 } 2461 #undef sd 2462 break; 2463 default: 2464 err = USBD_IOERROR; 2465 goto ret; 2466 } 2467 break; 2468 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2469 if (len > 0) { 2470 *(u_int8_t *)buf = 0; 2471 totlen = 1; 2472 } 2473 break; 2474 case C(UR_GET_STATUS, UT_READ_DEVICE): 2475 if (len > 1) { 2476 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2477 totlen = 2; 2478 } 2479 break; 2480 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2481 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2482 if (len > 1) { 2483 USETW(((usb_status_t *)buf)->wStatus, 0); 2484 totlen = 2; 2485 } 2486 break; 2487 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2488 if (value >= USB_MAX_DEVICES) { 2489 err = USBD_IOERROR; 2490 goto ret; 2491 } 2492 sc->sc_addr = value; 2493 break; 2494 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2495 if (value != 0 && value != 1) { 2496 err = USBD_IOERROR; 2497 goto ret; 2498 } 2499 sc->sc_conf = value; 2500 break; 2501 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2502 break; 2503 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2504 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2505 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2506 err = USBD_IOERROR; 2507 goto ret; 2508 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2509 break; 2510 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2511 break; 2512 /* Hub requests */ 2513 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2514 break; 2515 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2516 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2517 "port=%d feature=%d\n", 2518 index, value)); 2519 if (index < 1 || index > sc->sc_noport) { 2520 err = USBD_IOERROR; 2521 goto ret; 2522 } 2523 port = OHCI_RH_PORT_STATUS(index); 2524 switch(value) { 2525 case UHF_PORT_ENABLE: 2526 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2527 break; 2528 case UHF_PORT_SUSPEND: 2529 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2530 break; 2531 case UHF_PORT_POWER: 2532 /* Yes, writing to the LOW_SPEED bit clears power. */ 2533 OWRITE4(sc, port, UPS_LOW_SPEED); 2534 break; 2535 case UHF_C_PORT_CONNECTION: 2536 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2537 break; 2538 case UHF_C_PORT_ENABLE: 2539 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2540 break; 2541 case UHF_C_PORT_SUSPEND: 2542 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2543 break; 2544 case UHF_C_PORT_OVER_CURRENT: 2545 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2546 break; 2547 case UHF_C_PORT_RESET: 2548 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2549 break; 2550 default: 2551 err = USBD_IOERROR; 2552 goto ret; 2553 } 2554 switch(value) { 2555 case UHF_C_PORT_CONNECTION: 2556 case UHF_C_PORT_ENABLE: 2557 case UHF_C_PORT_SUSPEND: 2558 case UHF_C_PORT_OVER_CURRENT: 2559 case UHF_C_PORT_RESET: 2560 /* Enable RHSC interrupt if condition is cleared. */ 2561 if ((OREAD4(sc, port) >> 16) == 0) 2562 ohci_rhsc_enable(sc); 2563 break; 2564 default: 2565 break; 2566 } 2567 break; 2568 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2569 if (len == 0) 2570 break; 2571 if ((value & 0xff) != 0) { 2572 err = USBD_IOERROR; 2573 goto ret; 2574 } 2575 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2576 hubd = ohci_hubd; 2577 hubd.bNbrPorts = sc->sc_noport; 2578 USETW(hubd.wHubCharacteristics, 2579 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2580 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2581 /* XXX overcurrent */ 2582 ); 2583 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2584 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2585 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2586 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2587 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2588 l = min(len, hubd.bDescLength); 2589 totlen = l; 2590 memcpy(buf, &hubd, l); 2591 break; 2592 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2593 if (len != 4) { 2594 err = USBD_IOERROR; 2595 goto ret; 2596 } 2597 memset(buf, 0, len); /* ? XXX */ 2598 totlen = len; 2599 break; 2600 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2601 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2602 index)); 2603 if (index < 1 || index > sc->sc_noport) { 2604 err = USBD_IOERROR; 2605 goto ret; 2606 } 2607 if (len != 4) { 2608 err = USBD_IOERROR; 2609 goto ret; 2610 } 2611 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2612 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2613 v)); 2614 USETW(ps.wPortStatus, v); 2615 USETW(ps.wPortChange, v >> 16); 2616 l = min(len, sizeof ps); 2617 memcpy(buf, &ps, l); 2618 totlen = l; 2619 break; 2620 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2621 err = USBD_IOERROR; 2622 goto ret; 2623 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2624 break; 2625 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2626 if (index < 1 || index > sc->sc_noport) { 2627 err = USBD_IOERROR; 2628 goto ret; 2629 } 2630 port = OHCI_RH_PORT_STATUS(index); 2631 switch(value) { 2632 case UHF_PORT_ENABLE: 2633 OWRITE4(sc, port, UPS_PORT_ENABLED); 2634 break; 2635 case UHF_PORT_SUSPEND: 2636 OWRITE4(sc, port, UPS_SUSPEND); 2637 break; 2638 case UHF_PORT_RESET: 2639 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2640 index)); 2641 OWRITE4(sc, port, UPS_RESET); 2642 for (i = 0; i < 5; i++) { 2643 usb_delay_ms(&sc->sc_bus, 2644 USB_PORT_ROOT_RESET_DELAY); 2645 if (sc->sc_dying) { 2646 err = USBD_IOERROR; 2647 goto ret; 2648 } 2649 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2650 break; 2651 } 2652 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2653 index, OREAD4(sc, port))); 2654 break; 2655 case UHF_PORT_POWER: 2656 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2657 "%d\n", index)); 2658 OWRITE4(sc, port, UPS_PORT_POWER); 2659 break; 2660 default: 2661 err = USBD_IOERROR; 2662 goto ret; 2663 } 2664 break; 2665 default: 2666 err = USBD_IOERROR; 2667 goto ret; 2668 } 2669 xfer->actlen = totlen; 2670 err = USBD_NORMAL_COMPLETION; 2671 ret: 2672 xfer->status = err; 2673 s = splusb(); 2674 usb_transfer_complete(xfer); 2675 splx(s); 2676 return (USBD_IN_PROGRESS); 2677 } 2678 2679 /* Abort a root control request. */ 2680 Static void 2681 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2682 { 2683 /* Nothing to do, all transfers are synchronous. */ 2684 } 2685 2686 /* Close the root pipe. */ 2687 Static void 2688 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2689 { 2690 DPRINTF(("ohci_root_ctrl_close\n")); 2691 /* Nothing to do. */ 2692 } 2693 2694 Static usbd_status 2695 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2696 { 2697 usbd_status err; 2698 2699 /* Insert last in queue. */ 2700 err = usb_insert_transfer(xfer); 2701 if (err) 2702 return (err); 2703 2704 /* Pipe isn't running, start first */ 2705 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2706 } 2707 2708 Static usbd_status 2709 ohci_root_intr_start(usbd_xfer_handle xfer) 2710 { 2711 usbd_pipe_handle pipe = xfer->pipe; 2712 ohci_softc_t *sc = pipe->device->bus->hci_private; 2713 2714 if (sc->sc_dying) 2715 return (USBD_IOERROR); 2716 2717 sc->sc_intrxfer = xfer; 2718 2719 return (USBD_IN_PROGRESS); 2720 } 2721 2722 /* Abort a root interrupt request. */ 2723 Static void 2724 ohci_root_intr_abort(usbd_xfer_handle xfer) 2725 { 2726 int s; 2727 2728 if (xfer->pipe->intrxfer == xfer) { 2729 DPRINTF(("ohci_root_intr_abort: remove\n")); 2730 xfer->pipe->intrxfer = NULL; 2731 } 2732 xfer->status = USBD_CANCELLED; 2733 s = splusb(); 2734 usb_transfer_complete(xfer); 2735 splx(s); 2736 } 2737 2738 /* Close the root pipe. */ 2739 Static void 2740 ohci_root_intr_close(usbd_pipe_handle pipe) 2741 { 2742 ohci_softc_t *sc = pipe->device->bus->hci_private; 2743 2744 DPRINTF(("ohci_root_intr_close\n")); 2745 2746 sc->sc_intrxfer = NULL; 2747 } 2748 2749 /************************/ 2750 2751 Static usbd_status 2752 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2753 { 2754 usbd_status err; 2755 2756 /* Insert last in queue. */ 2757 err = usb_insert_transfer(xfer); 2758 if (err) 2759 return (err); 2760 2761 /* Pipe isn't running, start first */ 2762 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2763 } 2764 2765 Static usbd_status 2766 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2767 { 2768 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2769 usbd_status err; 2770 2771 if (sc->sc_dying) 2772 return (USBD_IOERROR); 2773 2774 #ifdef DIAGNOSTIC 2775 if (!(xfer->rqflags & URQ_REQUEST)) { 2776 /* XXX panic */ 2777 printf("ohci_device_ctrl_transfer: not a request\n"); 2778 return (USBD_INVAL); 2779 } 2780 #endif 2781 2782 err = ohci_device_request(xfer); 2783 if (err) 2784 return (err); 2785 2786 if (sc->sc_bus.use_polling) 2787 ohci_waitintr(sc, xfer); 2788 return (USBD_IN_PROGRESS); 2789 } 2790 2791 /* Abort a device control request. */ 2792 Static void 2793 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2794 { 2795 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2796 ohci_abort_xfer(xfer, USBD_CANCELLED); 2797 } 2798 2799 /* Close a device control pipe. */ 2800 Static void 2801 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2802 { 2803 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2804 ohci_softc_t *sc = pipe->device->bus->hci_private; 2805 2806 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2807 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2808 ohci_free_std(sc, opipe->tail.td); 2809 } 2810 2811 /************************/ 2812 2813 Static void 2814 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2815 { 2816 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2817 ohci_softc_t *sc = pipe->device->bus->hci_private; 2818 2819 opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY); 2820 } 2821 2822 Static void 2823 ohci_noop(usbd_pipe_handle pipe) 2824 { 2825 } 2826 2827 Static usbd_status 2828 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2829 { 2830 usbd_status err; 2831 2832 /* Insert last in queue. */ 2833 err = usb_insert_transfer(xfer); 2834 if (err) 2835 return (err); 2836 2837 /* Pipe isn't running, start first */ 2838 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2839 } 2840 2841 Static usbd_status 2842 ohci_device_bulk_start(usbd_xfer_handle xfer) 2843 { 2844 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2845 usbd_device_handle dev = opipe->pipe.device; 2846 ohci_softc_t *sc = dev->bus->hci_private; 2847 int addr = dev->address; 2848 ohci_soft_td_t *data, *tail, *tdp; 2849 ohci_soft_ed_t *sed; 2850 int s, len, isread, endpt; 2851 usbd_status err; 2852 2853 if (sc->sc_dying) 2854 return (USBD_IOERROR); 2855 2856 #ifdef DIAGNOSTIC 2857 if (xfer->rqflags & URQ_REQUEST) { 2858 /* XXX panic */ 2859 printf("ohci_device_bulk_start: a request\n"); 2860 return (USBD_INVAL); 2861 } 2862 #endif 2863 2864 len = xfer->length; 2865 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2866 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2867 sed = opipe->sed; 2868 2869 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2870 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2871 endpt)); 2872 2873 opipe->u.bulk.isread = isread; 2874 opipe->u.bulk.length = len; 2875 2876 /* Update device address */ 2877 sed->ed.ed_flags = HTOO32( 2878 (O32TOH(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2879 OHCI_ED_SET_FA(addr)); 2880 2881 /* Allocate a chain of new TDs (including a new tail). */ 2882 data = opipe->tail.td; 2883 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2884 data, &tail); 2885 /* We want interrupt at the end of the transfer. */ 2886 tail->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 2887 tail->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 2888 tail->flags |= OHCI_CALL_DONE; 2889 tail = tail->nexttd; /* point at sentinel */ 2890 if (err) 2891 return (err); 2892 2893 tail->xfer = NULL; 2894 xfer->hcpriv = data; 2895 2896 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2897 "td_cbp=0x%08x td_be=0x%08x\n", 2898 (int)O32TOH(sed->ed.ed_flags), 2899 (int)O32TOH(data->td.td_flags), 2900 (int)O32TOH(data->td.td_cbp), 2901 (int)O32TOH(data->td.td_be))); 2902 2903 #ifdef OHCI_DEBUG 2904 if (ohcidebug > 5) { 2905 ohci_dump_ed(sc, sed); 2906 ohci_dump_tds(sc, data); 2907 } 2908 #endif 2909 2910 /* Insert ED in schedule */ 2911 s = splusb(); 2912 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2913 tdp->xfer = xfer; 2914 } 2915 sed->ed.ed_tailp = HTOO32(tail->physaddr); 2916 opipe->tail.td = tail; 2917 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 2918 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2919 if (xfer->timeout && !sc->sc_bus.use_polling) { 2920 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2921 ohci_timeout, xfer); 2922 } 2923 2924 #if 0 2925 /* This goes wrong if we are too slow. */ 2926 if (ohcidebug > 10) { 2927 delay(10000); 2928 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2929 OREAD4(sc, OHCI_COMMAND_STATUS))); 2930 ohci_dump_ed(sc, sed); 2931 ohci_dump_tds(sc, data); 2932 } 2933 #endif 2934 2935 splx(s); 2936 2937 return (USBD_IN_PROGRESS); 2938 } 2939 2940 Static void 2941 ohci_device_bulk_abort(usbd_xfer_handle xfer) 2942 { 2943 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2944 ohci_abort_xfer(xfer, USBD_CANCELLED); 2945 } 2946 2947 /* 2948 * Close a device bulk pipe. 2949 */ 2950 Static void 2951 ohci_device_bulk_close(usbd_pipe_handle pipe) 2952 { 2953 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2954 ohci_softc_t *sc = pipe->device->bus->hci_private; 2955 2956 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2957 ohci_close_pipe(pipe, sc->sc_bulk_head); 2958 ohci_free_std(sc, opipe->tail.td); 2959 } 2960 2961 /************************/ 2962 2963 Static usbd_status 2964 ohci_device_intr_transfer(usbd_xfer_handle xfer) 2965 { 2966 usbd_status err; 2967 2968 /* Insert last in queue. */ 2969 err = usb_insert_transfer(xfer); 2970 if (err) 2971 return (err); 2972 2973 /* Pipe isn't running, start first */ 2974 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2975 } 2976 2977 Static usbd_status 2978 ohci_device_intr_start(usbd_xfer_handle xfer) 2979 { 2980 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2981 usbd_device_handle dev = opipe->pipe.device; 2982 ohci_softc_t *sc = dev->bus->hci_private; 2983 ohci_soft_ed_t *sed = opipe->sed; 2984 ohci_soft_td_t *data, *tail; 2985 int s, len, isread, endpt; 2986 2987 if (sc->sc_dying) 2988 return (USBD_IOERROR); 2989 2990 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2991 "flags=%d priv=%p\n", 2992 xfer, xfer->length, xfer->flags, xfer->priv)); 2993 2994 #ifdef DIAGNOSTIC 2995 if (xfer->rqflags & URQ_REQUEST) 2996 panic("ohci_device_intr_transfer: a request"); 2997 #endif 2998 2999 len = xfer->length; 3000 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 3001 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3002 3003 data = opipe->tail.td; 3004 tail = ohci_alloc_std(sc); 3005 if (tail == NULL) 3006 return (USBD_NOMEM); 3007 tail->xfer = NULL; 3008 3009 data->td.td_flags = HTOO32( 3010 isread ? OHCI_TD_IN : OHCI_TD_OUT | 3011 OHCI_TD_NOCC | 3012 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 3013 if (xfer->flags & USBD_SHORT_XFER_OK) 3014 data->td.td_flags |= HTOO32(OHCI_TD_R); 3015 data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0)); 3016 data->nexttd = tail; 3017 data->td.td_nexttd = HTOO32(tail->physaddr); 3018 data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + len - 1); 3019 data->len = len; 3020 data->xfer = xfer; 3021 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 3022 xfer->hcpriv = data; 3023 3024 #ifdef OHCI_DEBUG 3025 if (ohcidebug > 5) { 3026 DPRINTF(("ohci_device_intr_transfer:\n")); 3027 ohci_dump_ed(sc, sed); 3028 ohci_dump_tds(sc, data); 3029 } 3030 #endif 3031 3032 /* Insert ED in schedule */ 3033 s = splusb(); 3034 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3035 opipe->tail.td = tail; 3036 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3037 3038 #if 0 3039 /* 3040 * This goes horribly wrong, printing thousands of descriptors, 3041 * because false references are followed due to the fact that the 3042 * TD is gone. 3043 */ 3044 if (ohcidebug > 5) { 3045 usb_delay_ms(&sc->sc_bus, 5); 3046 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 3047 OREAD4(sc, OHCI_COMMAND_STATUS))); 3048 ohci_dump_ed(sc, sed); 3049 ohci_dump_tds(sc, data); 3050 } 3051 #endif 3052 splx(s); 3053 3054 return (USBD_IN_PROGRESS); 3055 } 3056 3057 /* Abort a device control request. */ 3058 Static void 3059 ohci_device_intr_abort(usbd_xfer_handle xfer) 3060 { 3061 if (xfer->pipe->intrxfer == xfer) { 3062 DPRINTF(("ohci_device_intr_abort: remove\n")); 3063 xfer->pipe->intrxfer = NULL; 3064 } 3065 ohci_abort_xfer(xfer, USBD_CANCELLED); 3066 } 3067 3068 /* Close a device interrupt pipe. */ 3069 Static void 3070 ohci_device_intr_close(usbd_pipe_handle pipe) 3071 { 3072 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3073 ohci_softc_t *sc = pipe->device->bus->hci_private; 3074 int nslots = opipe->u.intr.nslots; 3075 int pos = opipe->u.intr.pos; 3076 int j; 3077 ohci_soft_ed_t *p, *sed = opipe->sed; 3078 int s; 3079 3080 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 3081 pipe, nslots, pos)); 3082 s = splusb(); 3083 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 3084 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3085 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 3086 usb_delay_ms(&sc->sc_bus, 2); 3087 3088 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3089 continue; 3090 #ifdef DIAGNOSTIC 3091 if (p == NULL) 3092 panic("ohci_device_intr_close: ED not found"); 3093 #endif 3094 p->next = sed->next; 3095 p->ed.ed_nexted = sed->ed.ed_nexted; 3096 splx(s); 3097 3098 for (j = 0; j < nslots; j++) 3099 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3100 3101 ohci_free_std(sc, opipe->tail.td); 3102 ohci_free_sed(sc, opipe->sed); 3103 } 3104 3105 Static usbd_status 3106 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3107 { 3108 int i, j, s, best; 3109 u_int npoll, slow, shigh, nslots; 3110 u_int bestbw, bw; 3111 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3112 3113 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 3114 if (ival == 0) { 3115 printf("ohci_setintr: 0 interval\n"); 3116 return (USBD_INVAL); 3117 } 3118 3119 npoll = OHCI_NO_INTRS; 3120 while (npoll > ival) 3121 npoll /= 2; 3122 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 3123 3124 /* 3125 * We now know which level in the tree the ED must go into. 3126 * Figure out which slot has most bandwidth left over. 3127 * Slots to examine: 3128 * npoll 3129 * 1 0 3130 * 2 1 2 3131 * 4 3 4 5 6 3132 * 8 7 8 9 10 11 12 13 14 3133 * N (N-1) .. (N-1+N-1) 3134 */ 3135 slow = npoll-1; 3136 shigh = slow + npoll; 3137 nslots = OHCI_NO_INTRS / npoll; 3138 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3139 bw = 0; 3140 for (j = 0; j < nslots; j++) 3141 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3142 if (bw < bestbw) { 3143 best = i; 3144 bestbw = bw; 3145 } 3146 } 3147 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3148 best, slow, shigh, bestbw)); 3149 3150 s = splusb(); 3151 hsed = sc->sc_eds[best]; 3152 sed->next = hsed->next; 3153 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3154 hsed->next = sed; 3155 hsed->ed.ed_nexted = HTOO32(sed->physaddr); 3156 splx(s); 3157 3158 for (j = 0; j < nslots; j++) 3159 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3160 opipe->u.intr.nslots = nslots; 3161 opipe->u.intr.pos = best; 3162 3163 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3164 return (USBD_NORMAL_COMPLETION); 3165 } 3166 3167 /***********************/ 3168 3169 usbd_status 3170 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3171 { 3172 usbd_status err; 3173 3174 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3175 3176 /* Put it on our queue, */ 3177 err = usb_insert_transfer(xfer); 3178 3179 /* bail out on error, */ 3180 if (err && err != USBD_IN_PROGRESS) 3181 return (err); 3182 3183 /* XXX should check inuse here */ 3184 3185 /* insert into schedule, */ 3186 ohci_device_isoc_enter(xfer); 3187 3188 /* and start if the pipe wasn't running */ 3189 if (!err) 3190 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3191 3192 return (err); 3193 } 3194 3195 void 3196 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3197 { 3198 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3199 usbd_device_handle dev = opipe->pipe.device; 3200 ohci_softc_t *sc = dev->bus->hci_private; 3201 ohci_soft_ed_t *sed = opipe->sed; 3202 struct iso *iso = &opipe->u.iso; 3203 ohci_soft_itd_t *sitd, *nsitd; 3204 ohci_physaddr_t buf, offs, noffs, bp0; 3205 int i, ncur, nframes; 3206 int s; 3207 3208 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3209 "nframes=%d\n", 3210 iso->inuse, iso->next, xfer, xfer->nframes)); 3211 3212 if (sc->sc_dying) 3213 return; 3214 3215 if (iso->next == -1) { 3216 /* Not in use yet, schedule it a few frames ahead. */ 3217 iso->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5; 3218 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3219 iso->next)); 3220 } 3221 3222 sitd = opipe->tail.itd; 3223 buf = DMAADDR(&xfer->dmabuf, 0); 3224 bp0 = OHCI_PAGE(buf); 3225 offs = OHCI_PAGE_OFFSET(buf); 3226 nframes = xfer->nframes; 3227 xfer->hcpriv = sitd; 3228 for (i = ncur = 0; i < nframes; i++, ncur++) { 3229 noffs = offs + xfer->frlengths[i]; 3230 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3231 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3232 3233 /* Allocate next ITD */ 3234 nsitd = ohci_alloc_sitd(sc); 3235 if (nsitd == NULL) { 3236 /* XXX what now? */ 3237 printf("%s: isoc TD alloc failed\n", 3238 device_xname(sc->sc_dev)); 3239 return; 3240 } 3241 3242 /* Fill current ITD */ 3243 sitd->itd.itd_flags = HTOO32( 3244 OHCI_ITD_NOCC | 3245 OHCI_ITD_SET_SF(iso->next) | 3246 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3247 OHCI_ITD_SET_FC(ncur)); 3248 sitd->itd.itd_bp0 = HTOO32(bp0); 3249 sitd->nextitd = nsitd; 3250 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3251 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3252 sitd->xfer = xfer; 3253 sitd->flags = 0; 3254 3255 sitd = nsitd; 3256 iso->next = iso->next + ncur; 3257 bp0 = OHCI_PAGE(buf + offs); 3258 ncur = 0; 3259 } 3260 sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs)); 3261 offs = noffs; 3262 } 3263 nsitd = ohci_alloc_sitd(sc); 3264 if (nsitd == NULL) { 3265 /* XXX what now? */ 3266 printf("%s: isoc TD alloc failed\n", 3267 device_xname(sc->sc_dev)); 3268 return; 3269 } 3270 /* Fixup last used ITD */ 3271 sitd->itd.itd_flags = HTOO32( 3272 OHCI_ITD_NOCC | 3273 OHCI_ITD_SET_SF(iso->next) | 3274 OHCI_ITD_SET_DI(0) | 3275 OHCI_ITD_SET_FC(ncur)); 3276 sitd->itd.itd_bp0 = HTOO32(bp0); 3277 sitd->nextitd = nsitd; 3278 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3279 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3280 sitd->xfer = xfer; 3281 sitd->flags = OHCI_CALL_DONE; 3282 3283 iso->next = iso->next + ncur; 3284 iso->inuse += nframes; 3285 3286 xfer->actlen = offs; /* XXX pretend we did it all */ 3287 3288 xfer->status = USBD_IN_PROGRESS; 3289 3290 #ifdef OHCI_DEBUG 3291 if (ohcidebug > 5) { 3292 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3293 O32TOH(sc->sc_hcca->hcca_frame_number))); 3294 ohci_dump_itds(sc, xfer->hcpriv); 3295 ohci_dump_ed(sc, sed); 3296 } 3297 #endif 3298 3299 s = splusb(); 3300 sed->ed.ed_tailp = HTOO32(nsitd->physaddr); 3301 opipe->tail.itd = nsitd; 3302 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3303 splx(s); 3304 3305 #ifdef OHCI_DEBUG 3306 if (ohcidebug > 5) { 3307 delay(150000); 3308 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3309 O32TOH(sc->sc_hcca->hcca_frame_number))); 3310 ohci_dump_itds(sc, xfer->hcpriv); 3311 ohci_dump_ed(sc, sed); 3312 } 3313 #endif 3314 } 3315 3316 usbd_status 3317 ohci_device_isoc_start(usbd_xfer_handle xfer) 3318 { 3319 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3320 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 3321 3322 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3323 3324 if (sc->sc_dying) 3325 return (USBD_IOERROR); 3326 3327 #ifdef DIAGNOSTIC 3328 if (xfer->status != USBD_IN_PROGRESS) 3329 printf("ohci_device_isoc_start: not in progress %p\n", xfer); 3330 #endif 3331 3332 /* XXX anything to do? */ 3333 3334 return (USBD_IN_PROGRESS); 3335 } 3336 3337 void 3338 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3339 { 3340 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3341 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 3342 ohci_soft_ed_t *sed; 3343 ohci_soft_itd_t *sitd; 3344 int s; 3345 3346 s = splusb(); 3347 3348 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3349 3350 /* Transfer is already done. */ 3351 if (xfer->status != USBD_NOT_STARTED && 3352 xfer->status != USBD_IN_PROGRESS) { 3353 splx(s); 3354 printf("ohci_device_isoc_abort: early return\n"); 3355 return; 3356 } 3357 3358 /* Give xfer the requested abort code. */ 3359 xfer->status = USBD_CANCELLED; 3360 3361 sed = opipe->sed; 3362 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 3363 3364 sitd = xfer->hcpriv; 3365 #ifdef DIAGNOSTIC 3366 if (sitd == NULL) { 3367 splx(s); 3368 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3369 return; 3370 } 3371 #endif 3372 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3373 #ifdef DIAGNOSTIC 3374 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3375 sitd->isdone = 1; 3376 #endif 3377 } 3378 3379 splx(s); 3380 3381 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3382 3383 s = splusb(); 3384 3385 /* Run callback. */ 3386 usb_transfer_complete(xfer); 3387 3388 sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */ 3389 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 3390 3391 splx(s); 3392 } 3393 3394 void 3395 ohci_device_isoc_done(usbd_xfer_handle xfer) 3396 { 3397 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3398 } 3399 3400 usbd_status 3401 ohci_setup_isoc(usbd_pipe_handle pipe) 3402 { 3403 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3404 ohci_softc_t *sc = pipe->device->bus->hci_private; 3405 struct iso *iso = &opipe->u.iso; 3406 int s; 3407 3408 iso->next = -1; 3409 iso->inuse = 0; 3410 3411 s = splusb(); 3412 ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head); 3413 splx(s); 3414 3415 return (USBD_NORMAL_COMPLETION); 3416 } 3417 3418 void 3419 ohci_device_isoc_close(usbd_pipe_handle pipe) 3420 { 3421 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3422 ohci_softc_t *sc = pipe->device->bus->hci_private; 3423 3424 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3425 ohci_close_pipe(pipe, sc->sc_isoc_head); 3426 #ifdef DIAGNOSTIC 3427 opipe->tail.itd->isdone = 1; 3428 #endif 3429 ohci_free_sitd(sc, opipe->tail.itd); 3430 } 3431