1 /* $NetBSD: ohci.c,v 1.74 2000/02/29 21:37:00 augustss Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (augustss@carlstedt.se) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * USB Open Host Controller driver. 43 * 44 * OHCI spec: ftp://ftp.compaq.com/pub/supportinformation/papers/hcir1_0a.exe 45 * USB spec: http://www.usb.org/developers/data/usb11.pdf 46 */ 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/malloc.h> 51 #if defined(__NetBSD__) || defined(__OpenBSD__) 52 #include <sys/kernel.h> 53 #include <sys/device.h> 54 #include <sys/select.h> 55 #elif defined(__FreeBSD__) 56 #include <sys/module.h> 57 #include <sys/bus.h> 58 #include <machine/bus_pio.h> 59 #include <machine/bus_memio.h> 60 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 61 #include <machine/cpu.h> 62 #endif 63 #endif 64 #include <sys/proc.h> 65 #include <sys/queue.h> 66 67 #include <machine/bus.h> 68 #include <machine/endian.h> 69 70 #include <dev/usb/usb.h> 71 #include <dev/usb/usbdi.h> 72 #include <dev/usb/usbdivar.h> 73 #include <dev/usb/usb_mem.h> 74 #include <dev/usb/usb_quirks.h> 75 76 #include <dev/usb/ohcireg.h> 77 #include <dev/usb/ohcivar.h> 78 79 #if defined(__FreeBSD__) 80 #include <machine/clock.h> 81 82 #define delay(d) DELAY(d) 83 #endif 84 85 #if defined(__OpenBSD__) 86 struct cfdriver ohci_cd = { 87 NULL, "ohci", DV_DULL 88 }; 89 #endif 90 91 #ifdef OHCI_DEBUG 92 #define DPRINTF(x) if (ohcidebug) logprintf x 93 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 94 int ohcidebug = 0; 95 #else 96 #define DPRINTF(x) 97 #define DPRINTFN(n,x) 98 #endif 99 100 /* 101 * The OHCI controller is little endian, so on big endian machines 102 * the data strored in memory needs to be swapped. 103 */ 104 #if BYTE_ORDER == BIG_ENDIAN 105 #define LE(x) (bswap32(x)) 106 #else 107 #define LE(x) (x) 108 #endif 109 110 struct ohci_pipe; 111 112 static ohci_soft_ed_t *ohci_alloc_sed __P((ohci_softc_t *)); 113 static void ohci_free_sed __P((ohci_softc_t *, ohci_soft_ed_t *)); 114 115 static ohci_soft_td_t *ohci_alloc_std __P((ohci_softc_t *)); 116 static void ohci_free_std __P((ohci_softc_t *, ohci_soft_td_t *)); 117 118 static ohci_soft_itd_t *ohci_alloc_sitd __P((ohci_softc_t *)); 119 static void ohci_free_sitd __P((ohci_softc_t *,ohci_soft_itd_t *)); 120 121 #if 0 122 static void ohci_free_std_chain __P((ohci_softc_t *, 123 ohci_soft_td_t *, ohci_soft_td_t *)); 124 #endif 125 static usbd_status ohci_alloc_std_chain __P((struct ohci_pipe *, 126 ohci_softc_t *, int, int, u_int16_t, usb_dma_t *, 127 ohci_soft_td_t *, ohci_soft_td_t **)); 128 129 static void ohci_shutdown __P((void *v)); 130 static void ohci_power __P((int, void *)); 131 static usbd_status ohci_open __P((usbd_pipe_handle)); 132 static void ohci_poll __P((struct usbd_bus *)); 133 static void ohci_softintr __P((struct usbd_bus *)); 134 static void ohci_waitintr __P((ohci_softc_t *, 135 usbd_xfer_handle)); 136 static void ohci_rhsc __P((ohci_softc_t *, usbd_xfer_handle)); 137 138 static usbd_status ohci_device_request __P((usbd_xfer_handle xfer)); 139 static void ohci_add_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 140 static void ohci_rem_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 141 static void ohci_hash_add_td __P((ohci_softc_t *, 142 ohci_soft_td_t *)); 143 static void ohci_hash_rem_td __P((ohci_softc_t *, 144 ohci_soft_td_t *)); 145 static ohci_soft_td_t *ohci_hash_find_td __P((ohci_softc_t *, 146 ohci_physaddr_t)); 147 148 static usbd_status ohci_setup_isoc __P((usbd_pipe_handle pipe)); 149 static void ohci_device_isoc_enter __P((usbd_xfer_handle)); 150 151 static usbd_status ohci_allocm __P((struct usbd_bus *, usb_dma_t *, 152 u_int32_t)); 153 static void ohci_freem __P((struct usbd_bus *, usb_dma_t *)); 154 155 static usbd_xfer_handle ohci_allocx __P((struct usbd_bus *)); 156 static void ohci_freex __P((struct usbd_bus *, usbd_xfer_handle)); 157 158 static usbd_status ohci_root_ctrl_transfer __P((usbd_xfer_handle)); 159 static usbd_status ohci_root_ctrl_start __P((usbd_xfer_handle)); 160 static void ohci_root_ctrl_abort __P((usbd_xfer_handle)); 161 static void ohci_root_ctrl_close __P((usbd_pipe_handle)); 162 static void ohci_root_ctrl_done __P((usbd_xfer_handle)); 163 164 static usbd_status ohci_root_intr_transfer __P((usbd_xfer_handle)); 165 static usbd_status ohci_root_intr_start __P((usbd_xfer_handle)); 166 static void ohci_root_intr_abort __P((usbd_xfer_handle)); 167 static void ohci_root_intr_close __P((usbd_pipe_handle)); 168 static void ohci_root_intr_done __P((usbd_xfer_handle)); 169 170 static usbd_status ohci_device_ctrl_transfer __P((usbd_xfer_handle)); 171 static usbd_status ohci_device_ctrl_start __P((usbd_xfer_handle)); 172 static void ohci_device_ctrl_abort __P((usbd_xfer_handle)); 173 static void ohci_device_ctrl_close __P((usbd_pipe_handle)); 174 static void ohci_device_ctrl_done __P((usbd_xfer_handle)); 175 176 static usbd_status ohci_device_bulk_transfer __P((usbd_xfer_handle)); 177 static usbd_status ohci_device_bulk_start __P((usbd_xfer_handle)); 178 static void ohci_device_bulk_abort __P((usbd_xfer_handle)); 179 static void ohci_device_bulk_close __P((usbd_pipe_handle)); 180 static void ohci_device_bulk_done __P((usbd_xfer_handle)); 181 182 static usbd_status ohci_device_intr_transfer __P((usbd_xfer_handle)); 183 static usbd_status ohci_device_intr_start __P((usbd_xfer_handle)); 184 static void ohci_device_intr_abort __P((usbd_xfer_handle)); 185 static void ohci_device_intr_close __P((usbd_pipe_handle)); 186 static void ohci_device_intr_done __P((usbd_xfer_handle)); 187 188 static usbd_status ohci_device_isoc_transfer __P((usbd_xfer_handle)); 189 static usbd_status ohci_device_isoc_start __P((usbd_xfer_handle)); 190 static void ohci_device_isoc_abort __P((usbd_xfer_handle)); 191 static void ohci_device_isoc_close __P((usbd_pipe_handle)); 192 static void ohci_device_isoc_done __P((usbd_xfer_handle)); 193 194 static usbd_status ohci_device_setintr __P((ohci_softc_t *sc, 195 struct ohci_pipe *pipe, int ival)); 196 197 static int ohci_str __P((usb_string_descriptor_t *, int, char *)); 198 199 static void ohci_timeout __P((void *)); 200 static void ohci_rhsc_able __P((ohci_softc_t *, int)); 201 202 static void ohci_close_pipe __P((usbd_pipe_handle pipe, 203 ohci_soft_ed_t *head)); 204 static void ohci_abort_xfer __P((usbd_xfer_handle xfer, 205 usbd_status status)); 206 static void ohci_abort_xfer_end __P((void *)); 207 208 static void ohci_device_clear_toggle __P((usbd_pipe_handle pipe)); 209 static void ohci_noop __P((usbd_pipe_handle pipe)); 210 211 #ifdef OHCI_DEBUG 212 static void ohci_dumpregs __P((ohci_softc_t *)); 213 static void ohci_dump_tds __P((ohci_soft_td_t *)); 214 static void ohci_dump_td __P((ohci_soft_td_t *)); 215 static void ohci_dump_ed __P((ohci_soft_ed_t *)); 216 #endif 217 218 #define OWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)) 219 #define OREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r)) 220 #define OREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r)) 221 222 /* Reverse the bits in a value 0 .. 31 */ 223 static u_int8_t revbits[OHCI_NO_INTRS] = 224 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 225 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 226 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 227 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 228 229 struct ohci_pipe { 230 struct usbd_pipe pipe; 231 ohci_soft_ed_t *sed; 232 union { 233 ohci_soft_td_t *td; 234 ohci_soft_itd_t *itd; 235 } tail; 236 /* Info needed for different pipe kinds. */ 237 union { 238 /* Control pipe */ 239 struct { 240 usb_dma_t reqdma; 241 u_int length; 242 ohci_soft_td_t *setup, *data, *stat; 243 } ctl; 244 /* Interrupt pipe */ 245 struct { 246 int nslots; 247 int pos; 248 } intr; 249 /* Bulk pipe */ 250 struct { 251 u_int length; 252 int isread; 253 } bulk; 254 /* Iso pipe */ 255 struct iso { 256 int next, inuse; 257 } iso; 258 } u; 259 }; 260 261 #define OHCI_INTR_ENDPT 1 262 263 static struct usbd_bus_methods ohci_bus_methods = { 264 ohci_open, 265 ohci_softintr, 266 ohci_poll, 267 ohci_allocm, 268 ohci_freem, 269 ohci_allocx, 270 ohci_freex, 271 }; 272 273 static struct usbd_pipe_methods ohci_root_ctrl_methods = { 274 ohci_root_ctrl_transfer, 275 ohci_root_ctrl_start, 276 ohci_root_ctrl_abort, 277 ohci_root_ctrl_close, 278 ohci_noop, 279 ohci_root_ctrl_done, 280 }; 281 282 static struct usbd_pipe_methods ohci_root_intr_methods = { 283 ohci_root_intr_transfer, 284 ohci_root_intr_start, 285 ohci_root_intr_abort, 286 ohci_root_intr_close, 287 ohci_noop, 288 ohci_root_intr_done, 289 }; 290 291 static struct usbd_pipe_methods ohci_device_ctrl_methods = { 292 ohci_device_ctrl_transfer, 293 ohci_device_ctrl_start, 294 ohci_device_ctrl_abort, 295 ohci_device_ctrl_close, 296 ohci_noop, 297 ohci_device_ctrl_done, 298 }; 299 300 static struct usbd_pipe_methods ohci_device_intr_methods = { 301 ohci_device_intr_transfer, 302 ohci_device_intr_start, 303 ohci_device_intr_abort, 304 ohci_device_intr_close, 305 ohci_device_clear_toggle, 306 ohci_device_intr_done, 307 }; 308 309 static struct usbd_pipe_methods ohci_device_bulk_methods = { 310 ohci_device_bulk_transfer, 311 ohci_device_bulk_start, 312 ohci_device_bulk_abort, 313 ohci_device_bulk_close, 314 ohci_device_clear_toggle, 315 ohci_device_bulk_done, 316 }; 317 318 static struct usbd_pipe_methods ohci_device_isoc_methods = { 319 ohci_device_isoc_transfer, 320 ohci_device_isoc_start, 321 ohci_device_isoc_abort, 322 ohci_device_isoc_close, 323 ohci_noop, 324 ohci_device_isoc_done, 325 }; 326 327 #if defined(__NetBSD__) || defined(__OpenBSD__) 328 int 329 ohci_activate(self, act) 330 device_ptr_t self; 331 enum devact act; 332 { 333 struct ohci_softc *sc = (struct ohci_softc *)self; 334 int rv = 0; 335 336 switch (act) { 337 case DVACT_ACTIVATE: 338 return (EOPNOTSUPP); 339 break; 340 341 case DVACT_DEACTIVATE: 342 if (sc->sc_child != NULL) 343 rv = config_deactivate(sc->sc_child); 344 break; 345 } 346 return (rv); 347 } 348 349 int 350 ohci_detach(sc, flags) 351 struct ohci_softc *sc; 352 int flags; 353 { 354 int rv = 0; 355 356 if (sc->sc_child != NULL) 357 rv = config_detach(sc->sc_child, flags); 358 359 if (rv != 0) 360 return (rv); 361 362 #if defined(__NetBSD__) || defined(__OpenBSD__) 363 powerhook_disestablish(sc->sc_powerhook); 364 shutdownhook_disestablish(sc->sc_shutdownhook); 365 #endif 366 367 /* free data structures XXX */ 368 369 return (rv); 370 } 371 #endif 372 373 ohci_soft_ed_t * 374 ohci_alloc_sed(sc) 375 ohci_softc_t *sc; 376 { 377 ohci_soft_ed_t *sed; 378 usbd_status err; 379 int i, offs; 380 usb_dma_t dma; 381 382 if (sc->sc_freeeds == NULL) { 383 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 384 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 385 OHCI_ED_ALIGN, &dma); 386 if (err) 387 return (0); 388 for(i = 0; i < OHCI_SED_CHUNK; i++) { 389 offs = i * OHCI_SED_SIZE; 390 sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs); 391 sed->physaddr = DMAADDR(&dma) + offs; 392 sed->next = sc->sc_freeeds; 393 sc->sc_freeeds = sed; 394 } 395 } 396 sed = sc->sc_freeeds; 397 sc->sc_freeeds = sed->next; 398 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 399 sed->next = 0; 400 return (sed); 401 } 402 403 void 404 ohci_free_sed(sc, sed) 405 ohci_softc_t *sc; 406 ohci_soft_ed_t *sed; 407 { 408 sed->next = sc->sc_freeeds; 409 sc->sc_freeeds = sed; 410 } 411 412 ohci_soft_td_t * 413 ohci_alloc_std(sc) 414 ohci_softc_t *sc; 415 { 416 ohci_soft_td_t *std; 417 usbd_status err; 418 int i, offs; 419 usb_dma_t dma; 420 int s; 421 422 if (sc->sc_freetds == NULL) { 423 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 424 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 425 OHCI_TD_ALIGN, &dma); 426 if (err) 427 return (0); 428 s = splusb(); 429 for(i = 0; i < OHCI_STD_CHUNK; i++) { 430 offs = i * OHCI_STD_SIZE; 431 std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs); 432 std->physaddr = DMAADDR(&dma) + offs; 433 std->nexttd = sc->sc_freetds; 434 sc->sc_freetds = std; 435 } 436 splx(s); 437 } 438 439 s = splusb(); 440 std = sc->sc_freetds; 441 sc->sc_freetds = std->nexttd; 442 memset(&std->td, 0, sizeof(ohci_td_t)); 443 std->nexttd = 0; 444 445 ohci_hash_add_td(sc, std); 446 splx(s); 447 448 return (std); 449 } 450 451 void 452 ohci_free_std(sc, std) 453 ohci_softc_t *sc; 454 ohci_soft_td_t *std; 455 { 456 int s; 457 458 s = splusb(); 459 ohci_hash_rem_td(sc, std); 460 461 std->nexttd = sc->sc_freetds; 462 sc->sc_freetds = std; 463 splx(s); 464 } 465 466 usbd_status 467 ohci_alloc_std_chain(opipe, sc, len, rd, flags, dma, sp, ep) 468 struct ohci_pipe *opipe; 469 ohci_softc_t *sc; 470 int len, rd; 471 u_int16_t flags; 472 usb_dma_t *dma; 473 ohci_soft_td_t *sp, **ep; 474 { 475 ohci_soft_td_t *next, *cur; 476 ohci_physaddr_t dataphys, dataphysend; 477 u_int32_t intr, tdflags; 478 int curlen; 479 480 DPRINTFN(len < 4096,("ohci_alloc_std_chain: start len=%d\n", len)); 481 cur = sp; 482 dataphys = DMAADDR(dma); 483 dataphysend = OHCI_PAGE(dataphys + len - 1); 484 tdflags = 485 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 486 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | 487 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0); 488 489 for (;;) { 490 next = ohci_alloc_std(sc); 491 if (next == 0) 492 goto nomem; 493 494 /* The OHCI hardware can handle at most one page crossing. */ 495 if (OHCI_PAGE(dataphys) == dataphysend || 496 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 497 /* we can handle it in this TD */ 498 curlen = len; 499 } else { 500 /* must use multiple TDs, fill as much as possible. */ 501 curlen = 2 * OHCI_PAGE_SIZE - 502 (dataphys & (OHCI_PAGE_SIZE-1)); 503 } 504 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 505 "dataphysend=0x%08x len=%d curlen=%d\n", 506 dataphys, dataphysend, 507 len, curlen)); 508 len -= curlen; 509 510 intr = len == 0 ? OHCI_TD_SET_DI(1) : OHCI_TD_NOINTR; 511 cur->td.td_flags = LE(tdflags | intr); 512 cur->td.td_cbp = LE(dataphys); 513 cur->nexttd = next; 514 cur->td.td_nexttd = LE(next->physaddr); 515 cur->td.td_be = LE(dataphys + curlen - 1); 516 cur->len = curlen; 517 cur->flags = OHCI_ADD_LEN; 518 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 519 dataphys, dataphys + curlen - 1)); 520 if (len == 0) 521 break; 522 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 523 dataphys += curlen; 524 cur = next; 525 } 526 if ((flags & USBD_FORCE_SHORT_XFER) && 527 len % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 528 /* Force a 0 length transfer at the end. */ 529 next = ohci_alloc_std(sc); 530 if (next == 0) 531 goto nomem; 532 533 cur->td.td_flags = LE(tdflags | OHCI_TD_SET_DI(1)); 534 cur->td.td_cbp = 0; /* indicate 0 length packet */ 535 cur->nexttd = next; 536 cur->td.td_nexttd = LE(next->physaddr); 537 cur->td.td_be = LE(dataphys - 1); 538 cur->len = 0; 539 cur->flags = 0; 540 cur = next; 541 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 542 } 543 cur->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 544 *ep = next; 545 546 return (USBD_NORMAL_COMPLETION); 547 548 nomem: 549 /* XXX free chain */ 550 return (USBD_NOMEM); 551 } 552 553 #if 0 554 static void 555 ohci_free_std_chain(sc, std, stdend) 556 ohci_softc_t *sc; 557 ohci_soft_td_t *std; 558 ohci_soft_td_t *stdend; 559 { 560 ohci_soft_td_t *p; 561 562 for (; std != stdend; std = p) { 563 p = std->nexttd; 564 ohci_free_std(sc, std); 565 } 566 } 567 #endif 568 569 ohci_soft_itd_t * 570 ohci_alloc_sitd(sc) 571 ohci_softc_t *sc; 572 { 573 ohci_soft_itd_t *sitd; 574 usbd_status err; 575 int i, offs; 576 usb_dma_t dma; 577 578 if (sc->sc_freeitds == NULL) { 579 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 580 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 581 OHCI_TD_ALIGN, &dma); 582 if (err) 583 return (0); 584 for(i = 0; i < OHCI_STD_CHUNK; i++) { 585 offs = i * OHCI_STD_SIZE; 586 sitd = (ohci_soft_itd_t *)((char*)KERNADDR(&dma)+offs); 587 sitd->physaddr = DMAADDR(&dma) + offs; 588 sitd->nextitd = sc->sc_freeitds; 589 sc->sc_freeitds = sitd; 590 } 591 } 592 sitd = sc->sc_freeitds; 593 sc->sc_freeitds = sitd->nextitd; 594 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 595 sitd->nextitd = 0; 596 return (sitd); 597 } 598 599 void 600 ohci_free_sitd(sc, sitd) 601 ohci_softc_t *sc; 602 ohci_soft_itd_t *sitd; 603 { 604 sitd->nextitd = sc->sc_freeitds; 605 sc->sc_freeitds = sitd; 606 } 607 608 usbd_status 609 ohci_init(sc) 610 ohci_softc_t *sc; 611 { 612 ohci_soft_ed_t *sed, *psed; 613 usbd_status err; 614 int i; 615 u_int32_t s, ctl, ival, hcr, fm, per, rev, desca; 616 617 DPRINTF(("ohci_init: start\n")); 618 #if defined(__OpenBSD__) 619 printf(","); 620 #else 621 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 622 #endif 623 rev = OREAD4(sc, OHCI_REVISION); 624 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 625 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 626 627 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 628 printf("%s: unsupported OHCI revision\n", 629 USBDEVNAME(sc->sc_bus.bdev)); 630 sc->sc_bus.usbrev = USBREV_UNKNOWN; 631 return (USBD_INVAL); 632 } 633 sc->sc_bus.usbrev = USBREV_1_0; 634 635 for (i = 0; i < OHCI_HASH_SIZE; i++) 636 LIST_INIT(&sc->sc_hash_tds[i]); 637 638 SIMPLEQ_INIT(&sc->sc_free_xfers); 639 640 /* XXX determine alignment by R/W */ 641 /* Allocate the HCCA area. */ 642 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 643 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 644 if (err) 645 return (err); 646 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma); 647 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 648 649 sc->sc_eintrs = OHCI_NORMAL_INTRS; 650 651 /* Allocate dummy ED that starts the control list. */ 652 sc->sc_ctrl_head = ohci_alloc_sed(sc); 653 if (sc->sc_ctrl_head == NULL) { 654 err = USBD_NOMEM; 655 goto bad1; 656 } 657 sc->sc_ctrl_head->ed.ed_flags |= LE(OHCI_ED_SKIP); 658 659 /* Allocate dummy ED that starts the bulk list. */ 660 sc->sc_bulk_head = ohci_alloc_sed(sc); 661 if (sc->sc_bulk_head == NULL) { 662 err = USBD_NOMEM; 663 goto bad2; 664 } 665 sc->sc_bulk_head->ed.ed_flags |= LE(OHCI_ED_SKIP); 666 667 /* Allocate dummy ED that starts the isochronous list. */ 668 sc->sc_isoc_head = ohci_alloc_sed(sc); 669 if (sc->sc_isoc_head == NULL) { 670 err = USBD_NOMEM; 671 goto bad3; 672 } 673 sc->sc_isoc_head->ed.ed_flags |= LE(OHCI_ED_SKIP); 674 675 /* Allocate all the dummy EDs that make up the interrupt tree. */ 676 for (i = 0; i < OHCI_NO_EDS; i++) { 677 sed = ohci_alloc_sed(sc); 678 if (sed == NULL) { 679 while (--i >= 0) 680 ohci_free_sed(sc, sc->sc_eds[i]); 681 err = USBD_NOMEM; 682 goto bad4; 683 } 684 /* All ED fields are set to 0. */ 685 sc->sc_eds[i] = sed; 686 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); 687 if (i != 0) 688 psed = sc->sc_eds[(i-1) / 2]; 689 else 690 psed= sc->sc_isoc_head; 691 sed->next = psed; 692 sed->ed.ed_nexted = LE(psed->physaddr); 693 } 694 /* 695 * Fill HCCA interrupt table. The bit reversal is to get 696 * the tree set up properly to spread the interrupts. 697 */ 698 for (i = 0; i < OHCI_NO_INTRS; i++) 699 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 700 LE(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 701 702 #ifdef OHCI_DEBUG 703 if (ohcidebug > 15) { 704 for (i = 0; i < OHCI_NO_EDS; i++) { 705 printf("ed#%d ", i); 706 ohci_dump_ed(sc->sc_eds[i]); 707 } 708 printf("iso "); 709 ohci_dump_ed(sc->sc_isoc_head); 710 } 711 #endif 712 713 /* Determine in what context we are running. */ 714 ctl = OREAD4(sc, OHCI_CONTROL); 715 if (ctl & OHCI_IR) { 716 /* SMM active, request change */ 717 DPRINTF(("ohci_init: SMM active, request owner change\n")); 718 s = OREAD4(sc, OHCI_COMMAND_STATUS); 719 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 720 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 721 usb_delay_ms(&sc->sc_bus, 1); 722 ctl = OREAD4(sc, OHCI_CONTROL); 723 } 724 if ((ctl & OHCI_IR) == 0) { 725 printf("%s: SMM does not respond, resetting\n", 726 USBDEVNAME(sc->sc_bus.bdev)); 727 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 728 goto reset; 729 } 730 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 731 /* BIOS started controller. */ 732 DPRINTF(("ohci_init: BIOS active\n")); 733 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 734 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 735 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 736 } 737 } else { 738 DPRINTF(("ohci_init: cold started\n")); 739 reset: 740 /* Controller was cold started. */ 741 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 742 } 743 744 /* 745 * This reset should not be necessary according to the OHCI spec, but 746 * without it some controllers do not start. 747 */ 748 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 749 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 750 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 751 752 /* We now own the host controller and the bus has been reset. */ 753 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 754 755 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 756 /* Nominal time for a reset is 10 us. */ 757 for (i = 0; i < 10; i++) { 758 delay(10); 759 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 760 if (!hcr) 761 break; 762 } 763 if (hcr) { 764 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 765 err = USBD_IOERROR; 766 goto bad5; 767 } 768 #ifdef OHCI_DEBUG 769 if (ohcidebug > 15) 770 ohci_dumpregs(sc); 771 #endif 772 773 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 774 775 /* Set up HC registers. */ 776 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 777 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 778 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 779 /* disable all interrupts and then switch on all desired interrupts */ 780 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 781 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 782 /* switch on desired functional features */ 783 ctl = OREAD4(sc, OHCI_CONTROL); 784 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 785 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 786 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 787 /* And finally start it! */ 788 OWRITE4(sc, OHCI_CONTROL, ctl); 789 790 /* 791 * The controller is now OPERATIONAL. Set a some final 792 * registers that should be set earlier, but that the 793 * controller ignores when in the SUSPEND state. 794 */ 795 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 796 fm |= OHCI_FSMPS(ival) | ival; 797 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 798 per = OHCI_PERIODIC(ival); /* 90% periodic */ 799 OWRITE4(sc, OHCI_PERIODIC_START, per); 800 801 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 802 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 803 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 804 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 805 usb_delay_ms(&sc->sc_bus, 5); 806 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 807 808 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 809 810 #ifdef OHCI_DEBUG 811 if (ohcidebug > 5) 812 ohci_dumpregs(sc); 813 #endif 814 815 /* Set up the bus struct. */ 816 sc->sc_bus.methods = &ohci_bus_methods; 817 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 818 819 #if defined(__NetBSD__) || defined(__OpenBSD__) 820 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 821 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 822 #endif 823 824 return (USBD_NORMAL_COMPLETION); 825 826 bad5: 827 for (i = 0; i < OHCI_NO_EDS; i++) 828 ohci_free_sed(sc, sc->sc_eds[i]); 829 bad4: 830 ohci_free_sed(sc, sc->sc_isoc_head); 831 bad3: 832 ohci_free_sed(sc, sc->sc_ctrl_head); 833 bad2: 834 ohci_free_sed(sc, sc->sc_bulk_head); 835 bad1: 836 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 837 return (err); 838 } 839 840 usbd_status 841 ohci_allocm(bus, dma, size) 842 struct usbd_bus *bus; 843 usb_dma_t *dma; 844 u_int32_t size; 845 { 846 #if defined(__NetBSD__) || defined(__OpenBSD__) 847 struct ohci_softc *sc = (struct ohci_softc *)bus; 848 #endif 849 850 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 851 } 852 853 void 854 ohci_freem(bus, dma) 855 struct usbd_bus *bus; 856 usb_dma_t *dma; 857 { 858 #if defined(__NetBSD__) || defined(__OpenBSD__) 859 struct ohci_softc *sc = (struct ohci_softc *)bus; 860 #endif 861 862 usb_freemem(&sc->sc_bus, dma); 863 } 864 865 usbd_xfer_handle 866 ohci_allocx(bus) 867 struct usbd_bus *bus; 868 { 869 struct ohci_softc *sc = (struct ohci_softc *)bus; 870 usbd_xfer_handle xfer; 871 872 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 873 if (xfer != NULL) 874 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next); 875 else 876 xfer = malloc(sizeof(*xfer), M_USB, M_NOWAIT); 877 if (xfer != NULL) 878 memset(xfer, 0, sizeof *xfer); 879 return (xfer); 880 } 881 882 void 883 ohci_freex(bus, xfer) 884 struct usbd_bus *bus; 885 usbd_xfer_handle xfer; 886 { 887 struct ohci_softc *sc = (struct ohci_softc *)bus; 888 889 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 890 } 891 892 /* 893 * Shut down the controller when the system is going down. 894 */ 895 void 896 ohci_shutdown(v) 897 void *v; 898 { 899 ohci_softc_t *sc = v; 900 901 DPRINTF(("ohci_shutdown: stopping the HC\n")); 902 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 903 } 904 905 /* 906 * Handle suspend/resume. 907 * 908 * We need to switch to polling mode here, because this routine is 909 * called from an intterupt context. This is all right since we 910 * are almost suspended anyway. 911 */ 912 void 913 ohci_power(why, v) 914 int why; 915 void *v; 916 { 917 #ifdef OHCI_DEBUG 918 ohci_softc_t *sc = v; 919 920 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 921 /* XXX should suspend/resume */ 922 ohci_dumpregs(sc); 923 #endif 924 } 925 926 #ifdef OHCI_DEBUG 927 void 928 ohci_dumpregs(sc) 929 ohci_softc_t *sc; 930 { 931 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 932 OREAD4(sc, OHCI_REVISION), 933 OREAD4(sc, OHCI_CONTROL), 934 OREAD4(sc, OHCI_COMMAND_STATUS))); 935 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 936 OREAD4(sc, OHCI_INTERRUPT_STATUS), 937 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 938 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 939 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 940 OREAD4(sc, OHCI_HCCA), 941 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 942 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 943 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 944 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 945 OREAD4(sc, OHCI_BULK_HEAD_ED), 946 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 947 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 948 OREAD4(sc, OHCI_DONE_HEAD), 949 OREAD4(sc, OHCI_FM_INTERVAL), 950 OREAD4(sc, OHCI_FM_REMAINING))); 951 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 952 OREAD4(sc, OHCI_FM_NUMBER), 953 OREAD4(sc, OHCI_PERIODIC_START), 954 OREAD4(sc, OHCI_LS_THRESHOLD))); 955 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 956 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 957 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 958 OREAD4(sc, OHCI_RH_STATUS))); 959 DPRINTF((" port1=0x%08x port2=0x%08x\n", 960 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 961 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 962 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 963 LE(sc->sc_hcca->hcca_frame_number), 964 LE(sc->sc_hcca->hcca_done_head))); 965 } 966 #endif 967 968 static int ohci_intr1 __P((ohci_softc_t *)); 969 970 int 971 ohci_intr(p) 972 void *p; 973 { 974 ohci_softc_t *sc = p; 975 976 /* If we get an interrupt while polling, then just ignore it. */ 977 if (sc->sc_bus.use_polling) { 978 #ifdef DIAGNOSTIC 979 printf("ohci_intr: ignored interrupt while polling\n"); 980 #endif 981 return (0); 982 } 983 984 return (ohci_intr1(sc)); 985 } 986 987 static int 988 ohci_intr1(sc) 989 ohci_softc_t *sc; 990 { 991 u_int32_t intrs, eintrs; 992 ohci_physaddr_t done; 993 994 /* In case the interrupt occurs before initialization has completed. */ 995 if (sc == NULL || sc->sc_hcca == NULL) { 996 #ifdef DIAGNOSTIC 997 printf("ohci_intr: sc->sc_hcca == NULL\n"); 998 #endif 999 return (0); 1000 } 1001 1002 intrs = 0; 1003 done = LE(sc->sc_hcca->hcca_done_head); 1004 if (done != 0) { 1005 if (done & ~OHCI_DONE_INTRS) 1006 intrs = OHCI_WDH; 1007 if (done & OHCI_DONE_INTRS) 1008 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 1009 } else 1010 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1011 1012 if (!intrs) 1013 return (0); 1014 1015 intrs &= ~OHCI_MIE; 1016 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 1017 eintrs = intrs & sc->sc_eintrs; 1018 if (!eintrs) 1019 return (0); 1020 1021 sc->sc_bus.intr_context++; 1022 sc->sc_bus.no_intrs++; 1023 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1024 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1025 (u_int)eintrs)); 1026 1027 if (eintrs & OHCI_SO) { 1028 printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev)); 1029 /* XXX do what */ 1030 intrs &= ~OHCI_SO; 1031 } 1032 if (eintrs & OHCI_WDH) { 1033 done &= ~OHCI_DONE_INTRS; 1034 if (sc->sc_done == 0) 1035 sc->sc_done = done; 1036 else { 1037 /* Tack on at the end of sc_done. */ 1038 ohci_physaddr_t ldone; 1039 ohci_soft_td_t *std; 1040 1041 for (ldone = sc->sc_done; ldone != 0; 1042 ldone = LE(std->td.td_nexttd)) 1043 std = ohci_hash_find_td(sc, ldone); 1044 std->td.td_nexttd = LE(done); 1045 } 1046 sc->sc_hcca->hcca_done_head = 0; 1047 usb_schedsoftintr(&sc->sc_bus); 1048 intrs &= ~OHCI_WDH; 1049 } 1050 if (eintrs & OHCI_RD) { 1051 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1052 /* XXX process resume detect */ 1053 } 1054 if (eintrs & OHCI_UE) { 1055 printf("%s: unrecoverable error, controller halted\n", 1056 USBDEVNAME(sc->sc_bus.bdev)); 1057 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1058 /* XXX what else */ 1059 } 1060 if (eintrs & OHCI_RHSC) { 1061 ohci_rhsc(sc, sc->sc_intrxfer); 1062 intrs &= ~OHCI_RHSC; 1063 1064 /* 1065 * Disable RHSC interrupt for now, because it will be 1066 * on until the port has been reset. 1067 */ 1068 ohci_rhsc_able(sc, 0); 1069 } 1070 1071 sc->sc_bus.intr_context--; 1072 1073 /* Block unprocessed interrupts. XXX */ 1074 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs); 1075 sc->sc_eintrs &= ~intrs; 1076 1077 return (1); 1078 } 1079 1080 void 1081 ohci_rhsc_able(sc, on) 1082 ohci_softc_t *sc; 1083 int on; 1084 { 1085 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 1086 if (on) { 1087 sc->sc_eintrs |= OHCI_RHSC; 1088 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1089 } else { 1090 sc->sc_eintrs &= ~OHCI_RHSC; 1091 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 1092 } 1093 } 1094 1095 #ifdef OHCI_DEBUG 1096 char *ohci_cc_strs[] = { 1097 "NO_ERROR", 1098 "CRC", 1099 "BIT_STUFFING", 1100 "DATA_TOGGLE_MISMATCH", 1101 "STALL", 1102 "DEVICE_NOT_RESPONDING", 1103 "PID_CHECK_FAILURE", 1104 "UNEXPECTED_PID", 1105 "DATA_OVERRUN", 1106 "DATA_UNDERRUN", 1107 "BUFFER_OVERRUN", 1108 "BUFFER_UNDERRUN", 1109 "reserved", 1110 "reserved", 1111 "NOT_ACCESSED", 1112 "NOT_ACCESSED", 1113 }; 1114 #endif 1115 1116 void 1117 ohci_softintr(bus) 1118 struct usbd_bus *bus; 1119 { 1120 ohci_softc_t *sc = (ohci_softc_t *)bus; 1121 ohci_physaddr_t done; 1122 ohci_soft_td_t *std, *sdone, *stdnext; 1123 usbd_xfer_handle xfer; 1124 int len, cc, s; 1125 1126 sc->sc_bus.intr_context++; 1127 1128 s = splhardusb(); 1129 done = sc->sc_done; 1130 sc->sc_done = 0; 1131 splx(s); 1132 1133 DPRINTFN(10,("ohci_process_done: done=0x%08lx\n", (u_long)done)); 1134 1135 /* Reverse the done list. */ 1136 for (sdone = NULL; done != 0; done = LE(std->td.td_nexttd)) { 1137 std = ohci_hash_find_td(sc, done); 1138 std->dnext = sdone; 1139 sdone = std; 1140 } 1141 1142 #ifdef OHCI_DEBUG 1143 if (ohcidebug > 10) { 1144 DPRINTF(("ohci_process_done: TD done:\n")); 1145 ohci_dump_tds(sdone); 1146 } 1147 #endif 1148 1149 for (std = sdone; std; std = stdnext) { 1150 xfer = std->xfer; 1151 stdnext = std->dnext; 1152 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1153 std, xfer, xfer ? xfer->hcpriv : 0)); 1154 if (xfer == NULL) { 1155 /* xfer == NULL: There seems to be no xfer associated 1156 * with this TD. It is tailp that happened to end up on 1157 * the done queue. 1158 */ 1159 continue; 1160 } 1161 cc = OHCI_TD_GET_CC(LE(std->td.td_flags)); 1162 usb_untimeout(ohci_timeout, xfer, xfer->timo_handle); 1163 if (xfer->status == USBD_CANCELLED || 1164 xfer->status == USBD_TIMEOUT) { 1165 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1166 xfer)); 1167 /* Handled by abort routine. */ 1168 } else if (cc == OHCI_CC_NO_ERROR) { 1169 len = std->len; 1170 if (std->td.td_cbp != 0) 1171 len -= LE(std->td.td_be) - 1172 LE(std->td.td_cbp) + 1; 1173 if (std->flags & OHCI_ADD_LEN) 1174 xfer->actlen += len; 1175 if (std->flags & OHCI_CALL_DONE) { 1176 xfer->status = USBD_NORMAL_COMPLETION; 1177 usb_transfer_complete(xfer); 1178 } 1179 ohci_free_std(sc, std); 1180 } else { 1181 /* 1182 * Endpoint is halted. First unlink all the TDs 1183 * belonging to the failed transfer, and then restart 1184 * the endpoint. 1185 */ 1186 ohci_soft_td_t *p, *n; 1187 struct ohci_pipe *opipe = 1188 (struct ohci_pipe *)xfer->pipe; 1189 1190 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1191 OHCI_TD_GET_CC(LE(std->td.td_flags)), 1192 ohci_cc_strs[OHCI_TD_GET_CC(LE(std->td.td_flags))])); 1193 1194 /* remove TDs */ 1195 for (p = std; p->xfer == xfer; p = n) { 1196 n = p->nexttd; 1197 ohci_free_std(sc, p); 1198 } 1199 1200 /* clear halt */ 1201 opipe->sed->ed.ed_headp = LE(p->physaddr); 1202 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1203 1204 if (cc == OHCI_CC_STALL) 1205 xfer->status = USBD_STALLED; 1206 else 1207 xfer->status = USBD_IOERROR; 1208 usb_transfer_complete(xfer); 1209 } 1210 } 1211 1212 sc->sc_bus.intr_context--; 1213 } 1214 1215 void 1216 ohci_device_ctrl_done(xfer) 1217 usbd_xfer_handle xfer; 1218 { 1219 DPRINTFN(10,("ohci_ctrl_done: xfer=%p\n", xfer)); 1220 1221 #ifdef DIAGNOSTIC 1222 if (!(xfer->rqflags & URQ_REQUEST)) { 1223 panic("ohci_ctrl_done: not a request\n"); 1224 } 1225 #endif 1226 xfer->hcpriv = NULL; 1227 } 1228 1229 void 1230 ohci_device_intr_done(xfer) 1231 usbd_xfer_handle xfer; 1232 { 1233 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1234 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1235 ohci_soft_ed_t *sed = opipe->sed; 1236 ohci_soft_td_t *data, *tail; 1237 1238 1239 DPRINTFN(10,("ohci_intr_done: xfer=%p, actlen=%d\n", 1240 xfer, xfer->actlen)); 1241 1242 xfer->hcpriv = NULL; 1243 1244 if (xfer->pipe->repeat) { 1245 data = opipe->tail.td; 1246 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1247 if (tail == NULL) { 1248 xfer->status = USBD_NOMEM; 1249 return; 1250 } 1251 tail->xfer = NULL; 1252 1253 data->td.td_flags = LE( 1254 OHCI_TD_IN | OHCI_TD_NOCC | 1255 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1256 if (xfer->flags & USBD_SHORT_XFER_OK) 1257 data->td.td_flags |= LE(OHCI_TD_R); 1258 data->td.td_cbp = LE(DMAADDR(&xfer->dmabuf)); 1259 data->nexttd = tail; 1260 data->td.td_nexttd = LE(tail->physaddr); 1261 data->td.td_be = LE(LE(data->td.td_cbp) + xfer->length - 1); 1262 data->len = xfer->length; 1263 data->xfer = xfer; 1264 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1265 xfer->hcpriv = data; 1266 xfer->actlen = 0; 1267 1268 sed->ed.ed_tailp = LE(tail->physaddr); 1269 opipe->tail.td = tail; 1270 } 1271 } 1272 1273 void 1274 ohci_device_bulk_done(xfer) 1275 usbd_xfer_handle xfer; 1276 { 1277 DPRINTFN(10,("ohci_bulk_done: xfer=%p, actlen=%d\n", 1278 xfer, xfer->actlen)); 1279 1280 xfer->hcpriv = NULL; 1281 } 1282 1283 void 1284 ohci_rhsc(sc, xfer) 1285 ohci_softc_t *sc; 1286 usbd_xfer_handle xfer; 1287 { 1288 usbd_pipe_handle pipe; 1289 struct ohci_pipe *opipe; 1290 u_char *p; 1291 int i, m; 1292 int hstatus; 1293 1294 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1295 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1296 sc, xfer, hstatus)); 1297 1298 if (xfer == NULL) { 1299 /* Just ignore the change. */ 1300 return; 1301 } 1302 1303 pipe = xfer->pipe; 1304 opipe = (struct ohci_pipe *)pipe; 1305 1306 p = KERNADDR(&xfer->dmabuf); 1307 m = min(sc->sc_noport, xfer->length * 8 - 1); 1308 memset(p, 0, xfer->length); 1309 for (i = 1; i <= m; i++) { 1310 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1311 p[i/8] |= 1 << (i%8); 1312 } 1313 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1314 xfer->actlen = xfer->length; 1315 xfer->status = USBD_NORMAL_COMPLETION; 1316 1317 usb_transfer_complete(xfer); 1318 } 1319 1320 void 1321 ohci_root_intr_done(xfer) 1322 usbd_xfer_handle xfer; 1323 { 1324 xfer->hcpriv = NULL; 1325 } 1326 1327 void 1328 ohci_root_ctrl_done(xfer) 1329 usbd_xfer_handle xfer; 1330 { 1331 xfer->hcpriv = NULL; 1332 } 1333 1334 /* 1335 * Wait here until controller claims to have an interrupt. 1336 * Then call ohci_intr and return. Use timeout to avoid waiting 1337 * too long. 1338 */ 1339 void 1340 ohci_waitintr(sc, xfer) 1341 ohci_softc_t *sc; 1342 usbd_xfer_handle xfer; 1343 { 1344 int timo = xfer->timeout; 1345 int usecs; 1346 u_int32_t intrs; 1347 1348 xfer->status = USBD_IN_PROGRESS; 1349 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1350 usb_delay_ms(&sc->sc_bus, 1); 1351 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1352 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1353 #ifdef OHCI_DEBUG 1354 if (ohcidebug > 15) 1355 ohci_dumpregs(sc); 1356 #endif 1357 if (intrs) { 1358 ohci_intr1(sc); 1359 if (xfer->status != USBD_IN_PROGRESS) 1360 return; 1361 } 1362 } 1363 1364 /* Timeout */ 1365 DPRINTF(("ohci_waitintr: timeout\n")); 1366 xfer->status = USBD_TIMEOUT; 1367 usb_transfer_complete(xfer); 1368 /* XXX should free TD */ 1369 } 1370 1371 void 1372 ohci_poll(bus) 1373 struct usbd_bus *bus; 1374 { 1375 ohci_softc_t *sc = (ohci_softc_t *)bus; 1376 1377 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1378 ohci_intr1(sc); 1379 } 1380 1381 usbd_status 1382 ohci_device_request(xfer) 1383 usbd_xfer_handle xfer; 1384 { 1385 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1386 usb_device_request_t *req = &xfer->request; 1387 usbd_device_handle dev = opipe->pipe.device; 1388 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1389 int addr = dev->address; 1390 ohci_soft_td_t *setup, *data = 0, *stat, *next, *tail; 1391 ohci_soft_ed_t *sed; 1392 int isread; 1393 int len; 1394 usbd_status err; 1395 int s; 1396 1397 isread = req->bmRequestType & UT_READ; 1398 len = UGETW(req->wLength); 1399 1400 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1401 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1402 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1403 UGETW(req->wIndex), len, addr, 1404 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1405 1406 setup = opipe->tail.td; 1407 stat = ohci_alloc_std(sc); 1408 if (stat == NULL) { 1409 err = USBD_NOMEM; 1410 goto bad1; 1411 } 1412 tail = ohci_alloc_std(sc); 1413 if (tail == NULL) { 1414 err = USBD_NOMEM; 1415 goto bad2; 1416 } 1417 tail->xfer = NULL; 1418 1419 sed = opipe->sed; 1420 opipe->u.ctl.length = len; 1421 1422 /* Update device address and length since they may have changed. */ 1423 /* XXX This only needs to be done once, but it's too early in open. */ 1424 sed->ed.ed_flags = LE( 1425 (LE(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1426 OHCI_ED_SET_FA(addr) | 1427 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1428 1429 /* Set up data transaction */ 1430 if (len != 0) { 1431 data = ohci_alloc_std(sc); 1432 if (data == NULL) { 1433 err = USBD_NOMEM; 1434 goto bad3; 1435 } 1436 data->td.td_flags = LE( 1437 (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC | 1438 OHCI_TD_TOGGLE_1 | OHCI_TD_NOINTR | 1439 (xfer->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0)); 1440 data->td.td_cbp = LE(DMAADDR(&xfer->dmabuf)); 1441 data->nexttd = stat; 1442 data->td.td_nexttd = LE(stat->physaddr); 1443 data->td.td_be = LE(LE(data->td.td_cbp) + len - 1); 1444 data->len = len; 1445 data->xfer = xfer; 1446 data->flags = OHCI_ADD_LEN; 1447 1448 next = data; 1449 stat->flags = OHCI_CALL_DONE; 1450 } else { 1451 next = stat; 1452 /* XXX ADD_LEN? */ 1453 stat->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1454 } 1455 1456 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req); 1457 1458 setup->td.td_flags = LE(OHCI_TD_SETUP | OHCI_TD_NOCC | 1459 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1460 setup->td.td_cbp = LE(DMAADDR(&opipe->u.ctl.reqdma)); 1461 setup->nexttd = next; 1462 setup->td.td_nexttd = LE(next->physaddr); 1463 setup->td.td_be = LE(LE(setup->td.td_cbp) + sizeof *req - 1); 1464 setup->len = 0; /* XXX The number of byte we count */ 1465 setup->xfer = xfer; 1466 setup->flags = 0; 1467 xfer->hcpriv = setup; 1468 1469 stat->td.td_flags = LE( 1470 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | OHCI_TD_NOCC | 1471 OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1472 stat->td.td_cbp = 0; 1473 stat->nexttd = tail; 1474 stat->td.td_nexttd = LE(tail->physaddr); 1475 stat->td.td_be = 0; 1476 stat->len = 0; 1477 stat->xfer = xfer; 1478 1479 #ifdef OHCI_DEBUG 1480 if (ohcidebug > 5) { 1481 DPRINTF(("ohci_device_request:\n")); 1482 ohci_dump_ed(sed); 1483 ohci_dump_tds(setup); 1484 } 1485 #endif 1486 1487 /* Insert ED in schedule */ 1488 s = splusb(); 1489 sed->ed.ed_tailp = LE(tail->physaddr); 1490 opipe->tail.td = tail; 1491 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1492 if (xfer->timeout && !sc->sc_bus.use_polling) { 1493 usb_timeout(ohci_timeout, xfer, 1494 MS_TO_TICKS(xfer->timeout), xfer->timo_handle); 1495 } 1496 splx(s); 1497 1498 #ifdef OHCI_DEBUG 1499 if (ohcidebug > 5) { 1500 usb_delay_ms(&sc->sc_bus, 5); 1501 DPRINTF(("ohci_device_request: status=%x\n", 1502 OREAD4(sc, OHCI_COMMAND_STATUS))); 1503 ohci_dump_ed(sed); 1504 ohci_dump_tds(setup); 1505 } 1506 #endif 1507 1508 return (USBD_NORMAL_COMPLETION); 1509 1510 bad3: 1511 ohci_free_std(sc, tail); 1512 bad2: 1513 ohci_free_std(sc, stat); 1514 bad1: 1515 return (err); 1516 } 1517 1518 /* 1519 * Add an ED to the schedule. Called at splusb(). 1520 */ 1521 void 1522 ohci_add_ed(sed, head) 1523 ohci_soft_ed_t *sed; 1524 ohci_soft_ed_t *head; 1525 { 1526 SPLUSBCHECK; 1527 sed->next = head->next; 1528 sed->ed.ed_nexted = head->ed.ed_nexted; 1529 head->next = sed; 1530 head->ed.ed_nexted = LE(sed->physaddr); 1531 } 1532 1533 /* 1534 * Remove an ED from the schedule. Called at splusb(). 1535 */ 1536 void 1537 ohci_rem_ed(sed, head) 1538 ohci_soft_ed_t *sed; 1539 ohci_soft_ed_t *head; 1540 { 1541 ohci_soft_ed_t *p; 1542 1543 SPLUSBCHECK; 1544 1545 /* XXX */ 1546 for (p = head; p == NULL && p->next != sed; p = p->next) 1547 ; 1548 if (p == NULL) 1549 panic("ohci_rem_ed: ED not found\n"); 1550 p->next = sed->next; 1551 p->ed.ed_nexted = sed->ed.ed_nexted; 1552 } 1553 1554 /* 1555 * When a transfer is completed the TD is added to the done queue by 1556 * the host controller. This queue is the processed by software. 1557 * Unfortunately the queue contains the physical address of the TD 1558 * and we have no simple way to translate this back to a kernel address. 1559 * To make the translation possible (and fast) we use a hash table of 1560 * TDs currently in the schedule. The physical address is used as the 1561 * hash value. 1562 */ 1563 1564 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1565 /* Called at splusb() */ 1566 void 1567 ohci_hash_add_td(sc, std) 1568 ohci_softc_t *sc; 1569 ohci_soft_td_t *std; 1570 { 1571 int h = HASH(std->physaddr); 1572 1573 SPLUSBCHECK; 1574 1575 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1576 } 1577 1578 /* Called at splusb() */ 1579 void 1580 ohci_hash_rem_td(sc, std) 1581 ohci_softc_t *sc; 1582 ohci_soft_td_t *std; 1583 { 1584 SPLUSBCHECK; 1585 1586 LIST_REMOVE(std, hnext); 1587 } 1588 1589 ohci_soft_td_t * 1590 ohci_hash_find_td(sc, a) 1591 ohci_softc_t *sc; 1592 ohci_physaddr_t a; 1593 { 1594 int h = HASH(a); 1595 ohci_soft_td_t *std; 1596 1597 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1598 std != NULL; 1599 std = LIST_NEXT(std, hnext)) 1600 if (std->physaddr == a) 1601 return (std); 1602 panic("ohci_hash_find_td: addr 0x%08lx not found\n", (u_long)a); 1603 } 1604 1605 void 1606 ohci_timeout(addr) 1607 void *addr; 1608 { 1609 usbd_xfer_handle xfer = addr; 1610 int s; 1611 1612 DPRINTF(("ohci_timeout: xfer=%p\n", xfer)); 1613 1614 s = splusb(); 1615 xfer->device->bus->intr_context++; 1616 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1617 xfer->device->bus->intr_context--; 1618 splx(s); 1619 } 1620 1621 #ifdef OHCI_DEBUG 1622 void 1623 ohci_dump_tds(std) 1624 ohci_soft_td_t *std; 1625 { 1626 for (; std; std = std->nexttd) 1627 ohci_dump_td(std); 1628 } 1629 1630 void 1631 ohci_dump_td(std) 1632 ohci_soft_td_t *std; 1633 { 1634 DPRINTF(("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1635 "nexttd=0x%08lx be=0x%08lx\n", 1636 std, (u_long)std->physaddr, 1637 (int)LE(std->td.td_flags), 1638 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1639 OHCI_TD_GET_DI(LE(std->td.td_flags)), 1640 OHCI_TD_GET_EC(LE(std->td.td_flags)), 1641 OHCI_TD_GET_CC(LE(std->td.td_flags)), 1642 (u_long)LE(std->td.td_cbp), 1643 (u_long)LE(std->td.td_nexttd), (u_long)LE(std->td.td_be))); 1644 } 1645 1646 void 1647 ohci_dump_ed(sed) 1648 ohci_soft_ed_t *sed; 1649 { 1650 DPRINTF(("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx " 1651 "headflags=%b headp=0x%08lx nexted=0x%08lx\n", 1652 sed, (u_long)sed->physaddr, 1653 OHCI_ED_GET_FA(LE(sed->ed.ed_flags)), 1654 OHCI_ED_GET_EN(LE(sed->ed.ed_flags)), 1655 OHCI_ED_GET_MAXP(LE(sed->ed.ed_flags)), 1656 (int)LE(sed->ed.ed_flags), 1657 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1658 (u_long)LE(sed->ed.ed_tailp), 1659 (u_long)LE(sed->ed.ed_headp), 1660 "\20\1HALT\2CARRY", 1661 (u_long)LE(sed->ed.ed_headp), 1662 (u_long)LE(sed->ed.ed_nexted))); 1663 } 1664 #endif 1665 1666 usbd_status 1667 ohci_open(pipe) 1668 usbd_pipe_handle pipe; 1669 { 1670 usbd_device_handle dev = pipe->device; 1671 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1672 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1673 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1674 u_int8_t addr = dev->address; 1675 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1676 ohci_soft_ed_t *sed; 1677 ohci_soft_td_t *std; 1678 ohci_soft_itd_t *sitd; 1679 ohci_physaddr_t tdphys; 1680 u_int32_t fmt; 1681 usbd_status err; 1682 int s; 1683 int ival; 1684 1685 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1686 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1687 if (addr == sc->sc_addr) { 1688 switch (ed->bEndpointAddress) { 1689 case USB_CONTROL_ENDPOINT: 1690 pipe->methods = &ohci_root_ctrl_methods; 1691 break; 1692 case UE_DIR_IN | OHCI_INTR_ENDPT: 1693 pipe->methods = &ohci_root_intr_methods; 1694 break; 1695 default: 1696 return (USBD_INVAL); 1697 } 1698 } else { 1699 sed = ohci_alloc_sed(sc); 1700 if (sed == NULL) 1701 goto bad0; 1702 opipe->sed = sed; 1703 if (xfertype == UE_ISOCHRONOUS) { 1704 sitd = ohci_alloc_sitd(sc); 1705 if (sitd == NULL) { 1706 ohci_free_sitd(sc, sitd); 1707 goto bad1; 1708 } 1709 opipe->tail.itd = sitd; 1710 tdphys = LE(sitd->physaddr); 1711 fmt = OHCI_ED_FORMAT_ISO; 1712 } else { 1713 std = ohci_alloc_std(sc); 1714 if (std == NULL) { 1715 ohci_free_std(sc, std); 1716 goto bad1; 1717 } 1718 opipe->tail.td = std; 1719 tdphys = LE(std->physaddr); 1720 fmt = OHCI_ED_FORMAT_GEN; 1721 } 1722 sed->ed.ed_flags = LE( 1723 OHCI_ED_SET_FA(addr) | 1724 OHCI_ED_SET_EN(ed->bEndpointAddress) | 1725 OHCI_ED_DIR_TD | 1726 (dev->lowspeed ? OHCI_ED_SPEED : 0) | fmt | 1727 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 1728 sed->ed.ed_headp = sed->ed.ed_tailp = tdphys; 1729 1730 switch (xfertype) { 1731 case UE_CONTROL: 1732 pipe->methods = &ohci_device_ctrl_methods; 1733 err = usb_allocmem(&sc->sc_bus, 1734 sizeof(usb_device_request_t), 1735 0, &opipe->u.ctl.reqdma); 1736 if (err) 1737 goto bad; 1738 s = splusb(); 1739 ohci_add_ed(sed, sc->sc_ctrl_head); 1740 splx(s); 1741 break; 1742 case UE_INTERRUPT: 1743 pipe->methods = &ohci_device_intr_methods; 1744 ival = pipe->interval; 1745 if (ival == USBD_DEFAULT_INTERVAL) 1746 ival = ed->bInterval; 1747 return (ohci_device_setintr(sc, opipe, ival)); 1748 case UE_ISOCHRONOUS: 1749 pipe->methods = &ohci_device_isoc_methods; 1750 return (ohci_setup_isoc(pipe)); 1751 case UE_BULK: 1752 pipe->methods = &ohci_device_bulk_methods; 1753 s = splusb(); 1754 ohci_add_ed(sed, sc->sc_bulk_head); 1755 splx(s); 1756 break; 1757 } 1758 } 1759 return (USBD_NORMAL_COMPLETION); 1760 1761 bad: 1762 ohci_free_std(sc, std); 1763 bad1: 1764 ohci_free_sed(sc, sed); 1765 bad0: 1766 return (USBD_NOMEM); 1767 1768 } 1769 1770 /* 1771 * Close a reqular pipe. 1772 * Assumes that there are no pending transactions. 1773 */ 1774 void 1775 ohci_close_pipe(pipe, head) 1776 usbd_pipe_handle pipe; 1777 ohci_soft_ed_t *head; 1778 { 1779 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1780 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1781 ohci_soft_ed_t *sed = opipe->sed; 1782 int s; 1783 1784 s = splusb(); 1785 #ifdef DIAGNOSTIC 1786 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); 1787 if ((sed->ed.ed_tailp & LE(OHCI_HEADMASK)) != 1788 (sed->ed.ed_headp & LE(OHCI_HEADMASK))) { 1789 ohci_physaddr_t td = sed->ed.ed_headp; 1790 ohci_soft_td_t *std; 1791 for (std = LIST_FIRST(&sc->sc_hash_tds[HASH(td)]); 1792 std != NULL; 1793 std = LIST_NEXT(std, hnext)) 1794 if (std->physaddr == td) 1795 break; 1796 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 1797 "tl=0x%x pipe=%p, std=%p\n", sed, 1798 (int)LE(sed->ed.ed_headp), (int)LE(sed->ed.ed_tailp), 1799 pipe, std); 1800 usb_delay_ms(&sc->sc_bus, 2); 1801 if ((sed->ed.ed_tailp & LE(OHCI_HEADMASK)) != 1802 (sed->ed.ed_headp & LE(OHCI_HEADMASK))) 1803 printf("ohci_close_pipe: pipe still not empty\n"); 1804 } 1805 #endif 1806 ohci_rem_ed(sed, head); 1807 splx(s); 1808 ohci_free_sed(sc, opipe->sed); 1809 } 1810 1811 /* 1812 * Abort a device request. 1813 * If this routine is called at splusb() it guarantees that the request 1814 * will be removed from the hardware scheduling and that the callback 1815 * for it will be called with USBD_CANCELLED status. 1816 * It's impossible to guarantee that the requested transfer will not 1817 * have happened since the hardware runs concurrently. 1818 * If the transaction has already happened we rely on the ordinary 1819 * interrupt processing to process it. 1820 */ 1821 void 1822 ohci_abort_xfer(xfer, status) 1823 usbd_xfer_handle xfer; 1824 usbd_status status; 1825 { 1826 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1827 ohci_soft_ed_t *sed; 1828 1829 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p\n", xfer, opipe)); 1830 1831 xfer->status = status; 1832 1833 usb_untimeout(ohci_timeout, xfer, xfer->timo_handle); 1834 1835 sed = opipe->sed; 1836 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 1837 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); /* force hardware skip */ 1838 1839 #if 1 1840 if (xfer->device->bus->intr_context) { 1841 /* We have no process context, so we can't use tsleep(). */ 1842 timeout(ohci_abort_xfer_end, xfer, hz / USB_FRAMES_PER_SECOND); 1843 } else { 1844 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 1845 KASSERT(intr_nesting_level == 0, 1846 ("ohci_abort_req in interrupt context")); 1847 #endif 1848 usb_delay_ms(opipe->pipe.device->bus, 1); 1849 ohci_abort_xfer_end(xfer); 1850 } 1851 #else 1852 delay(1000); 1853 ohci_abort_xfer_end(xfer); 1854 #endif 1855 } 1856 1857 void 1858 ohci_abort_xfer_end(v) 1859 void *v; 1860 { 1861 usbd_xfer_handle xfer = v; 1862 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1863 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1864 ohci_soft_ed_t *sed; 1865 ohci_soft_td_t *p, *n; 1866 int s; 1867 1868 s = splusb(); 1869 1870 p = xfer->hcpriv; 1871 #ifdef DIAGNOSTIC 1872 if (p == NULL) { 1873 printf("ohci_abort_xfer: hcpriv==0\n"); 1874 return; 1875 } 1876 #endif 1877 for (; p->xfer == xfer; p = n) { 1878 n = p->nexttd; 1879 ohci_free_std(sc, p); 1880 } 1881 1882 sed = opipe->sed; 1883 DPRINTFN(2,("ohci_abort_xfer: set hd=%x, tl=%x\n", 1884 (int)LE(p->physaddr), (int)LE(sed->ed.ed_tailp))); 1885 sed->ed.ed_headp = p->physaddr; /* unlink TDs */ 1886 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); /* remove hardware skip */ 1887 1888 usb_transfer_complete(xfer); 1889 1890 splx(s); 1891 } 1892 1893 /* 1894 * Data structures and routines to emulate the root hub. 1895 */ 1896 static usb_device_descriptor_t ohci_devd = { 1897 USB_DEVICE_DESCRIPTOR_SIZE, 1898 UDESC_DEVICE, /* type */ 1899 {0x00, 0x01}, /* USB version */ 1900 UDCLASS_HUB, /* class */ 1901 UDSUBCLASS_HUB, /* subclass */ 1902 0, /* protocol */ 1903 64, /* max packet */ 1904 {0},{0},{0x00,0x01}, /* device id */ 1905 1,2,0, /* string indicies */ 1906 1 /* # of configurations */ 1907 }; 1908 1909 static usb_config_descriptor_t ohci_confd = { 1910 USB_CONFIG_DESCRIPTOR_SIZE, 1911 UDESC_CONFIG, 1912 {USB_CONFIG_DESCRIPTOR_SIZE + 1913 USB_INTERFACE_DESCRIPTOR_SIZE + 1914 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1915 1, 1916 1, 1917 0, 1918 UC_SELF_POWERED, 1919 0 /* max power */ 1920 }; 1921 1922 static usb_interface_descriptor_t ohci_ifcd = { 1923 USB_INTERFACE_DESCRIPTOR_SIZE, 1924 UDESC_INTERFACE, 1925 0, 1926 0, 1927 1, 1928 UICLASS_HUB, 1929 UISUBCLASS_HUB, 1930 0, 1931 0 1932 }; 1933 1934 static usb_endpoint_descriptor_t ohci_endpd = { 1935 USB_ENDPOINT_DESCRIPTOR_SIZE, 1936 UDESC_ENDPOINT, 1937 UE_DIR_IN | OHCI_INTR_ENDPT, 1938 UE_INTERRUPT, 1939 {8, 0}, /* max packet */ 1940 255 1941 }; 1942 1943 static usb_hub_descriptor_t ohci_hubd = { 1944 USB_HUB_DESCRIPTOR_SIZE, 1945 UDESC_HUB, 1946 0, 1947 {0,0}, 1948 0, 1949 0, 1950 {0}, 1951 }; 1952 1953 static int 1954 ohci_str(p, l, s) 1955 usb_string_descriptor_t *p; 1956 int l; 1957 char *s; 1958 { 1959 int i; 1960 1961 if (l == 0) 1962 return (0); 1963 p->bLength = 2 * strlen(s) + 2; 1964 if (l == 1) 1965 return (1); 1966 p->bDescriptorType = UDESC_STRING; 1967 l -= 2; 1968 for (i = 0; s[i] && l > 1; i++, l -= 2) 1969 USETW2(p->bString[i], 0, s[i]); 1970 return (2*i+2); 1971 } 1972 1973 /* 1974 * Simulate a hardware hub by handling all the necessary requests. 1975 */ 1976 static usbd_status 1977 ohci_root_ctrl_transfer(xfer) 1978 usbd_xfer_handle xfer; 1979 { 1980 usbd_status err; 1981 1982 /* Insert last in queue. */ 1983 err = usb_insert_transfer(xfer); 1984 if (err) 1985 return (err); 1986 1987 /* Pipe isn't running, start first */ 1988 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1989 } 1990 1991 static usbd_status 1992 ohci_root_ctrl_start(xfer) 1993 usbd_xfer_handle xfer; 1994 { 1995 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 1996 usb_device_request_t *req; 1997 void *buf = NULL; 1998 int port, i; 1999 int s, len, value, index, l, totlen = 0; 2000 usb_port_status_t ps; 2001 usb_hub_descriptor_t hubd; 2002 usbd_status err; 2003 u_int32_t v; 2004 2005 #ifdef DIAGNOSTIC 2006 if (!(xfer->rqflags & URQ_REQUEST)) 2007 /* XXX panic */ 2008 return (USBD_INVAL); 2009 #endif 2010 req = &xfer->request; 2011 2012 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2013 req->bmRequestType, req->bRequest)); 2014 2015 len = UGETW(req->wLength); 2016 value = UGETW(req->wValue); 2017 index = UGETW(req->wIndex); 2018 2019 if (len != 0) 2020 buf = KERNADDR(&xfer->dmabuf); 2021 2022 #define C(x,y) ((x) | ((y) << 8)) 2023 switch(C(req->bRequest, req->bmRequestType)) { 2024 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2025 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2026 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2027 /* 2028 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2029 * for the integrated root hub. 2030 */ 2031 break; 2032 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2033 if (len > 0) { 2034 *(u_int8_t *)buf = sc->sc_conf; 2035 totlen = 1; 2036 } 2037 break; 2038 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2039 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2040 switch(value >> 8) { 2041 case UDESC_DEVICE: 2042 if ((value & 0xff) != 0) { 2043 err = USBD_IOERROR; 2044 goto ret; 2045 } 2046 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2047 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2048 memcpy(buf, &ohci_devd, l); 2049 break; 2050 case UDESC_CONFIG: 2051 if ((value & 0xff) != 0) { 2052 err = USBD_IOERROR; 2053 goto ret; 2054 } 2055 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2056 memcpy(buf, &ohci_confd, l); 2057 buf = (char *)buf + l; 2058 len -= l; 2059 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2060 totlen += l; 2061 memcpy(buf, &ohci_ifcd, l); 2062 buf = (char *)buf + l; 2063 len -= l; 2064 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2065 totlen += l; 2066 memcpy(buf, &ohci_endpd, l); 2067 break; 2068 case UDESC_STRING: 2069 if (len == 0) 2070 break; 2071 *(u_int8_t *)buf = 0; 2072 totlen = 1; 2073 switch (value & 0xff) { 2074 case 1: /* Vendor */ 2075 totlen = ohci_str(buf, len, sc->sc_vendor); 2076 break; 2077 case 2: /* Product */ 2078 totlen = ohci_str(buf, len, "OHCI root hub"); 2079 break; 2080 } 2081 break; 2082 default: 2083 err = USBD_IOERROR; 2084 goto ret; 2085 } 2086 break; 2087 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2088 if (len > 0) { 2089 *(u_int8_t *)buf = 0; 2090 totlen = 1; 2091 } 2092 break; 2093 case C(UR_GET_STATUS, UT_READ_DEVICE): 2094 if (len > 1) { 2095 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2096 totlen = 2; 2097 } 2098 break; 2099 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2100 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2101 if (len > 1) { 2102 USETW(((usb_status_t *)buf)->wStatus, 0); 2103 totlen = 2; 2104 } 2105 break; 2106 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2107 if (value >= USB_MAX_DEVICES) { 2108 err = USBD_IOERROR; 2109 goto ret; 2110 } 2111 sc->sc_addr = value; 2112 break; 2113 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2114 if (value != 0 && value != 1) { 2115 err = USBD_IOERROR; 2116 goto ret; 2117 } 2118 sc->sc_conf = value; 2119 break; 2120 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2121 break; 2122 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2123 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2124 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2125 err = USBD_IOERROR; 2126 goto ret; 2127 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2128 break; 2129 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2130 break; 2131 /* Hub requests */ 2132 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2133 break; 2134 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2135 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2136 "port=%d feature=%d\n", 2137 index, value)); 2138 if (index < 1 || index > sc->sc_noport) { 2139 err = USBD_IOERROR; 2140 goto ret; 2141 } 2142 port = OHCI_RH_PORT_STATUS(index); 2143 switch(value) { 2144 case UHF_PORT_ENABLE: 2145 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2146 break; 2147 case UHF_PORT_SUSPEND: 2148 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2149 break; 2150 case UHF_PORT_POWER: 2151 OWRITE4(sc, port, UPS_LOW_SPEED); 2152 break; 2153 case UHF_C_PORT_CONNECTION: 2154 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2155 break; 2156 case UHF_C_PORT_ENABLE: 2157 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2158 break; 2159 case UHF_C_PORT_SUSPEND: 2160 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2161 break; 2162 case UHF_C_PORT_OVER_CURRENT: 2163 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2164 break; 2165 case UHF_C_PORT_RESET: 2166 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2167 break; 2168 default: 2169 err = USBD_IOERROR; 2170 goto ret; 2171 } 2172 switch(value) { 2173 case UHF_C_PORT_CONNECTION: 2174 case UHF_C_PORT_ENABLE: 2175 case UHF_C_PORT_SUSPEND: 2176 case UHF_C_PORT_OVER_CURRENT: 2177 case UHF_C_PORT_RESET: 2178 /* Enable RHSC interrupt if condition is cleared. */ 2179 if ((OREAD4(sc, port) >> 16) == 0) 2180 ohci_rhsc_able(sc, 1); 2181 break; 2182 default: 2183 break; 2184 } 2185 break; 2186 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2187 if (value != 0) { 2188 err = USBD_IOERROR; 2189 goto ret; 2190 } 2191 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2192 hubd = ohci_hubd; 2193 hubd.bNbrPorts = sc->sc_noport; 2194 USETW(hubd.wHubCharacteristics, 2195 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2196 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2197 /* XXX overcurrent */ 2198 ); 2199 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2200 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2201 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2202 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2203 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2204 l = min(len, hubd.bDescLength); 2205 totlen = l; 2206 memcpy(buf, &hubd, l); 2207 break; 2208 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2209 if (len != 4) { 2210 err = USBD_IOERROR; 2211 goto ret; 2212 } 2213 memset(buf, 0, len); /* ? XXX */ 2214 totlen = len; 2215 break; 2216 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2217 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2218 index)); 2219 if (index < 1 || index > sc->sc_noport) { 2220 err = USBD_IOERROR; 2221 goto ret; 2222 } 2223 if (len != 4) { 2224 err = USBD_IOERROR; 2225 goto ret; 2226 } 2227 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2228 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2229 v)); 2230 USETW(ps.wPortStatus, v); 2231 USETW(ps.wPortChange, v >> 16); 2232 l = min(len, sizeof ps); 2233 memcpy(buf, &ps, l); 2234 totlen = l; 2235 break; 2236 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2237 err = USBD_IOERROR; 2238 goto ret; 2239 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2240 break; 2241 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2242 if (index < 1 || index > sc->sc_noport) { 2243 err = USBD_IOERROR; 2244 goto ret; 2245 } 2246 port = OHCI_RH_PORT_STATUS(index); 2247 switch(value) { 2248 case UHF_PORT_ENABLE: 2249 OWRITE4(sc, port, UPS_PORT_ENABLED); 2250 break; 2251 case UHF_PORT_SUSPEND: 2252 OWRITE4(sc, port, UPS_SUSPEND); 2253 break; 2254 case UHF_PORT_RESET: 2255 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2256 index)); 2257 OWRITE4(sc, port, UPS_RESET); 2258 for (i = 0; i < 10; i++) { 2259 usb_delay_ms(&sc->sc_bus, 10); 2260 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2261 break; 2262 } 2263 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2264 index, OREAD4(sc, port))); 2265 break; 2266 case UHF_PORT_POWER: 2267 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2268 "%d\n", index)); 2269 OWRITE4(sc, port, UPS_PORT_POWER); 2270 break; 2271 default: 2272 err = USBD_IOERROR; 2273 goto ret; 2274 } 2275 break; 2276 default: 2277 err = USBD_IOERROR; 2278 goto ret; 2279 } 2280 xfer->actlen = totlen; 2281 err = USBD_NORMAL_COMPLETION; 2282 ret: 2283 xfer->status = err; 2284 s = splusb(); 2285 usb_transfer_complete(xfer); 2286 splx(s); 2287 return (USBD_IN_PROGRESS); 2288 } 2289 2290 /* Abort a root control request. */ 2291 static void 2292 ohci_root_ctrl_abort(xfer) 2293 usbd_xfer_handle xfer; 2294 { 2295 /* Nothing to do, all transfers are synchronous. */ 2296 } 2297 2298 /* Close the root pipe. */ 2299 static void 2300 ohci_root_ctrl_close(pipe) 2301 usbd_pipe_handle pipe; 2302 { 2303 DPRINTF(("ohci_root_ctrl_close\n")); 2304 /* Nothing to do. */ 2305 } 2306 2307 static usbd_status 2308 ohci_root_intr_transfer(xfer) 2309 usbd_xfer_handle xfer; 2310 { 2311 usbd_status err; 2312 2313 /* Insert last in queue. */ 2314 err = usb_insert_transfer(xfer); 2315 if (err) 2316 return (err); 2317 2318 /* Pipe isn't running, start first */ 2319 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2320 } 2321 2322 static usbd_status 2323 ohci_root_intr_start(xfer) 2324 usbd_xfer_handle xfer; 2325 { 2326 usbd_pipe_handle pipe = xfer->pipe; 2327 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2328 2329 sc->sc_intrxfer = xfer; 2330 2331 return (USBD_IN_PROGRESS); 2332 } 2333 2334 /* Abort a root interrupt request. */ 2335 static void 2336 ohci_root_intr_abort(xfer) 2337 usbd_xfer_handle xfer; 2338 { 2339 int s; 2340 2341 if (xfer->pipe->intrxfer == xfer) { 2342 DPRINTF(("ohci_root_intr_abort: remove\n")); 2343 xfer->pipe->intrxfer = NULL; 2344 } 2345 xfer->status = USBD_CANCELLED; 2346 s = splusb(); 2347 usb_transfer_complete(xfer); 2348 splx(s); 2349 } 2350 2351 /* Close the root pipe. */ 2352 static void 2353 ohci_root_intr_close(pipe) 2354 usbd_pipe_handle pipe; 2355 { 2356 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2357 2358 DPRINTF(("ohci_root_intr_close\n")); 2359 2360 sc->sc_intrxfer = NULL; 2361 } 2362 2363 /************************/ 2364 2365 static usbd_status 2366 ohci_device_ctrl_transfer(xfer) 2367 usbd_xfer_handle xfer; 2368 { 2369 usbd_status err; 2370 2371 /* Insert last in queue. */ 2372 err = usb_insert_transfer(xfer); 2373 if (err) 2374 return (err); 2375 2376 /* Pipe isn't running, start first */ 2377 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2378 } 2379 2380 static usbd_status 2381 ohci_device_ctrl_start(xfer) 2382 usbd_xfer_handle xfer; 2383 { 2384 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2385 usbd_status err; 2386 2387 #ifdef DIAGNOSTIC 2388 if (!(xfer->rqflags & URQ_REQUEST)) { 2389 /* XXX panic */ 2390 printf("ohci_device_ctrl_transfer: not a request\n"); 2391 return (USBD_INVAL); 2392 } 2393 #endif 2394 2395 err = ohci_device_request(xfer); 2396 if (err) 2397 return (err); 2398 2399 if (sc->sc_bus.use_polling) 2400 ohci_waitintr(sc, xfer); 2401 return (USBD_IN_PROGRESS); 2402 } 2403 2404 /* Abort a device control request. */ 2405 static void 2406 ohci_device_ctrl_abort(xfer) 2407 usbd_xfer_handle xfer; 2408 { 2409 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2410 ohci_abort_xfer(xfer, USBD_CANCELLED); 2411 } 2412 2413 /* Close a device control pipe. */ 2414 static void 2415 ohci_device_ctrl_close(pipe) 2416 usbd_pipe_handle pipe; 2417 { 2418 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2419 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2420 2421 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2422 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2423 ohci_free_std(sc, opipe->tail.td); 2424 } 2425 2426 /************************/ 2427 2428 static void 2429 ohci_device_clear_toggle(pipe) 2430 usbd_pipe_handle pipe; 2431 { 2432 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2433 2434 opipe->sed->ed.ed_headp &= LE(~OHCI_TOGGLECARRY); 2435 } 2436 2437 static void 2438 ohci_noop(pipe) 2439 usbd_pipe_handle pipe; 2440 { 2441 } 2442 2443 static usbd_status 2444 ohci_device_bulk_transfer(xfer) 2445 usbd_xfer_handle xfer; 2446 { 2447 usbd_status err; 2448 2449 /* Insert last in queue. */ 2450 err = usb_insert_transfer(xfer); 2451 if (err) 2452 return (err); 2453 2454 /* Pipe isn't running, start first */ 2455 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2456 } 2457 2458 static usbd_status 2459 ohci_device_bulk_start(xfer) 2460 usbd_xfer_handle xfer; 2461 { 2462 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2463 usbd_device_handle dev = opipe->pipe.device; 2464 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2465 int addr = dev->address; 2466 ohci_soft_td_t *data, *tail, *tdp; 2467 ohci_soft_ed_t *sed; 2468 int s, len, isread, endpt; 2469 usbd_status err; 2470 2471 #ifdef DIAGNOSTIC 2472 if (xfer->rqflags & URQ_REQUEST) { 2473 /* XXX panic */ 2474 printf("ohci_device_bulk_start: a request\n"); 2475 return (USBD_INVAL); 2476 } 2477 #endif 2478 2479 len = xfer->length; 2480 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2481 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2482 sed = opipe->sed; 2483 2484 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2485 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2486 endpt)); 2487 2488 opipe->u.bulk.isread = isread; 2489 opipe->u.bulk.length = len; 2490 2491 /* Update device address */ 2492 sed->ed.ed_flags = LE( 2493 (LE(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2494 OHCI_ED_SET_FA(addr)); 2495 2496 /* Allocate a chain of new TDs (including a new tail). */ 2497 data = opipe->tail.td; 2498 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer->flags, 2499 &xfer->dmabuf, data, &tail); 2500 if (err) 2501 return (err); 2502 2503 tail->xfer = NULL; 2504 xfer->hcpriv = data; 2505 2506 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2507 "td_cbp=0x%08x td_be=0x%08x\n", 2508 (int)LE(sed->ed.ed_flags), (int)LE(data->td.td_flags), 2509 (int)LE(data->td.td_cbp), (int)LE(data->td.td_be))); 2510 2511 #ifdef OHCI_DEBUG 2512 if (ohcidebug > 4) { 2513 ohci_dump_ed(sed); 2514 ohci_dump_tds(data); 2515 } 2516 #endif 2517 2518 /* Insert ED in schedule */ 2519 s = splusb(); 2520 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2521 tdp->xfer = xfer; 2522 } 2523 sed->ed.ed_tailp = LE(tail->physaddr); 2524 opipe->tail.td = tail; 2525 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); 2526 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2527 if (xfer->timeout && !sc->sc_bus.use_polling) { 2528 usb_timeout(ohci_timeout, xfer, 2529 MS_TO_TICKS(xfer->timeout), xfer->timo_handle); 2530 } 2531 2532 #if 0 2533 /* This goes wrong if we are too slow. */ 2534 if (ohcidebug > 5) { 2535 usb_delay_ms(&sc->sc_bus, 5); 2536 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2537 OREAD4(sc, OHCI_COMMAND_STATUS))); 2538 ohci_dump_ed(sed); 2539 ohci_dump_tds(data); 2540 } 2541 #endif 2542 2543 splx(s); 2544 2545 return (USBD_IN_PROGRESS); 2546 } 2547 2548 static void 2549 ohci_device_bulk_abort(xfer) 2550 usbd_xfer_handle xfer; 2551 { 2552 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2553 ohci_abort_xfer(xfer, USBD_CANCELLED); 2554 } 2555 2556 /* 2557 * Close a device bulk pipe. 2558 */ 2559 static void 2560 ohci_device_bulk_close(pipe) 2561 usbd_pipe_handle pipe; 2562 { 2563 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2564 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2565 2566 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2567 ohci_close_pipe(pipe, sc->sc_bulk_head); 2568 ohci_free_std(sc, opipe->tail.td); 2569 } 2570 2571 /************************/ 2572 2573 static usbd_status 2574 ohci_device_intr_transfer(xfer) 2575 usbd_xfer_handle xfer; 2576 { 2577 usbd_status err; 2578 2579 /* Insert last in queue. */ 2580 err = usb_insert_transfer(xfer); 2581 if (err) 2582 return (err); 2583 2584 /* Pipe isn't running, start first */ 2585 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2586 } 2587 2588 static usbd_status 2589 ohci_device_intr_start(xfer) 2590 usbd_xfer_handle xfer; 2591 { 2592 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2593 usbd_device_handle dev = opipe->pipe.device; 2594 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2595 ohci_soft_ed_t *sed = opipe->sed; 2596 ohci_soft_td_t *data, *tail; 2597 int len; 2598 int s; 2599 2600 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2601 "flags=%d priv=%p\n", 2602 xfer, xfer->length, xfer->flags, xfer->priv)); 2603 2604 #ifdef DIAGNOSTIC 2605 if (xfer->rqflags & URQ_REQUEST) 2606 panic("ohci_device_intr_transfer: a request\n"); 2607 #endif 2608 2609 len = xfer->length; 2610 2611 data = opipe->tail.td; 2612 tail = ohci_alloc_std(sc); 2613 if (tail == NULL) 2614 return (USBD_NOMEM); 2615 tail->xfer = NULL; 2616 2617 data->td.td_flags = LE( 2618 OHCI_TD_IN | OHCI_TD_NOCC | 2619 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2620 if (xfer->flags & USBD_SHORT_XFER_OK) 2621 data->td.td_flags |= LE(OHCI_TD_R); 2622 data->td.td_cbp = LE(DMAADDR(&xfer->dmabuf)); 2623 data->nexttd = tail; 2624 data->td.td_nexttd = LE(tail->physaddr); 2625 data->td.td_be = LE(LE(data->td.td_cbp) + len - 1); 2626 data->len = len; 2627 data->xfer = xfer; 2628 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 2629 xfer->hcpriv = data; 2630 2631 #ifdef OHCI_DEBUG 2632 if (ohcidebug > 5) { 2633 DPRINTF(("ohci_device_intr_transfer:\n")); 2634 ohci_dump_ed(sed); 2635 ohci_dump_tds(data); 2636 } 2637 #endif 2638 2639 /* Insert ED in schedule */ 2640 s = splusb(); 2641 sed->ed.ed_tailp = LE(tail->physaddr); 2642 opipe->tail.td = tail; 2643 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); 2644 2645 #if 0 2646 /* 2647 * This goes horribly wrong, printing thousands of descriptors, 2648 * because false references are followed due to the fact that the 2649 * TD is gone. 2650 */ 2651 if (ohcidebug > 5) { 2652 usb_delay_ms(&sc->sc_bus, 5); 2653 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2654 OREAD4(sc, OHCI_COMMAND_STATUS))); 2655 ohci_dump_ed(sed); 2656 ohci_dump_tds(data); 2657 } 2658 #endif 2659 splx(s); 2660 2661 return (USBD_IN_PROGRESS); 2662 } 2663 2664 /* Abort a device control request. */ 2665 static void 2666 ohci_device_intr_abort(xfer) 2667 usbd_xfer_handle xfer; 2668 { 2669 if (xfer->pipe->intrxfer == xfer) { 2670 DPRINTF(("ohci_device_intr_abort: remove\n")); 2671 xfer->pipe->intrxfer = NULL; 2672 } 2673 ohci_abort_xfer(xfer, USBD_CANCELLED); 2674 } 2675 2676 /* Close a device interrupt pipe. */ 2677 static void 2678 ohci_device_intr_close(pipe) 2679 usbd_pipe_handle pipe; 2680 { 2681 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2682 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2683 int nslots = opipe->u.intr.nslots; 2684 int pos = opipe->u.intr.pos; 2685 int j; 2686 ohci_soft_ed_t *p, *sed = opipe->sed; 2687 int s; 2688 2689 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 2690 pipe, nslots, pos)); 2691 s = splusb(); 2692 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); 2693 if ((sed->ed.ed_tailp & LE(OHCI_HEADMASK)) != 2694 (sed->ed.ed_headp & LE(OHCI_HEADMASK))) 2695 usb_delay_ms(&sc->sc_bus, 2); 2696 2697 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 2698 ; 2699 #ifdef DIAGNOSTIC 2700 if (p == NULL) 2701 panic("ohci_device_intr_close: ED not found\n"); 2702 #endif 2703 p->next = sed->next; 2704 p->ed.ed_nexted = sed->ed.ed_nexted; 2705 splx(s); 2706 2707 for (j = 0; j < nslots; j++) 2708 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 2709 2710 ohci_free_std(sc, opipe->tail.td); 2711 ohci_free_sed(sc, opipe->sed); 2712 } 2713 2714 static usbd_status 2715 ohci_device_setintr(sc, opipe, ival) 2716 ohci_softc_t *sc; 2717 struct ohci_pipe *opipe; 2718 int ival; 2719 { 2720 int i, j, s, best; 2721 u_int npoll, slow, shigh, nslots; 2722 u_int bestbw, bw; 2723 ohci_soft_ed_t *hsed, *sed = opipe->sed; 2724 2725 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 2726 if (ival == 0) { 2727 printf("ohci_setintr: 0 interval\n"); 2728 return (USBD_INVAL); 2729 } 2730 2731 npoll = OHCI_NO_INTRS; 2732 while (npoll > ival) 2733 npoll /= 2; 2734 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 2735 2736 /* 2737 * We now know which level in the tree the ED must go into. 2738 * Figure out which slot has most bandwidth left over. 2739 * Slots to examine: 2740 * npoll 2741 * 1 0 2742 * 2 1 2 2743 * 4 3 4 5 6 2744 * 8 7 8 9 10 11 12 13 14 2745 * N (N-1) .. (N-1+N-1) 2746 */ 2747 slow = npoll-1; 2748 shigh = slow + npoll; 2749 nslots = OHCI_NO_INTRS / npoll; 2750 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 2751 bw = 0; 2752 for (j = 0; j < nslots; j++) 2753 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 2754 if (bw < bestbw) { 2755 best = i; 2756 bestbw = bw; 2757 } 2758 } 2759 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 2760 best, slow, shigh, bestbw)); 2761 2762 s = splusb(); 2763 hsed = sc->sc_eds[best]; 2764 sed->next = hsed->next; 2765 sed->ed.ed_nexted = hsed->ed.ed_nexted; 2766 hsed->next = sed; 2767 hsed->ed.ed_nexted = LE(sed->physaddr); 2768 splx(s); 2769 2770 for (j = 0; j < nslots; j++) 2771 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 2772 opipe->u.intr.nslots = nslots; 2773 opipe->u.intr.pos = best; 2774 2775 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 2776 return (USBD_NORMAL_COMPLETION); 2777 } 2778 2779 /***********************/ 2780 2781 usbd_status 2782 ohci_device_isoc_transfer(xfer) 2783 usbd_xfer_handle xfer; 2784 { 2785 usbd_status err; 2786 2787 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 2788 2789 /* Put it on our queue, */ 2790 err = usb_insert_transfer(xfer); 2791 2792 /* bail out on error, */ 2793 if (err && err != USBD_IN_PROGRESS) 2794 return (err); 2795 2796 /* XXX should check inuse here */ 2797 2798 /* insert into schedule, */ 2799 ohci_device_isoc_enter(xfer); 2800 2801 /* and put on interrupt list if the pipe wasn't running */ 2802 if (!err) 2803 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 2804 2805 return (err); 2806 } 2807 2808 void 2809 ohci_device_isoc_enter(xfer) 2810 usbd_xfer_handle xfer; 2811 { 2812 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2813 usbd_device_handle dev = opipe->pipe.device; 2814 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2815 ohci_soft_ed_t *sed = opipe->sed; 2816 struct iso *iso = &opipe->u.iso; 2817 ohci_soft_itd_t *sitd, *nsitd; 2818 ohci_physaddr_t buf, offs; 2819 int i, ncur, nframes; 2820 int ncross; 2821 int s; 2822 2823 s = splusb(); 2824 sitd = opipe->tail.itd; 2825 buf = DMAADDR(&xfer->dmabuf); 2826 sitd->itd.itd_bp0 = LE(buf & OHCI_ITD_PAGE_MASK); 2827 nframes = xfer->nframes; 2828 offs = buf & OHCI_ITD_OFFSET_MASK; 2829 for (i = ncur = 0; i < nframes; i++, ncur++) { 2830 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 2831 ncross > 1) { /* too many page crossings */ 2832 2833 nsitd = ohci_alloc_sitd(sc); 2834 if (nsitd == NULL) { 2835 /* XXX what now? */ 2836 return; 2837 } 2838 sitd->nextitd = nsitd; 2839 sitd->itd.itd_nextitd = LE(nsitd->physaddr); 2840 sitd->itd.itd_flags = LE( 2841 OHCI_ITD_NOCC | 2842 OHCI_ITD_SET_SF(iso->next) | 2843 OHCI_ITD_NOINTR | 2844 OHCI_ITD_SET_FC(OHCI_ITD_NOFFSET)); 2845 sitd->itd.itd_be = LE(LE(sitd->itd.itd_bp0) + offs - 1); 2846 nsitd->itd.itd_bp0 = LE((buf + offs) & OHCI_ITD_PAGE_MASK); 2847 sitd = nsitd; 2848 iso->next = iso->next + ncur; 2849 ncur = 0; 2850 ncross = 0; 2851 } 2852 /* XXX byte order */ 2853 sitd->itd.itd_offset[i] = 2854 offs | (ncross == 1 ? OHCI_ITD_PAGE_SELECT : 0); 2855 offs += xfer->frlengths[i]; 2856 /* XXX update ncross */ 2857 } 2858 nsitd = ohci_alloc_sitd(sc); 2859 if (nsitd == NULL) { 2860 /* XXX what now? */ 2861 return; 2862 } 2863 sitd->nextitd = nsitd; 2864 sitd->itd.itd_nextitd = LE(nsitd->physaddr); 2865 sitd->itd.itd_flags = LE( 2866 OHCI_ITD_NOCC | 2867 OHCI_ITD_SET_SF(iso->next) | 2868 OHCI_ITD_SET_DI(0) | 2869 OHCI_ITD_SET_FC(ncur)); 2870 sitd->itd.itd_be = LE(LE(sitd->itd.itd_bp0) + offs - 1); 2871 iso->next = iso->next + ncur; 2872 2873 opipe->tail.itd = nsitd; 2874 sed->ed.ed_tailp = LE(nsitd->physaddr); 2875 /* XXX update ED */ 2876 splx(s); 2877 } 2878 2879 usbd_status 2880 ohci_device_isoc_start(xfer) 2881 usbd_xfer_handle xfer; 2882 { 2883 printf("ohci_device_isoc_start: not implemented\n"); 2884 return (USBD_INVAL); 2885 } 2886 2887 void 2888 ohci_device_isoc_abort(xfer) 2889 usbd_xfer_handle xfer; 2890 { 2891 } 2892 2893 void 2894 ohci_device_isoc_done(xfer) 2895 usbd_xfer_handle xfer; 2896 { 2897 printf("ohci_device_isoc_done: not implemented\n"); 2898 } 2899 2900 usbd_status 2901 ohci_setup_isoc(pipe) 2902 usbd_pipe_handle pipe; 2903 { 2904 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2905 struct iso *iso = &opipe->u.iso; 2906 2907 iso->next = -1; 2908 iso->inuse = 0; 2909 2910 return (USBD_NORMAL_COMPLETION); 2911 } 2912 2913 void 2914 ohci_device_isoc_close(pipe) 2915 usbd_pipe_handle pipe; 2916 { 2917 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2918 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2919 2920 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 2921 ohci_close_pipe(pipe, sc->sc_isoc_head); 2922 ohci_free_sitd(sc, opipe->tail.itd); 2923 } 2924