1 /* $NetBSD: ohci.c,v 1.102 2001/04/01 15:00:29 augustss Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart@augustsson.net) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * USB Open Host Controller driver. 43 * 44 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 45 * USB spec: http://www.usb.org/developers/data/usbspec.zip 46 */ 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/malloc.h> 51 #if defined(__NetBSD__) || defined(__OpenBSD__) 52 #include <sys/kernel.h> 53 #include <sys/device.h> 54 #include <sys/select.h> 55 #elif defined(__FreeBSD__) 56 #include <sys/module.h> 57 #include <sys/bus.h> 58 #include <machine/bus_pio.h> 59 #include <machine/bus_memio.h> 60 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 61 #include <machine/cpu.h> 62 #endif 63 #endif 64 #include <sys/proc.h> 65 #include <sys/queue.h> 66 67 #include <machine/bus.h> 68 #include <machine/endian.h> 69 70 #include <dev/usb/usb.h> 71 #include <dev/usb/usbdi.h> 72 #include <dev/usb/usbdivar.h> 73 #include <dev/usb/usb_mem.h> 74 #include <dev/usb/usb_quirks.h> 75 76 #include <dev/usb/ohcireg.h> 77 #include <dev/usb/ohcivar.h> 78 79 #if defined(__FreeBSD__) 80 #include <machine/clock.h> 81 82 #define delay(d) DELAY(d) 83 #endif 84 85 #if defined(__OpenBSD__) 86 struct cfdriver ohci_cd = { 87 NULL, "ohci", DV_DULL 88 }; 89 #endif 90 91 #ifdef OHCI_DEBUG 92 #define DPRINTF(x) if (ohcidebug) logprintf x 93 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 94 int ohcidebug = 0; 95 #ifndef __NetBSD__ 96 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 97 #endif 98 #else 99 #define DPRINTF(x) 100 #define DPRINTFN(n,x) 101 #endif 102 103 /* 104 * The OHCI controller is little endian, so on big endian machines 105 * the data strored in memory needs to be swapped. 106 */ 107 #if defined(__FreeBSD__) || defined(__OpenBSD__) 108 #if BYTE_ORDER == BIG_ENDIAN 109 #define htole32(x) (bswap32(x)) 110 #define le32toh(x) (bswap32(x)) 111 #else 112 #define htole32(x) (x) 113 #define le32toh(x) (x) 114 #endif 115 #endif 116 117 struct ohci_pipe; 118 119 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 120 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 121 122 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 123 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 124 125 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 126 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 127 128 #if 0 129 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 130 ohci_soft_td_t *); 131 #endif 132 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 133 ohci_softc_t *, int, int, usbd_xfer_handle, 134 ohci_soft_td_t *, ohci_soft_td_t **); 135 136 Static void ohci_shutdown(void *v); 137 Static void ohci_power(int, void *); 138 Static usbd_status ohci_open(usbd_pipe_handle); 139 Static void ohci_poll(struct usbd_bus *); 140 Static void ohci_softintr(void *); 141 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 142 Static void ohci_add_done(ohci_softc_t *, ohci_physaddr_t); 143 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 144 145 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 146 Static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 147 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 148 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 149 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 150 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 151 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 152 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 153 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 154 155 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 156 Static void ohci_device_isoc_enter(usbd_xfer_handle); 157 158 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 159 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 160 161 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 162 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 163 164 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 165 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 166 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 167 Static void ohci_root_ctrl_close(usbd_pipe_handle); 168 Static void ohci_root_ctrl_done(usbd_xfer_handle); 169 170 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 171 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 172 Static void ohci_root_intr_abort(usbd_xfer_handle); 173 Static void ohci_root_intr_close(usbd_pipe_handle); 174 Static void ohci_root_intr_done(usbd_xfer_handle); 175 176 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 177 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 178 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 179 Static void ohci_device_ctrl_close(usbd_pipe_handle); 180 Static void ohci_device_ctrl_done(usbd_xfer_handle); 181 182 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 183 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 184 Static void ohci_device_bulk_abort(usbd_xfer_handle); 185 Static void ohci_device_bulk_close(usbd_pipe_handle); 186 Static void ohci_device_bulk_done(usbd_xfer_handle); 187 188 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 189 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 190 Static void ohci_device_intr_abort(usbd_xfer_handle); 191 Static void ohci_device_intr_close(usbd_pipe_handle); 192 Static void ohci_device_intr_done(usbd_xfer_handle); 193 194 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 195 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 196 Static void ohci_device_isoc_abort(usbd_xfer_handle); 197 Static void ohci_device_isoc_close(usbd_pipe_handle); 198 Static void ohci_device_isoc_done(usbd_xfer_handle); 199 200 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 201 struct ohci_pipe *pipe, int ival); 202 203 Static int ohci_str(usb_string_descriptor_t *, int, char *); 204 205 Static void ohci_timeout(void *); 206 Static void ohci_rhsc_able(ohci_softc_t *, int); 207 208 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 209 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 210 Static void ohci_abort_xfer_end(void *); 211 212 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 213 Static void ohci_noop(usbd_pipe_handle pipe); 214 215 #ifdef OHCI_DEBUG 216 Static void ohci_dumpregs(ohci_softc_t *); 217 Static void ohci_dump_tds(ohci_soft_td_t *); 218 Static void ohci_dump_td(ohci_soft_td_t *); 219 Static void ohci_dump_ed(ohci_soft_ed_t *); 220 Static void ohci_dump_itd(ohci_soft_itd_t *); 221 Static void ohci_dump_itds(ohci_soft_itd_t *); 222 #endif 223 224 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 225 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 226 #define OWRITE1(sc, r, x) \ 227 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 228 #define OWRITE2(sc, r, x) \ 229 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 230 #define OWRITE4(sc, r, x) \ 231 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 232 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r))) 233 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r))) 234 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r))) 235 236 /* Reverse the bits in a value 0 .. 31 */ 237 Static u_int8_t revbits[OHCI_NO_INTRS] = 238 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 239 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 240 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 241 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 242 243 struct ohci_pipe { 244 struct usbd_pipe pipe; 245 ohci_soft_ed_t *sed; 246 union { 247 ohci_soft_td_t *td; 248 ohci_soft_itd_t *itd; 249 } tail; 250 /* Info needed for different pipe kinds. */ 251 union { 252 /* Control pipe */ 253 struct { 254 usb_dma_t reqdma; 255 u_int length; 256 ohci_soft_td_t *setup, *data, *stat; 257 } ctl; 258 /* Interrupt pipe */ 259 struct { 260 int nslots; 261 int pos; 262 } intr; 263 /* Bulk pipe */ 264 struct { 265 u_int length; 266 int isread; 267 } bulk; 268 /* Iso pipe */ 269 struct iso { 270 int next, inuse; 271 } iso; 272 } u; 273 }; 274 275 #define OHCI_INTR_ENDPT 1 276 277 Static struct usbd_bus_methods ohci_bus_methods = { 278 ohci_open, 279 ohci_softintr, 280 ohci_poll, 281 ohci_allocm, 282 ohci_freem, 283 ohci_allocx, 284 ohci_freex, 285 }; 286 287 Static struct usbd_pipe_methods ohci_root_ctrl_methods = { 288 ohci_root_ctrl_transfer, 289 ohci_root_ctrl_start, 290 ohci_root_ctrl_abort, 291 ohci_root_ctrl_close, 292 ohci_noop, 293 ohci_root_ctrl_done, 294 }; 295 296 Static struct usbd_pipe_methods ohci_root_intr_methods = { 297 ohci_root_intr_transfer, 298 ohci_root_intr_start, 299 ohci_root_intr_abort, 300 ohci_root_intr_close, 301 ohci_noop, 302 ohci_root_intr_done, 303 }; 304 305 Static struct usbd_pipe_methods ohci_device_ctrl_methods = { 306 ohci_device_ctrl_transfer, 307 ohci_device_ctrl_start, 308 ohci_device_ctrl_abort, 309 ohci_device_ctrl_close, 310 ohci_noop, 311 ohci_device_ctrl_done, 312 }; 313 314 Static struct usbd_pipe_methods ohci_device_intr_methods = { 315 ohci_device_intr_transfer, 316 ohci_device_intr_start, 317 ohci_device_intr_abort, 318 ohci_device_intr_close, 319 ohci_device_clear_toggle, 320 ohci_device_intr_done, 321 }; 322 323 Static struct usbd_pipe_methods ohci_device_bulk_methods = { 324 ohci_device_bulk_transfer, 325 ohci_device_bulk_start, 326 ohci_device_bulk_abort, 327 ohci_device_bulk_close, 328 ohci_device_clear_toggle, 329 ohci_device_bulk_done, 330 }; 331 332 Static struct usbd_pipe_methods ohci_device_isoc_methods = { 333 ohci_device_isoc_transfer, 334 ohci_device_isoc_start, 335 ohci_device_isoc_abort, 336 ohci_device_isoc_close, 337 ohci_noop, 338 ohci_device_isoc_done, 339 }; 340 341 #if defined(__NetBSD__) || defined(__OpenBSD__) 342 int 343 ohci_activate(device_ptr_t self, enum devact act) 344 { 345 struct ohci_softc *sc = (struct ohci_softc *)self; 346 int rv = 0; 347 348 switch (act) { 349 case DVACT_ACTIVATE: 350 return (EOPNOTSUPP); 351 break; 352 353 case DVACT_DEACTIVATE: 354 if (sc->sc_child != NULL) 355 rv = config_deactivate(sc->sc_child); 356 sc->sc_dying = 1; 357 break; 358 } 359 return (rv); 360 } 361 362 int 363 ohci_detach(struct ohci_softc *sc, int flags) 364 { 365 int rv = 0; 366 367 if (sc->sc_child != NULL) 368 rv = config_detach(sc->sc_child, flags); 369 370 if (rv != 0) 371 return (rv); 372 373 #if defined(__NetBSD__) || defined(__OpenBSD__) 374 powerhook_disestablish(sc->sc_powerhook); 375 shutdownhook_disestablish(sc->sc_shutdownhook); 376 #endif 377 378 /* free data structures XXX */ 379 380 return (rv); 381 } 382 #endif 383 384 ohci_soft_ed_t * 385 ohci_alloc_sed(ohci_softc_t *sc) 386 { 387 ohci_soft_ed_t *sed; 388 usbd_status err; 389 int i, offs; 390 usb_dma_t dma; 391 392 if (sc->sc_freeeds == NULL) { 393 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 394 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 395 OHCI_ED_ALIGN, &dma); 396 if (err) 397 return (0); 398 for(i = 0; i < OHCI_SED_CHUNK; i++) { 399 offs = i * OHCI_SED_SIZE; 400 sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs); 401 sed->physaddr = DMAADDR(&dma) + offs; 402 sed->next = sc->sc_freeeds; 403 sc->sc_freeeds = sed; 404 } 405 } 406 sed = sc->sc_freeeds; 407 sc->sc_freeeds = sed->next; 408 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 409 sed->next = 0; 410 return (sed); 411 } 412 413 void 414 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 415 { 416 sed->next = sc->sc_freeeds; 417 sc->sc_freeeds = sed; 418 } 419 420 ohci_soft_td_t * 421 ohci_alloc_std(ohci_softc_t *sc) 422 { 423 ohci_soft_td_t *std; 424 usbd_status err; 425 int i, offs; 426 usb_dma_t dma; 427 int s; 428 429 if (sc->sc_freetds == NULL) { 430 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 431 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 432 OHCI_TD_ALIGN, &dma); 433 if (err) 434 return (NULL); 435 s = splusb(); 436 for(i = 0; i < OHCI_STD_CHUNK; i++) { 437 offs = i * OHCI_STD_SIZE; 438 std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs); 439 std->physaddr = DMAADDR(&dma) + offs; 440 std->nexttd = sc->sc_freetds; 441 sc->sc_freetds = std; 442 } 443 splx(s); 444 } 445 446 s = splusb(); 447 std = sc->sc_freetds; 448 sc->sc_freetds = std->nexttd; 449 memset(&std->td, 0, sizeof(ohci_td_t)); 450 std->nexttd = NULL; 451 std->xfer = NULL; 452 ohci_hash_add_td(sc, std); 453 splx(s); 454 455 return (std); 456 } 457 458 void 459 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 460 { 461 int s; 462 463 s = splusb(); 464 ohci_hash_rem_td(sc, std); 465 std->nexttd = sc->sc_freetds; 466 sc->sc_freetds = std; 467 splx(s); 468 } 469 470 usbd_status 471 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 472 int alen, int rd, usbd_xfer_handle xfer, 473 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 474 { 475 ohci_soft_td_t *next, *cur; 476 ohci_physaddr_t dataphys, dataphysend; 477 u_int32_t tdflags; 478 int len, curlen; 479 usb_dma_t *dma = &xfer->dmabuf; 480 u_int16_t flags = xfer->flags; 481 482 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 483 484 len = alen; 485 cur = sp; 486 dataphys = DMAADDR(dma); 487 dataphysend = OHCI_PAGE(dataphys + len - 1); 488 tdflags = htole32( 489 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 490 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 491 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 492 493 for (;;) { 494 next = ohci_alloc_std(sc); 495 if (next == NULL) 496 goto nomem; 497 498 /* The OHCI hardware can handle at most one page crossing. */ 499 if (OHCI_PAGE(dataphys) == dataphysend || 500 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 501 /* we can handle it in this TD */ 502 curlen = len; 503 } else { 504 /* must use multiple TDs, fill as much as possible. */ 505 curlen = 2 * OHCI_PAGE_SIZE - 506 (dataphys & (OHCI_PAGE_SIZE-1)); 507 /* the length must be a multiple of the max size */ 508 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 509 #ifdef DIAGNOSTIC 510 if (curlen == 0) 511 panic("ohci_alloc_std: curlen == 0\n"); 512 #endif 513 } 514 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 515 "dataphysend=0x%08x len=%d curlen=%d\n", 516 dataphys, dataphysend, 517 len, curlen)); 518 len -= curlen; 519 520 cur->td.td_flags = tdflags; 521 cur->td.td_cbp = htole32(dataphys); 522 cur->nexttd = next; 523 cur->td.td_nexttd = htole32(next->physaddr); 524 cur->td.td_be = htole32(dataphys + curlen - 1); 525 cur->len = curlen; 526 cur->flags = OHCI_ADD_LEN; 527 cur->xfer = xfer; 528 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 529 dataphys, dataphys + curlen - 1)); 530 if (len == 0) 531 break; 532 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 533 dataphys += curlen; 534 cur = next; 535 } 536 if ((flags & USBD_FORCE_SHORT_XFER) && 537 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 538 /* Force a 0 length transfer at the end. */ 539 540 cur = next; 541 next = ohci_alloc_std(sc); 542 if (next == NULL) 543 goto nomem; 544 545 cur->td.td_flags = tdflags; 546 cur->td.td_cbp = 0; /* indicate 0 length packet */ 547 cur->nexttd = next; 548 cur->td.td_nexttd = htole32(next->physaddr); 549 cur->td.td_be = ~0; 550 cur->len = 0; 551 cur->flags = 0; 552 cur->xfer = xfer; 553 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 554 } 555 *ep = cur; 556 557 return (USBD_NORMAL_COMPLETION); 558 559 nomem: 560 /* XXX free chain */ 561 return (USBD_NOMEM); 562 } 563 564 #if 0 565 Static void 566 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 567 ohci_soft_td_t *stdend) 568 { 569 ohci_soft_td_t *p; 570 571 for (; std != stdend; std = p) { 572 p = std->nexttd; 573 ohci_free_std(sc, std); 574 } 575 } 576 #endif 577 578 ohci_soft_itd_t * 579 ohci_alloc_sitd(ohci_softc_t *sc) 580 { 581 ohci_soft_itd_t *sitd; 582 usbd_status err; 583 int i, s, offs; 584 usb_dma_t dma; 585 586 if (sc->sc_freeitds == NULL) { 587 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 588 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 589 OHCI_ITD_ALIGN, &dma); 590 if (err) 591 return (NULL); 592 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 593 offs = i * OHCI_SITD_SIZE; 594 sitd = (ohci_soft_itd_t *)((char*)KERNADDR(&dma)+offs); 595 sitd->physaddr = DMAADDR(&dma) + offs; 596 sitd->nextitd = sc->sc_freeitds; 597 sc->sc_freeitds = sitd; 598 } 599 } 600 601 s = splusb(); 602 sitd = sc->sc_freeitds; 603 sc->sc_freeitds = sitd->nextitd; 604 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 605 sitd->nextitd = NULL; 606 sitd->xfer = NULL; 607 ohci_hash_add_itd(sc, sitd); 608 splx(s); 609 610 #ifdef DIAGNOSTIC 611 sitd->isdone = 0; 612 #endif 613 614 return (sitd); 615 } 616 617 void 618 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 619 { 620 int s; 621 622 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 623 624 #ifdef DIAGNOSTIC 625 if (!sitd->isdone) { 626 panic("ohci_free_sitd: sitd=%p not done\n", sitd); 627 return; 628 } 629 #endif 630 631 s = splusb(); 632 ohci_hash_rem_itd(sc, sitd); 633 sitd->nextitd = sc->sc_freeitds; 634 sc->sc_freeitds = sitd; 635 splx(s); 636 } 637 638 usbd_status 639 ohci_init(ohci_softc_t *sc) 640 { 641 ohci_soft_ed_t *sed, *psed; 642 usbd_status err; 643 int i; 644 u_int32_t s, ctl, ival, hcr, fm, per, rev, desca; 645 646 DPRINTF(("ohci_init: start\n")); 647 #if defined(__OpenBSD__) 648 printf(","); 649 #else 650 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 651 #endif 652 rev = OREAD4(sc, OHCI_REVISION); 653 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 654 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 655 656 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 657 printf("%s: unsupported OHCI revision\n", 658 USBDEVNAME(sc->sc_bus.bdev)); 659 sc->sc_bus.usbrev = USBREV_UNKNOWN; 660 return (USBD_INVAL); 661 } 662 sc->sc_bus.usbrev = USBREV_1_0; 663 664 for (i = 0; i < OHCI_HASH_SIZE; i++) 665 LIST_INIT(&sc->sc_hash_tds[i]); 666 for (i = 0; i < OHCI_HASH_SIZE; i++) 667 LIST_INIT(&sc->sc_hash_itds[i]); 668 669 SIMPLEQ_INIT(&sc->sc_free_xfers); 670 671 /* XXX determine alignment by R/W */ 672 /* Allocate the HCCA area. */ 673 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 674 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 675 if (err) 676 return (err); 677 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma); 678 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 679 680 sc->sc_eintrs = OHCI_NORMAL_INTRS; 681 682 /* Allocate dummy ED that starts the control list. */ 683 sc->sc_ctrl_head = ohci_alloc_sed(sc); 684 if (sc->sc_ctrl_head == NULL) { 685 err = USBD_NOMEM; 686 goto bad1; 687 } 688 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 689 690 /* Allocate dummy ED that starts the bulk list. */ 691 sc->sc_bulk_head = ohci_alloc_sed(sc); 692 if (sc->sc_bulk_head == NULL) { 693 err = USBD_NOMEM; 694 goto bad2; 695 } 696 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 697 698 /* Allocate dummy ED that starts the isochronous list. */ 699 sc->sc_isoc_head = ohci_alloc_sed(sc); 700 if (sc->sc_isoc_head == NULL) { 701 err = USBD_NOMEM; 702 goto bad3; 703 } 704 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 705 706 /* Allocate all the dummy EDs that make up the interrupt tree. */ 707 for (i = 0; i < OHCI_NO_EDS; i++) { 708 sed = ohci_alloc_sed(sc); 709 if (sed == NULL) { 710 while (--i >= 0) 711 ohci_free_sed(sc, sc->sc_eds[i]); 712 err = USBD_NOMEM; 713 goto bad4; 714 } 715 /* All ED fields are set to 0. */ 716 sc->sc_eds[i] = sed; 717 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 718 if (i != 0) 719 psed = sc->sc_eds[(i-1) / 2]; 720 else 721 psed= sc->sc_isoc_head; 722 sed->next = psed; 723 sed->ed.ed_nexted = htole32(psed->physaddr); 724 } 725 /* 726 * Fill HCCA interrupt table. The bit reversal is to get 727 * the tree set up properly to spread the interrupts. 728 */ 729 for (i = 0; i < OHCI_NO_INTRS; i++) 730 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 731 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 732 733 #ifdef OHCI_DEBUG 734 if (ohcidebug > 15) { 735 for (i = 0; i < OHCI_NO_EDS; i++) { 736 printf("ed#%d ", i); 737 ohci_dump_ed(sc->sc_eds[i]); 738 } 739 printf("iso "); 740 ohci_dump_ed(sc->sc_isoc_head); 741 } 742 #endif 743 744 /* Determine in what context we are running. */ 745 ctl = OREAD4(sc, OHCI_CONTROL); 746 if (ctl & OHCI_IR) { 747 /* SMM active, request change */ 748 DPRINTF(("ohci_init: SMM active, request owner change\n")); 749 s = OREAD4(sc, OHCI_COMMAND_STATUS); 750 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 751 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 752 usb_delay_ms(&sc->sc_bus, 1); 753 ctl = OREAD4(sc, OHCI_CONTROL); 754 } 755 if ((ctl & OHCI_IR) == 0) { 756 printf("%s: SMM does not respond, resetting\n", 757 USBDEVNAME(sc->sc_bus.bdev)); 758 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 759 goto reset; 760 } 761 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 762 /* BIOS started controller. */ 763 DPRINTF(("ohci_init: BIOS active\n")); 764 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 765 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 766 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 767 } 768 } else { 769 DPRINTF(("ohci_init: cold started\n")); 770 reset: 771 /* Controller was cold started. */ 772 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 773 } 774 775 /* 776 * This reset should not be necessary according to the OHCI spec, but 777 * without it some controllers do not start. 778 */ 779 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 780 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 781 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 782 783 /* We now own the host controller and the bus has been reset. */ 784 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 785 786 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 787 /* Nominal time for a reset is 10 us. */ 788 for (i = 0; i < 10; i++) { 789 delay(10); 790 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 791 if (!hcr) 792 break; 793 } 794 if (hcr) { 795 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 796 err = USBD_IOERROR; 797 goto bad5; 798 } 799 #ifdef OHCI_DEBUG 800 if (ohcidebug > 15) 801 ohci_dumpregs(sc); 802 #endif 803 804 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 805 806 /* Set up HC registers. */ 807 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 808 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 809 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 810 /* disable all interrupts and then switch on all desired interrupts */ 811 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 812 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 813 /* switch on desired functional features */ 814 ctl = OREAD4(sc, OHCI_CONTROL); 815 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 816 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 817 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 818 /* And finally start it! */ 819 OWRITE4(sc, OHCI_CONTROL, ctl); 820 821 /* 822 * The controller is now OPERATIONAL. Set a some final 823 * registers that should be set earlier, but that the 824 * controller ignores when in the SUSPEND state. 825 */ 826 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 827 fm |= OHCI_FSMPS(ival) | ival; 828 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 829 per = OHCI_PERIODIC(ival); /* 90% periodic */ 830 OWRITE4(sc, OHCI_PERIODIC_START, per); 831 832 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 833 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 834 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 835 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 836 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 837 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 838 839 /* 840 * The AMD756 requires a delay before re-reading the register, 841 * otherwise it will occasionally report 0 ports. 842 */ 843 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 844 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 845 846 #ifdef OHCI_DEBUG 847 if (ohcidebug > 5) 848 ohci_dumpregs(sc); 849 #endif 850 851 /* Set up the bus struct. */ 852 sc->sc_bus.methods = &ohci_bus_methods; 853 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 854 855 #if defined(__NetBSD__) || defined(__OpenBSD__) 856 sc->sc_control = sc->sc_intre = 0; 857 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 858 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 859 #endif 860 861 return (USBD_NORMAL_COMPLETION); 862 863 bad5: 864 for (i = 0; i < OHCI_NO_EDS; i++) 865 ohci_free_sed(sc, sc->sc_eds[i]); 866 bad4: 867 ohci_free_sed(sc, sc->sc_isoc_head); 868 bad3: 869 ohci_free_sed(sc, sc->sc_ctrl_head); 870 bad2: 871 ohci_free_sed(sc, sc->sc_bulk_head); 872 bad1: 873 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 874 return (err); 875 } 876 877 usbd_status 878 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 879 { 880 #if defined(__NetBSD__) || defined(__OpenBSD__) 881 struct ohci_softc *sc = (struct ohci_softc *)bus; 882 #endif 883 884 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 885 } 886 887 void 888 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 889 { 890 #if defined(__NetBSD__) || defined(__OpenBSD__) 891 struct ohci_softc *sc = (struct ohci_softc *)bus; 892 #endif 893 894 usb_freemem(&sc->sc_bus, dma); 895 } 896 897 usbd_xfer_handle 898 ohci_allocx(struct usbd_bus *bus) 899 { 900 struct ohci_softc *sc = (struct ohci_softc *)bus; 901 usbd_xfer_handle xfer; 902 903 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 904 if (xfer != NULL) 905 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next); 906 else 907 xfer = malloc(sizeof(*xfer), M_USB, M_NOWAIT); 908 if (xfer != NULL) 909 memset(xfer, 0, sizeof *xfer); 910 return (xfer); 911 } 912 913 void 914 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 915 { 916 struct ohci_softc *sc = (struct ohci_softc *)bus; 917 918 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 919 } 920 921 /* 922 * Shut down the controller when the system is going down. 923 */ 924 void 925 ohci_shutdown(void *v) 926 { 927 ohci_softc_t *sc = v; 928 929 DPRINTF(("ohci_shutdown: stopping the HC\n")); 930 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 931 } 932 933 /* 934 * Handle suspend/resume. 935 * 936 * We need to switch to polling mode here, because this routine is 937 * called from an intterupt context. This is all right since we 938 * are almost suspended anyway. 939 */ 940 void 941 ohci_power(int why, void *v) 942 { 943 ohci_softc_t *sc = v; 944 u_int32_t ctl; 945 int s; 946 947 #ifdef OHCI_DEBUG 948 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 949 ohci_dumpregs(sc); 950 #endif 951 952 s = splhardusb(); 953 switch (why) { 954 case PWR_SUSPEND: 955 case PWR_STANDBY: 956 sc->sc_bus.use_polling++; 957 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 958 if (sc->sc_control == 0) { 959 /* 960 * Preserve register values, in case that APM BIOS 961 * does not recover them. 962 */ 963 sc->sc_control = ctl; 964 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE); 965 } 966 ctl |= OHCI_HCFS_SUSPEND; 967 OWRITE4(sc, OHCI_CONTROL, ctl); 968 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 969 sc->sc_bus.use_polling--; 970 break; 971 case PWR_RESUME: 972 sc->sc_bus.use_polling++; 973 /* Some broken BIOSes do not recover these values */ 974 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 975 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 976 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 977 if (sc->sc_intre) 978 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, 979 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE)); 980 if (sc->sc_control) 981 ctl = sc->sc_control; 982 else 983 ctl = OREAD4(sc, OHCI_CONTROL); 984 ctl |= OHCI_HCFS_RESUME; 985 OWRITE4(sc, OHCI_CONTROL, ctl); 986 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 987 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 988 OWRITE4(sc, OHCI_CONTROL, ctl); 989 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 990 sc->sc_control = sc->sc_intre = 0; 991 sc->sc_bus.use_polling--; 992 break; 993 case PWR_SOFTSUSPEND: 994 case PWR_SOFTSTANDBY: 995 case PWR_SOFTRESUME: 996 break; 997 } 998 splx(s); 999 } 1000 1001 #ifdef OHCI_DEBUG 1002 void 1003 ohci_dumpregs(ohci_softc_t *sc) 1004 { 1005 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1006 OREAD4(sc, OHCI_REVISION), 1007 OREAD4(sc, OHCI_CONTROL), 1008 OREAD4(sc, OHCI_COMMAND_STATUS))); 1009 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1010 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1011 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1012 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1013 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1014 OREAD4(sc, OHCI_HCCA), 1015 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1016 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1017 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1018 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1019 OREAD4(sc, OHCI_BULK_HEAD_ED), 1020 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1021 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1022 OREAD4(sc, OHCI_DONE_HEAD), 1023 OREAD4(sc, OHCI_FM_INTERVAL), 1024 OREAD4(sc, OHCI_FM_REMAINING))); 1025 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1026 OREAD4(sc, OHCI_FM_NUMBER), 1027 OREAD4(sc, OHCI_PERIODIC_START), 1028 OREAD4(sc, OHCI_LS_THRESHOLD))); 1029 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1030 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1031 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1032 OREAD4(sc, OHCI_RH_STATUS))); 1033 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1034 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1035 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1036 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1037 le32toh(sc->sc_hcca->hcca_frame_number), 1038 le32toh(sc->sc_hcca->hcca_done_head))); 1039 } 1040 #endif 1041 1042 Static int ohci_intr1(ohci_softc_t *); 1043 1044 int 1045 ohci_intr(void *p) 1046 { 1047 ohci_softc_t *sc = p; 1048 1049 /* If we get an interrupt while polling, then just ignore it. */ 1050 if (sc->sc_bus.use_polling) { 1051 #ifdef DIAGNOSTIC 1052 printf("ohci_intr: ignored interrupt while polling\n"); 1053 #endif 1054 return (0); 1055 } 1056 1057 return (ohci_intr1(sc)); 1058 } 1059 1060 Static int 1061 ohci_intr1(ohci_softc_t *sc) 1062 { 1063 u_int32_t intrs, eintrs; 1064 ohci_physaddr_t done; 1065 1066 /* In case the interrupt occurs before initialization has completed. */ 1067 if (sc == NULL || sc->sc_hcca == NULL) { 1068 #ifdef DIAGNOSTIC 1069 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1070 #endif 1071 return (0); 1072 } 1073 1074 intrs = 0; 1075 done = le32toh(sc->sc_hcca->hcca_done_head); 1076 if (done != 0) { 1077 if (done & ~OHCI_DONE_INTRS) 1078 intrs = OHCI_WDH; 1079 if (done & OHCI_DONE_INTRS) 1080 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 1081 } else 1082 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1083 1084 if (!intrs) 1085 return (0); 1086 1087 intrs &= ~OHCI_MIE; 1088 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 1089 eintrs = intrs & sc->sc_eintrs; 1090 if (!eintrs) 1091 return (0); 1092 1093 sc->sc_bus.intr_context++; 1094 sc->sc_bus.no_intrs++; 1095 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1096 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1097 (u_int)eintrs)); 1098 1099 if (eintrs & OHCI_SO) { 1100 sc->sc_overrun_cnt++; 1101 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1102 printf("%s: %u scheduling overruns\n", 1103 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt); 1104 sc->sc_overrun_cnt = 0; 1105 } 1106 /* XXX do what */ 1107 intrs &= ~OHCI_SO; 1108 } 1109 if (eintrs & OHCI_WDH) { 1110 ohci_add_done(sc, done &~ OHCI_DONE_INTRS); 1111 sc->sc_hcca->hcca_done_head = 0; 1112 usb_schedsoftintr(&sc->sc_bus); 1113 intrs &= ~OHCI_WDH; 1114 } 1115 if (eintrs & OHCI_RD) { 1116 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1117 /* XXX process resume detect */ 1118 } 1119 if (eintrs & OHCI_UE) { 1120 printf("%s: unrecoverable error, controller halted\n", 1121 USBDEVNAME(sc->sc_bus.bdev)); 1122 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1123 /* XXX what else */ 1124 } 1125 if (eintrs & OHCI_RHSC) { 1126 ohci_rhsc(sc, sc->sc_intrxfer); 1127 intrs &= ~OHCI_RHSC; 1128 1129 /* 1130 * Disable RHSC interrupt for now, because it will be 1131 * on until the port has been reset. 1132 */ 1133 ohci_rhsc_able(sc, 0); 1134 } 1135 1136 sc->sc_bus.intr_context--; 1137 1138 /* Block unprocessed interrupts. XXX */ 1139 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs); 1140 sc->sc_eintrs &= ~intrs; 1141 1142 return (1); 1143 } 1144 1145 void 1146 ohci_rhsc_able(ohci_softc_t *sc, int on) 1147 { 1148 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 1149 if (on) { 1150 sc->sc_eintrs |= OHCI_RHSC; 1151 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1152 } else { 1153 sc->sc_eintrs &= ~OHCI_RHSC; 1154 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 1155 } 1156 } 1157 1158 #ifdef OHCI_DEBUG 1159 char *ohci_cc_strs[] = { 1160 "NO_ERROR", 1161 "CRC", 1162 "BIT_STUFFING", 1163 "DATA_TOGGLE_MISMATCH", 1164 "STALL", 1165 "DEVICE_NOT_RESPONDING", 1166 "PID_CHECK_FAILURE", 1167 "UNEXPECTED_PID", 1168 "DATA_OVERRUN", 1169 "DATA_UNDERRUN", 1170 "BUFFER_OVERRUN", 1171 "BUFFER_UNDERRUN", 1172 "reserved", 1173 "reserved", 1174 "NOT_ACCESSED", 1175 "NOT_ACCESSED", 1176 }; 1177 #endif 1178 1179 void 1180 ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done) 1181 { 1182 ohci_soft_itd_t *sitd, *sidone, **ip; 1183 ohci_soft_td_t *std, *sdone, **p; 1184 1185 /* Reverse the done list. */ 1186 for (sdone = NULL, sidone = NULL; done != 0; ) { 1187 std = ohci_hash_find_td(sc, done); 1188 if (std != NULL) { 1189 std->dnext = sdone; 1190 done = le32toh(std->td.td_nexttd); 1191 sdone = std; 1192 DPRINTFN(10,("add TD %p\n", std)); 1193 continue; 1194 } 1195 sitd = ohci_hash_find_itd(sc, done); 1196 if (sitd != NULL) { 1197 sitd->dnext = sidone; 1198 done = le32toh(sitd->itd.itd_nextitd); 1199 sidone = sitd; 1200 DPRINTFN(5,("add ITD %p\n", sitd)); 1201 continue; 1202 } 1203 panic("ohci_add_done: addr 0x%08lx not found\n", (u_long)done); 1204 } 1205 1206 /* sdone & sidone now hold the done lists. */ 1207 /* Put them on the already processed lists. */ 1208 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext) 1209 ; 1210 *p = sdone; 1211 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext) 1212 ; 1213 *ip = sidone; 1214 } 1215 1216 void 1217 ohci_softintr(void *v) 1218 { 1219 ohci_softc_t *sc = v; 1220 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1221 ohci_soft_td_t *std, *sdone, *stdnext; 1222 usbd_xfer_handle xfer; 1223 int len, cc, s; 1224 1225 sc->sc_bus.intr_context++; 1226 1227 s = splhardusb(); 1228 sdone = sc->sc_sdone; 1229 sc->sc_sdone = NULL; 1230 sidone = sc->sc_sidone; 1231 sc->sc_sidone = NULL; 1232 splx(s); 1233 1234 DPRINTFN(10,("ohci_process_done: sdone=%p sidone=%p\n", sdone, sidone)); 1235 1236 #ifdef OHCI_DEBUG 1237 if (ohcidebug > 10) { 1238 DPRINTF(("ohci_process_done: TD done:\n")); 1239 ohci_dump_tds(sdone); 1240 } 1241 #endif 1242 1243 for (std = sdone; std; std = stdnext) { 1244 xfer = std->xfer; 1245 stdnext = std->dnext; 1246 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1247 std, xfer, xfer ? xfer->hcpriv : 0)); 1248 if (xfer == NULL) { 1249 /* xfer == NULL: There seems to be no xfer associated 1250 * with this TD. It is tailp that happened to end up on 1251 * the done queue. 1252 */ 1253 continue; 1254 } 1255 if (xfer->status == USBD_CANCELLED || 1256 xfer->status == USBD_TIMEOUT) { 1257 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1258 xfer)); 1259 /* Handled by abort routine. */ 1260 continue; 1261 } 1262 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1263 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags)); 1264 if (cc == OHCI_CC_NO_ERROR) { 1265 len = std->len; 1266 if (std->td.td_cbp != 0) 1267 len -= le32toh(std->td.td_be) - 1268 le32toh(std->td.td_cbp) + 1; 1269 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", 1270 len, std->flags)); 1271 if (std->flags & OHCI_ADD_LEN) 1272 xfer->actlen += len; 1273 if (std->flags & OHCI_CALL_DONE) { 1274 xfer->status = USBD_NORMAL_COMPLETION; 1275 usb_transfer_complete(xfer); 1276 } 1277 ohci_free_std(sc, std); 1278 } else { 1279 /* 1280 * Endpoint is halted. First unlink all the TDs 1281 * belonging to the failed transfer, and then restart 1282 * the endpoint. 1283 */ 1284 ohci_soft_td_t *p, *n; 1285 struct ohci_pipe *opipe = 1286 (struct ohci_pipe *)xfer->pipe; 1287 1288 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1289 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1290 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))])); 1291 1292 /* remove TDs */ 1293 for (p = std; p->xfer == xfer; p = n) { 1294 n = p->nexttd; 1295 ohci_free_std(sc, p); 1296 } 1297 1298 /* clear halt */ 1299 opipe->sed->ed.ed_headp = htole32(p->physaddr); 1300 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1301 1302 if (cc == OHCI_CC_STALL) 1303 xfer->status = USBD_STALLED; 1304 else 1305 xfer->status = USBD_IOERROR; 1306 usb_transfer_complete(xfer); 1307 } 1308 } 1309 1310 #ifdef OHCI_DEBUG 1311 if (ohcidebug > 10) { 1312 DPRINTF(("ohci_process_done: ITD done:\n")); 1313 ohci_dump_itds(sidone); 1314 } 1315 #endif 1316 1317 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1318 xfer = sitd->xfer; 1319 sitdnext = sitd->dnext; 1320 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1321 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1322 if (xfer == NULL) 1323 continue; 1324 if (xfer->status == USBD_CANCELLED || 1325 xfer->status == USBD_TIMEOUT) { 1326 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1327 xfer)); 1328 /* Handled by abort routine. */ 1329 continue; 1330 } 1331 #ifdef DIAGNOSTIC 1332 if (sitd->isdone) 1333 printf("ohci_softintr: sitd=%p is done\n", sitd); 1334 sitd->isdone = 1; 1335 #endif 1336 cc = OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)); 1337 if (cc == OHCI_CC_NO_ERROR) { 1338 /* XXX compute length for input */ 1339 struct ohci_pipe *opipe = 1340 (struct ohci_pipe *)xfer->pipe; 1341 if (sitd->flags & OHCI_CALL_DONE) { 1342 opipe->u.iso.inuse -= xfer->nframes; 1343 /* XXX update frlengths with actual length */ 1344 /* XXX xfer->actlen = actlen; */ 1345 xfer->status = USBD_NORMAL_COMPLETION; 1346 usb_transfer_complete(xfer); 1347 } 1348 } else { 1349 /* XXX Do more */ 1350 xfer->status = USBD_IOERROR; 1351 usb_transfer_complete(xfer); 1352 } 1353 } 1354 1355 sc->sc_bus.intr_context--; 1356 } 1357 1358 void 1359 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1360 { 1361 DPRINTFN(10,("ohci_ctrl_done: xfer=%p\n", xfer)); 1362 1363 #ifdef DIAGNOSTIC 1364 if (!(xfer->rqflags & URQ_REQUEST)) { 1365 panic("ohci_ctrl_done: not a request\n"); 1366 } 1367 #endif 1368 xfer->hcpriv = NULL; 1369 } 1370 1371 void 1372 ohci_device_intr_done(usbd_xfer_handle xfer) 1373 { 1374 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1375 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1376 ohci_soft_ed_t *sed = opipe->sed; 1377 ohci_soft_td_t *data, *tail; 1378 1379 1380 DPRINTFN(10,("ohci_intr_done: xfer=%p, actlen=%d\n", 1381 xfer, xfer->actlen)); 1382 1383 xfer->hcpriv = NULL; 1384 1385 if (xfer->pipe->repeat) { 1386 data = opipe->tail.td; 1387 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1388 if (tail == NULL) { 1389 xfer->status = USBD_NOMEM; 1390 return; 1391 } 1392 tail->xfer = NULL; 1393 1394 data->td.td_flags = htole32( 1395 OHCI_TD_IN | OHCI_TD_NOCC | 1396 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1397 if (xfer->flags & USBD_SHORT_XFER_OK) 1398 data->td.td_flags |= htole32(OHCI_TD_R); 1399 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf)); 1400 data->nexttd = tail; 1401 data->td.td_nexttd = htole32(tail->physaddr); 1402 data->td.td_be = htole32(le32toh(data->td.td_cbp) + 1403 xfer->length - 1); 1404 data->len = xfer->length; 1405 data->xfer = xfer; 1406 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1407 xfer->hcpriv = data; 1408 xfer->actlen = 0; 1409 1410 sed->ed.ed_tailp = htole32(tail->physaddr); 1411 opipe->tail.td = tail; 1412 } 1413 } 1414 1415 void 1416 ohci_device_bulk_done(usbd_xfer_handle xfer) 1417 { 1418 DPRINTFN(10,("ohci_bulk_done: xfer=%p, actlen=%d\n", 1419 xfer, xfer->actlen)); 1420 1421 xfer->hcpriv = NULL; 1422 } 1423 1424 void 1425 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1426 { 1427 usbd_pipe_handle pipe; 1428 struct ohci_pipe *opipe; 1429 u_char *p; 1430 int i, m; 1431 int hstatus; 1432 1433 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1434 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1435 sc, xfer, hstatus)); 1436 1437 if (xfer == NULL) { 1438 /* Just ignore the change. */ 1439 return; 1440 } 1441 1442 pipe = xfer->pipe; 1443 opipe = (struct ohci_pipe *)pipe; 1444 1445 p = KERNADDR(&xfer->dmabuf); 1446 m = min(sc->sc_noport, xfer->length * 8 - 1); 1447 memset(p, 0, xfer->length); 1448 for (i = 1; i <= m; i++) { 1449 /* Pick out CHANGE bits from the status reg. */ 1450 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1451 p[i/8] |= 1 << (i%8); 1452 } 1453 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1454 xfer->actlen = xfer->length; 1455 xfer->status = USBD_NORMAL_COMPLETION; 1456 1457 usb_transfer_complete(xfer); 1458 } 1459 1460 void 1461 ohci_root_intr_done(usbd_xfer_handle xfer) 1462 { 1463 xfer->hcpriv = NULL; 1464 } 1465 1466 void 1467 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1468 { 1469 xfer->hcpriv = NULL; 1470 } 1471 1472 /* 1473 * Wait here until controller claims to have an interrupt. 1474 * Then call ohci_intr and return. Use timeout to avoid waiting 1475 * too long. 1476 */ 1477 void 1478 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1479 { 1480 int timo = xfer->timeout; 1481 int usecs; 1482 u_int32_t intrs; 1483 1484 xfer->status = USBD_IN_PROGRESS; 1485 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1486 usb_delay_ms(&sc->sc_bus, 1); 1487 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1488 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1489 #ifdef OHCI_DEBUG 1490 if (ohcidebug > 15) 1491 ohci_dumpregs(sc); 1492 #endif 1493 if (intrs) { 1494 ohci_intr1(sc); 1495 if (xfer->status != USBD_IN_PROGRESS) 1496 return; 1497 } 1498 } 1499 1500 /* Timeout */ 1501 DPRINTF(("ohci_waitintr: timeout\n")); 1502 xfer->status = USBD_TIMEOUT; 1503 usb_transfer_complete(xfer); 1504 /* XXX should free TD */ 1505 } 1506 1507 void 1508 ohci_poll(struct usbd_bus *bus) 1509 { 1510 ohci_softc_t *sc = (ohci_softc_t *)bus; 1511 1512 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1513 ohci_intr1(sc); 1514 } 1515 1516 usbd_status 1517 ohci_device_request(usbd_xfer_handle xfer) 1518 { 1519 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1520 usb_device_request_t *req = &xfer->request; 1521 usbd_device_handle dev = opipe->pipe.device; 1522 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1523 int addr = dev->address; 1524 ohci_soft_td_t *setup, *stat, *next, *tail; 1525 ohci_soft_ed_t *sed; 1526 int isread; 1527 int len; 1528 usbd_status err; 1529 int s; 1530 1531 isread = req->bmRequestType & UT_READ; 1532 len = UGETW(req->wLength); 1533 1534 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1535 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1536 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1537 UGETW(req->wIndex), len, addr, 1538 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1539 1540 setup = opipe->tail.td; 1541 stat = ohci_alloc_std(sc); 1542 if (stat == NULL) { 1543 err = USBD_NOMEM; 1544 goto bad1; 1545 } 1546 tail = ohci_alloc_std(sc); 1547 if (tail == NULL) { 1548 err = USBD_NOMEM; 1549 goto bad2; 1550 } 1551 tail->xfer = NULL; 1552 1553 sed = opipe->sed; 1554 opipe->u.ctl.length = len; 1555 1556 /* Update device address and length since they may have changed. */ 1557 /* XXX This only needs to be done once, but it's too early in open. */ 1558 /* XXXX Should not touch ED here! */ 1559 sed->ed.ed_flags = htole32( 1560 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1561 OHCI_ED_SET_FA(addr) | 1562 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1563 1564 next = stat; 1565 1566 /* Set up data transaction */ 1567 if (len != 0) { 1568 ohci_soft_td_t *std = stat; 1569 1570 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1571 std, &stat); 1572 stat = stat->nexttd; /* point at free TD */ 1573 if (err) 1574 goto bad3; 1575 /* Start toggle at 1 and then use the carried toggle. */ 1576 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK); 1577 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1); 1578 } 1579 1580 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req); 1581 1582 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1583 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1584 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma)); 1585 setup->nexttd = next; 1586 setup->td.td_nexttd = htole32(next->physaddr); 1587 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1); 1588 setup->len = 0; 1589 setup->xfer = xfer; 1590 setup->flags = 0; 1591 xfer->hcpriv = setup; 1592 1593 stat->td.td_flags = htole32( 1594 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1595 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1596 stat->td.td_cbp = 0; 1597 stat->nexttd = tail; 1598 stat->td.td_nexttd = htole32(tail->physaddr); 1599 stat->td.td_be = 0; 1600 stat->flags = OHCI_CALL_DONE; 1601 stat->len = 0; 1602 stat->xfer = xfer; 1603 1604 #ifdef OHCI_DEBUG 1605 if (ohcidebug > 5) { 1606 DPRINTF(("ohci_device_request:\n")); 1607 ohci_dump_ed(sed); 1608 ohci_dump_tds(setup); 1609 } 1610 #endif 1611 1612 /* Insert ED in schedule */ 1613 s = splusb(); 1614 sed->ed.ed_tailp = htole32(tail->physaddr); 1615 opipe->tail.td = tail; 1616 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1617 if (xfer->timeout && !sc->sc_bus.use_polling) { 1618 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 1619 ohci_timeout, xfer); 1620 } 1621 splx(s); 1622 1623 #if 0 1624 if (ohcidebug > 10) { 1625 delay(10000); 1626 DPRINTF(("ohci_device_request: status=%x\n", 1627 OREAD4(sc, OHCI_COMMAND_STATUS))); 1628 ohci_dump_ed(sed); 1629 ohci_dump_tds(setup); 1630 } 1631 #endif 1632 1633 return (USBD_NORMAL_COMPLETION); 1634 1635 bad3: 1636 ohci_free_std(sc, tail); 1637 bad2: 1638 ohci_free_std(sc, stat); 1639 bad1: 1640 return (err); 1641 } 1642 1643 /* 1644 * Add an ED to the schedule. Called at splusb(). 1645 */ 1646 void 1647 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1648 { 1649 SPLUSBCHECK; 1650 sed->next = head->next; 1651 sed->ed.ed_nexted = head->ed.ed_nexted; 1652 head->next = sed; 1653 head->ed.ed_nexted = htole32(sed->physaddr); 1654 } 1655 1656 /* 1657 * Remove an ED from the schedule. Called at splusb(). 1658 */ 1659 void 1660 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1661 { 1662 ohci_soft_ed_t *p; 1663 1664 SPLUSBCHECK; 1665 1666 /* XXX */ 1667 for (p = head; p == NULL && p->next != sed; p = p->next) 1668 ; 1669 if (p == NULL) 1670 panic("ohci_rem_ed: ED not found\n"); 1671 p->next = sed->next; 1672 p->ed.ed_nexted = sed->ed.ed_nexted; 1673 } 1674 1675 /* 1676 * When a transfer is completed the TD is added to the done queue by 1677 * the host controller. This queue is the processed by software. 1678 * Unfortunately the queue contains the physical address of the TD 1679 * and we have no simple way to translate this back to a kernel address. 1680 * To make the translation possible (and fast) we use a hash table of 1681 * TDs currently in the schedule. The physical address is used as the 1682 * hash value. 1683 */ 1684 1685 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1686 /* Called at splusb() */ 1687 void 1688 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1689 { 1690 int h = HASH(std->physaddr); 1691 1692 SPLUSBCHECK; 1693 1694 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1695 } 1696 1697 /* Called at splusb() */ 1698 void 1699 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1700 { 1701 SPLUSBCHECK; 1702 1703 LIST_REMOVE(std, hnext); 1704 } 1705 1706 ohci_soft_td_t * 1707 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1708 { 1709 int h = HASH(a); 1710 ohci_soft_td_t *std; 1711 1712 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1713 std != NULL; 1714 std = LIST_NEXT(std, hnext)) 1715 if (std->physaddr == a) 1716 return (std); 1717 return (NULL); 1718 } 1719 1720 /* Called at splusb() */ 1721 void 1722 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1723 { 1724 int h = HASH(sitd->physaddr); 1725 1726 SPLUSBCHECK; 1727 1728 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1729 sitd, (u_long)sitd->physaddr)); 1730 1731 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1732 } 1733 1734 /* Called at splusb() */ 1735 void 1736 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1737 { 1738 SPLUSBCHECK; 1739 1740 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1741 sitd, (u_long)sitd->physaddr)); 1742 1743 LIST_REMOVE(sitd, hnext); 1744 } 1745 1746 ohci_soft_itd_t * 1747 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1748 { 1749 int h = HASH(a); 1750 ohci_soft_itd_t *sitd; 1751 1752 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1753 sitd != NULL; 1754 sitd = LIST_NEXT(sitd, hnext)) 1755 if (sitd->physaddr == a) 1756 return (sitd); 1757 return (NULL); 1758 } 1759 1760 void 1761 ohci_timeout(void *addr) 1762 { 1763 usbd_xfer_handle xfer = addr; 1764 int s; 1765 1766 DPRINTF(("ohci_timeout: xfer=%p\n", xfer)); 1767 1768 s = splusb(); 1769 xfer->device->bus->intr_context++; 1770 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1771 xfer->device->bus->intr_context--; 1772 splx(s); 1773 } 1774 1775 #ifdef OHCI_DEBUG 1776 void 1777 ohci_dump_tds(ohci_soft_td_t *std) 1778 { 1779 for (; std; std = std->nexttd) 1780 ohci_dump_td(std); 1781 } 1782 1783 void 1784 ohci_dump_td(ohci_soft_td_t *std) 1785 { 1786 char sbuf[128]; 1787 1788 bitmask_snprintf((int)le32toh(std->td.td_flags), 1789 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1790 sbuf, sizeof(sbuf)); 1791 1792 DPRINTF(("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1793 "nexttd=0x%08lx be=0x%08lx\n", 1794 std, (u_long)std->physaddr, sbuf, 1795 OHCI_TD_GET_DI(le32toh(std->td.td_flags)), 1796 OHCI_TD_GET_EC(le32toh(std->td.td_flags)), 1797 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1798 (u_long)le32toh(std->td.td_cbp), 1799 (u_long)le32toh(std->td.td_nexttd), 1800 (u_long)le32toh(std->td.td_be))); 1801 } 1802 1803 void 1804 ohci_dump_itd(ohci_soft_itd_t *sitd) 1805 { 1806 int i; 1807 1808 DPRINTF(("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1809 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1810 sitd, (u_long)sitd->physaddr, 1811 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)), 1812 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)), 1813 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)), 1814 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)), 1815 (u_long)le32toh(sitd->itd.itd_bp0), 1816 (u_long)le32toh(sitd->itd.itd_nextitd), 1817 (u_long)le32toh(sitd->itd.itd_be))); 1818 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1819 DPRINTF(("offs[%d]=0x%04x ", i, 1820 (u_int)le16toh(sitd->itd.itd_offset[i]))); 1821 DPRINTF(("\n")); 1822 } 1823 1824 void 1825 ohci_dump_itds(ohci_soft_itd_t *sitd) 1826 { 1827 for (; sitd; sitd = sitd->nextitd) 1828 ohci_dump_itd(sitd); 1829 } 1830 1831 void 1832 ohci_dump_ed(ohci_soft_ed_t *sed) 1833 { 1834 char sbuf[128], sbuf2[128]; 1835 1836 bitmask_snprintf((int)le32toh(sed->ed.ed_flags), 1837 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1838 sbuf, sizeof(sbuf)); 1839 bitmask_snprintf((u_long)le32toh(sed->ed.ed_headp), 1840 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 1841 1842 DPRINTF(("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d %s\ntailp=0x%08lx " 1843 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 1844 sed, (u_long)sed->physaddr, 1845 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)), 1846 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)), 1847 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf, 1848 (u_long)le32toh(sed->ed.ed_tailp), sbuf2, 1849 (u_long)le32toh(sed->ed.ed_headp), 1850 (u_long)le32toh(sed->ed.ed_nexted))); 1851 } 1852 #endif 1853 1854 usbd_status 1855 ohci_open(usbd_pipe_handle pipe) 1856 { 1857 usbd_device_handle dev = pipe->device; 1858 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1859 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1860 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1861 u_int8_t addr = dev->address; 1862 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1863 ohci_soft_ed_t *sed; 1864 ohci_soft_td_t *std; 1865 ohci_soft_itd_t *sitd; 1866 ohci_physaddr_t tdphys; 1867 u_int32_t fmt; 1868 usbd_status err; 1869 int s; 1870 int ival; 1871 1872 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1873 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1874 1875 std = NULL; 1876 sed = NULL; 1877 1878 if (addr == sc->sc_addr) { 1879 switch (ed->bEndpointAddress) { 1880 case USB_CONTROL_ENDPOINT: 1881 pipe->methods = &ohci_root_ctrl_methods; 1882 break; 1883 case UE_DIR_IN | OHCI_INTR_ENDPT: 1884 pipe->methods = &ohci_root_intr_methods; 1885 break; 1886 default: 1887 return (USBD_INVAL); 1888 } 1889 } else { 1890 sed = ohci_alloc_sed(sc); 1891 if (sed == NULL) 1892 goto bad0; 1893 opipe->sed = sed; 1894 if (xfertype == UE_ISOCHRONOUS) { 1895 sitd = ohci_alloc_sitd(sc); 1896 if (sitd == NULL) { 1897 ohci_free_sitd(sc, sitd); 1898 goto bad1; 1899 } 1900 opipe->tail.itd = sitd; 1901 tdphys = sitd->physaddr; 1902 fmt = OHCI_ED_FORMAT_ISO; 1903 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 1904 fmt |= OHCI_ED_DIR_IN; 1905 else 1906 fmt |= OHCI_ED_DIR_OUT; 1907 } else { 1908 std = ohci_alloc_std(sc); 1909 if (std == NULL) { 1910 ohci_free_std(sc, std); 1911 goto bad1; 1912 } 1913 opipe->tail.td = std; 1914 tdphys = std->physaddr; 1915 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 1916 } 1917 sed->ed.ed_flags = htole32( 1918 OHCI_ED_SET_FA(addr) | 1919 OHCI_ED_SET_EN(ed->bEndpointAddress) | 1920 (dev->lowspeed ? OHCI_ED_SPEED : 0) | fmt | 1921 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 1922 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys); 1923 1924 switch (xfertype) { 1925 case UE_CONTROL: 1926 pipe->methods = &ohci_device_ctrl_methods; 1927 err = usb_allocmem(&sc->sc_bus, 1928 sizeof(usb_device_request_t), 1929 0, &opipe->u.ctl.reqdma); 1930 if (err) 1931 goto bad; 1932 s = splusb(); 1933 ohci_add_ed(sed, sc->sc_ctrl_head); 1934 splx(s); 1935 break; 1936 case UE_INTERRUPT: 1937 pipe->methods = &ohci_device_intr_methods; 1938 ival = pipe->interval; 1939 if (ival == USBD_DEFAULT_INTERVAL) 1940 ival = ed->bInterval; 1941 return (ohci_device_setintr(sc, opipe, ival)); 1942 case UE_ISOCHRONOUS: 1943 pipe->methods = &ohci_device_isoc_methods; 1944 return (ohci_setup_isoc(pipe)); 1945 case UE_BULK: 1946 pipe->methods = &ohci_device_bulk_methods; 1947 s = splusb(); 1948 ohci_add_ed(sed, sc->sc_bulk_head); 1949 splx(s); 1950 break; 1951 } 1952 } 1953 return (USBD_NORMAL_COMPLETION); 1954 1955 bad: 1956 if (std != NULL) 1957 ohci_free_std(sc, std); 1958 bad1: 1959 if (sed != NULL) 1960 ohci_free_sed(sc, sed); 1961 bad0: 1962 return (USBD_NOMEM); 1963 1964 } 1965 1966 /* 1967 * Close a reqular pipe. 1968 * Assumes that there are no pending transactions. 1969 */ 1970 void 1971 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 1972 { 1973 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1974 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1975 ohci_soft_ed_t *sed = opipe->sed; 1976 int s; 1977 1978 s = splusb(); 1979 #ifdef DIAGNOSTIC 1980 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 1981 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 1982 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) { 1983 ohci_physaddr_t td = le32toh(sed->ed.ed_headp); 1984 ohci_soft_td_t *std; 1985 for (std = LIST_FIRST(&sc->sc_hash_tds[HASH(td)]); 1986 std != NULL; 1987 std = LIST_NEXT(std, hnext)) 1988 if (std->physaddr == td) 1989 break; 1990 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 1991 "tl=0x%x pipe=%p, std=%p\n", sed, 1992 (int)le32toh(sed->ed.ed_headp), 1993 (int)le32toh(sed->ed.ed_tailp), 1994 pipe, std); 1995 usb_delay_ms(&sc->sc_bus, 2); 1996 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 1997 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 1998 printf("ohci_close_pipe: pipe still not empty\n"); 1999 } 2000 #endif 2001 ohci_rem_ed(sed, head); 2002 splx(s); 2003 ohci_free_sed(sc, opipe->sed); 2004 } 2005 2006 /* 2007 * Abort a device request. 2008 * If this routine is called at splusb() it guarantees that the request 2009 * will be removed from the hardware scheduling and that the callback 2010 * for it will be called with USBD_CANCELLED status. 2011 * It's impossible to guarantee that the requested transfer will not 2012 * have happened since the hardware runs concurrently. 2013 * If the transaction has already happened we rely on the ordinary 2014 * interrupt processing to process it. 2015 */ 2016 void 2017 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2018 { 2019 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2020 ohci_soft_ed_t *sed; 2021 2022 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p\n", xfer, opipe)); 2023 2024 xfer->status = status; 2025 2026 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2027 2028 sed = opipe->sed; 2029 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2030 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 2031 2032 #if 1 2033 if (xfer->device->bus->intr_context) { 2034 /* We have no process context, so we can't use tsleep(). */ 2035 usb_callout(xfer->pipe->abort_handle, 2036 hz / USB_FRAMES_PER_SECOND, ohci_abort_xfer_end, xfer); 2037 } else { 2038 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 2039 KASSERT(intr_nesting_level == 0, 2040 ("ohci_abort_req in interrupt context")); 2041 #endif 2042 usb_delay_ms(opipe->pipe.device->bus, 1); 2043 ohci_abort_xfer_end(xfer); 2044 } 2045 #else 2046 delay(1000); 2047 ohci_abort_xfer_end(xfer); 2048 #endif 2049 } 2050 2051 void 2052 ohci_abort_xfer_end(void *v) 2053 { 2054 usbd_xfer_handle xfer = v; 2055 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2056 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 2057 ohci_soft_ed_t *sed; 2058 ohci_soft_td_t *p, *n; 2059 int s; 2060 2061 s = splusb(); 2062 2063 p = xfer->hcpriv; 2064 #ifdef DIAGNOSTIC 2065 if (p == NULL) { 2066 splx(s); 2067 printf("ohci_abort_xfer: hcpriv==0\n"); 2068 return; 2069 } 2070 #endif 2071 for (; p->xfer == xfer; p = n) { 2072 n = p->nexttd; 2073 ohci_free_std(sc, p); 2074 } 2075 2076 sed = opipe->sed; 2077 DPRINTFN(2,("ohci_abort_xfer: set hd=%x, tl=%x\n", 2078 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp))); 2079 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */ 2080 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 2081 2082 usb_transfer_complete(xfer); 2083 2084 splx(s); 2085 } 2086 2087 /* 2088 * Data structures and routines to emulate the root hub. 2089 */ 2090 Static usb_device_descriptor_t ohci_devd = { 2091 USB_DEVICE_DESCRIPTOR_SIZE, 2092 UDESC_DEVICE, /* type */ 2093 {0x00, 0x01}, /* USB version */ 2094 UDCLASS_HUB, /* class */ 2095 UDSUBCLASS_HUB, /* subclass */ 2096 0, /* protocol */ 2097 64, /* max packet */ 2098 {0},{0},{0x00,0x01}, /* device id */ 2099 1,2,0, /* string indicies */ 2100 1 /* # of configurations */ 2101 }; 2102 2103 Static usb_config_descriptor_t ohci_confd = { 2104 USB_CONFIG_DESCRIPTOR_SIZE, 2105 UDESC_CONFIG, 2106 {USB_CONFIG_DESCRIPTOR_SIZE + 2107 USB_INTERFACE_DESCRIPTOR_SIZE + 2108 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2109 1, 2110 1, 2111 0, 2112 UC_SELF_POWERED, 2113 0 /* max power */ 2114 }; 2115 2116 Static usb_interface_descriptor_t ohci_ifcd = { 2117 USB_INTERFACE_DESCRIPTOR_SIZE, 2118 UDESC_INTERFACE, 2119 0, 2120 0, 2121 1, 2122 UICLASS_HUB, 2123 UISUBCLASS_HUB, 2124 0, 2125 0 2126 }; 2127 2128 Static usb_endpoint_descriptor_t ohci_endpd = { 2129 USB_ENDPOINT_DESCRIPTOR_SIZE, 2130 UDESC_ENDPOINT, 2131 UE_DIR_IN | OHCI_INTR_ENDPT, 2132 UE_INTERRUPT, 2133 {8, 0}, /* max packet */ 2134 255 2135 }; 2136 2137 Static usb_hub_descriptor_t ohci_hubd = { 2138 USB_HUB_DESCRIPTOR_SIZE, 2139 UDESC_HUB, 2140 0, 2141 {0,0}, 2142 0, 2143 0, 2144 {0}, 2145 }; 2146 2147 Static int 2148 ohci_str(p, l, s) 2149 usb_string_descriptor_t *p; 2150 int l; 2151 char *s; 2152 { 2153 int i; 2154 2155 if (l == 0) 2156 return (0); 2157 p->bLength = 2 * strlen(s) + 2; 2158 if (l == 1) 2159 return (1); 2160 p->bDescriptorType = UDESC_STRING; 2161 l -= 2; 2162 for (i = 0; s[i] && l > 1; i++, l -= 2) 2163 USETW2(p->bString[i], 0, s[i]); 2164 return (2*i+2); 2165 } 2166 2167 /* 2168 * Simulate a hardware hub by handling all the necessary requests. 2169 */ 2170 Static usbd_status 2171 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2172 { 2173 usbd_status err; 2174 2175 /* Insert last in queue. */ 2176 err = usb_insert_transfer(xfer); 2177 if (err) 2178 return (err); 2179 2180 /* Pipe isn't running, start first */ 2181 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2182 } 2183 2184 Static usbd_status 2185 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2186 { 2187 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2188 usb_device_request_t *req; 2189 void *buf = NULL; 2190 int port, i; 2191 int s, len, value, index, l, totlen = 0; 2192 usb_port_status_t ps; 2193 usb_hub_descriptor_t hubd; 2194 usbd_status err; 2195 u_int32_t v; 2196 2197 if (sc->sc_dying) 2198 return (USBD_IOERROR); 2199 2200 #ifdef DIAGNOSTIC 2201 if (!(xfer->rqflags & URQ_REQUEST)) 2202 /* XXX panic */ 2203 return (USBD_INVAL); 2204 #endif 2205 req = &xfer->request; 2206 2207 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2208 req->bmRequestType, req->bRequest)); 2209 2210 len = UGETW(req->wLength); 2211 value = UGETW(req->wValue); 2212 index = UGETW(req->wIndex); 2213 2214 if (len != 0) 2215 buf = KERNADDR(&xfer->dmabuf); 2216 2217 #define C(x,y) ((x) | ((y) << 8)) 2218 switch(C(req->bRequest, req->bmRequestType)) { 2219 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2220 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2221 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2222 /* 2223 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2224 * for the integrated root hub. 2225 */ 2226 break; 2227 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2228 if (len > 0) { 2229 *(u_int8_t *)buf = sc->sc_conf; 2230 totlen = 1; 2231 } 2232 break; 2233 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2234 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2235 switch(value >> 8) { 2236 case UDESC_DEVICE: 2237 if ((value & 0xff) != 0) { 2238 err = USBD_IOERROR; 2239 goto ret; 2240 } 2241 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2242 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2243 memcpy(buf, &ohci_devd, l); 2244 break; 2245 case UDESC_CONFIG: 2246 if ((value & 0xff) != 0) { 2247 err = USBD_IOERROR; 2248 goto ret; 2249 } 2250 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2251 memcpy(buf, &ohci_confd, l); 2252 buf = (char *)buf + l; 2253 len -= l; 2254 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2255 totlen += l; 2256 memcpy(buf, &ohci_ifcd, l); 2257 buf = (char *)buf + l; 2258 len -= l; 2259 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2260 totlen += l; 2261 memcpy(buf, &ohci_endpd, l); 2262 break; 2263 case UDESC_STRING: 2264 if (len == 0) 2265 break; 2266 *(u_int8_t *)buf = 0; 2267 totlen = 1; 2268 switch (value & 0xff) { 2269 case 1: /* Vendor */ 2270 totlen = ohci_str(buf, len, sc->sc_vendor); 2271 break; 2272 case 2: /* Product */ 2273 totlen = ohci_str(buf, len, "OHCI root hub"); 2274 break; 2275 } 2276 break; 2277 default: 2278 err = USBD_IOERROR; 2279 goto ret; 2280 } 2281 break; 2282 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2283 if (len > 0) { 2284 *(u_int8_t *)buf = 0; 2285 totlen = 1; 2286 } 2287 break; 2288 case C(UR_GET_STATUS, UT_READ_DEVICE): 2289 if (len > 1) { 2290 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2291 totlen = 2; 2292 } 2293 break; 2294 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2295 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2296 if (len > 1) { 2297 USETW(((usb_status_t *)buf)->wStatus, 0); 2298 totlen = 2; 2299 } 2300 break; 2301 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2302 if (value >= USB_MAX_DEVICES) { 2303 err = USBD_IOERROR; 2304 goto ret; 2305 } 2306 sc->sc_addr = value; 2307 break; 2308 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2309 if (value != 0 && value != 1) { 2310 err = USBD_IOERROR; 2311 goto ret; 2312 } 2313 sc->sc_conf = value; 2314 break; 2315 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2316 break; 2317 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2318 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2319 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2320 err = USBD_IOERROR; 2321 goto ret; 2322 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2323 break; 2324 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2325 break; 2326 /* Hub requests */ 2327 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2328 break; 2329 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2330 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2331 "port=%d feature=%d\n", 2332 index, value)); 2333 if (index < 1 || index > sc->sc_noport) { 2334 err = USBD_IOERROR; 2335 goto ret; 2336 } 2337 port = OHCI_RH_PORT_STATUS(index); 2338 switch(value) { 2339 case UHF_PORT_ENABLE: 2340 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2341 break; 2342 case UHF_PORT_SUSPEND: 2343 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2344 break; 2345 case UHF_PORT_POWER: 2346 /* Yes, writing to the LOW_SPEED bit clears power. */ 2347 OWRITE4(sc, port, UPS_LOW_SPEED); 2348 break; 2349 case UHF_C_PORT_CONNECTION: 2350 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2351 break; 2352 case UHF_C_PORT_ENABLE: 2353 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2354 break; 2355 case UHF_C_PORT_SUSPEND: 2356 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2357 break; 2358 case UHF_C_PORT_OVER_CURRENT: 2359 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2360 break; 2361 case UHF_C_PORT_RESET: 2362 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2363 break; 2364 default: 2365 err = USBD_IOERROR; 2366 goto ret; 2367 } 2368 switch(value) { 2369 case UHF_C_PORT_CONNECTION: 2370 case UHF_C_PORT_ENABLE: 2371 case UHF_C_PORT_SUSPEND: 2372 case UHF_C_PORT_OVER_CURRENT: 2373 case UHF_C_PORT_RESET: 2374 /* Enable RHSC interrupt if condition is cleared. */ 2375 if ((OREAD4(sc, port) >> 16) == 0) 2376 ohci_rhsc_able(sc, 1); 2377 break; 2378 default: 2379 break; 2380 } 2381 break; 2382 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2383 if (value != 0) { 2384 err = USBD_IOERROR; 2385 goto ret; 2386 } 2387 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2388 hubd = ohci_hubd; 2389 hubd.bNbrPorts = sc->sc_noport; 2390 USETW(hubd.wHubCharacteristics, 2391 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2392 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2393 /* XXX overcurrent */ 2394 ); 2395 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2396 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2397 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2398 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2399 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2400 l = min(len, hubd.bDescLength); 2401 totlen = l; 2402 memcpy(buf, &hubd, l); 2403 break; 2404 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2405 if (len != 4) { 2406 err = USBD_IOERROR; 2407 goto ret; 2408 } 2409 memset(buf, 0, len); /* ? XXX */ 2410 totlen = len; 2411 break; 2412 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2413 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2414 index)); 2415 if (index < 1 || index > sc->sc_noport) { 2416 err = USBD_IOERROR; 2417 goto ret; 2418 } 2419 if (len != 4) { 2420 err = USBD_IOERROR; 2421 goto ret; 2422 } 2423 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2424 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2425 v)); 2426 USETW(ps.wPortStatus, v); 2427 USETW(ps.wPortChange, v >> 16); 2428 l = min(len, sizeof ps); 2429 memcpy(buf, &ps, l); 2430 totlen = l; 2431 break; 2432 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2433 err = USBD_IOERROR; 2434 goto ret; 2435 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2436 break; 2437 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2438 if (index < 1 || index > sc->sc_noport) { 2439 err = USBD_IOERROR; 2440 goto ret; 2441 } 2442 port = OHCI_RH_PORT_STATUS(index); 2443 switch(value) { 2444 case UHF_PORT_ENABLE: 2445 OWRITE4(sc, port, UPS_PORT_ENABLED); 2446 break; 2447 case UHF_PORT_SUSPEND: 2448 OWRITE4(sc, port, UPS_SUSPEND); 2449 break; 2450 case UHF_PORT_RESET: 2451 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2452 index)); 2453 OWRITE4(sc, port, UPS_RESET); 2454 for (i = 0; i < 10; i++) { 2455 usb_delay_ms(&sc->sc_bus, 10); /* XXX */ 2456 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2457 break; 2458 } 2459 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2460 index, OREAD4(sc, port))); 2461 break; 2462 case UHF_PORT_POWER: 2463 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2464 "%d\n", index)); 2465 OWRITE4(sc, port, UPS_PORT_POWER); 2466 break; 2467 default: 2468 err = USBD_IOERROR; 2469 goto ret; 2470 } 2471 break; 2472 default: 2473 err = USBD_IOERROR; 2474 goto ret; 2475 } 2476 xfer->actlen = totlen; 2477 err = USBD_NORMAL_COMPLETION; 2478 ret: 2479 xfer->status = err; 2480 s = splusb(); 2481 usb_transfer_complete(xfer); 2482 splx(s); 2483 return (USBD_IN_PROGRESS); 2484 } 2485 2486 /* Abort a root control request. */ 2487 Static void 2488 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2489 { 2490 /* Nothing to do, all transfers are synchronous. */ 2491 } 2492 2493 /* Close the root pipe. */ 2494 Static void 2495 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2496 { 2497 DPRINTF(("ohci_root_ctrl_close\n")); 2498 /* Nothing to do. */ 2499 } 2500 2501 Static usbd_status 2502 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2503 { 2504 usbd_status err; 2505 2506 /* Insert last in queue. */ 2507 err = usb_insert_transfer(xfer); 2508 if (err) 2509 return (err); 2510 2511 /* Pipe isn't running, start first */ 2512 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2513 } 2514 2515 Static usbd_status 2516 ohci_root_intr_start(usbd_xfer_handle xfer) 2517 { 2518 usbd_pipe_handle pipe = xfer->pipe; 2519 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2520 2521 if (sc->sc_dying) 2522 return (USBD_IOERROR); 2523 2524 sc->sc_intrxfer = xfer; 2525 2526 return (USBD_IN_PROGRESS); 2527 } 2528 2529 /* Abort a root interrupt request. */ 2530 Static void 2531 ohci_root_intr_abort(usbd_xfer_handle xfer) 2532 { 2533 int s; 2534 2535 if (xfer->pipe->intrxfer == xfer) { 2536 DPRINTF(("ohci_root_intr_abort: remove\n")); 2537 xfer->pipe->intrxfer = NULL; 2538 } 2539 xfer->status = USBD_CANCELLED; 2540 s = splusb(); 2541 usb_transfer_complete(xfer); 2542 splx(s); 2543 } 2544 2545 /* Close the root pipe. */ 2546 Static void 2547 ohci_root_intr_close(usbd_pipe_handle pipe) 2548 { 2549 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2550 2551 DPRINTF(("ohci_root_intr_close\n")); 2552 2553 sc->sc_intrxfer = NULL; 2554 } 2555 2556 /************************/ 2557 2558 Static usbd_status 2559 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2560 { 2561 usbd_status err; 2562 2563 /* Insert last in queue. */ 2564 err = usb_insert_transfer(xfer); 2565 if (err) 2566 return (err); 2567 2568 /* Pipe isn't running, start first */ 2569 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2570 } 2571 2572 Static usbd_status 2573 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2574 { 2575 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2576 usbd_status err; 2577 2578 if (sc->sc_dying) 2579 return (USBD_IOERROR); 2580 2581 #ifdef DIAGNOSTIC 2582 if (!(xfer->rqflags & URQ_REQUEST)) { 2583 /* XXX panic */ 2584 printf("ohci_device_ctrl_transfer: not a request\n"); 2585 return (USBD_INVAL); 2586 } 2587 #endif 2588 2589 err = ohci_device_request(xfer); 2590 if (err) 2591 return (err); 2592 2593 if (sc->sc_bus.use_polling) 2594 ohci_waitintr(sc, xfer); 2595 return (USBD_IN_PROGRESS); 2596 } 2597 2598 /* Abort a device control request. */ 2599 Static void 2600 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2601 { 2602 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2603 ohci_abort_xfer(xfer, USBD_CANCELLED); 2604 } 2605 2606 /* Close a device control pipe. */ 2607 Static void 2608 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2609 { 2610 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2611 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2612 2613 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2614 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2615 ohci_free_std(sc, opipe->tail.td); 2616 } 2617 2618 /************************/ 2619 2620 Static void 2621 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2622 { 2623 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2624 2625 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY); 2626 } 2627 2628 Static void 2629 ohci_noop(usbd_pipe_handle pipe) 2630 { 2631 } 2632 2633 Static usbd_status 2634 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2635 { 2636 usbd_status err; 2637 2638 /* Insert last in queue. */ 2639 err = usb_insert_transfer(xfer); 2640 if (err) 2641 return (err); 2642 2643 /* Pipe isn't running, start first */ 2644 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2645 } 2646 2647 Static usbd_status 2648 ohci_device_bulk_start(usbd_xfer_handle xfer) 2649 { 2650 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2651 usbd_device_handle dev = opipe->pipe.device; 2652 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2653 int addr = dev->address; 2654 ohci_soft_td_t *data, *tail, *tdp; 2655 ohci_soft_ed_t *sed; 2656 int s, len, isread, endpt; 2657 usbd_status err; 2658 2659 if (sc->sc_dying) 2660 return (USBD_IOERROR); 2661 2662 #ifdef DIAGNOSTIC 2663 if (xfer->rqflags & URQ_REQUEST) { 2664 /* XXX panic */ 2665 printf("ohci_device_bulk_start: a request\n"); 2666 return (USBD_INVAL); 2667 } 2668 #endif 2669 2670 len = xfer->length; 2671 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2672 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2673 sed = opipe->sed; 2674 2675 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2676 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2677 endpt)); 2678 2679 opipe->u.bulk.isread = isread; 2680 opipe->u.bulk.length = len; 2681 2682 /* Update device address */ 2683 sed->ed.ed_flags = htole32( 2684 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2685 OHCI_ED_SET_FA(addr)); 2686 2687 /* Allocate a chain of new TDs (including a new tail). */ 2688 data = opipe->tail.td; 2689 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2690 data, &tail); 2691 /* We want interrupt at the end of the transfer. */ 2692 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK); 2693 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1)); 2694 tail->flags |= OHCI_CALL_DONE; 2695 tail = tail->nexttd; /* point at sentinel */ 2696 if (err) 2697 return (err); 2698 2699 tail->xfer = NULL; 2700 xfer->hcpriv = data; 2701 2702 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2703 "td_cbp=0x%08x td_be=0x%08x\n", 2704 (int)le32toh(sed->ed.ed_flags), 2705 (int)le32toh(data->td.td_flags), 2706 (int)le32toh(data->td.td_cbp), 2707 (int)le32toh(data->td.td_be))); 2708 2709 #ifdef OHCI_DEBUG 2710 if (ohcidebug > 5) { 2711 ohci_dump_ed(sed); 2712 ohci_dump_tds(data); 2713 } 2714 #endif 2715 2716 /* Insert ED in schedule */ 2717 s = splusb(); 2718 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2719 tdp->xfer = xfer; 2720 } 2721 sed->ed.ed_tailp = htole32(tail->physaddr); 2722 opipe->tail.td = tail; 2723 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2724 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2725 if (xfer->timeout && !sc->sc_bus.use_polling) { 2726 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 2727 ohci_timeout, xfer); 2728 } 2729 2730 #if 0 2731 /* This goes wrong if we are too slow. */ 2732 if (ohcidebug > 10) { 2733 delay(10000); 2734 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2735 OREAD4(sc, OHCI_COMMAND_STATUS))); 2736 ohci_dump_ed(sed); 2737 ohci_dump_tds(data); 2738 } 2739 #endif 2740 2741 splx(s); 2742 2743 return (USBD_IN_PROGRESS); 2744 } 2745 2746 Static void 2747 ohci_device_bulk_abort(usbd_xfer_handle xfer) 2748 { 2749 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2750 ohci_abort_xfer(xfer, USBD_CANCELLED); 2751 } 2752 2753 /* 2754 * Close a device bulk pipe. 2755 */ 2756 Static void 2757 ohci_device_bulk_close(usbd_pipe_handle pipe) 2758 { 2759 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2760 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2761 2762 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2763 ohci_close_pipe(pipe, sc->sc_bulk_head); 2764 ohci_free_std(sc, opipe->tail.td); 2765 } 2766 2767 /************************/ 2768 2769 Static usbd_status 2770 ohci_device_intr_transfer(usbd_xfer_handle xfer) 2771 { 2772 usbd_status err; 2773 2774 /* Insert last in queue. */ 2775 err = usb_insert_transfer(xfer); 2776 if (err) 2777 return (err); 2778 2779 /* Pipe isn't running, start first */ 2780 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2781 } 2782 2783 Static usbd_status 2784 ohci_device_intr_start(usbd_xfer_handle xfer) 2785 { 2786 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2787 usbd_device_handle dev = opipe->pipe.device; 2788 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2789 ohci_soft_ed_t *sed = opipe->sed; 2790 ohci_soft_td_t *data, *tail; 2791 int len; 2792 int s; 2793 2794 if (sc->sc_dying) 2795 return (USBD_IOERROR); 2796 2797 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2798 "flags=%d priv=%p\n", 2799 xfer, xfer->length, xfer->flags, xfer->priv)); 2800 2801 #ifdef DIAGNOSTIC 2802 if (xfer->rqflags & URQ_REQUEST) 2803 panic("ohci_device_intr_transfer: a request\n"); 2804 #endif 2805 2806 len = xfer->length; 2807 2808 data = opipe->tail.td; 2809 tail = ohci_alloc_std(sc); 2810 if (tail == NULL) 2811 return (USBD_NOMEM); 2812 tail->xfer = NULL; 2813 2814 data->td.td_flags = htole32( 2815 OHCI_TD_IN | OHCI_TD_NOCC | 2816 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2817 if (xfer->flags & USBD_SHORT_XFER_OK) 2818 data->td.td_flags |= htole32(OHCI_TD_R); 2819 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf)); 2820 data->nexttd = tail; 2821 data->td.td_nexttd = htole32(tail->physaddr); 2822 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1); 2823 data->len = len; 2824 data->xfer = xfer; 2825 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 2826 xfer->hcpriv = data; 2827 2828 #ifdef OHCI_DEBUG 2829 if (ohcidebug > 5) { 2830 DPRINTF(("ohci_device_intr_transfer:\n")); 2831 ohci_dump_ed(sed); 2832 ohci_dump_tds(data); 2833 } 2834 #endif 2835 2836 /* Insert ED in schedule */ 2837 s = splusb(); 2838 sed->ed.ed_tailp = htole32(tail->physaddr); 2839 opipe->tail.td = tail; 2840 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2841 2842 #if 0 2843 /* 2844 * This goes horribly wrong, printing thousands of descriptors, 2845 * because false references are followed due to the fact that the 2846 * TD is gone. 2847 */ 2848 if (ohcidebug > 5) { 2849 usb_delay_ms(&sc->sc_bus, 5); 2850 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2851 OREAD4(sc, OHCI_COMMAND_STATUS))); 2852 ohci_dump_ed(sed); 2853 ohci_dump_tds(data); 2854 } 2855 #endif 2856 splx(s); 2857 2858 return (USBD_IN_PROGRESS); 2859 } 2860 2861 /* Abort a device control request. */ 2862 Static void 2863 ohci_device_intr_abort(usbd_xfer_handle xfer) 2864 { 2865 if (xfer->pipe->intrxfer == xfer) { 2866 DPRINTF(("ohci_device_intr_abort: remove\n")); 2867 xfer->pipe->intrxfer = NULL; 2868 } 2869 ohci_abort_xfer(xfer, USBD_CANCELLED); 2870 } 2871 2872 /* Close a device interrupt pipe. */ 2873 Static void 2874 ohci_device_intr_close(usbd_pipe_handle pipe) 2875 { 2876 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2877 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2878 int nslots = opipe->u.intr.nslots; 2879 int pos = opipe->u.intr.pos; 2880 int j; 2881 ohci_soft_ed_t *p, *sed = opipe->sed; 2882 int s; 2883 2884 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 2885 pipe, nslots, pos)); 2886 s = splusb(); 2887 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2888 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2889 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2890 usb_delay_ms(&sc->sc_bus, 2); 2891 2892 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 2893 ; 2894 #ifdef DIAGNOSTIC 2895 if (p == NULL) 2896 panic("ohci_device_intr_close: ED not found\n"); 2897 #endif 2898 p->next = sed->next; 2899 p->ed.ed_nexted = sed->ed.ed_nexted; 2900 splx(s); 2901 2902 for (j = 0; j < nslots; j++) 2903 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 2904 2905 ohci_free_std(sc, opipe->tail.td); 2906 ohci_free_sed(sc, opipe->sed); 2907 } 2908 2909 Static usbd_status 2910 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 2911 { 2912 int i, j, s, best; 2913 u_int npoll, slow, shigh, nslots; 2914 u_int bestbw, bw; 2915 ohci_soft_ed_t *hsed, *sed = opipe->sed; 2916 2917 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 2918 if (ival == 0) { 2919 printf("ohci_setintr: 0 interval\n"); 2920 return (USBD_INVAL); 2921 } 2922 2923 npoll = OHCI_NO_INTRS; 2924 while (npoll > ival) 2925 npoll /= 2; 2926 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 2927 2928 /* 2929 * We now know which level in the tree the ED must go into. 2930 * Figure out which slot has most bandwidth left over. 2931 * Slots to examine: 2932 * npoll 2933 * 1 0 2934 * 2 1 2 2935 * 4 3 4 5 6 2936 * 8 7 8 9 10 11 12 13 14 2937 * N (N-1) .. (N-1+N-1) 2938 */ 2939 slow = npoll-1; 2940 shigh = slow + npoll; 2941 nslots = OHCI_NO_INTRS / npoll; 2942 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 2943 bw = 0; 2944 for (j = 0; j < nslots; j++) 2945 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 2946 if (bw < bestbw) { 2947 best = i; 2948 bestbw = bw; 2949 } 2950 } 2951 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 2952 best, slow, shigh, bestbw)); 2953 2954 s = splusb(); 2955 hsed = sc->sc_eds[best]; 2956 sed->next = hsed->next; 2957 sed->ed.ed_nexted = hsed->ed.ed_nexted; 2958 hsed->next = sed; 2959 hsed->ed.ed_nexted = htole32(sed->physaddr); 2960 splx(s); 2961 2962 for (j = 0; j < nslots; j++) 2963 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 2964 opipe->u.intr.nslots = nslots; 2965 opipe->u.intr.pos = best; 2966 2967 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 2968 return (USBD_NORMAL_COMPLETION); 2969 } 2970 2971 /***********************/ 2972 2973 usbd_status 2974 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 2975 { 2976 usbd_status err; 2977 2978 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 2979 2980 /* Put it on our queue, */ 2981 err = usb_insert_transfer(xfer); 2982 2983 /* bail out on error, */ 2984 if (err && err != USBD_IN_PROGRESS) 2985 return (err); 2986 2987 /* XXX should check inuse here */ 2988 2989 /* insert into schedule, */ 2990 ohci_device_isoc_enter(xfer); 2991 2992 /* and start if the pipe wasn't running */ 2993 if (!err) 2994 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 2995 2996 return (err); 2997 } 2998 2999 void 3000 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3001 { 3002 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3003 usbd_device_handle dev = opipe->pipe.device; 3004 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3005 ohci_soft_ed_t *sed = opipe->sed; 3006 struct iso *iso = &opipe->u.iso; 3007 ohci_soft_itd_t *sitd, *nsitd; 3008 ohci_physaddr_t buf, offs, noffs, bp0; 3009 int i, ncur, nframes; 3010 int s; 3011 3012 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3013 "nframes=%d\n", 3014 iso->inuse, iso->next, xfer, xfer->nframes)); 3015 3016 if (sc->sc_dying) 3017 return; 3018 3019 if (iso->next == -1) { 3020 /* Not in use yet, schedule it a few frames ahead. */ 3021 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5; 3022 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3023 iso->next)); 3024 } 3025 3026 sitd = opipe->tail.itd; 3027 buf = DMAADDR(&xfer->dmabuf); 3028 bp0 = OHCI_PAGE(buf); 3029 offs = OHCI_PAGE_OFFSET(buf); 3030 nframes = xfer->nframes; 3031 xfer->hcpriv = sitd; 3032 for (i = ncur = 0; i < nframes; i++, ncur++) { 3033 noffs = offs + xfer->frlengths[i]; 3034 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3035 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3036 3037 /* Allocate next ITD */ 3038 nsitd = ohci_alloc_sitd(sc); 3039 if (nsitd == NULL) { 3040 /* XXX what now? */ 3041 printf("%s: isoc TD alloc failed\n", 3042 USBDEVNAME(sc->sc_bus.bdev)); 3043 return; 3044 } 3045 3046 /* Fill current ITD */ 3047 sitd->itd.itd_flags = htole32( 3048 OHCI_ITD_NOCC | 3049 OHCI_ITD_SET_SF(iso->next) | 3050 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3051 OHCI_ITD_SET_FC(ncur)); 3052 sitd->itd.itd_bp0 = htole32(bp0); 3053 sitd->nextitd = nsitd; 3054 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3055 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3056 sitd->xfer = xfer; 3057 sitd->flags = 0; 3058 3059 sitd = nsitd; 3060 iso->next = iso->next + ncur; 3061 bp0 = OHCI_PAGE(buf + offs); 3062 ncur = 0; 3063 } 3064 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs)); 3065 offs = noffs; 3066 } 3067 nsitd = ohci_alloc_sitd(sc); 3068 if (nsitd == NULL) { 3069 /* XXX what now? */ 3070 printf("%s: isoc TD alloc failed\n", 3071 USBDEVNAME(sc->sc_bus.bdev)); 3072 return; 3073 } 3074 /* Fixup last used ITD */ 3075 sitd->itd.itd_flags = htole32( 3076 OHCI_ITD_NOCC | 3077 OHCI_ITD_SET_SF(iso->next) | 3078 OHCI_ITD_SET_DI(0) | 3079 OHCI_ITD_SET_FC(ncur)); 3080 sitd->itd.itd_bp0 = htole32(bp0); 3081 sitd->nextitd = nsitd; 3082 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3083 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3084 sitd->xfer = xfer; 3085 sitd->flags = OHCI_CALL_DONE; 3086 3087 iso->next = iso->next + ncur; 3088 iso->inuse += nframes; 3089 3090 xfer->actlen = offs; /* XXX pretend we did it all */ 3091 3092 xfer->status = USBD_IN_PROGRESS; 3093 3094 #ifdef OHCI_DEBUG 3095 if (ohcidebug > 5) { 3096 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3097 le32toh(sc->sc_hcca->hcca_frame_number))); 3098 ohci_dump_itds(xfer->hcpriv); 3099 ohci_dump_ed(sed); 3100 } 3101 #endif 3102 3103 s = splusb(); 3104 opipe->tail.itd = nsitd; 3105 sed->ed.ed_tailp = htole32(nsitd->physaddr); 3106 splx(s); 3107 3108 #ifdef OHCI_DEBUG 3109 if (ohcidebug > 5) { 3110 delay(150000); 3111 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3112 le32toh(sc->sc_hcca->hcca_frame_number))); 3113 ohci_dump_itds(xfer->hcpriv); 3114 ohci_dump_ed(sed); 3115 } 3116 #endif 3117 } 3118 3119 usbd_status 3120 ohci_device_isoc_start(usbd_xfer_handle xfer) 3121 { 3122 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3123 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3124 3125 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3126 3127 if (sc->sc_dying) 3128 return (USBD_IOERROR); 3129 3130 #ifdef DIAGNOSTIC 3131 if (xfer->status != USBD_IN_PROGRESS) 3132 printf("uhci_device_isoc_start: not in progress %p\n", xfer); 3133 #endif 3134 3135 /* XXX anything to do? */ 3136 3137 return (USBD_IN_PROGRESS); 3138 } 3139 3140 void 3141 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3142 { 3143 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3144 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3145 ohci_soft_ed_t *sed; 3146 ohci_soft_itd_t *sitd; 3147 int s; 3148 3149 s = splusb(); 3150 3151 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3152 3153 /* Transfer is already done. */ 3154 if (xfer->status != USBD_NOT_STARTED && 3155 xfer->status != USBD_IN_PROGRESS) { 3156 splx(s); 3157 printf("ohci_device_isoc_abort: early return\n"); 3158 return; 3159 } 3160 3161 /* Give xfer the requested abort code. */ 3162 xfer->status = USBD_CANCELLED; 3163 3164 sed = opipe->sed; 3165 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 3166 3167 sitd = xfer->hcpriv; 3168 #ifdef DIAGNOSTIC 3169 if (sitd == NULL) { 3170 splx(s); 3171 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3172 return; 3173 } 3174 #endif 3175 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3176 #ifdef DIAGNOSTIC 3177 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3178 sitd->isdone = 1; 3179 #endif 3180 } 3181 3182 splx(s); 3183 3184 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3185 3186 s = splusb(); 3187 3188 /* Run callback. */ 3189 usb_transfer_complete(xfer); 3190 3191 sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */ 3192 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 3193 3194 splx(s); 3195 } 3196 3197 void 3198 ohci_device_isoc_done(usbd_xfer_handle xfer) 3199 { 3200 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3201 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3202 ohci_soft_itd_t *sitd, *nsitd; 3203 3204 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3205 3206 for (sitd = xfer->hcpriv; 3207 !(sitd->flags & OHCI_CALL_DONE); 3208 sitd = nsitd) { 3209 nsitd = sitd->nextitd; 3210 DPRINTFN(1,("ohci_device_isoc_done: free sitd=%p\n", sitd)); 3211 ohci_free_sitd(sc, sitd); 3212 } 3213 ohci_free_sitd(sc, sitd); 3214 xfer->hcpriv = NULL; 3215 } 3216 3217 usbd_status 3218 ohci_setup_isoc(usbd_pipe_handle pipe) 3219 { 3220 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3221 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3222 struct iso *iso = &opipe->u.iso; 3223 int s; 3224 3225 iso->next = -1; 3226 iso->inuse = 0; 3227 3228 s = splusb(); 3229 ohci_add_ed(opipe->sed, sc->sc_isoc_head); 3230 splx(s); 3231 3232 return (USBD_NORMAL_COMPLETION); 3233 } 3234 3235 void 3236 ohci_device_isoc_close(usbd_pipe_handle pipe) 3237 { 3238 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3239 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3240 int s; 3241 3242 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3243 3244 s = splusb(); 3245 ohci_rem_ed(opipe->sed, sc->sc_isoc_head); 3246 splx(s); 3247 ohci_close_pipe(pipe, sc->sc_isoc_head); 3248 #ifdef DIAGNOSTIC 3249 opipe->tail.itd->isdone = 1; 3250 #endif 3251 ohci_free_sitd(sc, opipe->tail.itd); 3252 } 3253