xref: /netbsd-src/sys/dev/usb/ohci.c (revision 27578b9aac214cc7796ead81dcc5427e79d5f2a0)
1 /*	$NetBSD: ohci.c,v 1.103 2001/09/11 07:00:19 augustss Exp $	*/
2 /*	$FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $	*/
3 
4 /*
5  * Copyright (c) 1998 The NetBSD Foundation, Inc.
6  * All rights reserved.
7  *
8  * This code is derived from software contributed to The NetBSD Foundation
9  * by Lennart Augustsson (lennart@augustsson.net) at
10  * Carlstedt Research & Technology.
11  *
12  * Redistribution and use in source and binary forms, with or without
13  * modification, are permitted provided that the following conditions
14  * are met:
15  * 1. Redistributions of source code must retain the above copyright
16  *    notice, this list of conditions and the following disclaimer.
17  * 2. Redistributions in binary form must reproduce the above copyright
18  *    notice, this list of conditions and the following disclaimer in the
19  *    documentation and/or other materials provided with the distribution.
20  * 3. All advertising materials mentioning features or use of this software
21  *    must display the following acknowledgement:
22  *        This product includes software developed by the NetBSD
23  *        Foundation, Inc. and its contributors.
24  * 4. Neither the name of The NetBSD Foundation nor the names of its
25  *    contributors may be used to endorse or promote products derived
26  *    from this software without specific prior written permission.
27  *
28  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
29  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
30  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
31  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
32  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
33  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
34  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
35  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
36  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
37  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38  * POSSIBILITY OF SUCH DAMAGE.
39  */
40 
41 /*
42  * USB Open Host Controller driver.
43  *
44  * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
45  * USB spec: http://www.usb.org/developers/data/usbspec.zip
46  */
47 
48 #include <sys/param.h>
49 #include <sys/systm.h>
50 #include <sys/malloc.h>
51 #if defined(__NetBSD__) || defined(__OpenBSD__)
52 #include <sys/kernel.h>
53 #include <sys/device.h>
54 #include <sys/select.h>
55 #elif defined(__FreeBSD__)
56 #include <sys/module.h>
57 #include <sys/bus.h>
58 #include <machine/bus_pio.h>
59 #include <machine/bus_memio.h>
60 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__)
61 #include <machine/cpu.h>
62 #endif
63 #endif
64 #include <sys/proc.h>
65 #include <sys/queue.h>
66 
67 #include <machine/bus.h>
68 #include <machine/endian.h>
69 
70 #include <dev/usb/usb.h>
71 #include <dev/usb/usbdi.h>
72 #include <dev/usb/usbdivar.h>
73 #include <dev/usb/usb_mem.h>
74 #include <dev/usb/usb_quirks.h>
75 
76 #include <dev/usb/ohcireg.h>
77 #include <dev/usb/ohcivar.h>
78 
79 #if defined(__FreeBSD__)
80 #include <machine/clock.h>
81 
82 #define delay(d)                DELAY(d)
83 #endif
84 
85 #if defined(__OpenBSD__)
86 struct cfdriver ohci_cd = {
87 	NULL, "ohci", DV_DULL
88 };
89 #endif
90 
91 #ifdef OHCI_DEBUG
92 #define DPRINTF(x)	if (ohcidebug) logprintf x
93 #define DPRINTFN(n,x)	if (ohcidebug>(n)) logprintf x
94 int ohcidebug = 0;
95 #ifndef __NetBSD__
96 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
97 #endif
98 #else
99 #define DPRINTF(x)
100 #define DPRINTFN(n,x)
101 #endif
102 
103 /*
104  * The OHCI controller is little endian, so on big endian machines
105  * the data strored in memory needs to be swapped.
106  */
107 #if defined(__FreeBSD__) || defined(__OpenBSD__)
108 #if BYTE_ORDER == BIG_ENDIAN
109 #define htole32(x) (bswap32(x))
110 #define le32toh(x) (bswap32(x))
111 #else
112 #define htole32(x) (x)
113 #define le32toh(x) (x)
114 #endif
115 #endif
116 
117 struct ohci_pipe;
118 
119 Static ohci_soft_ed_t  *ohci_alloc_sed(ohci_softc_t *);
120 Static void		ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *);
121 
122 Static ohci_soft_td_t  *ohci_alloc_std(ohci_softc_t *);
123 Static void		ohci_free_std(ohci_softc_t *, ohci_soft_td_t *);
124 
125 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *);
126 Static void		ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *);
127 
128 #if 0
129 Static void		ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *,
130 					    ohci_soft_td_t *);
131 #endif
132 Static usbd_status	ohci_alloc_std_chain(struct ohci_pipe *,
133 			    ohci_softc_t *, int, int, usbd_xfer_handle,
134 			    ohci_soft_td_t *, ohci_soft_td_t **);
135 
136 Static void		ohci_shutdown(void *v);
137 Static void		ohci_power(int, void *);
138 Static usbd_status	ohci_open(usbd_pipe_handle);
139 Static void		ohci_poll(struct usbd_bus *);
140 Static void		ohci_softintr(void *);
141 Static void		ohci_waitintr(ohci_softc_t *, usbd_xfer_handle);
142 Static void		ohci_add_done(ohci_softc_t *, ohci_physaddr_t);
143 Static void		ohci_rhsc(ohci_softc_t *, usbd_xfer_handle);
144 
145 Static usbd_status	ohci_device_request(usbd_xfer_handle xfer);
146 Static void		ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *);
147 Static void		ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *);
148 Static void		ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *);
149 Static void		ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *);
150 Static ohci_soft_td_t  *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t);
151 Static void		ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *);
152 Static void		ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *);
153 Static ohci_soft_itd_t  *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t);
154 
155 Static usbd_status	ohci_setup_isoc(usbd_pipe_handle pipe);
156 Static void		ohci_device_isoc_enter(usbd_xfer_handle);
157 
158 Static usbd_status	ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
159 Static void		ohci_freem(struct usbd_bus *, usb_dma_t *);
160 
161 Static usbd_xfer_handle	ohci_allocx(struct usbd_bus *);
162 Static void		ohci_freex(struct usbd_bus *, usbd_xfer_handle);
163 
164 Static usbd_status	ohci_root_ctrl_transfer(usbd_xfer_handle);
165 Static usbd_status	ohci_root_ctrl_start(usbd_xfer_handle);
166 Static void		ohci_root_ctrl_abort(usbd_xfer_handle);
167 Static void		ohci_root_ctrl_close(usbd_pipe_handle);
168 Static void		ohci_root_ctrl_done(usbd_xfer_handle);
169 
170 Static usbd_status	ohci_root_intr_transfer(usbd_xfer_handle);
171 Static usbd_status	ohci_root_intr_start(usbd_xfer_handle);
172 Static void		ohci_root_intr_abort(usbd_xfer_handle);
173 Static void		ohci_root_intr_close(usbd_pipe_handle);
174 Static void		ohci_root_intr_done(usbd_xfer_handle);
175 
176 Static usbd_status	ohci_device_ctrl_transfer(usbd_xfer_handle);
177 Static usbd_status	ohci_device_ctrl_start(usbd_xfer_handle);
178 Static void		ohci_device_ctrl_abort(usbd_xfer_handle);
179 Static void		ohci_device_ctrl_close(usbd_pipe_handle);
180 Static void		ohci_device_ctrl_done(usbd_xfer_handle);
181 
182 Static usbd_status	ohci_device_bulk_transfer(usbd_xfer_handle);
183 Static usbd_status	ohci_device_bulk_start(usbd_xfer_handle);
184 Static void		ohci_device_bulk_abort(usbd_xfer_handle);
185 Static void		ohci_device_bulk_close(usbd_pipe_handle);
186 Static void		ohci_device_bulk_done(usbd_xfer_handle);
187 
188 Static usbd_status	ohci_device_intr_transfer(usbd_xfer_handle);
189 Static usbd_status	ohci_device_intr_start(usbd_xfer_handle);
190 Static void		ohci_device_intr_abort(usbd_xfer_handle);
191 Static void		ohci_device_intr_close(usbd_pipe_handle);
192 Static void		ohci_device_intr_done(usbd_xfer_handle);
193 
194 Static usbd_status	ohci_device_isoc_transfer(usbd_xfer_handle);
195 Static usbd_status	ohci_device_isoc_start(usbd_xfer_handle);
196 Static void		ohci_device_isoc_abort(usbd_xfer_handle);
197 Static void		ohci_device_isoc_close(usbd_pipe_handle);
198 Static void		ohci_device_isoc_done(usbd_xfer_handle);
199 
200 Static usbd_status	ohci_device_setintr(ohci_softc_t *sc,
201 			    struct ohci_pipe *pipe, int ival);
202 
203 Static int		ohci_str(usb_string_descriptor_t *, int, char *);
204 
205 Static void		ohci_timeout(void *);
206 Static void		ohci_rhsc_able(ohci_softc_t *, int);
207 
208 Static void		ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *);
209 Static void		ohci_abort_xfer(usbd_xfer_handle, usbd_status);
210 Static void		ohci_abort_xfer_end(void *);
211 
212 Static void		ohci_device_clear_toggle(usbd_pipe_handle pipe);
213 Static void		ohci_noop(usbd_pipe_handle pipe);
214 
215 #ifdef OHCI_DEBUG
216 Static void		ohci_dumpregs(ohci_softc_t *);
217 Static void		ohci_dump_tds(ohci_soft_td_t *);
218 Static void		ohci_dump_td(ohci_soft_td_t *);
219 Static void		ohci_dump_ed(ohci_soft_ed_t *);
220 Static void		ohci_dump_itd(ohci_soft_itd_t *);
221 Static void		ohci_dump_itds(ohci_soft_itd_t *);
222 #endif
223 
224 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
225 			BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
226 #define OWRITE1(sc, r, x) \
227  do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
228 #define OWRITE2(sc, r, x) \
229  do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
230 #define OWRITE4(sc, r, x) \
231  do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
232 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r)))
233 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r)))
234 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r)))
235 
236 /* Reverse the bits in a value 0 .. 31 */
237 Static u_int8_t revbits[OHCI_NO_INTRS] =
238   { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
239     0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
240     0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
241     0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
242 
243 struct ohci_pipe {
244 	struct usbd_pipe pipe;
245 	ohci_soft_ed_t *sed;
246 	union {
247 		ohci_soft_td_t *td;
248 		ohci_soft_itd_t *itd;
249 	} tail;
250 	/* Info needed for different pipe kinds. */
251 	union {
252 		/* Control pipe */
253 		struct {
254 			usb_dma_t reqdma;
255 			u_int length;
256 			ohci_soft_td_t *setup, *data, *stat;
257 		} ctl;
258 		/* Interrupt pipe */
259 		struct {
260 			int nslots;
261 			int pos;
262 		} intr;
263 		/* Bulk pipe */
264 		struct {
265 			u_int length;
266 			int isread;
267 		} bulk;
268 		/* Iso pipe */
269 		struct iso {
270 			int next, inuse;
271 		} iso;
272 	} u;
273 };
274 
275 #define OHCI_INTR_ENDPT 1
276 
277 Static struct usbd_bus_methods ohci_bus_methods = {
278 	ohci_open,
279 	ohci_softintr,
280 	ohci_poll,
281 	ohci_allocm,
282 	ohci_freem,
283 	ohci_allocx,
284 	ohci_freex,
285 };
286 
287 Static struct usbd_pipe_methods ohci_root_ctrl_methods = {
288 	ohci_root_ctrl_transfer,
289 	ohci_root_ctrl_start,
290 	ohci_root_ctrl_abort,
291 	ohci_root_ctrl_close,
292 	ohci_noop,
293 	ohci_root_ctrl_done,
294 };
295 
296 Static struct usbd_pipe_methods ohci_root_intr_methods = {
297 	ohci_root_intr_transfer,
298 	ohci_root_intr_start,
299 	ohci_root_intr_abort,
300 	ohci_root_intr_close,
301 	ohci_noop,
302 	ohci_root_intr_done,
303 };
304 
305 Static struct usbd_pipe_methods ohci_device_ctrl_methods = {
306 	ohci_device_ctrl_transfer,
307 	ohci_device_ctrl_start,
308 	ohci_device_ctrl_abort,
309 	ohci_device_ctrl_close,
310 	ohci_noop,
311 	ohci_device_ctrl_done,
312 };
313 
314 Static struct usbd_pipe_methods ohci_device_intr_methods = {
315 	ohci_device_intr_transfer,
316 	ohci_device_intr_start,
317 	ohci_device_intr_abort,
318 	ohci_device_intr_close,
319 	ohci_device_clear_toggle,
320 	ohci_device_intr_done,
321 };
322 
323 Static struct usbd_pipe_methods ohci_device_bulk_methods = {
324 	ohci_device_bulk_transfer,
325 	ohci_device_bulk_start,
326 	ohci_device_bulk_abort,
327 	ohci_device_bulk_close,
328 	ohci_device_clear_toggle,
329 	ohci_device_bulk_done,
330 };
331 
332 Static struct usbd_pipe_methods ohci_device_isoc_methods = {
333 	ohci_device_isoc_transfer,
334 	ohci_device_isoc_start,
335 	ohci_device_isoc_abort,
336 	ohci_device_isoc_close,
337 	ohci_noop,
338 	ohci_device_isoc_done,
339 };
340 
341 #if defined(__NetBSD__) || defined(__OpenBSD__)
342 int
343 ohci_activate(device_ptr_t self, enum devact act)
344 {
345 	struct ohci_softc *sc = (struct ohci_softc *)self;
346 	int rv = 0;
347 
348 	switch (act) {
349 	case DVACT_ACTIVATE:
350 		return (EOPNOTSUPP);
351 		break;
352 
353 	case DVACT_DEACTIVATE:
354 		if (sc->sc_child != NULL)
355 			rv = config_deactivate(sc->sc_child);
356 		sc->sc_dying = 1;
357 		break;
358 	}
359 	return (rv);
360 }
361 
362 int
363 ohci_detach(struct ohci_softc *sc, int flags)
364 {
365 	int rv = 0;
366 
367 	if (sc->sc_child != NULL)
368 		rv = config_detach(sc->sc_child, flags);
369 
370 	if (rv != 0)
371 		return (rv);
372 
373 #if defined(__NetBSD__) || defined(__OpenBSD__)
374 	powerhook_disestablish(sc->sc_powerhook);
375 	shutdownhook_disestablish(sc->sc_shutdownhook);
376 #endif
377 
378 	/* free data structures XXX */
379 
380 	return (rv);
381 }
382 #endif
383 
384 ohci_soft_ed_t *
385 ohci_alloc_sed(ohci_softc_t *sc)
386 {
387 	ohci_soft_ed_t *sed;
388 	usbd_status err;
389 	int i, offs;
390 	usb_dma_t dma;
391 
392 	if (sc->sc_freeeds == NULL) {
393 		DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
394 		err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
395 			  OHCI_ED_ALIGN, &dma);
396 		if (err)
397 			return (0);
398 		for(i = 0; i < OHCI_SED_CHUNK; i++) {
399 			offs = i * OHCI_SED_SIZE;
400 			sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs);
401 			sed->physaddr = DMAADDR(&dma) + offs;
402 			sed->next = sc->sc_freeeds;
403 			sc->sc_freeeds = sed;
404 		}
405 	}
406 	sed = sc->sc_freeeds;
407 	sc->sc_freeeds = sed->next;
408 	memset(&sed->ed, 0, sizeof(ohci_ed_t));
409 	sed->next = 0;
410 	return (sed);
411 }
412 
413 void
414 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
415 {
416 	sed->next = sc->sc_freeeds;
417 	sc->sc_freeeds = sed;
418 }
419 
420 ohci_soft_td_t *
421 ohci_alloc_std(ohci_softc_t *sc)
422 {
423 	ohci_soft_td_t *std;
424 	usbd_status err;
425 	int i, offs;
426 	usb_dma_t dma;
427 	int s;
428 
429 	if (sc->sc_freetds == NULL) {
430 		DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
431 		err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
432 			  OHCI_TD_ALIGN, &dma);
433 		if (err)
434 			return (NULL);
435 		s = splusb();
436 		for(i = 0; i < OHCI_STD_CHUNK; i++) {
437 			offs = i * OHCI_STD_SIZE;
438 			std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs);
439 			std->physaddr = DMAADDR(&dma) + offs;
440 			std->nexttd = sc->sc_freetds;
441 			sc->sc_freetds = std;
442 		}
443 		splx(s);
444 	}
445 
446 	s = splusb();
447 	std = sc->sc_freetds;
448 	sc->sc_freetds = std->nexttd;
449 	memset(&std->td, 0, sizeof(ohci_td_t));
450 	std->nexttd = NULL;
451 	std->xfer = NULL;
452 	ohci_hash_add_td(sc, std);
453 	splx(s);
454 
455 	return (std);
456 }
457 
458 void
459 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std)
460 {
461 	int s;
462 
463 	s = splusb();
464 	ohci_hash_rem_td(sc, std);
465 	std->nexttd = sc->sc_freetds;
466 	sc->sc_freetds = std;
467 	splx(s);
468 }
469 
470 usbd_status
471 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc,
472 		     int alen, int rd, usbd_xfer_handle xfer,
473 		     ohci_soft_td_t *sp, ohci_soft_td_t **ep)
474 {
475 	ohci_soft_td_t *next, *cur;
476 	ohci_physaddr_t dataphys, dataphysend;
477 	u_int32_t tdflags;
478 	int len, curlen;
479 	usb_dma_t *dma = &xfer->dmabuf;
480 	u_int16_t flags = xfer->flags;
481 
482 	DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen));
483 
484 	len = alen;
485 	cur = sp;
486 	dataphys = DMAADDR(dma);
487 	dataphysend = OHCI_PAGE(dataphys + len - 1);
488 	tdflags = htole32(
489 	    (rd ? OHCI_TD_IN : OHCI_TD_OUT) |
490 	    (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) |
491 	    OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR);
492 
493 	for (;;) {
494 		next = ohci_alloc_std(sc);
495 		if (next == NULL)
496 			goto nomem;
497 
498 		/* The OHCI hardware can handle at most one page crossing. */
499 		if (OHCI_PAGE(dataphys) == dataphysend ||
500 		    OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) {
501 			/* we can handle it in this TD */
502 			curlen = len;
503 		} else {
504 			/* must use multiple TDs, fill as much as possible. */
505 			curlen = 2 * OHCI_PAGE_SIZE -
506 				 (dataphys & (OHCI_PAGE_SIZE-1));
507 			/* the length must be a multiple of the max size */
508 			curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize);
509 #ifdef DIAGNOSTIC
510 			if (curlen == 0)
511 				panic("ohci_alloc_std: curlen == 0\n");
512 #endif
513 		}
514 		DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x "
515 			    "dataphysend=0x%08x len=%d curlen=%d\n",
516 			    dataphys, dataphysend,
517 			    len, curlen));
518 		len -= curlen;
519 
520 		cur->td.td_flags = tdflags;
521 		cur->td.td_cbp = htole32(dataphys);
522 		cur->nexttd = next;
523 		cur->td.td_nexttd = htole32(next->physaddr);
524 		cur->td.td_be = htole32(dataphys + curlen - 1);
525 		cur->len = curlen;
526 		cur->flags = OHCI_ADD_LEN;
527 		cur->xfer = xfer;
528 		DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n",
529 			    dataphys, dataphys + curlen - 1));
530 		if (len == 0)
531 			break;
532 		DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n"));
533 		dataphys += curlen;
534 		cur = next;
535 	}
536 	if ((flags & USBD_FORCE_SHORT_XFER) &&
537 	    alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) {
538 		/* Force a 0 length transfer at the end. */
539 
540 		cur = next;
541 		next = ohci_alloc_std(sc);
542 		if (next == NULL)
543 			goto nomem;
544 
545 		cur->td.td_flags = tdflags;
546 		cur->td.td_cbp = 0; /* indicate 0 length packet */
547 		cur->nexttd = next;
548 		cur->td.td_nexttd = htole32(next->physaddr);
549 		cur->td.td_be = ~0;
550 		cur->len = 0;
551 		cur->flags = 0;
552 		cur->xfer = xfer;
553 		DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n"));
554 	}
555 	*ep = cur;
556 
557 	return (USBD_NORMAL_COMPLETION);
558 
559  nomem:
560 	/* XXX free chain */
561 	return (USBD_NOMEM);
562 }
563 
564 #if 0
565 Static void
566 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std,
567 		    ohci_soft_td_t *stdend)
568 {
569 	ohci_soft_td_t *p;
570 
571 	for (; std != stdend; std = p) {
572 		p = std->nexttd;
573 		ohci_free_std(sc, std);
574 	}
575 }
576 #endif
577 
578 ohci_soft_itd_t *
579 ohci_alloc_sitd(ohci_softc_t *sc)
580 {
581 	ohci_soft_itd_t *sitd;
582 	usbd_status err;
583 	int i, s, offs;
584 	usb_dma_t dma;
585 
586 	if (sc->sc_freeitds == NULL) {
587 		DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n"));
588 		err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK,
589 			  OHCI_ITD_ALIGN, &dma);
590 		if (err)
591 			return (NULL);
592 		for(i = 0; i < OHCI_SITD_CHUNK; i++) {
593 			offs = i * OHCI_SITD_SIZE;
594 			sitd = (ohci_soft_itd_t *)((char*)KERNADDR(&dma)+offs);
595 			sitd->physaddr = DMAADDR(&dma) + offs;
596 			sitd->nextitd = sc->sc_freeitds;
597 			sc->sc_freeitds = sitd;
598 		}
599 	}
600 
601 	s = splusb();
602 	sitd = sc->sc_freeitds;
603 	sc->sc_freeitds = sitd->nextitd;
604 	memset(&sitd->itd, 0, sizeof(ohci_itd_t));
605 	sitd->nextitd = NULL;
606 	sitd->xfer = NULL;
607 	ohci_hash_add_itd(sc, sitd);
608 	splx(s);
609 
610 #ifdef DIAGNOSTIC
611 	sitd->isdone = 0;
612 #endif
613 
614 	return (sitd);
615 }
616 
617 void
618 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
619 {
620 	int s;
621 
622 	DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd));
623 
624 #ifdef DIAGNOSTIC
625 	if (!sitd->isdone) {
626 		panic("ohci_free_sitd: sitd=%p not done\n", sitd);
627 		return;
628 	}
629 #endif
630 
631 	s = splusb();
632 	ohci_hash_rem_itd(sc, sitd);
633 	sitd->nextitd = sc->sc_freeitds;
634 	sc->sc_freeitds = sitd;
635 	splx(s);
636 }
637 
638 usbd_status
639 ohci_init(ohci_softc_t *sc)
640 {
641 	ohci_soft_ed_t *sed, *psed;
642 	usbd_status err;
643 	int i;
644 	u_int32_t s, ctl, ival, hcr, fm, per, rev, desca;
645 
646 	DPRINTF(("ohci_init: start\n"));
647 #if defined(__OpenBSD__)
648 	printf(",");
649 #else
650 	printf("%s:", USBDEVNAME(sc->sc_bus.bdev));
651 #endif
652 	rev = OREAD4(sc, OHCI_REVISION);
653 	printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev),
654 	       OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
655 
656 	if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
657 		printf("%s: unsupported OHCI revision\n",
658 		       USBDEVNAME(sc->sc_bus.bdev));
659 		sc->sc_bus.usbrev = USBREV_UNKNOWN;
660 		return (USBD_INVAL);
661 	}
662 	sc->sc_bus.usbrev = USBREV_1_0;
663 
664 	for (i = 0; i < OHCI_HASH_SIZE; i++)
665 		LIST_INIT(&sc->sc_hash_tds[i]);
666 	for (i = 0; i < OHCI_HASH_SIZE; i++)
667 		LIST_INIT(&sc->sc_hash_itds[i]);
668 
669 	SIMPLEQ_INIT(&sc->sc_free_xfers);
670 
671 	/* XXX determine alignment by R/W */
672 	/* Allocate the HCCA area. */
673 	err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
674 			 OHCI_HCCA_ALIGN, &sc->sc_hccadma);
675 	if (err)
676 		return (err);
677 	sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma);
678 	memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
679 
680 	sc->sc_eintrs = OHCI_NORMAL_INTRS;
681 
682 	/* Allocate dummy ED that starts the control list. */
683 	sc->sc_ctrl_head = ohci_alloc_sed(sc);
684 	if (sc->sc_ctrl_head == NULL) {
685 		err = USBD_NOMEM;
686 		goto bad1;
687 	}
688 	sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
689 
690 	/* Allocate dummy ED that starts the bulk list. */
691 	sc->sc_bulk_head = ohci_alloc_sed(sc);
692 	if (sc->sc_bulk_head == NULL) {
693 		err = USBD_NOMEM;
694 		goto bad2;
695 	}
696 	sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
697 
698 	/* Allocate dummy ED that starts the isochronous list. */
699 	sc->sc_isoc_head = ohci_alloc_sed(sc);
700 	if (sc->sc_isoc_head == NULL) {
701 		err = USBD_NOMEM;
702 		goto bad3;
703 	}
704 	sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
705 
706 	/* Allocate all the dummy EDs that make up the interrupt tree. */
707 	for (i = 0; i < OHCI_NO_EDS; i++) {
708 		sed = ohci_alloc_sed(sc);
709 		if (sed == NULL) {
710 			while (--i >= 0)
711 				ohci_free_sed(sc, sc->sc_eds[i]);
712 			err = USBD_NOMEM;
713 			goto bad4;
714 		}
715 		/* All ED fields are set to 0. */
716 		sc->sc_eds[i] = sed;
717 		sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
718 		if (i != 0)
719 			psed = sc->sc_eds[(i-1) / 2];
720 		else
721 			psed= sc->sc_isoc_head;
722 		sed->next = psed;
723 		sed->ed.ed_nexted = htole32(psed->physaddr);
724 	}
725 	/*
726 	 * Fill HCCA interrupt table.  The bit reversal is to get
727 	 * the tree set up properly to spread the interrupts.
728 	 */
729 	for (i = 0; i < OHCI_NO_INTRS; i++)
730 		sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
731 		    htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
732 
733 #ifdef OHCI_DEBUG
734 	if (ohcidebug > 15) {
735 		for (i = 0; i < OHCI_NO_EDS; i++) {
736 			printf("ed#%d ", i);
737 			ohci_dump_ed(sc->sc_eds[i]);
738 		}
739 		printf("iso ");
740 		ohci_dump_ed(sc->sc_isoc_head);
741 	}
742 #endif
743 
744 	/* Determine in what context we are running. */
745 	ctl = OREAD4(sc, OHCI_CONTROL);
746 	if (ctl & OHCI_IR) {
747 		/* SMM active, request change */
748 		DPRINTF(("ohci_init: SMM active, request owner change\n"));
749 		s = OREAD4(sc, OHCI_COMMAND_STATUS);
750 		OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
751 		for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
752 			usb_delay_ms(&sc->sc_bus, 1);
753 			ctl = OREAD4(sc, OHCI_CONTROL);
754 		}
755 		if ((ctl & OHCI_IR) == 0) {
756 			printf("%s: SMM does not respond, resetting\n",
757 			       USBDEVNAME(sc->sc_bus.bdev));
758 			OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
759 			goto reset;
760 		}
761 #if 0
762 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */
763 	} else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
764 		/* BIOS started controller. */
765 		DPRINTF(("ohci_init: BIOS active\n"));
766 		if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
767 			OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL);
768 			usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
769 		}
770 #endif
771 	} else {
772 		DPRINTF(("ohci_init: cold started\n"));
773 	reset:
774 		/* Controller was cold started. */
775 		usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
776 	}
777 
778 	/*
779 	 * This reset should not be necessary according to the OHCI spec, but
780 	 * without it some controllers do not start.
781 	 */
782 	DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
783 	OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
784 	usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
785 
786 	/* We now own the host controller and the bus has been reset. */
787 	ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
788 
789 	OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
790 	/* Nominal time for a reset is 10 us. */
791 	for (i = 0; i < 10; i++) {
792 		delay(10);
793 		hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
794 		if (!hcr)
795 			break;
796 	}
797 	if (hcr) {
798 		printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
799 		err = USBD_IOERROR;
800 		goto bad5;
801 	}
802 #ifdef OHCI_DEBUG
803 	if (ohcidebug > 15)
804 		ohci_dumpregs(sc);
805 #endif
806 
807 	/* The controller is now in SUSPEND state, we have 2ms to finish. */
808 
809 	/* Set up HC registers. */
810 	OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma));
811 	OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
812 	OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
813 	/* disable all interrupts and then switch on all desired interrupts */
814 	OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
815 	OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
816 	/* switch on desired functional features */
817 	ctl = OREAD4(sc, OHCI_CONTROL);
818 	ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
819 	ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
820 		OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
821 	/* And finally start it! */
822 	OWRITE4(sc, OHCI_CONTROL, ctl);
823 
824 	/*
825 	 * The controller is now OPERATIONAL.  Set a some final
826 	 * registers that should be set earlier, but that the
827 	 * controller ignores when in the SUSPEND state.
828 	 */
829 	fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
830 	fm |= OHCI_FSMPS(ival) | ival;
831 	OWRITE4(sc, OHCI_FM_INTERVAL, fm);
832 	per = OHCI_PERIODIC(ival); /* 90% periodic */
833 	OWRITE4(sc, OHCI_PERIODIC_START, per);
834 
835 	/* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
836 	desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
837 	OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
838 	OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
839 	usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY);
840 	OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
841 
842 	/*
843 	 * The AMD756 requires a delay before re-reading the register,
844 	 * otherwise it will occasionally report 0 ports.
845 	 */
846 	usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY);
847 	sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
848 
849 #ifdef OHCI_DEBUG
850 	if (ohcidebug > 5)
851 		ohci_dumpregs(sc);
852 #endif
853 
854 	/* Set up the bus struct. */
855 	sc->sc_bus.methods = &ohci_bus_methods;
856 	sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
857 
858 #if defined(__NetBSD__) || defined(__OpenBSD__)
859 	sc->sc_control = sc->sc_intre = 0;
860 	sc->sc_powerhook = powerhook_establish(ohci_power, sc);
861 	sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc);
862 #endif
863 
864 	return (USBD_NORMAL_COMPLETION);
865 
866  bad5:
867 	for (i = 0; i < OHCI_NO_EDS; i++)
868 		ohci_free_sed(sc, sc->sc_eds[i]);
869  bad4:
870 	ohci_free_sed(sc, sc->sc_isoc_head);
871  bad3:
872 	ohci_free_sed(sc, sc->sc_ctrl_head);
873  bad2:
874 	ohci_free_sed(sc, sc->sc_bulk_head);
875  bad1:
876 	usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
877 	return (err);
878 }
879 
880 usbd_status
881 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
882 {
883 #if defined(__NetBSD__) || defined(__OpenBSD__)
884 	struct ohci_softc *sc = (struct ohci_softc *)bus;
885 #endif
886 
887 	return (usb_allocmem(&sc->sc_bus, size, 0, dma));
888 }
889 
890 void
891 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma)
892 {
893 #if defined(__NetBSD__) || defined(__OpenBSD__)
894 	struct ohci_softc *sc = (struct ohci_softc *)bus;
895 #endif
896 
897 	usb_freemem(&sc->sc_bus, dma);
898 }
899 
900 usbd_xfer_handle
901 ohci_allocx(struct usbd_bus *bus)
902 {
903 	struct ohci_softc *sc = (struct ohci_softc *)bus;
904 	usbd_xfer_handle xfer;
905 
906 	xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
907 	if (xfer != NULL)
908 		SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next);
909 	else
910 		xfer = malloc(sizeof(*xfer), M_USB, M_NOWAIT);
911 	if (xfer != NULL)
912 		memset(xfer, 0, sizeof *xfer);
913 	return (xfer);
914 }
915 
916 void
917 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
918 {
919 	struct ohci_softc *sc = (struct ohci_softc *)bus;
920 
921 	SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
922 }
923 
924 /*
925  * Shut down the controller when the system is going down.
926  */
927 void
928 ohci_shutdown(void *v)
929 {
930 	ohci_softc_t *sc = v;
931 
932 	DPRINTF(("ohci_shutdown: stopping the HC\n"));
933 	OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
934 }
935 
936 /*
937  * Handle suspend/resume.
938  *
939  * We need to switch to polling mode here, because this routine is
940  * called from an intterupt context.  This is all right since we
941  * are almost suspended anyway.
942  */
943 void
944 ohci_power(int why, void *v)
945 {
946 	ohci_softc_t *sc = v;
947 	u_int32_t ctl;
948 	int s;
949 
950 #ifdef OHCI_DEBUG
951 	DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why));
952 	ohci_dumpregs(sc);
953 #endif
954 
955 	s = splhardusb();
956 	switch (why) {
957 	case PWR_SUSPEND:
958 	case PWR_STANDBY:
959 		sc->sc_bus.use_polling++;
960 		ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK;
961 		if (sc->sc_control == 0) {
962 			/*
963 			 * Preserve register values, in case that APM BIOS
964 			 * does not recover them.
965 			 */
966 			sc->sc_control = ctl;
967 			sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE);
968 		}
969 		ctl |= OHCI_HCFS_SUSPEND;
970 		OWRITE4(sc, OHCI_CONTROL, ctl);
971 		usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
972 		sc->sc_bus.use_polling--;
973 		break;
974 	case PWR_RESUME:
975 		sc->sc_bus.use_polling++;
976 		/* Some broken BIOSes do not recover these values */
977 		OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma));
978 		OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
979 		OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
980 		if (sc->sc_intre)
981 			OWRITE4(sc, OHCI_INTERRUPT_ENABLE,
982 				sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE));
983 		if (sc->sc_control)
984 			ctl = sc->sc_control;
985 		else
986 			ctl = OREAD4(sc, OHCI_CONTROL);
987 		ctl |= OHCI_HCFS_RESUME;
988 		OWRITE4(sc, OHCI_CONTROL, ctl);
989 		usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
990 		ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL;
991 		OWRITE4(sc, OHCI_CONTROL, ctl);
992 		usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
993 		sc->sc_control = sc->sc_intre = 0;
994 		sc->sc_bus.use_polling--;
995 		break;
996 	case PWR_SOFTSUSPEND:
997 	case PWR_SOFTSTANDBY:
998 	case PWR_SOFTRESUME:
999 		break;
1000 	}
1001 	splx(s);
1002 }
1003 
1004 #ifdef OHCI_DEBUG
1005 void
1006 ohci_dumpregs(ohci_softc_t *sc)
1007 {
1008 	DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
1009 		 OREAD4(sc, OHCI_REVISION),
1010 		 OREAD4(sc, OHCI_CONTROL),
1011 		 OREAD4(sc, OHCI_COMMAND_STATUS)));
1012 	DPRINTF(("               intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
1013 		 OREAD4(sc, OHCI_INTERRUPT_STATUS),
1014 		 OREAD4(sc, OHCI_INTERRUPT_ENABLE),
1015 		 OREAD4(sc, OHCI_INTERRUPT_DISABLE)));
1016 	DPRINTF(("               hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
1017 		 OREAD4(sc, OHCI_HCCA),
1018 		 OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
1019 		 OREAD4(sc, OHCI_CONTROL_HEAD_ED)));
1020 	DPRINTF(("               ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
1021 		 OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
1022 		 OREAD4(sc, OHCI_BULK_HEAD_ED),
1023 		 OREAD4(sc, OHCI_BULK_CURRENT_ED)));
1024 	DPRINTF(("               done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
1025 		 OREAD4(sc, OHCI_DONE_HEAD),
1026 		 OREAD4(sc, OHCI_FM_INTERVAL),
1027 		 OREAD4(sc, OHCI_FM_REMAINING)));
1028 	DPRINTF(("               fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
1029 		 OREAD4(sc, OHCI_FM_NUMBER),
1030 		 OREAD4(sc, OHCI_PERIODIC_START),
1031 		 OREAD4(sc, OHCI_LS_THRESHOLD)));
1032 	DPRINTF(("               desca=0x%08x descb=0x%08x stat=0x%08x\n",
1033 		 OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
1034 		 OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
1035 		 OREAD4(sc, OHCI_RH_STATUS)));
1036 	DPRINTF(("               port1=0x%08x port2=0x%08x\n",
1037 		 OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
1038 		 OREAD4(sc, OHCI_RH_PORT_STATUS(2))));
1039 	DPRINTF(("         HCCA: frame_number=0x%04x done_head=0x%08x\n",
1040 		 le32toh(sc->sc_hcca->hcca_frame_number),
1041 		 le32toh(sc->sc_hcca->hcca_done_head)));
1042 }
1043 #endif
1044 
1045 Static int ohci_intr1(ohci_softc_t *);
1046 
1047 int
1048 ohci_intr(void *p)
1049 {
1050 	ohci_softc_t *sc = p;
1051 
1052 	/* If we get an interrupt while polling, then just ignore it. */
1053 	if (sc->sc_bus.use_polling) {
1054 #ifdef DIAGNOSTIC
1055 		printf("ohci_intr: ignored interrupt while polling\n");
1056 #endif
1057 		return (0);
1058 	}
1059 
1060 	return (ohci_intr1(sc));
1061 }
1062 
1063 Static int
1064 ohci_intr1(ohci_softc_t *sc)
1065 {
1066 	u_int32_t intrs, eintrs;
1067 	ohci_physaddr_t done;
1068 
1069 	/* In case the interrupt occurs before initialization has completed. */
1070 	if (sc == NULL || sc->sc_hcca == NULL) {
1071 #ifdef DIAGNOSTIC
1072 		printf("ohci_intr: sc->sc_hcca == NULL\n");
1073 #endif
1074 		return (0);
1075 	}
1076 
1077         intrs = 0;
1078 	done = le32toh(sc->sc_hcca->hcca_done_head);
1079 	if (done != 0) {
1080 		if (done & ~OHCI_DONE_INTRS)
1081 			intrs = OHCI_WDH;
1082 		if (done & OHCI_DONE_INTRS)
1083 			intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
1084 	} else
1085 		intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1086 
1087 	if (!intrs)
1088 		return (0);
1089 
1090 	intrs &= ~OHCI_MIE;
1091 	OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */
1092 	eintrs = intrs & sc->sc_eintrs;
1093 	if (!eintrs)
1094 		return (0);
1095 
1096 	sc->sc_bus.intr_context++;
1097 	sc->sc_bus.no_intrs++;
1098 	DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
1099 		     sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
1100 		     (u_int)eintrs));
1101 
1102 	if (eintrs & OHCI_SO) {
1103 		sc->sc_overrun_cnt++;
1104 		if (usbd_ratecheck(&sc->sc_overrun_ntc)) {
1105 			printf("%s: %u scheduling overruns\n",
1106 			    USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt);
1107 			sc->sc_overrun_cnt = 0;
1108 		}
1109 		/* XXX do what */
1110 		intrs &= ~OHCI_SO;
1111 	}
1112 	if (eintrs & OHCI_WDH) {
1113 		ohci_add_done(sc, done &~ OHCI_DONE_INTRS);
1114 		sc->sc_hcca->hcca_done_head = 0;
1115 		usb_schedsoftintr(&sc->sc_bus);
1116 		intrs &= ~OHCI_WDH;
1117 	}
1118 	if (eintrs & OHCI_RD) {
1119 		printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
1120 		/* XXX process resume detect */
1121 	}
1122 	if (eintrs & OHCI_UE) {
1123 		printf("%s: unrecoverable error, controller halted\n",
1124 		       USBDEVNAME(sc->sc_bus.bdev));
1125 		OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1126 		/* XXX what else */
1127 	}
1128 	if (eintrs & OHCI_RHSC) {
1129 		ohci_rhsc(sc, sc->sc_intrxfer);
1130 		intrs &= ~OHCI_RHSC;
1131 
1132 		/*
1133 		 * Disable RHSC interrupt for now, because it will be
1134 		 * on until the port has been reset.
1135 		 */
1136 		ohci_rhsc_able(sc, 0);
1137 	}
1138 
1139 	sc->sc_bus.intr_context--;
1140 
1141 	/* Block unprocessed interrupts. XXX */
1142 	OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs);
1143 	sc->sc_eintrs &= ~intrs;
1144 
1145 	return (1);
1146 }
1147 
1148 void
1149 ohci_rhsc_able(ohci_softc_t *sc, int on)
1150 {
1151 	DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on));
1152 	if (on) {
1153 		sc->sc_eintrs |= OHCI_RHSC;
1154 		OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1155 	} else {
1156 		sc->sc_eintrs &= ~OHCI_RHSC;
1157 		OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
1158 	}
1159 }
1160 
1161 #ifdef OHCI_DEBUG
1162 char *ohci_cc_strs[] = {
1163 	"NO_ERROR",
1164 	"CRC",
1165 	"BIT_STUFFING",
1166 	"DATA_TOGGLE_MISMATCH",
1167 	"STALL",
1168 	"DEVICE_NOT_RESPONDING",
1169 	"PID_CHECK_FAILURE",
1170 	"UNEXPECTED_PID",
1171 	"DATA_OVERRUN",
1172 	"DATA_UNDERRUN",
1173 	"BUFFER_OVERRUN",
1174 	"BUFFER_UNDERRUN",
1175 	"reserved",
1176 	"reserved",
1177 	"NOT_ACCESSED",
1178 	"NOT_ACCESSED",
1179 };
1180 #endif
1181 
1182 void
1183 ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done)
1184 {
1185 	ohci_soft_itd_t *sitd, *sidone, **ip;
1186 	ohci_soft_td_t  *std,  *sdone,  **p;
1187 
1188 	/* Reverse the done list. */
1189 	for (sdone = NULL, sidone = NULL; done != 0; ) {
1190 		std = ohci_hash_find_td(sc, done);
1191 		if (std != NULL) {
1192 			std->dnext = sdone;
1193 			done = le32toh(std->td.td_nexttd);
1194 			sdone = std;
1195 			DPRINTFN(10,("add TD %p\n", std));
1196 			continue;
1197 		}
1198 		sitd = ohci_hash_find_itd(sc, done);
1199 		if (sitd != NULL) {
1200 			sitd->dnext = sidone;
1201 			done = le32toh(sitd->itd.itd_nextitd);
1202 			sidone = sitd;
1203 			DPRINTFN(5,("add ITD %p\n", sitd));
1204 			continue;
1205 		}
1206 		panic("ohci_add_done: addr 0x%08lx not found\n", (u_long)done);
1207 	}
1208 
1209 	/* sdone & sidone now hold the done lists. */
1210 	/* Put them on the already processed lists. */
1211 	for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext)
1212 		;
1213 	*p = sdone;
1214 	for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext)
1215 		;
1216 	*ip = sidone;
1217 }
1218 
1219 void
1220 ohci_softintr(void *v)
1221 {
1222 	ohci_softc_t *sc = v;
1223 	ohci_soft_itd_t *sitd, *sidone, *sitdnext;
1224 	ohci_soft_td_t  *std,  *sdone,  *stdnext;
1225 	usbd_xfer_handle xfer;
1226 	int len, cc, s;
1227 
1228 	sc->sc_bus.intr_context++;
1229 
1230 	s = splhardusb();
1231 	sdone = sc->sc_sdone;
1232 	sc->sc_sdone = NULL;
1233 	sidone = sc->sc_sidone;
1234 	sc->sc_sidone = NULL;
1235 	splx(s);
1236 
1237 	DPRINTFN(10,("ohci_process_done: sdone=%p sidone=%p\n", sdone, sidone));
1238 
1239 #ifdef OHCI_DEBUG
1240 	if (ohcidebug > 10) {
1241 		DPRINTF(("ohci_process_done: TD done:\n"));
1242 		ohci_dump_tds(sdone);
1243 	}
1244 #endif
1245 
1246 	for (std = sdone; std; std = stdnext) {
1247 		xfer = std->xfer;
1248 		stdnext = std->dnext;
1249 		DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n",
1250 				std, xfer, xfer ? xfer->hcpriv : 0));
1251 		if (xfer == NULL) {
1252 			/* xfer == NULL: There seems to be no xfer associated
1253 			 * with this TD. It is tailp that happened to end up on
1254 			 * the done queue.
1255 			 */
1256 			continue;
1257 		}
1258 		if (xfer->status == USBD_CANCELLED ||
1259 		    xfer->status == USBD_TIMEOUT) {
1260 			DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1261 				 xfer));
1262 			/* Handled by abort routine. */
1263 			continue;
1264 		}
1265 		usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
1266 		cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags));
1267 		if (cc == OHCI_CC_NO_ERROR) {
1268 			len = std->len;
1269 			if (std->td.td_cbp != 0)
1270 				len -= le32toh(std->td.td_be) -
1271 				       le32toh(std->td.td_cbp) + 1;
1272 			DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n",
1273 				      len, std->flags));
1274 			if (std->flags & OHCI_ADD_LEN)
1275 				xfer->actlen += len;
1276 			if (std->flags & OHCI_CALL_DONE) {
1277 				xfer->status = USBD_NORMAL_COMPLETION;
1278 				usb_transfer_complete(xfer);
1279 			}
1280 			ohci_free_std(sc, std);
1281 		} else {
1282 			/*
1283 			 * Endpoint is halted.  First unlink all the TDs
1284 			 * belonging to the failed transfer, and then restart
1285 			 * the endpoint.
1286 			 */
1287 			ohci_soft_td_t *p, *n;
1288 			struct ohci_pipe *opipe =
1289 				(struct ohci_pipe *)xfer->pipe;
1290 
1291 			DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n",
1292 			  OHCI_TD_GET_CC(le32toh(std->td.td_flags)),
1293 			  ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))]));
1294 
1295 			/* remove TDs */
1296 			for (p = std; p->xfer == xfer; p = n) {
1297 				n = p->nexttd;
1298 				ohci_free_std(sc, p);
1299 			}
1300 
1301 			/* clear halt */
1302 			opipe->sed->ed.ed_headp = htole32(p->physaddr);
1303 			OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1304 
1305 			if (cc == OHCI_CC_STALL)
1306 				xfer->status = USBD_STALLED;
1307 			else
1308 				xfer->status = USBD_IOERROR;
1309 			usb_transfer_complete(xfer);
1310 		}
1311 	}
1312 
1313 #ifdef OHCI_DEBUG
1314 	if (ohcidebug > 10) {
1315 		DPRINTF(("ohci_process_done: ITD done:\n"));
1316 		ohci_dump_itds(sidone);
1317 	}
1318 #endif
1319 
1320 	for (sitd = sidone; sitd != NULL; sitd = sitdnext) {
1321 		xfer = sitd->xfer;
1322 		sitdnext = sitd->dnext;
1323 		DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n",
1324 			     sitd, xfer, xfer ? xfer->hcpriv : 0));
1325 		if (xfer == NULL)
1326 			continue;
1327 		if (xfer->status == USBD_CANCELLED ||
1328 		    xfer->status == USBD_TIMEOUT) {
1329 			DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1330 				 xfer));
1331 			/* Handled by abort routine. */
1332 			continue;
1333 		}
1334 #ifdef DIAGNOSTIC
1335 		if (sitd->isdone)
1336 			printf("ohci_softintr: sitd=%p is done\n", sitd);
1337 		sitd->isdone = 1;
1338 #endif
1339 		cc = OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags));
1340 		if (cc == OHCI_CC_NO_ERROR) {
1341 			/* XXX compute length for input */
1342 			struct ohci_pipe *opipe =
1343 				(struct ohci_pipe *)xfer->pipe;
1344 			if (sitd->flags & OHCI_CALL_DONE) {
1345 				opipe->u.iso.inuse -= xfer->nframes;
1346 				/* XXX update frlengths with actual length */
1347 				/* XXX xfer->actlen = actlen; */
1348 				xfer->status = USBD_NORMAL_COMPLETION;
1349 				usb_transfer_complete(xfer);
1350 			}
1351 		} else {
1352 			/* XXX Do more */
1353 			xfer->status = USBD_IOERROR;
1354 			usb_transfer_complete(xfer);
1355 		}
1356 	}
1357 
1358 	sc->sc_bus.intr_context--;
1359 }
1360 
1361 void
1362 ohci_device_ctrl_done(usbd_xfer_handle xfer)
1363 {
1364 	DPRINTFN(10,("ohci_ctrl_done: xfer=%p\n", xfer));
1365 
1366 #ifdef DIAGNOSTIC
1367 	if (!(xfer->rqflags & URQ_REQUEST)) {
1368 		panic("ohci_ctrl_done: not a request\n");
1369 	}
1370 #endif
1371 	xfer->hcpriv = NULL;
1372 }
1373 
1374 void
1375 ohci_device_intr_done(usbd_xfer_handle xfer)
1376 {
1377 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1378 	ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1379 	ohci_soft_ed_t *sed = opipe->sed;
1380 	ohci_soft_td_t *data, *tail;
1381 
1382 
1383 	DPRINTFN(10,("ohci_intr_done: xfer=%p, actlen=%d\n",
1384 		     xfer, xfer->actlen));
1385 
1386 	xfer->hcpriv = NULL;
1387 
1388 	if (xfer->pipe->repeat) {
1389 		data = opipe->tail.td;
1390 		tail = ohci_alloc_std(sc); /* XXX should reuse TD */
1391 		if (tail == NULL) {
1392 			xfer->status = USBD_NOMEM;
1393 			return;
1394 		}
1395 		tail->xfer = NULL;
1396 
1397 		data->td.td_flags = htole32(
1398 			OHCI_TD_IN | OHCI_TD_NOCC |
1399 			OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
1400 		if (xfer->flags & USBD_SHORT_XFER_OK)
1401 			data->td.td_flags |= htole32(OHCI_TD_R);
1402 		data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf));
1403 		data->nexttd = tail;
1404 		data->td.td_nexttd = htole32(tail->physaddr);
1405 		data->td.td_be = htole32(le32toh(data->td.td_cbp) +
1406 			xfer->length - 1);
1407 		data->len = xfer->length;
1408 		data->xfer = xfer;
1409 		data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
1410 		xfer->hcpriv = data;
1411 		xfer->actlen = 0;
1412 
1413 		sed->ed.ed_tailp = htole32(tail->physaddr);
1414 		opipe->tail.td = tail;
1415 	}
1416 }
1417 
1418 void
1419 ohci_device_bulk_done(usbd_xfer_handle xfer)
1420 {
1421 	DPRINTFN(10,("ohci_bulk_done: xfer=%p, actlen=%d\n",
1422 		     xfer, xfer->actlen));
1423 
1424 	xfer->hcpriv = NULL;
1425 }
1426 
1427 void
1428 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer)
1429 {
1430 	usbd_pipe_handle pipe;
1431 	struct ohci_pipe *opipe;
1432 	u_char *p;
1433 	int i, m;
1434 	int hstatus;
1435 
1436 	hstatus = OREAD4(sc, OHCI_RH_STATUS);
1437 	DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n",
1438 		 sc, xfer, hstatus));
1439 
1440 	if (xfer == NULL) {
1441 		/* Just ignore the change. */
1442 		return;
1443 	}
1444 
1445 	pipe = xfer->pipe;
1446 	opipe = (struct ohci_pipe *)pipe;
1447 
1448 	p = KERNADDR(&xfer->dmabuf);
1449 	m = min(sc->sc_noport, xfer->length * 8 - 1);
1450 	memset(p, 0, xfer->length);
1451 	for (i = 1; i <= m; i++) {
1452 		/* Pick out CHANGE bits from the status reg. */
1453 		if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
1454 			p[i/8] |= 1 << (i%8);
1455 	}
1456 	DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
1457 	xfer->actlen = xfer->length;
1458 	xfer->status = USBD_NORMAL_COMPLETION;
1459 
1460 	usb_transfer_complete(xfer);
1461 }
1462 
1463 void
1464 ohci_root_intr_done(usbd_xfer_handle xfer)
1465 {
1466 	xfer->hcpriv = NULL;
1467 }
1468 
1469 void
1470 ohci_root_ctrl_done(usbd_xfer_handle xfer)
1471 {
1472 	xfer->hcpriv = NULL;
1473 }
1474 
1475 /*
1476  * Wait here until controller claims to have an interrupt.
1477  * Then call ohci_intr and return.  Use timeout to avoid waiting
1478  * too long.
1479  */
1480 void
1481 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer)
1482 {
1483 	int timo = xfer->timeout;
1484 	int usecs;
1485 	u_int32_t intrs;
1486 
1487 	xfer->status = USBD_IN_PROGRESS;
1488 	for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
1489 		usb_delay_ms(&sc->sc_bus, 1);
1490 		intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
1491 		DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs));
1492 #ifdef OHCI_DEBUG
1493 		if (ohcidebug > 15)
1494 			ohci_dumpregs(sc);
1495 #endif
1496 		if (intrs) {
1497 			ohci_intr1(sc);
1498 			if (xfer->status != USBD_IN_PROGRESS)
1499 				return;
1500 		}
1501 	}
1502 
1503 	/* Timeout */
1504 	DPRINTF(("ohci_waitintr: timeout\n"));
1505 	xfer->status = USBD_TIMEOUT;
1506 	usb_transfer_complete(xfer);
1507 	/* XXX should free TD */
1508 }
1509 
1510 void
1511 ohci_poll(struct usbd_bus *bus)
1512 {
1513 	ohci_softc_t *sc = (ohci_softc_t *)bus;
1514 
1515 	if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs)
1516 		ohci_intr1(sc);
1517 }
1518 
1519 usbd_status
1520 ohci_device_request(usbd_xfer_handle xfer)
1521 {
1522 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1523 	usb_device_request_t *req = &xfer->request;
1524 	usbd_device_handle dev = opipe->pipe.device;
1525 	ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1526 	int addr = dev->address;
1527 	ohci_soft_td_t *setup, *stat, *next, *tail;
1528 	ohci_soft_ed_t *sed;
1529 	int isread;
1530 	int len;
1531 	usbd_status err;
1532 	int s;
1533 
1534 	isread = req->bmRequestType & UT_READ;
1535 	len = UGETW(req->wLength);
1536 
1537 	DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
1538 		    "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1539 		    req->bmRequestType, req->bRequest, UGETW(req->wValue),
1540 		    UGETW(req->wIndex), len, addr,
1541 		    opipe->pipe.endpoint->edesc->bEndpointAddress));
1542 
1543 	setup = opipe->tail.td;
1544 	stat = ohci_alloc_std(sc);
1545 	if (stat == NULL) {
1546 		err = USBD_NOMEM;
1547 		goto bad1;
1548 	}
1549 	tail = ohci_alloc_std(sc);
1550 	if (tail == NULL) {
1551 		err = USBD_NOMEM;
1552 		goto bad2;
1553 	}
1554 	tail->xfer = NULL;
1555 
1556 	sed = opipe->sed;
1557 	opipe->u.ctl.length = len;
1558 
1559 	/* Update device address and length since they may have changed. */
1560 	/* XXX This only needs to be done once, but it's too early in open. */
1561 	/* XXXX Should not touch ED here! */
1562 	sed->ed.ed_flags = htole32(
1563 	 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) |
1564 	 OHCI_ED_SET_FA(addr) |
1565 	 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)));
1566 
1567 	next = stat;
1568 
1569 	/* Set up data transaction */
1570 	if (len != 0) {
1571 		ohci_soft_td_t *std = stat;
1572 
1573 		err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
1574 			  std, &stat);
1575 		stat = stat->nexttd; /* point at free TD */
1576 		if (err)
1577 			goto bad3;
1578 		/* Start toggle at 1 and then use the carried toggle. */
1579 		std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK);
1580 		std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1);
1581 	}
1582 
1583 	memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req);
1584 
1585 	setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC |
1586 				     OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1587 	setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma));
1588 	setup->nexttd = next;
1589 	setup->td.td_nexttd = htole32(next->physaddr);
1590 	setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1);
1591 	setup->len = 0;
1592 	setup->xfer = xfer;
1593 	setup->flags = 0;
1594 	xfer->hcpriv = setup;
1595 
1596 	stat->td.td_flags = htole32(
1597 		(isread ? OHCI_TD_OUT : OHCI_TD_IN) |
1598 		OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1599 	stat->td.td_cbp = 0;
1600 	stat->nexttd = tail;
1601 	stat->td.td_nexttd = htole32(tail->physaddr);
1602 	stat->td.td_be = 0;
1603 	stat->flags = OHCI_CALL_DONE;
1604 	stat->len = 0;
1605 	stat->xfer = xfer;
1606 
1607 #ifdef OHCI_DEBUG
1608 	if (ohcidebug > 5) {
1609 		DPRINTF(("ohci_device_request:\n"));
1610 		ohci_dump_ed(sed);
1611 		ohci_dump_tds(setup);
1612 	}
1613 #endif
1614 
1615 	/* Insert ED in schedule */
1616 	s = splusb();
1617 	sed->ed.ed_tailp = htole32(tail->physaddr);
1618 	opipe->tail.td = tail;
1619 	OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1620 	if (xfer->timeout && !sc->sc_bus.use_polling) {
1621                 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
1622 			    ohci_timeout, xfer);
1623 	}
1624 	splx(s);
1625 
1626 #if 0
1627 	if (ohcidebug > 10) {
1628 		delay(10000);
1629 		DPRINTF(("ohci_device_request: status=%x\n",
1630 			 OREAD4(sc, OHCI_COMMAND_STATUS)));
1631 		ohci_dump_ed(sed);
1632 		ohci_dump_tds(setup);
1633 	}
1634 #endif
1635 
1636 	return (USBD_NORMAL_COMPLETION);
1637 
1638  bad3:
1639 	ohci_free_std(sc, tail);
1640  bad2:
1641 	ohci_free_std(sc, stat);
1642  bad1:
1643 	return (err);
1644 }
1645 
1646 /*
1647  * Add an ED to the schedule.  Called at splusb().
1648  */
1649 void
1650 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1651 {
1652 	SPLUSBCHECK;
1653 	sed->next = head->next;
1654 	sed->ed.ed_nexted = head->ed.ed_nexted;
1655 	head->next = sed;
1656 	head->ed.ed_nexted = htole32(sed->physaddr);
1657 }
1658 
1659 /*
1660  * Remove an ED from the schedule.  Called at splusb().
1661  */
1662 void
1663 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1664 {
1665 	ohci_soft_ed_t *p;
1666 
1667 	SPLUSBCHECK;
1668 
1669 	/* XXX */
1670 	for (p = head; p == NULL && p->next != sed; p = p->next)
1671 		;
1672 	if (p == NULL)
1673 		panic("ohci_rem_ed: ED not found\n");
1674 	p->next = sed->next;
1675 	p->ed.ed_nexted = sed->ed.ed_nexted;
1676 }
1677 
1678 /*
1679  * When a transfer is completed the TD is added to the done queue by
1680  * the host controller.  This queue is the processed by software.
1681  * Unfortunately the queue contains the physical address of the TD
1682  * and we have no simple way to translate this back to a kernel address.
1683  * To make the translation possible (and fast) we use a hash table of
1684  * TDs currently in the schedule.  The physical address is used as the
1685  * hash value.
1686  */
1687 
1688 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1689 /* Called at splusb() */
1690 void
1691 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1692 {
1693 	int h = HASH(std->physaddr);
1694 
1695 	SPLUSBCHECK;
1696 
1697 	LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1698 }
1699 
1700 /* Called at splusb() */
1701 void
1702 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1703 {
1704 	SPLUSBCHECK;
1705 
1706 	LIST_REMOVE(std, hnext);
1707 }
1708 
1709 ohci_soft_td_t *
1710 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a)
1711 {
1712 	int h = HASH(a);
1713 	ohci_soft_td_t *std;
1714 
1715 	for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1716 	     std != NULL;
1717 	     std = LIST_NEXT(std, hnext))
1718 		if (std->physaddr == a)
1719 			return (std);
1720 	return (NULL);
1721 }
1722 
1723 /* Called at splusb() */
1724 void
1725 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1726 {
1727 	int h = HASH(sitd->physaddr);
1728 
1729 	SPLUSBCHECK;
1730 
1731 	DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n",
1732 		    sitd, (u_long)sitd->physaddr));
1733 
1734 	LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext);
1735 }
1736 
1737 /* Called at splusb() */
1738 void
1739 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1740 {
1741 	SPLUSBCHECK;
1742 
1743 	DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n",
1744 		    sitd, (u_long)sitd->physaddr));
1745 
1746 	LIST_REMOVE(sitd, hnext);
1747 }
1748 
1749 ohci_soft_itd_t *
1750 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a)
1751 {
1752 	int h = HASH(a);
1753 	ohci_soft_itd_t *sitd;
1754 
1755 	for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]);
1756 	     sitd != NULL;
1757 	     sitd = LIST_NEXT(sitd, hnext))
1758 		if (sitd->physaddr == a)
1759 			return (sitd);
1760 	return (NULL);
1761 }
1762 
1763 void
1764 ohci_timeout(void *addr)
1765 {
1766 	usbd_xfer_handle xfer = addr;
1767 	int s;
1768 
1769 	DPRINTF(("ohci_timeout: xfer=%p\n", xfer));
1770 
1771 	s = splusb();
1772 	xfer->device->bus->intr_context++;
1773 	ohci_abort_xfer(xfer, USBD_TIMEOUT);
1774 	xfer->device->bus->intr_context--;
1775 	splx(s);
1776 }
1777 
1778 #ifdef OHCI_DEBUG
1779 void
1780 ohci_dump_tds(ohci_soft_td_t *std)
1781 {
1782 	for (; std; std = std->nexttd)
1783 		ohci_dump_td(std);
1784 }
1785 
1786 void
1787 ohci_dump_td(ohci_soft_td_t *std)
1788 {
1789 	char sbuf[128];
1790 
1791 	bitmask_snprintf((int)le32toh(std->td.td_flags),
1792 			 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
1793 			 sbuf, sizeof(sbuf));
1794 
1795 	DPRINTF(("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx "
1796 		 "nexttd=0x%08lx be=0x%08lx\n",
1797 		 std, (u_long)std->physaddr, sbuf,
1798 		 OHCI_TD_GET_DI(le32toh(std->td.td_flags)),
1799 		 OHCI_TD_GET_EC(le32toh(std->td.td_flags)),
1800 		 OHCI_TD_GET_CC(le32toh(std->td.td_flags)),
1801 		 (u_long)le32toh(std->td.td_cbp),
1802 		 (u_long)le32toh(std->td.td_nexttd),
1803 		 (u_long)le32toh(std->td.td_be)));
1804 }
1805 
1806 void
1807 ohci_dump_itd(ohci_soft_itd_t *sitd)
1808 {
1809 	int i;
1810 
1811 	DPRINTF(("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n"
1812 		 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n",
1813 		 sitd, (u_long)sitd->physaddr,
1814 		 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)),
1815 		 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)),
1816 		 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)),
1817 		 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)),
1818 		 (u_long)le32toh(sitd->itd.itd_bp0),
1819 		 (u_long)le32toh(sitd->itd.itd_nextitd),
1820 		 (u_long)le32toh(sitd->itd.itd_be)));
1821 	for (i = 0; i < OHCI_ITD_NOFFSET; i++)
1822 		DPRINTF(("offs[%d]=0x%04x ", i,
1823 			 (u_int)le16toh(sitd->itd.itd_offset[i])));
1824 	DPRINTF(("\n"));
1825 }
1826 
1827 void
1828 ohci_dump_itds(ohci_soft_itd_t *sitd)
1829 {
1830 	for (; sitd; sitd = sitd->nextitd)
1831 		ohci_dump_itd(sitd);
1832 }
1833 
1834 void
1835 ohci_dump_ed(ohci_soft_ed_t *sed)
1836 {
1837 	char sbuf[128], sbuf2[128];
1838 
1839 	bitmask_snprintf((int)le32toh(sed->ed.ed_flags),
1840 			 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO",
1841 			 sbuf, sizeof(sbuf));
1842 	bitmask_snprintf((u_long)le32toh(sed->ed.ed_headp),
1843 			 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2));
1844 
1845 	DPRINTF(("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d %s\ntailp=0x%08lx "
1846 		 "headflags=%s headp=0x%08lx nexted=0x%08lx\n",
1847 		 sed, (u_long)sed->physaddr,
1848 		 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)),
1849 		 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)),
1850 		 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf,
1851 		 (u_long)le32toh(sed->ed.ed_tailp), sbuf2,
1852 		 (u_long)le32toh(sed->ed.ed_headp),
1853 		 (u_long)le32toh(sed->ed.ed_nexted)));
1854 }
1855 #endif
1856 
1857 usbd_status
1858 ohci_open(usbd_pipe_handle pipe)
1859 {
1860 	usbd_device_handle dev = pipe->device;
1861 	ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1862 	usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
1863 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1864 	u_int8_t addr = dev->address;
1865 	u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
1866 	ohci_soft_ed_t *sed;
1867 	ohci_soft_td_t *std;
1868 	ohci_soft_itd_t *sitd;
1869 	ohci_physaddr_t tdphys;
1870 	u_int32_t fmt;
1871 	usbd_status err;
1872 	int s;
1873 	int ival;
1874 
1875 	DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
1876 		     pipe, addr, ed->bEndpointAddress, sc->sc_addr));
1877 
1878 	std = NULL;
1879 	sed = NULL;
1880 
1881 	if (addr == sc->sc_addr) {
1882 		switch (ed->bEndpointAddress) {
1883 		case USB_CONTROL_ENDPOINT:
1884 			pipe->methods = &ohci_root_ctrl_methods;
1885 			break;
1886 		case UE_DIR_IN | OHCI_INTR_ENDPT:
1887 			pipe->methods = &ohci_root_intr_methods;
1888 			break;
1889 		default:
1890 			return (USBD_INVAL);
1891 		}
1892 	} else {
1893 		sed = ohci_alloc_sed(sc);
1894 		if (sed == NULL)
1895 			goto bad0;
1896 		opipe->sed = sed;
1897 		if (xfertype == UE_ISOCHRONOUS) {
1898 			sitd = ohci_alloc_sitd(sc);
1899 			if (sitd == NULL) {
1900 				ohci_free_sitd(sc, sitd);
1901 				goto bad1;
1902 			}
1903 			opipe->tail.itd = sitd;
1904 			tdphys = sitd->physaddr;
1905 			fmt = OHCI_ED_FORMAT_ISO;
1906 			if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
1907 				fmt |= OHCI_ED_DIR_IN;
1908 			else
1909 				fmt |= OHCI_ED_DIR_OUT;
1910 		} else {
1911 			std = ohci_alloc_std(sc);
1912 			if (std == NULL) {
1913 				ohci_free_std(sc, std);
1914 				goto bad1;
1915 			}
1916 			opipe->tail.td = std;
1917 			tdphys = std->physaddr;
1918 			fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD;
1919 		}
1920 		sed->ed.ed_flags = htole32(
1921 			OHCI_ED_SET_FA(addr) |
1922 			OHCI_ED_SET_EN(ed->bEndpointAddress) |
1923 			(dev->lowspeed ? OHCI_ED_SPEED : 0) | fmt |
1924 			OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
1925 		sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys);
1926 
1927 		switch (xfertype) {
1928 		case UE_CONTROL:
1929 			pipe->methods = &ohci_device_ctrl_methods;
1930 			err = usb_allocmem(&sc->sc_bus,
1931 				  sizeof(usb_device_request_t),
1932 				  0, &opipe->u.ctl.reqdma);
1933 			if (err)
1934 				goto bad;
1935 			s = splusb();
1936 			ohci_add_ed(sed, sc->sc_ctrl_head);
1937 			splx(s);
1938 			break;
1939 		case UE_INTERRUPT:
1940 			pipe->methods = &ohci_device_intr_methods;
1941 			ival = pipe->interval;
1942 			if (ival == USBD_DEFAULT_INTERVAL)
1943 				ival = ed->bInterval;
1944 			return (ohci_device_setintr(sc, opipe, ival));
1945 		case UE_ISOCHRONOUS:
1946 			pipe->methods = &ohci_device_isoc_methods;
1947 			return (ohci_setup_isoc(pipe));
1948 		case UE_BULK:
1949 			pipe->methods = &ohci_device_bulk_methods;
1950 			s = splusb();
1951 			ohci_add_ed(sed, sc->sc_bulk_head);
1952 			splx(s);
1953 			break;
1954 		}
1955 	}
1956 	return (USBD_NORMAL_COMPLETION);
1957 
1958  bad:
1959 	if (std != NULL)
1960 		ohci_free_std(sc, std);
1961  bad1:
1962 	if (sed != NULL)
1963 		ohci_free_sed(sc, sed);
1964  bad0:
1965 	return (USBD_NOMEM);
1966 
1967 }
1968 
1969 /*
1970  * Close a reqular pipe.
1971  * Assumes that there are no pending transactions.
1972  */
1973 void
1974 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head)
1975 {
1976 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1977 	ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1978 	ohci_soft_ed_t *sed = opipe->sed;
1979 	int s;
1980 
1981 	s = splusb();
1982 #ifdef DIAGNOSTIC
1983 	sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
1984 	if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
1985 	    (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) {
1986 		ohci_physaddr_t td = le32toh(sed->ed.ed_headp);
1987 		ohci_soft_td_t *std;
1988 		for (std = LIST_FIRST(&sc->sc_hash_tds[HASH(td)]);
1989 		     std != NULL;
1990 		     std = LIST_NEXT(std, hnext))
1991 		    if (std->physaddr == td)
1992 			break;
1993 		printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
1994 		       "tl=0x%x pipe=%p, std=%p\n", sed,
1995 		       (int)le32toh(sed->ed.ed_headp),
1996 		       (int)le32toh(sed->ed.ed_tailp),
1997 		       pipe, std);
1998 		usb_delay_ms(&sc->sc_bus, 2);
1999 		if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2000 		    (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
2001 			printf("ohci_close_pipe: pipe still not empty\n");
2002 	}
2003 #endif
2004 	ohci_rem_ed(sed, head);
2005 	splx(s);
2006 	ohci_free_sed(sc, opipe->sed);
2007 }
2008 
2009 /*
2010  * Abort a device request.
2011  * If this routine is called at splusb() it guarantees that the request
2012  * will be removed from the hardware scheduling and that the callback
2013  * for it will be called with USBD_CANCELLED status.
2014  * It's impossible to guarantee that the requested transfer will not
2015  * have happened since the hardware runs concurrently.
2016  * If the transaction has already happened we rely on the ordinary
2017  * interrupt processing to process it.
2018  */
2019 void
2020 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2021 {
2022 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2023 	ohci_soft_ed_t *sed;
2024 
2025 	DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p\n", xfer, opipe));
2026 
2027 	xfer->status = status;
2028 
2029 	usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
2030 
2031 	sed = opipe->sed;
2032 	DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed));
2033 	sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */
2034 
2035 #if 1
2036 	if (xfer->device->bus->intr_context) {
2037 		/* We have no process context, so we can't use tsleep(). */
2038 		usb_callout(xfer->pipe->abort_handle,
2039 		    hz / USB_FRAMES_PER_SECOND, ohci_abort_xfer_end, xfer);
2040 	} else {
2041 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__)
2042 		KASSERT(intr_nesting_level == 0,
2043 	        	("ohci_abort_req in interrupt context"));
2044 #endif
2045 		usb_delay_ms(opipe->pipe.device->bus, 1);
2046 		ohci_abort_xfer_end(xfer);
2047 	}
2048 #else
2049 	delay(1000);
2050 	ohci_abort_xfer_end(xfer);
2051 #endif
2052 }
2053 
2054 void
2055 ohci_abort_xfer_end(void *v)
2056 {
2057 	usbd_xfer_handle xfer = v;
2058 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2059 	ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
2060 	ohci_soft_ed_t *sed;
2061 	ohci_soft_td_t *p, *n;
2062 	int s;
2063 
2064 	s = splusb();
2065 
2066 	p = xfer->hcpriv;
2067 #ifdef DIAGNOSTIC
2068 	if (p == NULL) {
2069 		splx(s);
2070 		printf("ohci_abort_xfer: hcpriv==0\n");
2071 		return;
2072 	}
2073 #endif
2074 	for (; p->xfer == xfer; p = n) {
2075 		n = p->nexttd;
2076 		ohci_free_std(sc, p);
2077 	}
2078 
2079 	sed = opipe->sed;
2080 	DPRINTFN(2,("ohci_abort_xfer: set hd=%x, tl=%x\n",
2081 		    (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp)));
2082 	sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */
2083 	sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */
2084 
2085 	usb_transfer_complete(xfer);
2086 
2087 	splx(s);
2088 }
2089 
2090 /*
2091  * Data structures and routines to emulate the root hub.
2092  */
2093 Static usb_device_descriptor_t ohci_devd = {
2094 	USB_DEVICE_DESCRIPTOR_SIZE,
2095 	UDESC_DEVICE,		/* type */
2096 	{0x00, 0x01},		/* USB version */
2097 	UDCLASS_HUB,		/* class */
2098 	UDSUBCLASS_HUB,		/* subclass */
2099 	0,			/* protocol */
2100 	64,			/* max packet */
2101 	{0},{0},{0x00,0x01},	/* device id */
2102 	1,2,0,			/* string indicies */
2103 	1			/* # of configurations */
2104 };
2105 
2106 Static usb_config_descriptor_t ohci_confd = {
2107 	USB_CONFIG_DESCRIPTOR_SIZE,
2108 	UDESC_CONFIG,
2109 	{USB_CONFIG_DESCRIPTOR_SIZE +
2110 	 USB_INTERFACE_DESCRIPTOR_SIZE +
2111 	 USB_ENDPOINT_DESCRIPTOR_SIZE},
2112 	1,
2113 	1,
2114 	0,
2115 	UC_SELF_POWERED,
2116 	0			/* max power */
2117 };
2118 
2119 Static usb_interface_descriptor_t ohci_ifcd = {
2120 	USB_INTERFACE_DESCRIPTOR_SIZE,
2121 	UDESC_INTERFACE,
2122 	0,
2123 	0,
2124 	1,
2125 	UICLASS_HUB,
2126 	UISUBCLASS_HUB,
2127 	0,
2128 	0
2129 };
2130 
2131 Static usb_endpoint_descriptor_t ohci_endpd = {
2132 	USB_ENDPOINT_DESCRIPTOR_SIZE,
2133 	UDESC_ENDPOINT,
2134 	UE_DIR_IN | OHCI_INTR_ENDPT,
2135 	UE_INTERRUPT,
2136 	{8, 0},			/* max packet */
2137 	255
2138 };
2139 
2140 Static usb_hub_descriptor_t ohci_hubd = {
2141 	USB_HUB_DESCRIPTOR_SIZE,
2142 	UDESC_HUB,
2143 	0,
2144 	{0,0},
2145 	0,
2146 	0,
2147 	{0},
2148 };
2149 
2150 Static int
2151 ohci_str(p, l, s)
2152 	usb_string_descriptor_t *p;
2153 	int l;
2154 	char *s;
2155 {
2156 	int i;
2157 
2158 	if (l == 0)
2159 		return (0);
2160 	p->bLength = 2 * strlen(s) + 2;
2161 	if (l == 1)
2162 		return (1);
2163 	p->bDescriptorType = UDESC_STRING;
2164 	l -= 2;
2165 	for (i = 0; s[i] && l > 1; i++, l -= 2)
2166 		USETW2(p->bString[i], 0, s[i]);
2167 	return (2*i+2);
2168 }
2169 
2170 /*
2171  * Simulate a hardware hub by handling all the necessary requests.
2172  */
2173 Static usbd_status
2174 ohci_root_ctrl_transfer(usbd_xfer_handle xfer)
2175 {
2176 	usbd_status err;
2177 
2178 	/* Insert last in queue. */
2179 	err = usb_insert_transfer(xfer);
2180 	if (err)
2181 		return (err);
2182 
2183 	/* Pipe isn't running, start first */
2184 	return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2185 }
2186 
2187 Static usbd_status
2188 ohci_root_ctrl_start(usbd_xfer_handle xfer)
2189 {
2190 	ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2191 	usb_device_request_t *req;
2192 	void *buf = NULL;
2193 	int port, i;
2194 	int s, len, value, index, l, totlen = 0;
2195 	usb_port_status_t ps;
2196 	usb_hub_descriptor_t hubd;
2197 	usbd_status err;
2198 	u_int32_t v;
2199 
2200 	if (sc->sc_dying)
2201 		return (USBD_IOERROR);
2202 
2203 #ifdef DIAGNOSTIC
2204 	if (!(xfer->rqflags & URQ_REQUEST))
2205 		/* XXX panic */
2206 		return (USBD_INVAL);
2207 #endif
2208 	req = &xfer->request;
2209 
2210 	DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
2211 		    req->bmRequestType, req->bRequest));
2212 
2213 	len = UGETW(req->wLength);
2214 	value = UGETW(req->wValue);
2215 	index = UGETW(req->wIndex);
2216 
2217 	if (len != 0)
2218 		buf = KERNADDR(&xfer->dmabuf);
2219 
2220 #define C(x,y) ((x) | ((y) << 8))
2221 	switch(C(req->bRequest, req->bmRequestType)) {
2222 	case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2223 	case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2224 	case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2225 		/*
2226 		 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2227 		 * for the integrated root hub.
2228 		 */
2229 		break;
2230 	case C(UR_GET_CONFIG, UT_READ_DEVICE):
2231 		if (len > 0) {
2232 			*(u_int8_t *)buf = sc->sc_conf;
2233 			totlen = 1;
2234 		}
2235 		break;
2236 	case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2237 		DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
2238 		switch(value >> 8) {
2239 		case UDESC_DEVICE:
2240 			if ((value & 0xff) != 0) {
2241 				err = USBD_IOERROR;
2242 				goto ret;
2243 			}
2244 			totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
2245 			USETW(ohci_devd.idVendor, sc->sc_id_vendor);
2246 			memcpy(buf, &ohci_devd, l);
2247 			break;
2248 		case UDESC_CONFIG:
2249 			if ((value & 0xff) != 0) {
2250 				err = USBD_IOERROR;
2251 				goto ret;
2252 			}
2253 			totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
2254 			memcpy(buf, &ohci_confd, l);
2255 			buf = (char *)buf + l;
2256 			len -= l;
2257 			l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
2258 			totlen += l;
2259 			memcpy(buf, &ohci_ifcd, l);
2260 			buf = (char *)buf + l;
2261 			len -= l;
2262 			l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
2263 			totlen += l;
2264 			memcpy(buf, &ohci_endpd, l);
2265 			break;
2266 		case UDESC_STRING:
2267 			if (len == 0)
2268 				break;
2269 			*(u_int8_t *)buf = 0;
2270 			totlen = 1;
2271 			switch (value & 0xff) {
2272 			case 1: /* Vendor */
2273 				totlen = ohci_str(buf, len, sc->sc_vendor);
2274 				break;
2275 			case 2: /* Product */
2276 				totlen = ohci_str(buf, len, "OHCI root hub");
2277 				break;
2278 			}
2279 			break;
2280 		default:
2281 			err = USBD_IOERROR;
2282 			goto ret;
2283 		}
2284 		break;
2285 	case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2286 		if (len > 0) {
2287 			*(u_int8_t *)buf = 0;
2288 			totlen = 1;
2289 		}
2290 		break;
2291 	case C(UR_GET_STATUS, UT_READ_DEVICE):
2292 		if (len > 1) {
2293 			USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
2294 			totlen = 2;
2295 		}
2296 		break;
2297 	case C(UR_GET_STATUS, UT_READ_INTERFACE):
2298 	case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2299 		if (len > 1) {
2300 			USETW(((usb_status_t *)buf)->wStatus, 0);
2301 			totlen = 2;
2302 		}
2303 		break;
2304 	case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2305 		if (value >= USB_MAX_DEVICES) {
2306 			err = USBD_IOERROR;
2307 			goto ret;
2308 		}
2309 		sc->sc_addr = value;
2310 		break;
2311 	case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2312 		if (value != 0 && value != 1) {
2313 			err = USBD_IOERROR;
2314 			goto ret;
2315 		}
2316 		sc->sc_conf = value;
2317 		break;
2318 	case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2319 		break;
2320 	case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2321 	case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2322 	case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2323 		err = USBD_IOERROR;
2324 		goto ret;
2325 	case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2326 		break;
2327 	case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2328 		break;
2329 	/* Hub requests */
2330 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2331 		break;
2332 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2333 		DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
2334 			     "port=%d feature=%d\n",
2335 			     index, value));
2336 		if (index < 1 || index > sc->sc_noport) {
2337 			err = USBD_IOERROR;
2338 			goto ret;
2339 		}
2340 		port = OHCI_RH_PORT_STATUS(index);
2341 		switch(value) {
2342 		case UHF_PORT_ENABLE:
2343 			OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
2344 			break;
2345 		case UHF_PORT_SUSPEND:
2346 			OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
2347 			break;
2348 		case UHF_PORT_POWER:
2349 			/* Yes, writing to the LOW_SPEED bit clears power. */
2350 			OWRITE4(sc, port, UPS_LOW_SPEED);
2351 			break;
2352 		case UHF_C_PORT_CONNECTION:
2353 			OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
2354 			break;
2355 		case UHF_C_PORT_ENABLE:
2356 			OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
2357 			break;
2358 		case UHF_C_PORT_SUSPEND:
2359 			OWRITE4(sc, port, UPS_C_SUSPEND << 16);
2360 			break;
2361 		case UHF_C_PORT_OVER_CURRENT:
2362 			OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
2363 			break;
2364 		case UHF_C_PORT_RESET:
2365 			OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
2366 			break;
2367 		default:
2368 			err = USBD_IOERROR;
2369 			goto ret;
2370 		}
2371 		switch(value) {
2372 		case UHF_C_PORT_CONNECTION:
2373 		case UHF_C_PORT_ENABLE:
2374 		case UHF_C_PORT_SUSPEND:
2375 		case UHF_C_PORT_OVER_CURRENT:
2376 		case UHF_C_PORT_RESET:
2377 			/* Enable RHSC interrupt if condition is cleared. */
2378 			if ((OREAD4(sc, port) >> 16) == 0)
2379 				ohci_rhsc_able(sc, 1);
2380 			break;
2381 		default:
2382 			break;
2383 		}
2384 		break;
2385 	case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2386 		if (value != 0) {
2387 			err = USBD_IOERROR;
2388 			goto ret;
2389 		}
2390 		v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
2391 		hubd = ohci_hubd;
2392 		hubd.bNbrPorts = sc->sc_noport;
2393 		USETW(hubd.wHubCharacteristics,
2394 		      (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
2395 		       v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
2396 		      /* XXX overcurrent */
2397 		      );
2398 		hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
2399 		v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
2400 		for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
2401 			hubd.DeviceRemovable[i++] = (u_int8_t)v;
2402 		hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
2403 		l = min(len, hubd.bDescLength);
2404 		totlen = l;
2405 		memcpy(buf, &hubd, l);
2406 		break;
2407 	case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2408 		if (len != 4) {
2409 			err = USBD_IOERROR;
2410 			goto ret;
2411 		}
2412 		memset(buf, 0, len); /* ? XXX */
2413 		totlen = len;
2414 		break;
2415 	case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2416 		DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
2417 			    index));
2418 		if (index < 1 || index > sc->sc_noport) {
2419 			err = USBD_IOERROR;
2420 			goto ret;
2421 		}
2422 		if (len != 4) {
2423 			err = USBD_IOERROR;
2424 			goto ret;
2425 		}
2426 		v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2427 		DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
2428 			    v));
2429 		USETW(ps.wPortStatus, v);
2430 		USETW(ps.wPortChange, v >> 16);
2431 		l = min(len, sizeof ps);
2432 		memcpy(buf, &ps, l);
2433 		totlen = l;
2434 		break;
2435 	case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2436 		err = USBD_IOERROR;
2437 		goto ret;
2438 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2439 		break;
2440 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2441 		if (index < 1 || index > sc->sc_noport) {
2442 			err = USBD_IOERROR;
2443 			goto ret;
2444 		}
2445 		port = OHCI_RH_PORT_STATUS(index);
2446 		switch(value) {
2447 		case UHF_PORT_ENABLE:
2448 			OWRITE4(sc, port, UPS_PORT_ENABLED);
2449 			break;
2450 		case UHF_PORT_SUSPEND:
2451 			OWRITE4(sc, port, UPS_SUSPEND);
2452 			break;
2453 		case UHF_PORT_RESET:
2454 			DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
2455 				    index));
2456 			OWRITE4(sc, port, UPS_RESET);
2457 			for (i = 0; i < 10; i++) {
2458 				usb_delay_ms(&sc->sc_bus, 10); /* XXX */
2459 				if ((OREAD4(sc, port) & UPS_RESET) == 0)
2460 					break;
2461 			}
2462 			DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
2463 				    index, OREAD4(sc, port)));
2464 			break;
2465 		case UHF_PORT_POWER:
2466 			DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
2467 				    "%d\n", index));
2468 			OWRITE4(sc, port, UPS_PORT_POWER);
2469 			break;
2470 		default:
2471 			err = USBD_IOERROR;
2472 			goto ret;
2473 		}
2474 		break;
2475 	default:
2476 		err = USBD_IOERROR;
2477 		goto ret;
2478 	}
2479 	xfer->actlen = totlen;
2480 	err = USBD_NORMAL_COMPLETION;
2481  ret:
2482 	xfer->status = err;
2483 	s = splusb();
2484 	usb_transfer_complete(xfer);
2485 	splx(s);
2486 	return (USBD_IN_PROGRESS);
2487 }
2488 
2489 /* Abort a root control request. */
2490 Static void
2491 ohci_root_ctrl_abort(usbd_xfer_handle xfer)
2492 {
2493 	/* Nothing to do, all transfers are synchronous. */
2494 }
2495 
2496 /* Close the root pipe. */
2497 Static void
2498 ohci_root_ctrl_close(usbd_pipe_handle pipe)
2499 {
2500 	DPRINTF(("ohci_root_ctrl_close\n"));
2501 	/* Nothing to do. */
2502 }
2503 
2504 Static usbd_status
2505 ohci_root_intr_transfer(usbd_xfer_handle xfer)
2506 {
2507 	usbd_status err;
2508 
2509 	/* Insert last in queue. */
2510 	err = usb_insert_transfer(xfer);
2511 	if (err)
2512 		return (err);
2513 
2514 	/* Pipe isn't running, start first */
2515 	return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2516 }
2517 
2518 Static usbd_status
2519 ohci_root_intr_start(usbd_xfer_handle xfer)
2520 {
2521 	usbd_pipe_handle pipe = xfer->pipe;
2522 	ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2523 
2524 	if (sc->sc_dying)
2525 		return (USBD_IOERROR);
2526 
2527 	sc->sc_intrxfer = xfer;
2528 
2529 	return (USBD_IN_PROGRESS);
2530 }
2531 
2532 /* Abort a root interrupt request. */
2533 Static void
2534 ohci_root_intr_abort(usbd_xfer_handle xfer)
2535 {
2536 	int s;
2537 
2538 	if (xfer->pipe->intrxfer == xfer) {
2539 		DPRINTF(("ohci_root_intr_abort: remove\n"));
2540 		xfer->pipe->intrxfer = NULL;
2541 	}
2542 	xfer->status = USBD_CANCELLED;
2543 	s = splusb();
2544 	usb_transfer_complete(xfer);
2545 	splx(s);
2546 }
2547 
2548 /* Close the root pipe. */
2549 Static void
2550 ohci_root_intr_close(usbd_pipe_handle pipe)
2551 {
2552 	ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2553 
2554 	DPRINTF(("ohci_root_intr_close\n"));
2555 
2556 	sc->sc_intrxfer = NULL;
2557 }
2558 
2559 /************************/
2560 
2561 Static usbd_status
2562 ohci_device_ctrl_transfer(usbd_xfer_handle xfer)
2563 {
2564 	usbd_status err;
2565 
2566 	/* Insert last in queue. */
2567 	err = usb_insert_transfer(xfer);
2568 	if (err)
2569 		return (err);
2570 
2571 	/* Pipe isn't running, start first */
2572 	return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2573 }
2574 
2575 Static usbd_status
2576 ohci_device_ctrl_start(usbd_xfer_handle xfer)
2577 {
2578 	ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2579 	usbd_status err;
2580 
2581 	if (sc->sc_dying)
2582 		return (USBD_IOERROR);
2583 
2584 #ifdef DIAGNOSTIC
2585 	if (!(xfer->rqflags & URQ_REQUEST)) {
2586 		/* XXX panic */
2587 		printf("ohci_device_ctrl_transfer: not a request\n");
2588 		return (USBD_INVAL);
2589 	}
2590 #endif
2591 
2592 	err = ohci_device_request(xfer);
2593 	if (err)
2594 		return (err);
2595 
2596 	if (sc->sc_bus.use_polling)
2597 		ohci_waitintr(sc, xfer);
2598 	return (USBD_IN_PROGRESS);
2599 }
2600 
2601 /* Abort a device control request. */
2602 Static void
2603 ohci_device_ctrl_abort(usbd_xfer_handle xfer)
2604 {
2605 	DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer));
2606 	ohci_abort_xfer(xfer, USBD_CANCELLED);
2607 }
2608 
2609 /* Close a device control pipe. */
2610 Static void
2611 ohci_device_ctrl_close(usbd_pipe_handle pipe)
2612 {
2613 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2614 	ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2615 
2616 	DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe));
2617 	ohci_close_pipe(pipe, sc->sc_ctrl_head);
2618 	ohci_free_std(sc, opipe->tail.td);
2619 }
2620 
2621 /************************/
2622 
2623 Static void
2624 ohci_device_clear_toggle(usbd_pipe_handle pipe)
2625 {
2626 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2627 
2628 	opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY);
2629 }
2630 
2631 Static void
2632 ohci_noop(usbd_pipe_handle pipe)
2633 {
2634 }
2635 
2636 Static usbd_status
2637 ohci_device_bulk_transfer(usbd_xfer_handle xfer)
2638 {
2639 	usbd_status err;
2640 
2641 	/* Insert last in queue. */
2642 	err = usb_insert_transfer(xfer);
2643 	if (err)
2644 		return (err);
2645 
2646 	/* Pipe isn't running, start first */
2647 	return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2648 }
2649 
2650 Static usbd_status
2651 ohci_device_bulk_start(usbd_xfer_handle xfer)
2652 {
2653 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2654 	usbd_device_handle dev = opipe->pipe.device;
2655 	ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2656 	int addr = dev->address;
2657 	ohci_soft_td_t *data, *tail, *tdp;
2658 	ohci_soft_ed_t *sed;
2659 	int s, len, isread, endpt;
2660 	usbd_status err;
2661 
2662 	if (sc->sc_dying)
2663 		return (USBD_IOERROR);
2664 
2665 #ifdef DIAGNOSTIC
2666 	if (xfer->rqflags & URQ_REQUEST) {
2667 		/* XXX panic */
2668 		printf("ohci_device_bulk_start: a request\n");
2669 		return (USBD_INVAL);
2670 	}
2671 #endif
2672 
2673 	len = xfer->length;
2674 	endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
2675 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2676 	sed = opipe->sed;
2677 
2678 	DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d "
2679 		    "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags,
2680 		    endpt));
2681 
2682 	opipe->u.bulk.isread = isread;
2683 	opipe->u.bulk.length = len;
2684 
2685 	/* Update device address */
2686 	sed->ed.ed_flags = htole32(
2687 		(le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) |
2688 		OHCI_ED_SET_FA(addr));
2689 
2690 	/* Allocate a chain of new TDs (including a new tail). */
2691 	data = opipe->tail.td;
2692 	err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
2693 		  data, &tail);
2694 	/* We want interrupt at the end of the transfer. */
2695 	tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK);
2696 	tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1));
2697 	tail->flags |= OHCI_CALL_DONE;
2698 	tail = tail->nexttd;	/* point at sentinel */
2699 	if (err)
2700 		return (err);
2701 
2702 	tail->xfer = NULL;
2703 	xfer->hcpriv = data;
2704 
2705 	DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
2706 		    "td_cbp=0x%08x td_be=0x%08x\n",
2707 		    (int)le32toh(sed->ed.ed_flags),
2708 		    (int)le32toh(data->td.td_flags),
2709 		    (int)le32toh(data->td.td_cbp),
2710 		    (int)le32toh(data->td.td_be)));
2711 
2712 #ifdef OHCI_DEBUG
2713 	if (ohcidebug > 5) {
2714 		ohci_dump_ed(sed);
2715 		ohci_dump_tds(data);
2716 	}
2717 #endif
2718 
2719 	/* Insert ED in schedule */
2720 	s = splusb();
2721 	for (tdp = data; tdp != tail; tdp = tdp->nexttd) {
2722 		tdp->xfer = xfer;
2723 	}
2724 	sed->ed.ed_tailp = htole32(tail->physaddr);
2725 	opipe->tail.td = tail;
2726 	sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
2727 	OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
2728 	if (xfer->timeout && !sc->sc_bus.use_polling) {
2729                 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
2730 			    ohci_timeout, xfer);
2731 	}
2732 
2733 #if 0
2734 /* This goes wrong if we are too slow. */
2735 	if (ohcidebug > 10) {
2736 		delay(10000);
2737 		DPRINTF(("ohci_device_intr_transfer: status=%x\n",
2738 			 OREAD4(sc, OHCI_COMMAND_STATUS)));
2739 		ohci_dump_ed(sed);
2740 		ohci_dump_tds(data);
2741 	}
2742 #endif
2743 
2744 	splx(s);
2745 
2746 	return (USBD_IN_PROGRESS);
2747 }
2748 
2749 Static void
2750 ohci_device_bulk_abort(usbd_xfer_handle xfer)
2751 {
2752 	DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer));
2753 	ohci_abort_xfer(xfer, USBD_CANCELLED);
2754 }
2755 
2756 /*
2757  * Close a device bulk pipe.
2758  */
2759 Static void
2760 ohci_device_bulk_close(usbd_pipe_handle pipe)
2761 {
2762 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2763 	ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2764 
2765 	DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe));
2766 	ohci_close_pipe(pipe, sc->sc_bulk_head);
2767 	ohci_free_std(sc, opipe->tail.td);
2768 }
2769 
2770 /************************/
2771 
2772 Static usbd_status
2773 ohci_device_intr_transfer(usbd_xfer_handle xfer)
2774 {
2775 	usbd_status err;
2776 
2777 	/* Insert last in queue. */
2778 	err = usb_insert_transfer(xfer);
2779 	if (err)
2780 		return (err);
2781 
2782 	/* Pipe isn't running, start first */
2783 	return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2784 }
2785 
2786 Static usbd_status
2787 ohci_device_intr_start(usbd_xfer_handle xfer)
2788 {
2789 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2790 	usbd_device_handle dev = opipe->pipe.device;
2791 	ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2792 	ohci_soft_ed_t *sed = opipe->sed;
2793 	ohci_soft_td_t *data, *tail;
2794 	int len;
2795 	int s;
2796 
2797 	if (sc->sc_dying)
2798 		return (USBD_IOERROR);
2799 
2800 	DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d "
2801 		     "flags=%d priv=%p\n",
2802 		     xfer, xfer->length, xfer->flags, xfer->priv));
2803 
2804 #ifdef DIAGNOSTIC
2805 	if (xfer->rqflags & URQ_REQUEST)
2806 		panic("ohci_device_intr_transfer: a request\n");
2807 #endif
2808 
2809 	len = xfer->length;
2810 
2811 	data = opipe->tail.td;
2812 	tail = ohci_alloc_std(sc);
2813 	if (tail == NULL)
2814 		return (USBD_NOMEM);
2815 	tail->xfer = NULL;
2816 
2817 	data->td.td_flags = htole32(
2818 		OHCI_TD_IN | OHCI_TD_NOCC |
2819 		OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
2820 	if (xfer->flags & USBD_SHORT_XFER_OK)
2821 		data->td.td_flags |= htole32(OHCI_TD_R);
2822 	data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf));
2823 	data->nexttd = tail;
2824 	data->td.td_nexttd = htole32(tail->physaddr);
2825 	data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1);
2826 	data->len = len;
2827 	data->xfer = xfer;
2828 	data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
2829 	xfer->hcpriv = data;
2830 
2831 #ifdef OHCI_DEBUG
2832 	if (ohcidebug > 5) {
2833 		DPRINTF(("ohci_device_intr_transfer:\n"));
2834 		ohci_dump_ed(sed);
2835 		ohci_dump_tds(data);
2836 	}
2837 #endif
2838 
2839 	/* Insert ED in schedule */
2840 	s = splusb();
2841 	sed->ed.ed_tailp = htole32(tail->physaddr);
2842 	opipe->tail.td = tail;
2843 	sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
2844 
2845 #if 0
2846 /*
2847  * This goes horribly wrong, printing thousands of descriptors,
2848  * because false references are followed due to the fact that the
2849  * TD is gone.
2850  */
2851 	if (ohcidebug > 5) {
2852 		usb_delay_ms(&sc->sc_bus, 5);
2853 		DPRINTF(("ohci_device_intr_transfer: status=%x\n",
2854 			 OREAD4(sc, OHCI_COMMAND_STATUS)));
2855 		ohci_dump_ed(sed);
2856 		ohci_dump_tds(data);
2857 	}
2858 #endif
2859 	splx(s);
2860 
2861 	return (USBD_IN_PROGRESS);
2862 }
2863 
2864 /* Abort a device control request. */
2865 Static void
2866 ohci_device_intr_abort(usbd_xfer_handle xfer)
2867 {
2868 	if (xfer->pipe->intrxfer == xfer) {
2869 		DPRINTF(("ohci_device_intr_abort: remove\n"));
2870 		xfer->pipe->intrxfer = NULL;
2871 	}
2872 	ohci_abort_xfer(xfer, USBD_CANCELLED);
2873 }
2874 
2875 /* Close a device interrupt pipe. */
2876 Static void
2877 ohci_device_intr_close(usbd_pipe_handle pipe)
2878 {
2879 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2880 	ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2881 	int nslots = opipe->u.intr.nslots;
2882 	int pos = opipe->u.intr.pos;
2883 	int j;
2884 	ohci_soft_ed_t *p, *sed = opipe->sed;
2885 	int s;
2886 
2887 	DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
2888 		    pipe, nslots, pos));
2889 	s = splusb();
2890 	sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
2891 	if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2892 	    (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
2893 		usb_delay_ms(&sc->sc_bus, 2);
2894 
2895 	for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
2896 		;
2897 #ifdef DIAGNOSTIC
2898 	if (p == NULL)
2899 		panic("ohci_device_intr_close: ED not found\n");
2900 #endif
2901 	p->next = sed->next;
2902 	p->ed.ed_nexted = sed->ed.ed_nexted;
2903 	splx(s);
2904 
2905 	for (j = 0; j < nslots; j++)
2906 		--sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
2907 
2908 	ohci_free_std(sc, opipe->tail.td);
2909 	ohci_free_sed(sc, opipe->sed);
2910 }
2911 
2912 Static usbd_status
2913 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival)
2914 {
2915 	int i, j, s, best;
2916 	u_int npoll, slow, shigh, nslots;
2917 	u_int bestbw, bw;
2918 	ohci_soft_ed_t *hsed, *sed = opipe->sed;
2919 
2920 	DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
2921 	if (ival == 0) {
2922 		printf("ohci_setintr: 0 interval\n");
2923 		return (USBD_INVAL);
2924 	}
2925 
2926 	npoll = OHCI_NO_INTRS;
2927 	while (npoll > ival)
2928 		npoll /= 2;
2929 	DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
2930 
2931 	/*
2932 	 * We now know which level in the tree the ED must go into.
2933 	 * Figure out which slot has most bandwidth left over.
2934 	 * Slots to examine:
2935 	 * npoll
2936 	 * 1	0
2937 	 * 2	1 2
2938 	 * 4	3 4 5 6
2939 	 * 8	7 8 9 10 11 12 13 14
2940 	 * N    (N-1) .. (N-1+N-1)
2941 	 */
2942 	slow = npoll-1;
2943 	shigh = slow + npoll;
2944 	nslots = OHCI_NO_INTRS / npoll;
2945 	for (best = i = slow, bestbw = ~0; i < shigh; i++) {
2946 		bw = 0;
2947 		for (j = 0; j < nslots; j++)
2948 			bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
2949 		if (bw < bestbw) {
2950 			best = i;
2951 			bestbw = bw;
2952 		}
2953 	}
2954 	DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
2955 		     best, slow, shigh, bestbw));
2956 
2957 	s = splusb();
2958 	hsed = sc->sc_eds[best];
2959 	sed->next = hsed->next;
2960 	sed->ed.ed_nexted = hsed->ed.ed_nexted;
2961 	hsed->next = sed;
2962 	hsed->ed.ed_nexted = htole32(sed->physaddr);
2963 	splx(s);
2964 
2965 	for (j = 0; j < nslots; j++)
2966 		++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
2967 	opipe->u.intr.nslots = nslots;
2968 	opipe->u.intr.pos = best;
2969 
2970 	DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
2971 	return (USBD_NORMAL_COMPLETION);
2972 }
2973 
2974 /***********************/
2975 
2976 usbd_status
2977 ohci_device_isoc_transfer(usbd_xfer_handle xfer)
2978 {
2979 	usbd_status err;
2980 
2981 	DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer));
2982 
2983 	/* Put it on our queue, */
2984 	err = usb_insert_transfer(xfer);
2985 
2986 	/* bail out on error, */
2987 	if (err && err != USBD_IN_PROGRESS)
2988 		return (err);
2989 
2990 	/* XXX should check inuse here */
2991 
2992 	/* insert into schedule, */
2993 	ohci_device_isoc_enter(xfer);
2994 
2995 	/* and start if the pipe wasn't running */
2996 	if (!err)
2997 		ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
2998 
2999 	return (err);
3000 }
3001 
3002 void
3003 ohci_device_isoc_enter(usbd_xfer_handle xfer)
3004 {
3005 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3006 	usbd_device_handle dev = opipe->pipe.device;
3007 	ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
3008 	ohci_soft_ed_t *sed = opipe->sed;
3009 	struct iso *iso = &opipe->u.iso;
3010 	ohci_soft_itd_t *sitd, *nsitd;
3011 	ohci_physaddr_t buf, offs, noffs, bp0;
3012 	int i, ncur, nframes;
3013 	int s;
3014 
3015 	DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p "
3016 		    "nframes=%d\n",
3017 		    iso->inuse, iso->next, xfer, xfer->nframes));
3018 
3019 	if (sc->sc_dying)
3020 		return;
3021 
3022 	if (iso->next == -1) {
3023 		/* Not in use yet, schedule it a few frames ahead. */
3024 		iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5;
3025 		DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n",
3026 			    iso->next));
3027 	}
3028 
3029 	sitd = opipe->tail.itd;
3030 	buf = DMAADDR(&xfer->dmabuf);
3031 	bp0 = OHCI_PAGE(buf);
3032 	offs = OHCI_PAGE_OFFSET(buf);
3033 	nframes = xfer->nframes;
3034 	xfer->hcpriv = sitd;
3035 	for (i = ncur = 0; i < nframes; i++, ncur++) {
3036 		noffs = offs + xfer->frlengths[i];
3037 		if (ncur == OHCI_ITD_NOFFSET ||	/* all offsets used */
3038 		    OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */
3039 
3040 			/* Allocate next ITD */
3041 			nsitd = ohci_alloc_sitd(sc);
3042 			if (nsitd == NULL) {
3043 				/* XXX what now? */
3044 				printf("%s: isoc TD alloc failed\n",
3045 				       USBDEVNAME(sc->sc_bus.bdev));
3046 				return;
3047 			}
3048 
3049 			/* Fill current ITD */
3050 			sitd->itd.itd_flags = htole32(
3051 				OHCI_ITD_NOCC |
3052 				OHCI_ITD_SET_SF(iso->next) |
3053 				OHCI_ITD_SET_DI(6) | /* delay intr a little */
3054 				OHCI_ITD_SET_FC(ncur));
3055 			sitd->itd.itd_bp0 = htole32(bp0);
3056 			sitd->nextitd = nsitd;
3057 			sitd->itd.itd_nextitd = htole32(nsitd->physaddr);
3058 			sitd->itd.itd_be = htole32(bp0 + offs - 1);
3059 			sitd->xfer = xfer;
3060 			sitd->flags = 0;
3061 
3062 			sitd = nsitd;
3063 			iso->next = iso->next + ncur;
3064 			bp0 = OHCI_PAGE(buf + offs);
3065 			ncur = 0;
3066 		}
3067 		sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs));
3068 		offs = noffs;
3069 	}
3070 	nsitd = ohci_alloc_sitd(sc);
3071 	if (nsitd == NULL) {
3072 		/* XXX what now? */
3073 		printf("%s: isoc TD alloc failed\n",
3074 		       USBDEVNAME(sc->sc_bus.bdev));
3075 		return;
3076 	}
3077 	/* Fixup last used ITD */
3078 	sitd->itd.itd_flags = htole32(
3079 		OHCI_ITD_NOCC |
3080 		OHCI_ITD_SET_SF(iso->next) |
3081 		OHCI_ITD_SET_DI(0) |
3082 		OHCI_ITD_SET_FC(ncur));
3083 	sitd->itd.itd_bp0 = htole32(bp0);
3084 	sitd->nextitd = nsitd;
3085 	sitd->itd.itd_nextitd = htole32(nsitd->physaddr);
3086 	sitd->itd.itd_be = htole32(bp0 + offs - 1);
3087 	sitd->xfer = xfer;
3088 	sitd->flags = OHCI_CALL_DONE;
3089 
3090 	iso->next = iso->next + ncur;
3091 	iso->inuse += nframes;
3092 
3093 	xfer->actlen = offs;	/* XXX pretend we did it all */
3094 
3095 	xfer->status = USBD_IN_PROGRESS;
3096 
3097 #ifdef OHCI_DEBUG
3098 	if (ohcidebug > 5) {
3099 		DPRINTF(("ohci_device_isoc_enter: frame=%d\n",
3100 			 le32toh(sc->sc_hcca->hcca_frame_number)));
3101 		ohci_dump_itds(xfer->hcpriv);
3102 		ohci_dump_ed(sed);
3103 	}
3104 #endif
3105 
3106 	s = splusb();
3107 	opipe->tail.itd = nsitd;
3108 	sed->ed.ed_tailp = htole32(nsitd->physaddr);
3109 	splx(s);
3110 
3111 #ifdef OHCI_DEBUG
3112 	if (ohcidebug > 5) {
3113 		delay(150000);
3114 		DPRINTF(("ohci_device_isoc_enter: after frame=%d\n",
3115 			 le32toh(sc->sc_hcca->hcca_frame_number)));
3116 		ohci_dump_itds(xfer->hcpriv);
3117 		ohci_dump_ed(sed);
3118 	}
3119 #endif
3120 }
3121 
3122 usbd_status
3123 ohci_device_isoc_start(usbd_xfer_handle xfer)
3124 {
3125 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3126 	ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3127 
3128 	DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer));
3129 
3130 	if (sc->sc_dying)
3131 		return (USBD_IOERROR);
3132 
3133 #ifdef DIAGNOSTIC
3134 	if (xfer->status != USBD_IN_PROGRESS)
3135 		printf("uhci_device_isoc_start: not in progress %p\n", xfer);
3136 #endif
3137 
3138 	/* XXX anything to do? */
3139 
3140 	return (USBD_IN_PROGRESS);
3141 }
3142 
3143 void
3144 ohci_device_isoc_abort(usbd_xfer_handle xfer)
3145 {
3146 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3147 	ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3148 	ohci_soft_ed_t *sed;
3149 	ohci_soft_itd_t *sitd;
3150 	int s;
3151 
3152 	s = splusb();
3153 
3154 	DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer));
3155 
3156 	/* Transfer is already done. */
3157 	if (xfer->status != USBD_NOT_STARTED &&
3158 	    xfer->status != USBD_IN_PROGRESS) {
3159 		splx(s);
3160 		printf("ohci_device_isoc_abort: early return\n");
3161 		return;
3162 	}
3163 
3164 	/* Give xfer the requested abort code. */
3165 	xfer->status = USBD_CANCELLED;
3166 
3167 	sed = opipe->sed;
3168 	sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */
3169 
3170 	sitd = xfer->hcpriv;
3171 #ifdef DIAGNOSTIC
3172 	if (sitd == NULL) {
3173 		splx(s);
3174 		printf("ohci_device_isoc_abort: hcpriv==0\n");
3175 		return;
3176 	}
3177 #endif
3178 	for (; sitd->xfer == xfer; sitd = sitd->nextitd) {
3179 #ifdef DIAGNOSTIC
3180 		DPRINTFN(1,("abort sets done sitd=%p\n", sitd));
3181 		sitd->isdone = 1;
3182 #endif
3183 	}
3184 
3185 	splx(s);
3186 
3187 	usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET);
3188 
3189 	s = splusb();
3190 
3191 	/* Run callback. */
3192 	usb_transfer_complete(xfer);
3193 
3194 	sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */
3195 	sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */
3196 
3197 	splx(s);
3198 }
3199 
3200 void
3201 ohci_device_isoc_done(usbd_xfer_handle xfer)
3202 {
3203 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3204 	ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3205 	ohci_soft_itd_t *sitd, *nsitd;
3206 
3207 	DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer));
3208 
3209 	for (sitd = xfer->hcpriv;
3210 	     !(sitd->flags & OHCI_CALL_DONE);
3211 	     sitd = nsitd) {
3212 		nsitd = sitd->nextitd;
3213 		DPRINTFN(1,("ohci_device_isoc_done: free sitd=%p\n", sitd));
3214 		ohci_free_sitd(sc, sitd);
3215 	}
3216 	ohci_free_sitd(sc, sitd);
3217 	xfer->hcpriv = NULL;
3218 }
3219 
3220 usbd_status
3221 ohci_setup_isoc(usbd_pipe_handle pipe)
3222 {
3223 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3224 	ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3225 	struct iso *iso = &opipe->u.iso;
3226 	int s;
3227 
3228 	iso->next = -1;
3229 	iso->inuse = 0;
3230 
3231 	s = splusb();
3232 	ohci_add_ed(opipe->sed, sc->sc_isoc_head);
3233 	splx(s);
3234 
3235 	return (USBD_NORMAL_COMPLETION);
3236 }
3237 
3238 void
3239 ohci_device_isoc_close(usbd_pipe_handle pipe)
3240 {
3241 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3242 	ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3243 	int s;
3244 
3245 	DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe));
3246 
3247 	s = splusb();
3248 	ohci_rem_ed(opipe->sed, sc->sc_isoc_head);
3249 	splx(s);
3250 	ohci_close_pipe(pipe, sc->sc_isoc_head);
3251 #ifdef DIAGNOSTIC
3252 	opipe->tail.itd->isdone = 1;
3253 #endif
3254 	ohci_free_sitd(sc, opipe->tail.itd);
3255 }
3256